1# 2# CDDL HEADER START 3# 4# The contents of this file are subject to the terms of the 5# Common Development and Distribution License (the "License"). 6# You may not use this file except in compliance with the License. 7# 8# You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9# or http://www.opensolaris.org/os/licensing. 10# See the License for the specific language governing permissions 11# and limitations under the License. 12# 13# When distributing Covered Code, include this CDDL HEADER in each 14# file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15# If applicable, add the following below this CDDL HEADER, with the 16# fields enclosed by brackets "[]" replaced with your own identifying 17# information: Portions Copyright [yyyy] [name of copyright owner] 18# 19# CDDL HEADER END 20# 21# 22# Copyright 2006 Sun Microsystems, Inc. All rights reserved. 23# Use is subject to license terms. 24# 25 26#ident "%Z%%M% %I% %E% SMI" 27 28one hci1394_state_s 29 30### HAL interface entry points 31root hci1394_s1394if_shutdown 32root hci1394_s1394if_phy 33root hci1394_s1394if_read 34root hci1394_s1394if_read_response 35root hci1394_s1394if_write 36root hci1394_s1394if_write_response 37root hci1394_s1394if_response_complete 38root hci1394_s1394if_lock 39root hci1394_s1394if_lock_response 40root hci1394_alloc_isoch_dma 41root hci1394_free_isoch_dma 42root hci1394_start_isoch_dma 43root hci1394_stop_isoch_dma 44root hci1394_update_isoch_dma 45root hci1394_s1394if_update_config_rom 46root hci1394_s1394if_reset_bus 47root hci1394_s1394if_short_bus_reset 48root hci1394_s1394if_set_contender_bit 49root hci1394_s1394if_set_root_holdoff_bit 50root hci1394_s1394if_set_gap_count 51root hci1394_s1394if_csr_read 52root hci1394_s1394if_csr_write 53root hci1394_s1394if_csr_cswap32 54root hci1394_s1394if_phy_filter_set 55root hci1394_s1394if_phy_filter_clr 56root hci1394_s1394if_power_state_change 57 58### timeout callbacks 59root hci1394_async_pending_timeout 60 61### currently unused functions 62root hci1394_isoch_resume 63root hci1394_ixl_set_start 64root hci1394_ohci_arreq_stop 65root hci1394_ohci_arresp_stop 66root hci1394_ohci_link_disable 67root hci1394_ohci_phy_clr 68 69add h1394_lock_request/recv_lock_req targets s1394_send_response 70add h1394_read_request/recv_read_req targets s1394_send_response 71add h1394_write_request/recv_write_req targets s1394_send_response 72 73add s1394_hal_s::halinfo.hal_events.response_complete targets \ 74 hci1394_s1394if_response_complete 75add s1394_hal_s::halinfo.hal_events.set_contender_bit targets \ 76 hci1394_s1394if_set_contender_bit 77 78### hci1394 callbacks 79add hci1394_ixl_dma_sync/callback targets warlock_dummy 80add hci1394_iso_ctxt_s::isoch_dma_stopped targets warlock_dummy 81 82add hci1394_tlist_s::tl_timer_info.tlt_callback targets \ 83 hci1394_async_pending_timeout 84add hci1394_q_s::q_info.qi_start targets hci1394_async_arreq_start \ 85 hci1394_async_arresp_start hci1394_async_atreq_start \ 86 hci1394_async_atresp_start 87add hci1394_q_s::q_info.qi_wake targets hci1394_async_arreq_wake \ 88 hci1394_async_arresp_wake hci1394_async_atreq_wake \ 89 hci1394_async_atresp_wake 90 91# CMP/FCP 92add s1394_cmp_notify_reg_change/cb target warlock_dummy 93add s1394_fcp_recv_write_request/cb target warlock_dummy 94 95add h1394_read_request/recv_read_req target s1394_cmp_ompr_recv_read_request 96add h1394_lock_request/recv_lock_req target s1394_cmp_ompr_recv_lock_request 97add h1394_read_request/recv_read_req target s1394_cmp_impr_recv_read_request 98add h1394_lock_request/recv_lock_req target s1394_cmp_impr_recv_lock_request 99add h1394_write_request/recv_write_req target s1394_fcp_resp_recv_write_request 100add h1394_write_request/recv_write_req target s1394_fcp_cmd_recv_write_request 101 102add bus_ops::bus_config targets warlock_dummy 103add bus_ops::bus_unconfig targets warlock_dummy 104