xref: /titanic_50/usr/src/uts/common/io/ixgbe/ixgbe_stat.c (revision 10d63b7db37a83b39c7f511cf9426c9d03ea0760)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright(c) 2007-2010 Intel Corporation. All rights reserved.
24  */
25 
26 /*
27  * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
28  * Copyright 2012 Nexenta Systems, Inc. All rights reserved.
29  */
30 
31 #include "ixgbe_sw.h"
32 
33 /*
34  * Update driver private statistics.
35  */
36 static int
37 ixgbe_update_stats(kstat_t *ks, int rw)
38 {
39 	ixgbe_t *ixgbe;
40 	struct ixgbe_hw *hw;
41 	ixgbe_stat_t *ixgbe_ks;
42 	int i;
43 
44 	if (rw == KSTAT_WRITE)
45 		return (EACCES);
46 
47 	ixgbe = (ixgbe_t *)ks->ks_private;
48 	ixgbe_ks = (ixgbe_stat_t *)ks->ks_data;
49 	hw = &ixgbe->hw;
50 
51 	mutex_enter(&ixgbe->gen_lock);
52 
53 	/*
54 	 * Basic information
55 	 */
56 	ixgbe_ks->link_speed.value.ui64 = ixgbe->link_speed;
57 	ixgbe_ks->reset_count.value.ui64 = ixgbe->reset_count;
58 	ixgbe_ks->lroc.value.ui64 = ixgbe->lro_pkt_count;
59 
60 #ifdef IXGBE_DEBUG
61 	ixgbe_ks->rx_frame_error.value.ui64 = 0;
62 	ixgbe_ks->rx_cksum_error.value.ui64 = 0;
63 	ixgbe_ks->rx_exceed_pkt.value.ui64 = 0;
64 	for (i = 0; i < ixgbe->num_rx_rings; i++) {
65 		ixgbe_ks->rx_frame_error.value.ui64 +=
66 		    ixgbe->rx_rings[i].stat_frame_error;
67 		ixgbe_ks->rx_cksum_error.value.ui64 +=
68 		    ixgbe->rx_rings[i].stat_cksum_error;
69 		ixgbe_ks->rx_exceed_pkt.value.ui64 +=
70 		    ixgbe->rx_rings[i].stat_exceed_pkt;
71 	}
72 
73 	ixgbe_ks->tx_overload.value.ui64 = 0;
74 	ixgbe_ks->tx_fail_no_tbd.value.ui64 = 0;
75 	ixgbe_ks->tx_fail_no_tcb.value.ui64 = 0;
76 	ixgbe_ks->tx_fail_dma_bind.value.ui64 = 0;
77 	ixgbe_ks->tx_reschedule.value.ui64 = 0;
78 	for (i = 0; i < ixgbe->num_tx_rings; i++) {
79 		ixgbe_ks->tx_overload.value.ui64 +=
80 		    ixgbe->tx_rings[i].stat_overload;
81 		ixgbe_ks->tx_fail_no_tbd.value.ui64 +=
82 		    ixgbe->tx_rings[i].stat_fail_no_tbd;
83 		ixgbe_ks->tx_fail_no_tcb.value.ui64 +=
84 		    ixgbe->tx_rings[i].stat_fail_no_tcb;
85 		ixgbe_ks->tx_fail_dma_bind.value.ui64 +=
86 		    ixgbe->tx_rings[i].stat_fail_dma_bind;
87 		ixgbe_ks->tx_reschedule.value.ui64 +=
88 		    ixgbe->tx_rings[i].stat_reschedule;
89 	}
90 #endif
91 
92 	/*
93 	 * Hardware calculated statistics.
94 	 */
95 	ixgbe_ks->gprc.value.ui64 = 0;
96 	ixgbe_ks->gptc.value.ui64 = 0;
97 	ixgbe_ks->tor.value.ui64 = 0;
98 	ixgbe_ks->tot.value.ui64 = 0;
99 	for (i = 0; i < 16; i++) {
100 		ixgbe_ks->qprc[i].value.ui64 +=
101 		    IXGBE_READ_REG(hw, IXGBE_QPRC(i));
102 		ixgbe_ks->gprc.value.ui64 += ixgbe_ks->qprc[i].value.ui64;
103 		ixgbe_ks->qptc[i].value.ui64 +=
104 		    IXGBE_READ_REG(hw, IXGBE_QPTC(i));
105 		ixgbe_ks->gptc.value.ui64 += ixgbe_ks->qptc[i].value.ui64;
106 		ixgbe_ks->qbrc[i].value.ui64 +=
107 		    IXGBE_READ_REG(hw, IXGBE_QBRC(i));
108 		ixgbe_ks->tor.value.ui64 += ixgbe_ks->qbrc[i].value.ui64;
109 		switch (hw->mac.type) {
110 		case ixgbe_mac_82598EB:
111 			ixgbe_ks->qbtc[i].value.ui64 +=
112 			    IXGBE_READ_REG(hw, IXGBE_QBTC(i));
113 			break;
114 
115 		case ixgbe_mac_82599EB:
116 		case ixgbe_mac_X540:
117 			ixgbe_ks->qbtc[i].value.ui64 +=
118 			    IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
119 			ixgbe_ks->qbtc[i].value.ui64 +=
120 			    ((uint64_t)((IXGBE_READ_REG(hw,
121 			    IXGBE_QBTC_H(i))) & 0xF) << 32);
122 			break;
123 
124 		default:
125 			break;
126 		}
127 		ixgbe_ks->tot.value.ui64 += ixgbe_ks->qbtc[i].value.ui64;
128 	}
129 	/*
130 	 * This is a Workaround:
131 	 * Currently h/w GORCH, GOTCH, TORH registers are not
132 	 * correctly implemented. We found that the values in
133 	 * these registers are same as those in corresponding
134 	 * *L registers (i.e. GORCL, GOTCL, and TORL). Here the
135 	 * gor and got stat data will not be retrieved through
136 	 * GORC{H/L} and GOTC{H/L} registers but be obtained by
137 	 * simply assigning tor/tot stat data, so the gor/got
138 	 * stat data will not be accurate.
139 	 */
140 	ixgbe_ks->gor.value.ui64 = ixgbe_ks->tor.value.ui64;
141 	ixgbe_ks->got.value.ui64 = ixgbe_ks->tot.value.ui64;
142 
143 	ixgbe_ks->prc64.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC64);
144 	ixgbe_ks->prc127.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC127);
145 	ixgbe_ks->prc255.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC255);
146 	ixgbe_ks->prc511.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC511);
147 	ixgbe_ks->prc1023.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC1023);
148 	ixgbe_ks->prc1522.value.ul += IXGBE_READ_REG(hw, IXGBE_PRC1522);
149 	ixgbe_ks->ptc64.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC64);
150 	ixgbe_ks->ptc127.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC127);
151 	ixgbe_ks->ptc255.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC255);
152 	ixgbe_ks->ptc511.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC511);
153 	ixgbe_ks->ptc1023.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC1023);
154 	ixgbe_ks->ptc1522.value.ul += IXGBE_READ_REG(hw, IXGBE_PTC1522);
155 
156 	ixgbe_ks->mspdc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MSPDC);
157 	for (i = 0; i < 8; i++)
158 		ixgbe_ks->mpc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MPC(i));
159 	ixgbe_ks->mlfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MLFC);
160 	ixgbe_ks->mrfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_MRFC);
161 	ixgbe_ks->rlec.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RLEC);
162 	ixgbe_ks->lxontxc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_LXONTXC);
163 	switch (hw->mac.type) {
164 	case ixgbe_mac_82598EB:
165 		ixgbe_ks->lxonrxc.value.ui64 += IXGBE_READ_REG(hw,
166 		    IXGBE_LXONRXC);
167 		break;
168 
169 	case ixgbe_mac_82599EB:
170 	case ixgbe_mac_X540:
171 		ixgbe_ks->lxonrxc.value.ui64 += IXGBE_READ_REG(hw,
172 		    IXGBE_LXONRXCNT);
173 		break;
174 
175 	default:
176 		break;
177 	}
178 	ixgbe_ks->lxofftxc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
179 	switch (hw->mac.type) {
180 	case ixgbe_mac_82598EB:
181 		ixgbe_ks->lxoffrxc.value.ui64 += IXGBE_READ_REG(hw,
182 		    IXGBE_LXOFFRXC);
183 		break;
184 
185 	case ixgbe_mac_82599EB:
186 	case ixgbe_mac_X540:
187 		ixgbe_ks->lxoffrxc.value.ui64 += IXGBE_READ_REG(hw,
188 		    IXGBE_LXOFFRXCNT);
189 		break;
190 
191 	default:
192 		break;
193 	}
194 	ixgbe_ks->ruc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RUC);
195 	ixgbe_ks->rfc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RFC);
196 	ixgbe_ks->roc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_ROC);
197 	ixgbe_ks->rjc.value.ui64 += IXGBE_READ_REG(hw, IXGBE_RJC);
198 
199 	mutex_exit(&ixgbe->gen_lock);
200 
201 	if (ixgbe_check_acc_handle(ixgbe->osdep.reg_handle) != DDI_FM_OK)
202 		ddi_fm_service_impact(ixgbe->dip, DDI_SERVICE_UNAFFECTED);
203 
204 	return (0);
205 }
206 
207 /*
208  * Create and initialize the driver private statistics.
209  */
210 int
211 ixgbe_init_stats(ixgbe_t *ixgbe)
212 {
213 	kstat_t *ks;
214 	ixgbe_stat_t *ixgbe_ks;
215 
216 	/*
217 	 * Create and init kstat
218 	 */
219 	ks = kstat_create(MODULE_NAME, ddi_get_instance(ixgbe->dip),
220 	    "statistics", "net", KSTAT_TYPE_NAMED,
221 	    sizeof (ixgbe_stat_t) / sizeof (kstat_named_t), 0);
222 
223 	if (ks == NULL) {
224 		ixgbe_error(ixgbe,
225 		    "Could not create kernel statistics");
226 		return (IXGBE_FAILURE);
227 	}
228 
229 	ixgbe->ixgbe_ks = ks;
230 
231 	ixgbe_ks = (ixgbe_stat_t *)ks->ks_data;
232 
233 	/*
234 	 * Initialize all the statistics.
235 	 */
236 	kstat_named_init(&ixgbe_ks->link_speed, "link_speed",
237 	    KSTAT_DATA_UINT64);
238 	kstat_named_init(&ixgbe_ks->reset_count, "reset_count",
239 	    KSTAT_DATA_UINT64);
240 
241 #ifdef IXGBE_DEBUG
242 	kstat_named_init(&ixgbe_ks->rx_frame_error, "rx_frame_error",
243 	    KSTAT_DATA_UINT64);
244 	kstat_named_init(&ixgbe_ks->rx_cksum_error, "rx_cksum_error",
245 	    KSTAT_DATA_UINT64);
246 	kstat_named_init(&ixgbe_ks->rx_exceed_pkt, "rx_exceed_pkt",
247 	    KSTAT_DATA_UINT64);
248 	kstat_named_init(&ixgbe_ks->tx_overload, "tx_overload",
249 	    KSTAT_DATA_UINT64);
250 	kstat_named_init(&ixgbe_ks->tx_fail_no_tbd, "tx_fail_no_tbd",
251 	    KSTAT_DATA_UINT64);
252 	kstat_named_init(&ixgbe_ks->tx_fail_no_tcb, "tx_fail_no_tcb",
253 	    KSTAT_DATA_UINT64);
254 	kstat_named_init(&ixgbe_ks->tx_fail_dma_bind, "tx_fail_dma_bind",
255 	    KSTAT_DATA_UINT64);
256 	kstat_named_init(&ixgbe_ks->tx_reschedule, "tx_reschedule",
257 	    KSTAT_DATA_UINT64);
258 #endif
259 
260 	kstat_named_init(&ixgbe_ks->gprc, "good_pkts_recvd",
261 	    KSTAT_DATA_UINT64);
262 	kstat_named_init(&ixgbe_ks->gptc, "good_pkts_xmitd",
263 	    KSTAT_DATA_UINT64);
264 	kstat_named_init(&ixgbe_ks->gor, "good_octets_recvd",
265 	    KSTAT_DATA_UINT64);
266 	kstat_named_init(&ixgbe_ks->got, "good_octets_xmitd",
267 	    KSTAT_DATA_UINT64);
268 	kstat_named_init(&ixgbe_ks->prc64, "pkts_recvd_(  64b)",
269 	    KSTAT_DATA_UINT64);
270 	kstat_named_init(&ixgbe_ks->prc127, "pkts_recvd_(  65- 127b)",
271 	    KSTAT_DATA_UINT64);
272 	kstat_named_init(&ixgbe_ks->prc255, "pkts_recvd_( 127- 255b)",
273 	    KSTAT_DATA_UINT64);
274 	kstat_named_init(&ixgbe_ks->prc511, "pkts_recvd_( 256- 511b)",
275 	    KSTAT_DATA_UINT64);
276 	kstat_named_init(&ixgbe_ks->prc1023, "pkts_recvd_( 511-1023b)",
277 	    KSTAT_DATA_UINT64);
278 	kstat_named_init(&ixgbe_ks->prc1522, "pkts_recvd_(1024-1522b)",
279 	    KSTAT_DATA_UINT64);
280 	kstat_named_init(&ixgbe_ks->ptc64, "pkts_xmitd_(  64b)",
281 	    KSTAT_DATA_UINT64);
282 	kstat_named_init(&ixgbe_ks->ptc127, "pkts_xmitd_(  65- 127b)",
283 	    KSTAT_DATA_UINT64);
284 	kstat_named_init(&ixgbe_ks->ptc255, "pkts_xmitd_( 128- 255b)",
285 	    KSTAT_DATA_UINT64);
286 	kstat_named_init(&ixgbe_ks->ptc511, "pkts_xmitd_( 255- 511b)",
287 	    KSTAT_DATA_UINT64);
288 	kstat_named_init(&ixgbe_ks->ptc1023, "pkts_xmitd_( 512-1023b)",
289 	    KSTAT_DATA_UINT64);
290 	kstat_named_init(&ixgbe_ks->ptc1522, "pkts_xmitd_(1024-1522b)",
291 	    KSTAT_DATA_UINT64);
292 
293 	kstat_named_init(&ixgbe_ks->qprc[0], "queue_pkts_recvd [ 0]",
294 	    KSTAT_DATA_UINT64);
295 	kstat_named_init(&ixgbe_ks->qprc[1], "queue_pkts_recvd [ 1]",
296 	    KSTAT_DATA_UINT64);
297 	kstat_named_init(&ixgbe_ks->qprc[2], "queue_pkts_recvd [ 2]",
298 	    KSTAT_DATA_UINT64);
299 	kstat_named_init(&ixgbe_ks->qprc[3], "queue_pkts_recvd [ 3]",
300 	    KSTAT_DATA_UINT64);
301 	kstat_named_init(&ixgbe_ks->qprc[4], "queue_pkts_recvd [ 4]",
302 	    KSTAT_DATA_UINT64);
303 	kstat_named_init(&ixgbe_ks->qprc[5], "queue_pkts_recvd [ 5]",
304 	    KSTAT_DATA_UINT64);
305 	kstat_named_init(&ixgbe_ks->qprc[6], "queue_pkts_recvd [ 6]",
306 	    KSTAT_DATA_UINT64);
307 	kstat_named_init(&ixgbe_ks->qprc[7], "queue_pkts_recvd [ 7]",
308 	    KSTAT_DATA_UINT64);
309 	kstat_named_init(&ixgbe_ks->qprc[8], "queue_pkts_recvd [ 8]",
310 	    KSTAT_DATA_UINT64);
311 	kstat_named_init(&ixgbe_ks->qprc[9], "queue_pkts_recvd [ 9]",
312 	    KSTAT_DATA_UINT64);
313 	kstat_named_init(&ixgbe_ks->qprc[10], "queue_pkts_recvd [10]",
314 	    KSTAT_DATA_UINT64);
315 	kstat_named_init(&ixgbe_ks->qprc[11], "queue_pkts_recvd [11]",
316 	    KSTAT_DATA_UINT64);
317 	kstat_named_init(&ixgbe_ks->qprc[12], "queue_pkts_recvd [12]",
318 	    KSTAT_DATA_UINT64);
319 	kstat_named_init(&ixgbe_ks->qprc[13], "queue_pkts_recvd [13]",
320 	    KSTAT_DATA_UINT64);
321 	kstat_named_init(&ixgbe_ks->qprc[14], "queue_pkts_recvd [14]",
322 	    KSTAT_DATA_UINT64);
323 	kstat_named_init(&ixgbe_ks->qprc[15], "queue_pkts_recvd [15]",
324 	    KSTAT_DATA_UINT64);
325 
326 	kstat_named_init(&ixgbe_ks->qptc[0], "queue_pkts_xmitd [ 0]",
327 	    KSTAT_DATA_UINT64);
328 	kstat_named_init(&ixgbe_ks->qptc[1], "queue_pkts_xmitd [ 1]",
329 	    KSTAT_DATA_UINT64);
330 	kstat_named_init(&ixgbe_ks->qptc[2], "queue_pkts_xmitd [ 2]",
331 	    KSTAT_DATA_UINT64);
332 	kstat_named_init(&ixgbe_ks->qptc[3], "queue_pkts_xmitd [ 3]",
333 	    KSTAT_DATA_UINT64);
334 	kstat_named_init(&ixgbe_ks->qptc[4], "queue_pkts_xmitd [ 4]",
335 	    KSTAT_DATA_UINT64);
336 	kstat_named_init(&ixgbe_ks->qptc[5], "queue_pkts_xmitd [ 5]",
337 	    KSTAT_DATA_UINT64);
338 	kstat_named_init(&ixgbe_ks->qptc[6], "queue_pkts_xmitd [ 6]",
339 	    KSTAT_DATA_UINT64);
340 	kstat_named_init(&ixgbe_ks->qptc[7], "queue_pkts_xmitd [ 7]",
341 	    KSTAT_DATA_UINT64);
342 	kstat_named_init(&ixgbe_ks->qptc[8], "queue_pkts_xmitd [ 8]",
343 	    KSTAT_DATA_UINT64);
344 	kstat_named_init(&ixgbe_ks->qptc[9], "queue_pkts_xmitd [ 9]",
345 	    KSTAT_DATA_UINT64);
346 	kstat_named_init(&ixgbe_ks->qptc[10], "queue_pkts_xmitd [10]",
347 	    KSTAT_DATA_UINT64);
348 	kstat_named_init(&ixgbe_ks->qptc[11], "queue_pkts_xmitd [11]",
349 	    KSTAT_DATA_UINT64);
350 	kstat_named_init(&ixgbe_ks->qptc[12], "queue_pkts_xmitd [12]",
351 	    KSTAT_DATA_UINT64);
352 	kstat_named_init(&ixgbe_ks->qptc[13], "queue_pkts_xmitd [13]",
353 	    KSTAT_DATA_UINT64);
354 	kstat_named_init(&ixgbe_ks->qptc[14], "queue_pkts_xmitd [14]",
355 	    KSTAT_DATA_UINT64);
356 	kstat_named_init(&ixgbe_ks->qptc[15], "queue_pkts_xmitd [15]",
357 	    KSTAT_DATA_UINT64);
358 
359 	kstat_named_init(&ixgbe_ks->qbrc[0], "queue_bytes_recvd [ 0]",
360 	    KSTAT_DATA_UINT64);
361 	kstat_named_init(&ixgbe_ks->qbrc[1], "queue_bytes_recvd [ 1]",
362 	    KSTAT_DATA_UINT64);
363 	kstat_named_init(&ixgbe_ks->qbrc[2], "queue_bytes_recvd [ 2]",
364 	    KSTAT_DATA_UINT64);
365 	kstat_named_init(&ixgbe_ks->qbrc[3], "queue_bytes_recvd [ 3]",
366 	    KSTAT_DATA_UINT64);
367 	kstat_named_init(&ixgbe_ks->qbrc[4], "queue_bytes_recvd [ 4]",
368 	    KSTAT_DATA_UINT64);
369 	kstat_named_init(&ixgbe_ks->qbrc[5], "queue_bytes_recvd [ 5]",
370 	    KSTAT_DATA_UINT64);
371 	kstat_named_init(&ixgbe_ks->qbrc[6], "queue_bytes_recvd [ 6]",
372 	    KSTAT_DATA_UINT64);
373 	kstat_named_init(&ixgbe_ks->qbrc[7], "queue_bytes_recvd [ 7]",
374 	    KSTAT_DATA_UINT64);
375 	kstat_named_init(&ixgbe_ks->qbrc[8], "queue_bytes_recvd [ 8]",
376 	    KSTAT_DATA_UINT64);
377 	kstat_named_init(&ixgbe_ks->qbrc[9], "queue_bytes_recvd [ 9]",
378 	    KSTAT_DATA_UINT64);
379 	kstat_named_init(&ixgbe_ks->qbrc[10], "queue_bytes_recvd [10]",
380 	    KSTAT_DATA_UINT64);
381 	kstat_named_init(&ixgbe_ks->qbrc[11], "queue_bytes_recvd [11]",
382 	    KSTAT_DATA_UINT64);
383 	kstat_named_init(&ixgbe_ks->qbrc[12], "queue_bytes_recvd [12]",
384 	    KSTAT_DATA_UINT64);
385 	kstat_named_init(&ixgbe_ks->qbrc[13], "queue_bytes_recvd [13]",
386 	    KSTAT_DATA_UINT64);
387 	kstat_named_init(&ixgbe_ks->qbrc[14], "queue_bytes_recvd [14]",
388 	    KSTAT_DATA_UINT64);
389 	kstat_named_init(&ixgbe_ks->qbrc[15], "queue_bytes_recvd [15]",
390 	    KSTAT_DATA_UINT64);
391 
392 	kstat_named_init(&ixgbe_ks->qbtc[0], "queue_bytes_xmitd [ 0]",
393 	    KSTAT_DATA_UINT64);
394 	kstat_named_init(&ixgbe_ks->qbtc[1], "queue_bytes_xmitd [ 1]",
395 	    KSTAT_DATA_UINT64);
396 	kstat_named_init(&ixgbe_ks->qbtc[2], "queue_bytes_xmitd [ 2]",
397 	    KSTAT_DATA_UINT64);
398 	kstat_named_init(&ixgbe_ks->qbtc[3], "queue_bytes_xmitd [ 3]",
399 	    KSTAT_DATA_UINT64);
400 	kstat_named_init(&ixgbe_ks->qbtc[4], "queue_bytes_xmitd [ 4]",
401 	    KSTAT_DATA_UINT64);
402 	kstat_named_init(&ixgbe_ks->qbtc[5], "queue_bytes_xmitd [ 5]",
403 	    KSTAT_DATA_UINT64);
404 	kstat_named_init(&ixgbe_ks->qbtc[6], "queue_bytes_xmitd [ 6]",
405 	    KSTAT_DATA_UINT64);
406 	kstat_named_init(&ixgbe_ks->qbtc[7], "queue_bytes_xmitd [ 7]",
407 	    KSTAT_DATA_UINT64);
408 	kstat_named_init(&ixgbe_ks->qbtc[8], "queue_bytes_xmitd [ 8]",
409 	    KSTAT_DATA_UINT64);
410 	kstat_named_init(&ixgbe_ks->qbtc[9], "queue_bytes_xmitd [ 9]",
411 	    KSTAT_DATA_UINT64);
412 	kstat_named_init(&ixgbe_ks->qbtc[10], "queue_bytes_xmitd [10]",
413 	    KSTAT_DATA_UINT64);
414 	kstat_named_init(&ixgbe_ks->qbtc[11], "queue_bytes_xmitd [11]",
415 	    KSTAT_DATA_UINT64);
416 	kstat_named_init(&ixgbe_ks->qbtc[12], "queue_bytes_xmitd [12]",
417 	    KSTAT_DATA_UINT64);
418 	kstat_named_init(&ixgbe_ks->qbtc[13], "queue_bytes_xmitd [13]",
419 	    KSTAT_DATA_UINT64);
420 	kstat_named_init(&ixgbe_ks->qbtc[14], "queue_bytes_xmitd [14]",
421 	    KSTAT_DATA_UINT64);
422 	kstat_named_init(&ixgbe_ks->qbtc[15], "queue_bytes_xmitd [15]",
423 	    KSTAT_DATA_UINT64);
424 
425 	kstat_named_init(&ixgbe_ks->mspdc, "mac_short_packet_discard",
426 	    KSTAT_DATA_UINT64);
427 	kstat_named_init(&ixgbe_ks->mpc, "missed_packets",
428 	    KSTAT_DATA_UINT64);
429 	kstat_named_init(&ixgbe_ks->mlfc, "mac_local_fault",
430 	    KSTAT_DATA_UINT64);
431 	kstat_named_init(&ixgbe_ks->mrfc, "mac_remote_fault",
432 	    KSTAT_DATA_UINT64);
433 	kstat_named_init(&ixgbe_ks->rlec, "recv_length_err",
434 	    KSTAT_DATA_UINT64);
435 	kstat_named_init(&ixgbe_ks->lxontxc, "link_xon_xmitd",
436 	    KSTAT_DATA_UINT64);
437 	kstat_named_init(&ixgbe_ks->lxonrxc, "link_xon_recvd",
438 	    KSTAT_DATA_UINT64);
439 	kstat_named_init(&ixgbe_ks->lxofftxc, "link_xoff_xmitd",
440 	    KSTAT_DATA_UINT64);
441 	kstat_named_init(&ixgbe_ks->lxoffrxc, "link_xoff_recvd",
442 	    KSTAT_DATA_UINT64);
443 	kstat_named_init(&ixgbe_ks->ruc, "recv_undersize",
444 	    KSTAT_DATA_UINT64);
445 	kstat_named_init(&ixgbe_ks->rfc, "recv_fragment",
446 	    KSTAT_DATA_UINT64);
447 	kstat_named_init(&ixgbe_ks->roc, "recv_oversize",
448 	    KSTAT_DATA_UINT64);
449 	kstat_named_init(&ixgbe_ks->rjc, "recv_jabber",
450 	    KSTAT_DATA_UINT64);
451 	kstat_named_init(&ixgbe_ks->rnbc, "recv_no_buffer",
452 	    KSTAT_DATA_UINT64);
453 	kstat_named_init(&ixgbe_ks->lroc, "lro_pkt_count",
454 	    KSTAT_DATA_UINT64);
455 	/*
456 	 * Function to provide kernel stat update on demand
457 	 */
458 	ks->ks_update = ixgbe_update_stats;
459 
460 	ks->ks_private = (void *)ixgbe;
461 
462 	/*
463 	 * Add kstat to systems kstat chain
464 	 */
465 	kstat_install(ks);
466 
467 	return (IXGBE_SUCCESS);
468 }
469 
470 /*
471  * Retrieve a value for one of the statistics.
472  */
473 int
474 ixgbe_m_stat(void *arg, uint_t stat, uint64_t *val)
475 {
476 	ixgbe_t *ixgbe = (ixgbe_t *)arg;
477 	struct ixgbe_hw *hw = &ixgbe->hw;
478 	ixgbe_stat_t *ixgbe_ks;
479 	int i;
480 
481 	ixgbe_ks = (ixgbe_stat_t *)ixgbe->ixgbe_ks->ks_data;
482 
483 	mutex_enter(&ixgbe->gen_lock);
484 
485 	if (ixgbe->ixgbe_state & IXGBE_SUSPENDED) {
486 		mutex_exit(&ixgbe->gen_lock);
487 		return (ECANCELED);
488 	}
489 
490 	switch (stat) {
491 	case MAC_STAT_IFSPEED:
492 		*val = ixgbe->link_speed * 1000000ull;
493 		break;
494 
495 	case MAC_STAT_MULTIRCV:
496 		ixgbe_ks->mprc.value.ui64 +=
497 		    IXGBE_READ_REG(hw, IXGBE_MPRC);
498 		*val = ixgbe_ks->mprc.value.ui64;
499 		break;
500 
501 	case MAC_STAT_BRDCSTRCV:
502 		ixgbe_ks->bprc.value.ui64 +=
503 		    IXGBE_READ_REG(hw, IXGBE_BPRC);
504 		*val = ixgbe_ks->bprc.value.ui64;
505 		break;
506 
507 	case MAC_STAT_MULTIXMT:
508 		ixgbe_ks->mptc.value.ui64 +=
509 		    IXGBE_READ_REG(hw, IXGBE_MPTC);
510 		*val = ixgbe_ks->mptc.value.ui64;
511 		break;
512 
513 	case MAC_STAT_BRDCSTXMT:
514 		ixgbe_ks->bptc.value.ui64 +=
515 		    IXGBE_READ_REG(hw, IXGBE_BPTC);
516 		*val = ixgbe_ks->bptc.value.ui64;
517 		break;
518 
519 	case MAC_STAT_NORCVBUF:
520 		for (i = 0; i < 8; i++) {
521 			ixgbe_ks->rnbc.value.ui64 +=
522 			    IXGBE_READ_REG(hw, IXGBE_RNBC(i));
523 		}
524 		*val = ixgbe_ks->rnbc.value.ui64;
525 		break;
526 
527 	case MAC_STAT_IERRORS:
528 		ixgbe_ks->crcerrs.value.ui64 +=
529 		    IXGBE_READ_REG(hw, IXGBE_CRCERRS);
530 		ixgbe_ks->illerrc.value.ui64 +=
531 		    IXGBE_READ_REG(hw, IXGBE_ILLERRC);
532 		ixgbe_ks->errbc.value.ui64 +=
533 		    IXGBE_READ_REG(hw, IXGBE_ERRBC);
534 		ixgbe_ks->rlec.value.ui64 +=
535 		    IXGBE_READ_REG(hw, IXGBE_RLEC);
536 		*val = ixgbe_ks->crcerrs.value.ui64 +
537 		    ixgbe_ks->illerrc.value.ui64 +
538 		    ixgbe_ks->errbc.value.ui64 +
539 		    ixgbe_ks->rlec.value.ui64;
540 		break;
541 
542 	case MAC_STAT_RBYTES:
543 		ixgbe_ks->tor.value.ui64 = 0;
544 		for (i = 0; i < 16; i++) {
545 			ixgbe_ks->qbrc[i].value.ui64 +=
546 			    IXGBE_READ_REG(hw, IXGBE_QBRC(i));
547 			ixgbe_ks->tor.value.ui64 +=
548 			    ixgbe_ks->qbrc[i].value.ui64;
549 		}
550 		*val = ixgbe_ks->tor.value.ui64;
551 		break;
552 
553 	case MAC_STAT_OBYTES:
554 		ixgbe_ks->tot.value.ui64 = 0;
555 		for (i = 0; i < 16; i++) {
556 			switch (hw->mac.type) {
557 			case ixgbe_mac_82598EB:
558 				ixgbe_ks->qbtc[i].value.ui64 +=
559 				    IXGBE_READ_REG(hw, IXGBE_QBTC(i));
560 				break;
561 
562 			case ixgbe_mac_82599EB:
563 			case ixgbe_mac_X540:
564 				ixgbe_ks->qbtc[i].value.ui64 +=
565 				    IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
566 				ixgbe_ks->qbtc[i].value.ui64 +=
567 				    ((uint64_t)((IXGBE_READ_REG(hw,
568 				    IXGBE_QBTC_H(i))) & 0xF) << 32);
569 				break;
570 
571 			default:
572 				break;
573 			}
574 			ixgbe_ks->tot.value.ui64 +=
575 			    ixgbe_ks->qbtc[i].value.ui64;
576 		}
577 		*val = ixgbe_ks->tot.value.ui64;
578 		break;
579 
580 	case MAC_STAT_IPACKETS:
581 		ixgbe_ks->tpr.value.ui64 +=
582 		    IXGBE_READ_REG(hw, IXGBE_TPR);
583 		*val = ixgbe_ks->tpr.value.ui64;
584 		break;
585 
586 	case MAC_STAT_OPACKETS:
587 		ixgbe_ks->tpt.value.ui64 +=
588 		    IXGBE_READ_REG(hw, IXGBE_TPT);
589 		*val = ixgbe_ks->tpt.value.ui64;
590 		break;
591 
592 	/* RFC 1643 stats */
593 	case ETHER_STAT_FCS_ERRORS:
594 		ixgbe_ks->crcerrs.value.ui64 +=
595 		    IXGBE_READ_REG(hw, IXGBE_CRCERRS);
596 		*val = ixgbe_ks->crcerrs.value.ui64;
597 		break;
598 
599 	case ETHER_STAT_TOOLONG_ERRORS:
600 		ixgbe_ks->roc.value.ui64 +=
601 		    IXGBE_READ_REG(hw, IXGBE_ROC);
602 		*val = ixgbe_ks->roc.value.ui64;
603 		break;
604 
605 	case ETHER_STAT_MACRCV_ERRORS:
606 		ixgbe_ks->crcerrs.value.ui64 +=
607 		    IXGBE_READ_REG(hw, IXGBE_CRCERRS);
608 		ixgbe_ks->illerrc.value.ui64 +=
609 		    IXGBE_READ_REG(hw, IXGBE_ILLERRC);
610 		ixgbe_ks->errbc.value.ui64 +=
611 		    IXGBE_READ_REG(hw, IXGBE_ERRBC);
612 		ixgbe_ks->rlec.value.ui64 +=
613 		    IXGBE_READ_REG(hw, IXGBE_RLEC);
614 		*val = ixgbe_ks->crcerrs.value.ui64 +
615 		    ixgbe_ks->illerrc.value.ui64 +
616 		    ixgbe_ks->errbc.value.ui64 +
617 		    ixgbe_ks->rlec.value.ui64;
618 		break;
619 
620 	/* MII/GMII stats */
621 	case ETHER_STAT_XCVR_ADDR:
622 		/* The Internal PHY's MDI address for each MAC is 1 */
623 		*val = 1;
624 		break;
625 
626 	case ETHER_STAT_XCVR_ID:
627 		*val = hw->phy.id;
628 		break;
629 
630 	case ETHER_STAT_XCVR_INUSE:
631 		switch (ixgbe->link_speed) {
632 		case IXGBE_LINK_SPEED_1GB_FULL:
633 			*val =
634 			    (hw->phy.media_type == ixgbe_media_type_copper) ?
635 			    XCVR_1000T : XCVR_1000X;
636 			break;
637 		case IXGBE_LINK_SPEED_100_FULL:
638 			*val = (hw->phy.media_type == ixgbe_media_type_copper) ?
639 			    XCVR_100T2 : XCVR_100X;
640 			break;
641 		default:
642 			*val = XCVR_NONE;
643 			break;
644 		}
645 		break;
646 
647 	case ETHER_STAT_CAP_10GFDX:
648 		*val = 1;
649 		break;
650 
651 	case ETHER_STAT_CAP_1000FDX:
652 		*val = 1;
653 		break;
654 
655 	case ETHER_STAT_CAP_100FDX:
656 		*val = 1;
657 		break;
658 
659 	case ETHER_STAT_CAP_ASMPAUSE:
660 		*val = ixgbe->param_asym_pause_cap;
661 		break;
662 
663 	case ETHER_STAT_CAP_PAUSE:
664 		*val = ixgbe->param_pause_cap;
665 		break;
666 
667 	case ETHER_STAT_CAP_AUTONEG:
668 		*val = 1;
669 		break;
670 
671 	case ETHER_STAT_ADV_CAP_10GFDX:
672 		*val = ixgbe->param_adv_10000fdx_cap;
673 		break;
674 
675 	case ETHER_STAT_ADV_CAP_1000FDX:
676 		*val = ixgbe->param_adv_1000fdx_cap;
677 		break;
678 
679 	case ETHER_STAT_ADV_CAP_100FDX:
680 		*val = ixgbe->param_adv_100fdx_cap;
681 		break;
682 
683 	case ETHER_STAT_ADV_CAP_ASMPAUSE:
684 		*val = ixgbe->param_adv_asym_pause_cap;
685 		break;
686 
687 	case ETHER_STAT_ADV_CAP_PAUSE:
688 		*val = ixgbe->param_adv_pause_cap;
689 		break;
690 
691 	case ETHER_STAT_ADV_CAP_AUTONEG:
692 		*val = ixgbe->param_adv_autoneg_cap;
693 		break;
694 
695 	case ETHER_STAT_LP_CAP_10GFDX:
696 		*val = ixgbe->param_lp_10000fdx_cap;
697 		break;
698 
699 	case ETHER_STAT_LP_CAP_1000FDX:
700 		*val = ixgbe->param_lp_1000fdx_cap;
701 		break;
702 
703 	case ETHER_STAT_LP_CAP_100FDX:
704 		*val = ixgbe->param_lp_100fdx_cap;
705 		break;
706 
707 	case ETHER_STAT_LP_CAP_ASMPAUSE:
708 		*val = ixgbe->param_lp_asym_pause_cap;
709 		break;
710 
711 	case ETHER_STAT_LP_CAP_PAUSE:
712 		*val = ixgbe->param_lp_pause_cap;
713 		break;
714 
715 	case ETHER_STAT_LP_CAP_AUTONEG:
716 		*val = ixgbe->param_lp_autoneg_cap;
717 		break;
718 
719 	case ETHER_STAT_LINK_ASMPAUSE:
720 		*val = ixgbe->param_asym_pause_cap;
721 		break;
722 
723 	case ETHER_STAT_LINK_PAUSE:
724 		*val = ixgbe->param_pause_cap;
725 		break;
726 
727 	case ETHER_STAT_LINK_AUTONEG:
728 		*val = ixgbe->param_adv_autoneg_cap;
729 		break;
730 
731 	case ETHER_STAT_LINK_DUPLEX:
732 		*val = ixgbe->link_duplex;
733 		break;
734 
735 	case ETHER_STAT_TOOSHORT_ERRORS:
736 		ixgbe_ks->ruc.value.ui64 +=
737 		    IXGBE_READ_REG(hw, IXGBE_RUC);
738 		*val = ixgbe_ks->ruc.value.ui64;
739 		break;
740 
741 	case ETHER_STAT_CAP_REMFAULT:
742 		*val = ixgbe->param_rem_fault;
743 		break;
744 
745 	case ETHER_STAT_ADV_REMFAULT:
746 		*val = ixgbe->param_adv_rem_fault;
747 		break;
748 
749 	case ETHER_STAT_LP_REMFAULT:
750 		*val = ixgbe->param_lp_rem_fault;
751 		break;
752 
753 	case ETHER_STAT_JABBER_ERRORS:
754 		ixgbe_ks->rjc.value.ui64 +=
755 		    IXGBE_READ_REG(hw, IXGBE_RJC);
756 		*val = ixgbe_ks->rjc.value.ui64;
757 		break;
758 
759 	default:
760 		mutex_exit(&ixgbe->gen_lock);
761 		return (ENOTSUP);
762 	}
763 
764 	mutex_exit(&ixgbe->gen_lock);
765 
766 	if (ixgbe_check_acc_handle(ixgbe->osdep.reg_handle) != DDI_FM_OK) {
767 		ddi_fm_service_impact(ixgbe->dip, DDI_SERVICE_DEGRADED);
768 		return (EIO);
769 	}
770 
771 	return (0);
772 }
773 
774 /*
775  * Retrieve a value for one of the statistics for a particular rx ring
776  */
777 int
778 ixgbe_rx_ring_stat(mac_ring_driver_t rh, uint_t stat, uint64_t *val)
779 {
780 	ixgbe_rx_ring_t	*rx_ring = (ixgbe_rx_ring_t *)rh;
781 	ixgbe_t *ixgbe = rx_ring->ixgbe;
782 
783 	if (ixgbe->ixgbe_state & IXGBE_SUSPENDED) {
784 		return (ECANCELED);
785 	}
786 
787 	switch (stat) {
788 	case MAC_STAT_RBYTES:
789 		*val = rx_ring->stat_rbytes;
790 		break;
791 
792 	case MAC_STAT_IPACKETS:
793 		*val = rx_ring->stat_ipackets;
794 		break;
795 
796 	default:
797 		*val = 0;
798 		return (ENOTSUP);
799 	}
800 
801 	return (0);
802 }
803 
804 /*
805  * Retrieve a value for one of the statistics for a particular tx ring
806  */
807 int
808 ixgbe_tx_ring_stat(mac_ring_driver_t rh, uint_t stat, uint64_t *val)
809 {
810 	ixgbe_tx_ring_t	*tx_ring = (ixgbe_tx_ring_t *)rh;
811 	ixgbe_t *ixgbe = tx_ring->ixgbe;
812 
813 	if (ixgbe->ixgbe_state & IXGBE_SUSPENDED) {
814 		return (ECANCELED);
815 	}
816 
817 	switch (stat) {
818 	case MAC_STAT_OBYTES:
819 		*val = tx_ring->stat_obytes;
820 		break;
821 
822 	case MAC_STAT_OPACKETS:
823 		*val = tx_ring->stat_opackets;
824 		break;
825 
826 	default:
827 		*val = 0;
828 		return (ENOTSUP);
829 	}
830 
831 	return (0);
832 }
833