xref: /titanic_50/usr/src/uts/common/io/i40e/i40e_xregs.h (revision da5577f07f6199b51ea374581248790c288e827b)
1*da5577f0SRobert Mustacchi /*
2*da5577f0SRobert Mustacchi  * This file and its contents are supplied under the terms of the
3*da5577f0SRobert Mustacchi  * Common Development and Distribution License ("CDDL"), version 1.0.
4*da5577f0SRobert Mustacchi  * You may only use this file in accordance with the terms of version
5*da5577f0SRobert Mustacchi  * 1.0 of the CDDL.
6*da5577f0SRobert Mustacchi  *
7*da5577f0SRobert Mustacchi  * A full copy of the text of the CDDL should have accompanied this
8*da5577f0SRobert Mustacchi  * source.  A copy of the CDDL is also available via the Internet at
9*da5577f0SRobert Mustacchi  * http://www.illumos.org/license/CDDL.
10*da5577f0SRobert Mustacchi  */
11*da5577f0SRobert Mustacchi 
12*da5577f0SRobert Mustacchi /*
13*da5577f0SRobert Mustacchi  * Copyright 2016 Joyent, Inc.
14*da5577f0SRobert Mustacchi  */
15*da5577f0SRobert Mustacchi 
16*da5577f0SRobert Mustacchi #ifndef _I40E_XREGS_H
17*da5577f0SRobert Mustacchi #define	_I40E_XREGS_H
18*da5577f0SRobert Mustacchi 
19*da5577f0SRobert Mustacchi /*
20*da5577f0SRobert Mustacchi  * This file contains extra register definitions and other things that would
21*da5577f0SRobert Mustacchi  * nominally come from the Intel common code, but do not due to bugs, erratum,
22*da5577f0SRobert Mustacchi  * etc. Ideally we'll get to a point where we can remove this file.
23*da5577f0SRobert Mustacchi  */
24*da5577f0SRobert Mustacchi #include "i40e_type.h"
25*da5577f0SRobert Mustacchi 
26*da5577f0SRobert Mustacchi #ifdef __cplusplus
27*da5577f0SRobert Mustacchi extern "C" {
28*da5577f0SRobert Mustacchi #endif
29*da5577f0SRobert Mustacchi 
30*da5577f0SRobert Mustacchi /*
31*da5577f0SRobert Mustacchi  * The MSPDC register is missing from the current datasheet.
32*da5577f0SRobert Mustacchi  */
33*da5577f0SRobert Mustacchi #define	I40E_GLPRT_MSPDC(_i)		(0x00300060 + ((_i) * 8)) /* _i=0...3 */
34*da5577f0SRobert Mustacchi #define	I40E_GLPRT_MSDPC_MAX_INDEX	3
35*da5577f0SRobert Mustacchi #define	I40E_GLPRT_MSPDC_MSPDC_SHIFT	0
36*da5577f0SRobert Mustacchi #define	I40E_GLPRT_MSPDC_MSPDC_MASK	\
37*da5577f0SRobert Mustacchi 	I40E_MASK(0xFFFFFFFF, I40E_GLPRT_MSPDC_MSPDC_SHIFT)
38*da5577f0SRobert Mustacchi 
39*da5577f0SRobert Mustacchi /*
40*da5577f0SRobert Mustacchi  * The RXERR* registers are technically correct from the perspective of their
41*da5577f0SRobert Mustacchi  * addreses; however, the other associated constants are not correct. Instead,
42*da5577f0SRobert Mustacchi  * we have new definitions here in the interim.
43*da5577f0SRobert Mustacchi  */
44*da5577f0SRobert Mustacchi 
45*da5577f0SRobert Mustacchi #define	I40E_X_GL_RXERR1_L(_i)		(0x00318000 + ((_i) * 8))
46*da5577f0SRobert Mustacchi 
47*da5577f0SRobert Mustacchi #define	I40E_X_GL_RXERR2_L(_i)		(0x0031c000 + ((_i) * 8))
48*da5577f0SRobert Mustacchi 
49*da5577f0SRobert Mustacchi #ifdef __cplusplus
50*da5577f0SRobert Mustacchi }
51*da5577f0SRobert Mustacchi #endif
52*da5577f0SRobert Mustacchi 
53*da5577f0SRobert Mustacchi #endif /* _I40E_XREGS_H */
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