1 /* 2 * This file is provided under a CDDLv1 license. When using or 3 * redistributing this file, you may do so under this license. 4 * In redistributing this file this license must be included 5 * and no other modification of this header file is permitted. 6 * 7 * CDDL LICENSE SUMMARY 8 * 9 * Copyright(c) 1999 - 2008 Intel Corporation. All rights reserved. 10 * 11 * The contents of this file are subject to the terms of Version 12 * 1.0 of the Common Development and Distribution License (the "License"). 13 * 14 * You should have received a copy of the License with this software. 15 * You can obtain a copy of the License at 16 * http://www.opensolaris.org/os/licensing. 17 * See the License for the specific language governing permissions 18 * and limitations under the License. 19 */ 20 21 /* 22 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 /* 27 * ********************************************************************** 28 * * 29 * Module Name: * 30 * e1000g_rx.c * 31 * * 32 * Abstract: * 33 * This file contains some routines that take care of Receive * 34 * interrupt and also for the received packets it sends up to * 35 * upper layer. * 36 * It tries to do a zero copy if free buffers are available in * 37 * the pool. * 38 * * 39 * ********************************************************************** 40 */ 41 42 #include "e1000g_sw.h" 43 #include "e1000g_debug.h" 44 45 static p_rx_sw_packet_t e1000g_get_buf(e1000g_rx_ring_t *rx_ring); 46 #pragma inline(e1000g_get_buf) 47 static void e1000g_priv_devi_list_clean(); 48 49 /* 50 * e1000g_rxfree_func - the call-back function to reclaim rx buffer 51 * 52 * This function is called when an mp is freed by the user thru 53 * freeb call (Only for mp constructed through desballoc call) 54 * It returns back the freed buffer to the freelist 55 */ 56 void 57 e1000g_rxfree_func(p_rx_sw_packet_t packet) 58 { 59 e1000g_rx_ring_t *rx_ring; 60 61 rx_ring = (e1000g_rx_ring_t *)(uintptr_t)packet->rx_ring; 62 63 /* 64 * Here the rx recycling processes different rx packets in different 65 * threads, so we protect it with RW_READER to ensure it won't block 66 * other rx recycling threads. 67 */ 68 rw_enter(&e1000g_rx_detach_lock, RW_READER); 69 70 if (packet->flag == E1000G_RX_SW_FREE) { 71 rw_exit(&e1000g_rx_detach_lock); 72 return; 73 } 74 75 if (packet->flag == E1000G_RX_SW_STOP) { 76 packet->flag = E1000G_RX_SW_FREE; 77 rw_exit(&e1000g_rx_detach_lock); 78 79 rw_enter(&e1000g_rx_detach_lock, RW_WRITER); 80 rx_ring->pending_count--; 81 e1000g_mblks_pending--; 82 83 if (rx_ring->pending_count == 0) { 84 while (rx_ring->pending_list != NULL) { 85 packet = rx_ring->pending_list; 86 rx_ring->pending_list = 87 rx_ring->pending_list->next; 88 89 ASSERT(packet->mp == NULL); 90 e1000g_free_rx_sw_packet(packet); 91 } 92 } 93 94 /* 95 * If e1000g_force_detach is enabled, we need to clean up 96 * the idle priv_dip entries in the private dip list while 97 * e1000g_mblks_pending is zero. 98 */ 99 if (e1000g_force_detach && (e1000g_mblks_pending == 0)) 100 e1000g_priv_devi_list_clean(); 101 rw_exit(&e1000g_rx_detach_lock); 102 return; 103 } 104 105 if (packet->flag == E1000G_RX_SW_DETACH) { 106 packet->flag = E1000G_RX_SW_FREE; 107 rw_exit(&e1000g_rx_detach_lock); 108 109 ASSERT(packet->mp == NULL); 110 e1000g_free_rx_sw_packet(packet); 111 112 /* 113 * Here the e1000g_mblks_pending may be modified by different 114 * rx recycling threads simultaneously, so we need to protect 115 * it with RW_WRITER. 116 */ 117 rw_enter(&e1000g_rx_detach_lock, RW_WRITER); 118 e1000g_mblks_pending--; 119 120 /* 121 * If e1000g_force_detach is enabled, we need to clean up 122 * the idle priv_dip entries in the private dip list while 123 * e1000g_mblks_pending is zero. 124 */ 125 if (e1000g_force_detach && (e1000g_mblks_pending == 0)) 126 e1000g_priv_devi_list_clean(); 127 rw_exit(&e1000g_rx_detach_lock); 128 return; 129 } 130 131 packet->flag = E1000G_RX_SW_FREE; 132 133 if (packet->mp == NULL) { 134 /* 135 * Allocate a mblk that binds to the data buffer 136 */ 137 packet->mp = desballoc((unsigned char *) 138 packet->rx_buf->address - E1000G_IPALIGNROOM, 139 packet->rx_buf->size + E1000G_IPALIGNROOM, 140 BPRI_MED, &packet->free_rtn); 141 142 if (packet->mp != NULL) { 143 packet->mp->b_rptr += E1000G_IPALIGNROOM; 144 packet->mp->b_wptr += E1000G_IPALIGNROOM; 145 } else { 146 E1000G_STAT(rx_ring->stat_esballoc_fail); 147 } 148 } 149 150 /* 151 * Enqueue the recycled packets in a recycle queue. When freelist 152 * dries up, move the entire chain of packets from recycle queue 153 * to freelist. This helps in avoiding per packet mutex contention 154 * around freelist. 155 */ 156 mutex_enter(&rx_ring->recycle_lock); 157 QUEUE_PUSH_TAIL(&rx_ring->recycle_list, &packet->Link); 158 rx_ring->recycle_freepkt++; 159 mutex_exit(&rx_ring->recycle_lock); 160 161 rw_exit(&e1000g_rx_detach_lock); 162 } 163 164 /* 165 * e1000g_priv_devi_list_clean - clean up e1000g_private_devi_list 166 * 167 * We will walk the e1000g_private_devi_list to free the entry marked 168 * with the E1000G_PRIV_DEVI_DETACH flag. 169 */ 170 static void 171 e1000g_priv_devi_list_clean() 172 { 173 private_devi_list_t *devi_node, *devi_del; 174 175 if (e1000g_private_devi_list == NULL) 176 return; 177 178 devi_node = e1000g_private_devi_list; 179 while ((devi_node != NULL) && 180 (devi_node->flag == E1000G_PRIV_DEVI_DETACH)) { 181 e1000g_private_devi_list = devi_node->next; 182 kmem_free(devi_node->priv_dip, 183 sizeof (struct dev_info)); 184 kmem_free(devi_node, 185 sizeof (private_devi_list_t)); 186 devi_node = e1000g_private_devi_list; 187 } 188 if (e1000g_private_devi_list == NULL) 189 return; 190 while (devi_node->next != NULL) { 191 if (devi_node->next->flag == E1000G_PRIV_DEVI_DETACH) { 192 devi_del = devi_node->next; 193 devi_node->next = devi_del->next; 194 kmem_free(devi_del->priv_dip, 195 sizeof (struct dev_info)); 196 kmem_free(devi_del, 197 sizeof (private_devi_list_t)); 198 } else { 199 devi_node = devi_node->next; 200 } 201 } 202 } 203 204 /* 205 * e1000g_rx_setup - setup rx data structures 206 * 207 * This routine initializes all of the receive related 208 * structures. This includes the receive descriptors, the 209 * actual receive buffers, and the rx_sw_packet software 210 * structures. 211 */ 212 void 213 e1000g_rx_setup(struct e1000g *Adapter) 214 { 215 struct e1000_hw *hw; 216 p_rx_sw_packet_t packet; 217 struct e1000_rx_desc *descriptor; 218 uint32_t buf_low; 219 uint32_t buf_high; 220 uint32_t reg_val; 221 uint32_t rctl; 222 uint32_t rxdctl; 223 uint32_t ert; 224 int i; 225 int size; 226 e1000g_rx_ring_t *rx_ring; 227 228 hw = &Adapter->shared; 229 rx_ring = Adapter->rx_ring; 230 231 /* 232 * zero out all of the receive buffer descriptor memory 233 * assures any previous data or status is erased 234 */ 235 bzero(rx_ring->rbd_area, 236 sizeof (struct e1000_rx_desc) * Adapter->rx_desc_num); 237 238 if (!Adapter->rx_buffer_setup) { 239 /* Init the list of "Receive Buffer" */ 240 QUEUE_INIT_LIST(&rx_ring->recv_list); 241 242 /* Init the list of "Free Receive Buffer" */ 243 QUEUE_INIT_LIST(&rx_ring->free_list); 244 245 /* Init the list of "Free Receive Buffer" */ 246 QUEUE_INIT_LIST(&rx_ring->recycle_list); 247 /* 248 * Setup Receive list and the Free list. Note that 249 * the both were allocated in one packet area. 250 */ 251 packet = rx_ring->packet_area; 252 descriptor = rx_ring->rbd_first; 253 254 for (i = 0; i < Adapter->rx_desc_num; 255 i++, packet = packet->next, descriptor++) { 256 ASSERT(packet != NULL); 257 ASSERT(descriptor != NULL); 258 descriptor->buffer_addr = 259 packet->rx_buf->dma_address; 260 261 /* Add this rx_sw_packet to the receive list */ 262 QUEUE_PUSH_TAIL(&rx_ring->recv_list, 263 &packet->Link); 264 } 265 266 for (i = 0; i < Adapter->rx_freelist_num; 267 i++, packet = packet->next) { 268 ASSERT(packet != NULL); 269 /* Add this rx_sw_packet to the free list */ 270 QUEUE_PUSH_TAIL(&rx_ring->free_list, 271 &packet->Link); 272 } 273 rx_ring->avail_freepkt = Adapter->rx_freelist_num; 274 rx_ring->recycle_freepkt = 0; 275 276 Adapter->rx_buffer_setup = B_TRUE; 277 } else { 278 /* Setup the initial pointer to the first rx descriptor */ 279 packet = (p_rx_sw_packet_t) 280 QUEUE_GET_HEAD(&rx_ring->recv_list); 281 descriptor = rx_ring->rbd_first; 282 283 for (i = 0; i < Adapter->rx_desc_num; i++) { 284 ASSERT(packet != NULL); 285 ASSERT(descriptor != NULL); 286 descriptor->buffer_addr = 287 packet->rx_buf->dma_address; 288 289 /* Get next rx_sw_packet */ 290 packet = (p_rx_sw_packet_t) 291 QUEUE_GET_NEXT(&rx_ring->recv_list, &packet->Link); 292 descriptor++; 293 } 294 } 295 296 E1000_WRITE_REG(&Adapter->shared, E1000_RDTR, Adapter->rx_intr_delay); 297 E1000G_DEBUGLOG_1(Adapter, E1000G_INFO_LEVEL, 298 "E1000_RDTR: 0x%x\n", Adapter->rx_intr_delay); 299 if (hw->mac.type >= e1000_82540) { 300 E1000_WRITE_REG(&Adapter->shared, E1000_RADV, 301 Adapter->rx_intr_abs_delay); 302 E1000G_DEBUGLOG_1(Adapter, E1000G_INFO_LEVEL, 303 "E1000_RADV: 0x%x\n", Adapter->rx_intr_abs_delay); 304 } 305 306 /* 307 * Setup our descriptor pointers 308 */ 309 rx_ring->rbd_next = rx_ring->rbd_first; 310 311 size = Adapter->rx_desc_num * sizeof (struct e1000_rx_desc); 312 E1000_WRITE_REG(hw, E1000_RDLEN(0), size); 313 size = E1000_READ_REG(hw, E1000_RDLEN(0)); 314 315 /* To get lower order bits */ 316 buf_low = (uint32_t)rx_ring->rbd_dma_addr; 317 /* To get the higher order bits */ 318 buf_high = (uint32_t)(rx_ring->rbd_dma_addr >> 32); 319 320 E1000_WRITE_REG(hw, E1000_RDBAH(0), buf_high); 321 E1000_WRITE_REG(hw, E1000_RDBAL(0), buf_low); 322 323 /* 324 * Setup our HW Rx Head & Tail descriptor pointers 325 */ 326 E1000_WRITE_REG(hw, E1000_RDT(0), 327 (uint32_t)(rx_ring->rbd_last - rx_ring->rbd_first)); 328 E1000_WRITE_REG(hw, E1000_RDH(0), 0); 329 330 /* 331 * Setup the Receive Control Register (RCTL), and ENABLE the 332 * receiver. The initial configuration is to: Enable the receiver, 333 * accept broadcasts, discard bad packets (and long packets), 334 * disable VLAN filter checking, set the receive descriptor 335 * minimum threshold size to 1/2, and the receive buffer size to 336 * 2k. 337 */ 338 rctl = E1000_RCTL_EN | /* Enable Receive Unit */ 339 E1000_RCTL_BAM | /* Accept Broadcast Packets */ 340 E1000_RCTL_LPE | /* Large Packet Enable bit */ 341 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT) | 342 E1000_RCTL_RDMTS_HALF | 343 E1000_RCTL_LBM_NO; /* Loopback Mode = none */ 344 345 if (Adapter->strip_crc) 346 rctl |= E1000_RCTL_SECRC; /* Strip Ethernet CRC */ 347 348 if ((hw->mac.type == e1000_82545) || 349 (hw->mac.type == e1000_82546) || 350 (hw->mac.type == e1000_82546_rev_3)) { 351 rctl |= E1000_RCTL_SZ_2048; 352 } else { 353 if ((Adapter->max_frame_size > FRAME_SIZE_UPTO_2K) && 354 (Adapter->max_frame_size <= FRAME_SIZE_UPTO_4K)) 355 rctl |= E1000_RCTL_SZ_4096 | E1000_RCTL_BSEX; 356 else if ((Adapter->max_frame_size > FRAME_SIZE_UPTO_4K) && 357 (Adapter->max_frame_size <= FRAME_SIZE_UPTO_8K)) 358 rctl |= E1000_RCTL_SZ_8192 | E1000_RCTL_BSEX; 359 else if ((Adapter->max_frame_size > FRAME_SIZE_UPTO_8K) && 360 (Adapter->max_frame_size <= FRAME_SIZE_UPTO_16K)) 361 rctl |= E1000_RCTL_SZ_16384 | E1000_RCTL_BSEX; 362 else 363 rctl |= E1000_RCTL_SZ_2048; 364 } 365 366 if (e1000_tbi_sbp_enabled_82543(hw)) 367 rctl |= E1000_RCTL_SBP; 368 369 /* 370 * Enable early receives on supported devices, only takes effect when 371 * packet size is equal or larger than the specified value (in 8 byte 372 * units), e.g. using jumbo frames when setting to E1000_ERT_2048 373 */ 374 if ((hw->mac.type == e1000_82573) || 375 (hw->mac.type == e1000_82574) || 376 (hw->mac.type == e1000_ich9lan) || 377 (hw->mac.type == e1000_ich10lan)) { 378 379 ert = E1000_ERT_2048; 380 381 /* 382 * Special modification when ERT and 383 * jumbo frames are enabled 384 */ 385 if (Adapter->default_mtu > ETHERMTU) { 386 rxdctl = E1000_READ_REG(hw, E1000_RXDCTL(0)); 387 E1000_WRITE_REG(hw, E1000_RXDCTL(0), rxdctl | 0x3); 388 ert |= (1 << 13); 389 } 390 391 E1000_WRITE_REG(hw, E1000_ERT, ert); 392 } 393 394 reg_val = 395 E1000_RXCSUM_TUOFL | /* TCP/UDP checksum offload Enable */ 396 E1000_RXCSUM_IPOFL; /* IP checksum offload Enable */ 397 398 E1000_WRITE_REG(hw, E1000_RXCSUM, reg_val); 399 400 /* 401 * Workaround: Set bit 16 (IPv6_ExDIS) to disable the 402 * processing of received IPV6 extension headers 403 */ 404 if ((hw->mac.type == e1000_82571) || (hw->mac.type == e1000_82572)) { 405 reg_val = E1000_READ_REG(hw, E1000_RFCTL); 406 reg_val |= (E1000_RFCTL_IPV6_EX_DIS | 407 E1000_RFCTL_NEW_IPV6_EXT_DIS); 408 E1000_WRITE_REG(hw, E1000_RFCTL, reg_val); 409 } 410 411 /* Write to enable the receive unit */ 412 E1000_WRITE_REG(hw, E1000_RCTL, rctl); 413 } 414 415 /* 416 * e1000g_get_buf - get an rx sw packet from the free_list 417 */ 418 static p_rx_sw_packet_t 419 e1000g_get_buf(e1000g_rx_ring_t *rx_ring) 420 { 421 p_rx_sw_packet_t packet; 422 423 mutex_enter(&rx_ring->freelist_lock); 424 packet = (p_rx_sw_packet_t) 425 QUEUE_POP_HEAD(&rx_ring->free_list); 426 if (packet != NULL) { 427 rx_ring->avail_freepkt--; 428 } else { 429 /* 430 * If the freelist has no packets, check the recycle list 431 * to see if there are any available descriptor there. 432 */ 433 mutex_enter(&rx_ring->recycle_lock); 434 QUEUE_SWITCH(&rx_ring->free_list, &rx_ring->recycle_list); 435 rx_ring->avail_freepkt = rx_ring->recycle_freepkt; 436 rx_ring->recycle_freepkt = 0; 437 mutex_exit(&rx_ring->recycle_lock); 438 packet = (p_rx_sw_packet_t) 439 QUEUE_POP_HEAD(&rx_ring->free_list); 440 if (packet != NULL) 441 rx_ring->avail_freepkt--; 442 } 443 mutex_exit(&rx_ring->freelist_lock); 444 445 return (packet); 446 } 447 448 /* 449 * e1000g_receive - main receive routine 450 * 451 * This routine will process packets received in an interrupt 452 */ 453 mblk_t * 454 e1000g_receive(e1000g_rx_ring_t *rx_ring, mblk_t **tail, uint_t *sz) 455 { 456 struct e1000_hw *hw; 457 mblk_t *nmp; 458 mblk_t *ret_mp; 459 mblk_t *ret_nmp; 460 struct e1000_rx_desc *current_desc; 461 struct e1000_rx_desc *last_desc; 462 p_rx_sw_packet_t packet; 463 p_rx_sw_packet_t newpkt; 464 uint16_t length; 465 uint32_t pkt_count; 466 uint32_t desc_count; 467 boolean_t accept_frame; 468 boolean_t end_of_packet; 469 boolean_t need_copy; 470 struct e1000g *Adapter; 471 dma_buffer_t *rx_buf; 472 uint16_t cksumflags; 473 474 ret_mp = NULL; 475 ret_nmp = NULL; 476 pkt_count = 0; 477 desc_count = 0; 478 cksumflags = 0; 479 *sz = 0; 480 481 Adapter = rx_ring->adapter; 482 hw = &Adapter->shared; 483 484 /* Sync the Rx descriptor DMA buffers */ 485 (void) ddi_dma_sync(rx_ring->rbd_dma_handle, 486 0, 0, DDI_DMA_SYNC_FORKERNEL); 487 488 if (e1000g_check_dma_handle(rx_ring->rbd_dma_handle) != DDI_FM_OK) { 489 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED); 490 Adapter->chip_state = E1000G_ERROR; 491 } 492 493 current_desc = rx_ring->rbd_next; 494 if (!(current_desc->status & E1000_RXD_STAT_DD)) { 495 /* 496 * don't send anything up. just clear the RFD 497 */ 498 E1000G_DEBUG_STAT(rx_ring->stat_none); 499 return (ret_mp); 500 } 501 502 /* 503 * Loop through the receive descriptors starting at the last known 504 * descriptor owned by the hardware that begins a packet. 505 */ 506 while ((current_desc->status & E1000_RXD_STAT_DD) && 507 (pkt_count < Adapter->rx_limit_onintr)) { 508 509 desc_count++; 510 /* 511 * Now this can happen in Jumbo frame situation. 512 */ 513 if (current_desc->status & E1000_RXD_STAT_EOP) { 514 /* packet has EOP set */ 515 end_of_packet = B_TRUE; 516 } else { 517 /* 518 * If this received buffer does not have the 519 * End-Of-Packet bit set, the received packet 520 * will consume multiple buffers. We won't send this 521 * packet upstack till we get all the related buffers. 522 */ 523 end_of_packet = B_FALSE; 524 } 525 526 /* 527 * Get a pointer to the actual receive buffer 528 * The mp->b_rptr is mapped to The CurrentDescriptor 529 * Buffer Address. 530 */ 531 packet = 532 (p_rx_sw_packet_t)QUEUE_GET_HEAD(&rx_ring->recv_list); 533 ASSERT(packet != NULL); 534 535 rx_buf = packet->rx_buf; 536 537 length = current_desc->length; 538 539 #ifdef __sparc 540 if (packet->dma_type == USE_DVMA) 541 dvma_sync(rx_buf->dma_handle, 0, 542 DDI_DMA_SYNC_FORKERNEL); 543 else 544 (void) ddi_dma_sync(rx_buf->dma_handle, 545 E1000G_IPALIGNROOM, length, 546 DDI_DMA_SYNC_FORKERNEL); 547 #else 548 (void) ddi_dma_sync(rx_buf->dma_handle, 549 E1000G_IPALIGNROOM, length, 550 DDI_DMA_SYNC_FORKERNEL); 551 #endif 552 553 if (e1000g_check_dma_handle( 554 rx_buf->dma_handle) != DDI_FM_OK) { 555 ddi_fm_service_impact(Adapter->dip, 556 DDI_SERVICE_DEGRADED); 557 Adapter->chip_state = E1000G_ERROR; 558 } 559 560 accept_frame = (current_desc->errors == 0) || 561 ((current_desc->errors & 562 (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) != 0); 563 564 if (hw->mac.type == e1000_82543) { 565 unsigned char last_byte; 566 567 last_byte = 568 *((unsigned char *)rx_buf->address + length - 1); 569 570 if (TBI_ACCEPT(hw, 571 current_desc->status, current_desc->errors, 572 current_desc->length, last_byte, 573 Adapter->min_frame_size, Adapter->max_frame_size)) { 574 575 e1000_tbi_adjust_stats(Adapter, 576 length, hw->mac.addr); 577 578 length--; 579 accept_frame = B_TRUE; 580 } else if (e1000_tbi_sbp_enabled_82543(hw) && 581 (current_desc->errors == E1000_RXD_ERR_CE)) { 582 accept_frame = B_TRUE; 583 } 584 } 585 586 /* 587 * Indicate the packet to the NOS if it was good. 588 * Normally, hardware will discard bad packets for us. 589 * Check for the packet to be a valid Ethernet packet 590 */ 591 if (!accept_frame) { 592 /* 593 * error in incoming packet, either the packet is not a 594 * ethernet size packet, or the packet has an error. In 595 * either case, the packet will simply be discarded. 596 */ 597 E1000G_DEBUGLOG_0(Adapter, E1000G_INFO_LEVEL, 598 "Process Receive Interrupts: Error in Packet\n"); 599 600 E1000G_STAT(rx_ring->stat_error); 601 /* 602 * Returning here as we are done here. There is 603 * no point in waiting for while loop to elapse 604 * and the things which were done. More efficient 605 * and less error prone... 606 */ 607 goto rx_drop; 608 } 609 610 /* 611 * If the Ethernet CRC is not stripped by the hardware, 612 * we need to strip it before sending it up to the stack. 613 */ 614 if (end_of_packet && !Adapter->strip_crc) { 615 if (length > ETHERFCSL) { 616 length -= ETHERFCSL; 617 } else { 618 /* 619 * If the fragment is smaller than the CRC, 620 * drop this fragment, do the processing of 621 * the end of the packet. 622 */ 623 ASSERT(rx_ring->rx_mblk_tail != NULL); 624 rx_ring->rx_mblk_tail->b_wptr -= 625 ETHERFCSL - length; 626 rx_ring->rx_mblk_len -= 627 ETHERFCSL - length; 628 629 QUEUE_POP_HEAD(&rx_ring->recv_list); 630 631 goto rx_end_of_packet; 632 } 633 } 634 635 need_copy = B_TRUE; 636 637 if (length <= Adapter->rx_bcopy_thresh) 638 goto rx_copy; 639 640 /* 641 * Get the pre-constructed mblk that was associated 642 * to the receive data buffer. 643 */ 644 if (packet->mp == NULL) { 645 packet->mp = desballoc((unsigned char *) 646 rx_buf->address - E1000G_IPALIGNROOM, 647 length + E1000G_IPALIGNROOM, 648 BPRI_MED, &packet->free_rtn); 649 650 if (packet->mp != NULL) { 651 packet->mp->b_rptr += E1000G_IPALIGNROOM; 652 packet->mp->b_wptr += E1000G_IPALIGNROOM; 653 } else { 654 E1000G_STAT(rx_ring->stat_esballoc_fail); 655 } 656 } 657 658 if (packet->mp != NULL) { 659 /* 660 * We have two sets of buffer pool. One associated with 661 * the Rxdescriptors and other a freelist buffer pool. 662 * Each time we get a good packet, Try to get a buffer 663 * from the freelist pool using e1000g_get_buf. If we 664 * get free buffer, then replace the descriptor buffer 665 * address with the free buffer we just got, and pass 666 * the pre-constructed mblk upstack. (note no copying) 667 * 668 * If we failed to get a free buffer, then try to 669 * allocate a new buffer(mp) and copy the recv buffer 670 * content to our newly allocated buffer(mp). Don't 671 * disturb the desriptor buffer address. (note copying) 672 */ 673 newpkt = e1000g_get_buf(rx_ring); 674 675 if (newpkt != NULL) { 676 /* 677 * Get the mblk associated to the data, 678 * and strip it off the sw packet. 679 */ 680 nmp = packet->mp; 681 packet->mp = NULL; 682 packet->flag = E1000G_RX_SW_SENDUP; 683 684 /* 685 * Now replace old buffer with the new 686 * one we got from free list 687 * Both the RxSwPacket as well as the 688 * Receive Buffer Descriptor will now 689 * point to this new packet. 690 */ 691 packet = newpkt; 692 693 current_desc->buffer_addr = 694 newpkt->rx_buf->dma_address; 695 696 need_copy = B_FALSE; 697 } else { 698 E1000G_DEBUG_STAT(rx_ring->stat_no_freepkt); 699 } 700 } 701 702 rx_copy: 703 if (need_copy) { 704 /* 705 * No buffers available on free list, 706 * bcopy the data from the buffer and 707 * keep the original buffer. Dont want to 708 * do this.. Yack but no other way 709 */ 710 if ((nmp = allocb(length + E1000G_IPALIGNROOM, 711 BPRI_MED)) == NULL) { 712 /* 713 * The system has no buffers available 714 * to send up the incoming packet, hence 715 * the packet will have to be processed 716 * when there're more buffers available. 717 */ 718 E1000G_STAT(rx_ring->stat_allocb_fail); 719 goto rx_drop; 720 } 721 nmp->b_rptr += E1000G_IPALIGNROOM; 722 nmp->b_wptr += E1000G_IPALIGNROOM; 723 /* 724 * The free list did not have any buffers 725 * available, so, the received packet will 726 * have to be copied into a mp and the original 727 * buffer will have to be retained for future 728 * packet reception. 729 */ 730 bcopy(rx_buf->address, nmp->b_wptr, length); 731 } 732 733 /* 734 * The rx_sw_packet MUST be popped off the 735 * RxSwPacketList before either a putnext or freemsg 736 * is done on the mp that has now been created by the 737 * desballoc. If not, it is possible that the free 738 * routine will get called from the interrupt context 739 * and try to put this packet on the free list 740 */ 741 (p_rx_sw_packet_t)QUEUE_POP_HEAD(&rx_ring->recv_list); 742 743 ASSERT(nmp != NULL); 744 nmp->b_wptr += length; 745 746 if (rx_ring->rx_mblk == NULL) { 747 /* 748 * TCP/UDP checksum offload and 749 * IP checksum offload 750 */ 751 if (!(current_desc->status & E1000_RXD_STAT_IXSM)) { 752 /* 753 * Check TCP/UDP checksum 754 */ 755 if ((current_desc->status & 756 E1000_RXD_STAT_TCPCS) && 757 !(current_desc->errors & 758 E1000_RXD_ERR_TCPE)) 759 cksumflags |= HCK_FULLCKSUM | 760 HCK_FULLCKSUM_OK; 761 /* 762 * Check IP Checksum 763 */ 764 if ((current_desc->status & 765 E1000_RXD_STAT_IPCS) && 766 !(current_desc->errors & 767 E1000_RXD_ERR_IPE)) 768 cksumflags |= HCK_IPV4_HDRCKSUM; 769 } 770 } 771 772 /* 773 * We need to maintain our packet chain in the global 774 * Adapter structure, for the Rx processing can end 775 * with a fragment that has no EOP set. 776 */ 777 if (rx_ring->rx_mblk == NULL) { 778 /* Get the head of the message chain */ 779 rx_ring->rx_mblk = nmp; 780 rx_ring->rx_mblk_tail = nmp; 781 rx_ring->rx_mblk_len = length; 782 } else { /* Not the first packet */ 783 /* Continue adding buffers */ 784 rx_ring->rx_mblk_tail->b_cont = nmp; 785 rx_ring->rx_mblk_tail = nmp; 786 rx_ring->rx_mblk_len += length; 787 } 788 ASSERT(rx_ring->rx_mblk != NULL); 789 ASSERT(rx_ring->rx_mblk_tail != NULL); 790 ASSERT(rx_ring->rx_mblk_tail->b_cont == NULL); 791 792 /* 793 * Now this MP is ready to travel upwards but some more 794 * fragments are coming. 795 * We will send packet upwards as soon as we get EOP 796 * set on the packet. 797 */ 798 if (!end_of_packet) { 799 /* 800 * continue to get the next descriptor, 801 * Tail would be advanced at the end 802 */ 803 goto rx_next_desc; 804 } 805 806 rx_end_of_packet: 807 /* 808 * Found packet with EOP 809 * Process the last fragment. 810 */ 811 if (cksumflags != 0) { 812 (void) hcksum_assoc(rx_ring->rx_mblk, 813 NULL, NULL, 0, 0, 0, 0, cksumflags, 0); 814 cksumflags = 0; 815 } 816 817 /* 818 * Count packets that span multi-descriptors 819 */ 820 E1000G_DEBUG_STAT_COND(rx_ring->stat_multi_desc, 821 (rx_ring->rx_mblk->b_cont != NULL)); 822 823 /* 824 * Append to list to send upstream 825 */ 826 if (ret_mp == NULL) { 827 ret_mp = ret_nmp = rx_ring->rx_mblk; 828 } else { 829 ret_nmp->b_next = rx_ring->rx_mblk; 830 ret_nmp = rx_ring->rx_mblk; 831 } 832 ret_nmp->b_next = NULL; 833 *tail = ret_nmp; 834 *sz += length; 835 836 rx_ring->rx_mblk = NULL; 837 rx_ring->rx_mblk_tail = NULL; 838 rx_ring->rx_mblk_len = 0; 839 840 pkt_count++; 841 842 rx_next_desc: 843 /* 844 * Zero out the receive descriptors status 845 */ 846 current_desc->status = 0; 847 848 if (current_desc == rx_ring->rbd_last) 849 rx_ring->rbd_next = rx_ring->rbd_first; 850 else 851 rx_ring->rbd_next++; 852 853 last_desc = current_desc; 854 current_desc = rx_ring->rbd_next; 855 856 /* 857 * Put the buffer that we just indicated back 858 * at the end of our list 859 */ 860 QUEUE_PUSH_TAIL(&rx_ring->recv_list, 861 &packet->Link); 862 } /* while loop */ 863 864 /* Sync the Rx descriptor DMA buffers */ 865 (void) ddi_dma_sync(rx_ring->rbd_dma_handle, 866 0, 0, DDI_DMA_SYNC_FORDEV); 867 868 /* 869 * Advance the E1000's Receive Queue #0 "Tail Pointer". 870 */ 871 E1000_WRITE_REG(hw, E1000_RDT(0), 872 (uint32_t)(last_desc - rx_ring->rbd_first)); 873 874 if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) { 875 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED); 876 Adapter->chip_state = E1000G_ERROR; 877 } 878 879 Adapter->rx_pkt_cnt = pkt_count; 880 881 return (ret_mp); 882 883 rx_drop: 884 /* 885 * Zero out the receive descriptors status 886 */ 887 current_desc->status = 0; 888 889 /* Sync the Rx descriptor DMA buffers */ 890 (void) ddi_dma_sync(rx_ring->rbd_dma_handle, 891 0, 0, DDI_DMA_SYNC_FORDEV); 892 893 if (current_desc == rx_ring->rbd_last) 894 rx_ring->rbd_next = rx_ring->rbd_first; 895 else 896 rx_ring->rbd_next++; 897 898 last_desc = current_desc; 899 900 (p_rx_sw_packet_t)QUEUE_POP_HEAD(&rx_ring->recv_list); 901 902 QUEUE_PUSH_TAIL(&rx_ring->recv_list, &packet->Link); 903 /* 904 * Reclaim all old buffers already allocated during 905 * Jumbo receives.....for incomplete reception 906 */ 907 if (rx_ring->rx_mblk != NULL) { 908 freemsg(rx_ring->rx_mblk); 909 rx_ring->rx_mblk = NULL; 910 rx_ring->rx_mblk_tail = NULL; 911 rx_ring->rx_mblk_len = 0; 912 } 913 /* 914 * Advance the E1000's Receive Queue #0 "Tail Pointer". 915 */ 916 E1000_WRITE_REG(hw, E1000_RDT(0), 917 (uint32_t)(last_desc - rx_ring->rbd_first)); 918 919 if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) { 920 ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED); 921 Adapter->chip_state = E1000G_ERROR; 922 } 923 924 return (ret_mp); 925 } 926