xref: /titanic_50/usr/src/uts/common/io/drm/drm_io32.h (revision d02310705313ee2fcefee164a4b26d1fa85e9d22)
1d0538f66Scg149915 /*
2d0538f66Scg149915  * CDDL HEADER START
3d0538f66Scg149915  *
4d0538f66Scg149915  * The contents of this file are subject to the terms of the
5d0538f66Scg149915  * Common Development and Distribution License (the "License").
6d0538f66Scg149915  * You may not use this file except in compliance with the License.
7d0538f66Scg149915  *
8d0538f66Scg149915  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9d0538f66Scg149915  * or http://www.opensolaris.org/os/licensing.
10d0538f66Scg149915  * See the License for the specific language governing permissions
11d0538f66Scg149915  * and limitations under the License.
12d0538f66Scg149915  *
13d0538f66Scg149915  * When distributing Covered Code, include this CDDL HEADER in each
14d0538f66Scg149915  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15d0538f66Scg149915  * If applicable, add the following below this CDDL HEADER, with the
16d0538f66Scg149915  * fields enclosed by brackets "[]" replaced with your own identifying
17d0538f66Scg149915  * information: Portions Copyright [yyyy] [name of copyright owner]
18d0538f66Scg149915  *
19d0538f66Scg149915  * CDDL HEADER END
20d0538f66Scg149915  */
21d0538f66Scg149915 
22d0538f66Scg149915 /*
23*d0231070Smiao chen - Sun Microsystems - Beijing China  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
24d0538f66Scg149915  * Use is subject to license terms.
25d0538f66Scg149915  */
26d0538f66Scg149915 
27d0538f66Scg149915 #ifndef	_DRM_IO32_H_
28d0538f66Scg149915 #define	_DRM_IO32_H_
29d0538f66Scg149915 
30d0538f66Scg149915 #ifdef _MULTI_DATAMODEL
31d0538f66Scg149915 
32d0538f66Scg149915 typedef struct drm_version_32 {
33d0538f66Scg149915 	int version_major;		/* Major version */
34d0538f66Scg149915 	int version_minor;		/* Minor version */
35d0538f66Scg149915 	int version_patchlevel;	/* Patch level */
36d0538f66Scg149915 	uint32_t name_len;		/* Length of name buffer */
37d0538f66Scg149915 	caddr32_t name;			/* Name of driver */
38d0538f66Scg149915 	uint32_t date_len;		/* Length of date buffer */
39d0538f66Scg149915 	caddr32_t date;			/* User-space buffer to hold date */
40d0538f66Scg149915 	uint32_t desc_len;		/* Length of desc buffer */
41d0538f66Scg149915 	caddr32_t desc;			/* User-space buffer to hold desc */
42d0538f66Scg149915 } drm_version_32_t;
43d0538f66Scg149915 
44d0538f66Scg149915 typedef struct drm_unique_32 {
45d0538f66Scg149915 	uint32_t unique_len;    /* Length of unique */
46d0538f66Scg149915 	caddr32_t unique;   /* Unique name for driver instantiation */
47d0538f66Scg149915 } drm_unique_32_t;
48d0538f66Scg149915 
49d0538f66Scg149915 typedef struct drm_ctx_priv_map_32 {
50d0538f66Scg149915 	unsigned int ctx_id;	/* Context requesting private mapping */
51d0538f66Scg149915 	caddr32_t handle;		/* Handle of map */
52d0538f66Scg149915 } drm_ctx_priv_map_32_t;
53d0538f66Scg149915 
54d0538f66Scg149915 typedef struct drm_map_32 {
55d0538f66Scg149915 	unsigned long long offset;
56d0538f66Scg149915 	unsigned long long handle;
57d0538f66Scg149915 	uint32_t size;
58d0538f66Scg149915 	drm_map_type_t type;
59d0538f66Scg149915 	drm_map_flags_t flags;
60d0538f66Scg149915 	int mtrr;
61d0538f66Scg149915 } drm_map_32_t;
62d0538f66Scg149915 
63d0538f66Scg149915 
64d0538f66Scg149915 typedef struct drm_client_32 {
65d0538f66Scg149915 	int idx;		/* Which client desired? */
66d0538f66Scg149915 	int auth;		/* Is client authenticated? */
67d0538f66Scg149915 	uint32_t pid;	/* Process ID */
68d0538f66Scg149915 	uint32_t uid;	/* User ID */
69d0538f66Scg149915 	uint32_t magic;	/* Magic */
70d0538f66Scg149915 	uint32_t iocs;	/* Ioctl count */
71d0538f66Scg149915 } drm_client_32_t;
72d0538f66Scg149915 
73d0538f66Scg149915 
74d0538f66Scg149915 typedef struct drm_stats_32 {
75d0538f66Scg149915 	uint32_t count;
76d0538f66Scg149915 	struct {
77d0538f66Scg149915 		uint32_t value;
78d0538f66Scg149915 		drm_stat_type_t type;
79d0538f66Scg149915 	} data[15];
80d0538f66Scg149915 } drm_stats_32_t;
81d0538f66Scg149915 
82d0538f66Scg149915 
83d0538f66Scg149915 typedef struct drm_buf_desc_32 {
84d0538f66Scg149915 	int		count;		/* Number of buffers of this size */
85d0538f66Scg149915 	int		size;		/* Size in bytes */
86d0538f66Scg149915 	int		low_mark;	/* Low water mark */
87d0538f66Scg149915 	int		high_mark;	/* High water mark */
88d0538f66Scg149915 	drm_buf_flag flags;
89d0538f66Scg149915 
90d0538f66Scg149915 	/*
91d0538f66Scg149915 	 * Start address of where the AGP buffers are
92d0538f66Scg149915 	 * in the AGP aperture
93d0538f66Scg149915 	 */
94d0538f66Scg149915 	uint32_t agp_start;
95d0538f66Scg149915 
96d0538f66Scg149915 }drm_buf_desc_32_t;
97d0538f66Scg149915 
98d0538f66Scg149915 typedef struct drm_buf_free_32 {
99d0538f66Scg149915 	int count;
100d0538f66Scg149915 	uint32_t list;
101d0538f66Scg149915 } drm_buf_free_32_t;
102d0538f66Scg149915 
103d0538f66Scg149915 /*
104d0538f66Scg149915  * Used by DRM_IOCTL_MAP_BUFS_32
105d0538f66Scg149915  */
106d0538f66Scg149915 typedef struct drm_buf_pub_32 {
107d0538f66Scg149915 	int idx;		/* Index into the master buffer list */
108d0538f66Scg149915 	int total;		/* Buffer size */
109d0538f66Scg149915 	int used;		/* Amount of buffer in use (for DMA) */
110d0538f66Scg149915 	uint32_t address;	/* Address of buffer */
111d0538f66Scg149915 } drm_buf_pub_32_t;
112d0538f66Scg149915 
113d0538f66Scg149915 typedef struct drm_buf_map_32 {
114d0538f66Scg149915 	int		count;	/* Length of the buffer list */
115d0538f66Scg149915 #if defined(__cplusplus)
116d0538f66Scg149915 	uint32_t c_virtual;
117d0538f66Scg149915 #else
118d0538f66Scg149915 	uint32_t virtual;	/* Mmap'd area in user-virtual */
119d0538f66Scg149915 #endif
120d0538f66Scg149915 	uint32_t	list; /* Buffer information */
121d0538f66Scg149915 	int    fd;
122d0538f66Scg149915 } drm_buf_map_32_t;
123d0538f66Scg149915 
124d0538f66Scg149915 typedef struct drm_agp_mode_32 {
125d0538f66Scg149915     uint32_t mode;  /* AGP mode */
126d0538f66Scg149915 } drm_agp_mode_32_t;
127d0538f66Scg149915 
128d0538f66Scg149915 typedef struct drm_agp_buffer32 {
129d0538f66Scg149915 	uint32_t size;		/* In bytes -- will round to page boundary */
130d0538f66Scg149915 	uint32_t handle;	/* Used for binding / unbinding */
131d0538f66Scg149915 	uint32_t type;		/* Type of memory to allocate */
132d0538f66Scg149915 	uint32_t physical;	/* Physical used by i810 */
133d0538f66Scg149915 } drm_agp_buffer_32_t;
134d0538f66Scg149915 
135d0538f66Scg149915 typedef struct drm_agp_binding_32 {
136d0538f66Scg149915 	uint32_t handle;	/* From drm_agp_buffer */
137d0538f66Scg149915 	uint32_t offset;	/* In bytes -- will round to page boundary */
138d0538f66Scg149915 } drm_agp_binding_32_t;
139d0538f66Scg149915 
140d0538f66Scg149915 typedef struct drm_agp_info_32 {
141d0538f66Scg149915 	int agp_version_major;
142d0538f66Scg149915 	int agp_version_minor;
143d0538f66Scg149915 	uint32_t mode;
144d0538f66Scg149915 	uint32_t aperture_base;
145d0538f66Scg149915 	uint32_t aperture_size;
146d0538f66Scg149915 	uint32_t memory_allowed;
147d0538f66Scg149915 	uint32_t memory_used;
148d0538f66Scg149915 	unsigned short id_vendor;
149d0538f66Scg149915 	unsigned short id_device;
150d0538f66Scg149915 } drm_agp_info_32_t;
151d0538f66Scg149915 
152d0538f66Scg149915 typedef struct drm_scatter_gather_32 {
153d0538f66Scg149915 	uint32_t	size;	/* In bytes -- will round to page boundary */
154d0538f66Scg149915 	uint32_t	handle;	/* Used for mapping/unmapping */
155d0538f66Scg149915 } drm_scatter_gather_32_t;
156d0538f66Scg149915 
157d0538f66Scg149915 typedef struct drm_ctx_res_32 {
158d0538f66Scg149915 	int count;
159d0538f66Scg149915 	caddr32_t contexts;
160d0538f66Scg149915 } drm_ctx_res_32_t;
161d0538f66Scg149915 
162d0538f66Scg149915 struct drm_wait_vblank_request_32 {
163d0538f66Scg149915 	drm_vblank_seq_type_t type;
164*d0231070Smiao chen - Sun Microsystems - Beijing China 	uint32_t sequence;
165*d0231070Smiao chen - Sun Microsystems - Beijing China 	uint32_t signal;
166d0538f66Scg149915 };
167d0538f66Scg149915 struct drm_wait_vblank_reply_32 {
168d0538f66Scg149915 	drm_vblank_seq_type_t type;
169*d0231070Smiao chen - Sun Microsystems - Beijing China 	uint32_t sequence;
170*d0231070Smiao chen - Sun Microsystems - Beijing China 	int32_t tval_sec;
171*d0231070Smiao chen - Sun Microsystems - Beijing China 	int32_t tval_usec;
172d0538f66Scg149915 };
173d0538f66Scg149915 
174d0538f66Scg149915 /*
175d0538f66Scg149915  * DRM_IOCTL_WAIT_VBLANK ioctl argument type.
176d0538f66Scg149915  *
177d0538f66Scg149915  * \sa drmWaitVBlank().
178d0538f66Scg149915  */
179d0538f66Scg149915 typedef union drm_wait_vblank_32 {
180d0538f66Scg149915 	struct drm_wait_vblank_request_32 request;
181d0538f66Scg149915 	struct drm_wait_vblank_reply_32 reply;
182d0538f66Scg149915 } drm_wait_vblank_32_t;
183d0538f66Scg149915 
184d0538f66Scg149915 
185d0538f66Scg149915 #endif  /* _MULTI_DATAMODEL */
186d0538f66Scg149915 
187d0538f66Scg149915 #endif	/* _DRM_IO32_H_ */
188