1 /* BEGIN CSTYLED */ 2 3 /** 4 * \file drm.h 5 * Header for the Direct Rendering Manager 6 * 7 * \author Rickard E. (Rik) Faith <faith@valinux.com> 8 * 9 * \par Acknowledgments: 10 * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic \c cmpxchg. 11 */ 12 13 /* 14 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. 15 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 16 * All rights reserved. 17 * 18 * Permission is hereby granted, free of charge, to any person obtaining a 19 * copy of this software and associated documentation files (the "Software"), 20 * to deal in the Software without restriction, including without limitation 21 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 22 * and/or sell copies of the Software, and to permit persons to whom the 23 * Software is furnished to do so, subject to the following conditions: 24 * 25 * The above copyright notice and this permission notice (including the next 26 * paragraph) shall be included in all copies or substantial portions of the 27 * Software. 28 * 29 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 30 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 31 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 32 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 33 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 34 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 35 * OTHER DEALINGS IN THE SOFTWARE. 36 */ 37 38 /** 39 * \mainpage 40 * 41 * The Direct Rendering Manager (DRM) is a device-independent kernel-level 42 * device driver that provides support for the XFree86 Direct Rendering 43 * Infrastructure (DRI). 44 * 45 * The DRM supports the Direct Rendering Infrastructure (DRI) in four major 46 * ways: 47 * -# The DRM provides synchronized access to the graphics hardware via 48 * the use of an optimized two-tiered lock. 49 * -# The DRM enforces the DRI security policy for access to the graphics 50 * hardware by only allowing authenticated X11 clients access to 51 * restricted regions of memory. 52 * -# The DRM provides a generic DMA engine, complete with multiple 53 * queues and the ability to detect the need for an OpenGL context 54 * switch. 55 * -# The DRM is extensible via the use of small device-specific modules 56 * that rely extensively on the API exported by the DRM module. 57 * 58 */ 59 60 /* 61 * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 62 * Use is subject to license terms. 63 */ 64 65 #ifndef _DRM_H_ 66 #define _DRM_H_ 67 68 #pragma ident "%Z%%M% %I% %E% SMI" 69 70 #include <sys/types32.h> 71 72 #ifndef __user 73 #define __user 74 #endif 75 #ifndef __iomem 76 #define __iomem 77 #endif 78 79 #ifdef __GNUC__ 80 # define DEPRECATED __attribute__ ((deprecated)) 81 #else 82 # define DEPRECATED 83 # define __volatile__ volatile 84 #endif 85 86 #if defined(__linux__) 87 #include <asm/ioctl.h> /* For _IO* macros */ 88 #define DRM_IOCTL_NR(n) _IOC_NR(n) 89 #define DRM_IOC_VOID _IOC_NONE 90 #define DRM_IOC_READ _IOC_READ 91 #define DRM_IOC_WRITE _IOC_WRITE 92 #define DRM_IOC_READWRITE _IOC_READ|_IOC_WRITE 93 #define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size) 94 #elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__NetBSD__) || defined(__OpenBSD__) || defined(__DragonFly__) 95 #if (defined(__FreeBSD__) || defined(__FreeBSD_kernel__)) && defined(IN_MODULE) 96 /* Prevent name collision when including sys/ioccom.h */ 97 #undef ioctl 98 #include <sys/ioccom.h> 99 #define ioctl(a,b,c) xf86ioctl(a,b,c) 100 #else 101 #include <sys/ioccom.h> 102 #endif /* __FreeBSD__ && xf86ioctl */ 103 #define DRM_IOCTL_NR(n) ((n) & 0xff) 104 #define DRM_IOC_VOID IOC_VOID 105 #define DRM_IOC_READ IOC_OUT 106 #define DRM_IOC_WRITE IOC_IN 107 #define DRM_IOC_READWRITE IOC_INOUT 108 #define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size) 109 #endif 110 111 /* Solaris-specific. */ 112 #if defined(__SOLARIS__) || defined(sun) 113 #define _IOC_NR(nr) (((nr) >> _IOC_NRSHIFT) & _IOC_NRMASK) 114 115 #define _IOC_NRBITS 8 116 #define _IOC_TYPEBITS 8 117 #define _IOC_SIZEBITS 14 118 #define _IOC_DIRBITS 2 119 120 #define _IOC_NRMASK ((1 << _IOC_NRBITS)-1) 121 #define _IOC_TYPEMASK ((1 << _IOC_TYPEBITS)-1) 122 #define _IOC_SIZEMASK ((1 << _IOC_SIZEBITS)-1) 123 #define _IOC_DIRMASK ((1 << _IOC_DIRBITS)-1) 124 125 #define _IOC_NRSHIFT 0 126 #define _IOC_TYPESHIFT (_IOC_NRSHIFT+_IOC_NRBITS) 127 #define _IOC_SIZESHIFT (_IOC_TYPESHIFT+_IOC_TYPEBITS) 128 #define _IOC_DIRSHIFT (_IOC_SIZESHIFT+_IOC_SIZEBITS) 129 130 #define _IOC_NONE 0U 131 #define _IOC_WRITE 1U 132 #define _IOC_READ 2U 133 134 #define _IOC(dir, type, nr, size) \ 135 (((dir) << _IOC_DIRSHIFT) | \ 136 ((type) << _IOC_TYPESHIFT) | \ 137 ((nr) << _IOC_NRSHIFT) | \ 138 ((size) << _IOC_SIZESHIFT)) 139 140 /* used for X server compile */ 141 #if !defined(_KERNEL) 142 #define _IO(type, nr) _IOC(_IOC_NONE, (type), (nr), 0) 143 #define _IOR(type, nr, size) _IOC(_IOC_READ, (type), (nr), sizeof (size)) 144 #define _IOW(type, nr, size) _IOC(_IOC_WRITE, (type), (nr), sizeof (size)) 145 #define _IOWR(type, nr, size) _IOC(_IOC_READ|_IOC_WRITE, \ 146 (type), (nr), sizeof (size)) 147 148 #define _IOC_DIR(nr) (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK) 149 #define _IOC_TYPE(nr) (((nr) >> _IOC_TYPESHIFT) & _IOC_TYPEMASK) 150 #define _IOC_NR(nr) (((nr) >> _IOC_NRSHIFT) & _IOC_NRMASK) 151 #define _IOC_SIZE(nr) (((nr) >> _IOC_SIZESHIFT) & _IOC_SIZEMASK) 152 153 #define IOC_IN (_IOC_WRITE << _IOC_DIRSHIFT) 154 #define IOC_OUT (_IOC_READ << _IOC_DIRSHIFT) 155 #define IOC_INOUT ((_IOC_WRITE|_IOC_READ) << _IOC_DIRSHIFT) 156 #define IOCSIZE_MASK (_IOC_SIZEMASK << _IOC_SIZESHIFT) 157 #define IOCSIZE_SHIFT (_IOC_SIZESHIFT) 158 #endif /* _KERNEL */ 159 160 #define DRM_IOCTL_NR(n) _IOC_NR(n) 161 #define DRM_IOC_VOID IOC_VOID 162 #define DRM_IOC_READ IOC_OUT 163 #define DRM_IOC_WRITE IOC_IN 164 #define DRM_IOC_READWRITE IOC_INOUT 165 #define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size) 166 167 #endif /* __Solaris__ or sun */ 168 #define XFREE86_VERSION(major,minor,patch,snap) \ 169 ((major << 16) | (minor << 8) | patch) 170 171 #ifndef CONFIG_XFREE86_VERSION 172 #define CONFIG_XFREE86_VERSION XFREE86_VERSION(4,1,0,0) 173 #endif 174 175 #if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0) 176 #define DRM_PROC_DEVICES "/proc/devices" 177 #define DRM_PROC_MISC "/proc/misc" 178 #define DRM_PROC_DRM "/proc/drm" 179 #define DRM_DEV_DRM "/dev/drm" 180 #define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP) 181 #define DRM_DEV_UID 0 182 #define DRM_DEV_GID 0 183 #endif 184 185 #if CONFIG_XFREE86_VERSION >= XFREE86_VERSION(4,1,0,0) 186 #ifdef __OpenBSD__ 187 #define DRM_MAJOR 81 188 #endif 189 #if defined(__linux__) || defined(__NetBSD__) 190 #define DRM_MAJOR 226 191 #endif 192 #define DRM_MAX_MINOR 15 193 #endif 194 #define DRM_NAME "drm" /**< Name in kernel, /dev, and /proc */ 195 #define DRM_MIN_ORDER 5 /**< At least 2^5 bytes = 32 bytes */ 196 #define DRM_MAX_ORDER 22 /**< Up to 2^22 bytes = 4MB */ 197 #define DRM_RAM_PERCENT 10 /**< How much system ram can we lock? */ 198 199 #define _DRM_LOCK_HELD 0x80000000U /**< Hardware lock is held */ 200 #define _DRM_LOCK_CONT 0x40000000U /**< Hardware lock is contended */ 201 #define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD) 202 #define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT) 203 #define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT)) 204 205 #if defined(__linux__) 206 #if defined(__KERNEL__) 207 typedef __u64 drm_u64_t; 208 #else 209 typedef unsigned long long drm_u64_t; 210 #endif 211 212 typedef unsigned int drm_handle_t; 213 #elif defined(__SVR4) && defined(__sun) 214 #include <sys/types.h> 215 typedef uint64_t drm_u64_t; 216 typedef unsigned long long drm_handle_t; /**< To mapped regions */ 217 #else 218 #include <sys/types.h> 219 typedef u_int64_t drm_u64_t; 220 typedef unsigned long drm_handle_t; /**< To mapped regions */ 221 #endif 222 typedef unsigned int drm_context_t; /**< GLXContext handle */ 223 typedef unsigned int drm_drawable_t; 224 typedef unsigned int drm_magic_t; /**< Magic for authentication */ 225 226 /** 227 * Cliprect. 228 * 229 * \warning If you change this structure, make sure you change 230 * XF86DRIClipRectRec in the server as well 231 * 232 * \note KW: Actually it's illegal to change either for 233 * backwards-compatibility reasons. 234 */ 235 typedef struct drm_clip_rect { 236 unsigned short x1; 237 unsigned short y1; 238 unsigned short x2; 239 unsigned short y2; 240 } drm_clip_rect_t; 241 242 /** 243 * Drawable information. 244 */ 245 typedef struct drm_drawable_info { 246 unsigned int num_rects; 247 drm_clip_rect_t *rects; 248 } drm_drawable_info_t; 249 250 /** 251 * Texture region, 252 */ 253 typedef struct drm_tex_region { 254 unsigned char next; 255 unsigned char prev; 256 unsigned char in_use; 257 unsigned char padding; 258 unsigned int age; 259 } drm_tex_region_t; 260 261 /** 262 * Hardware lock. 263 * 264 * The lock structure is a simple cache-line aligned integer. To avoid 265 * processor bus contention on a multiprocessor system, there should not be any 266 * other data stored in the same cache line. 267 */ 268 typedef struct drm_hw_lock { 269 __volatile__ unsigned int lock; /**< lock variable */ 270 char padding[60]; /**< Pad to cache line */ 271 } drm_hw_lock_t; 272 273 /* This is beyond ugly, and only works on GCC. However, it allows me to use 274 * drm.h in places (i.e., in the X-server) where I can't use size_t. The real 275 * fix is to use uint32_t instead of size_t, but that fix will break existing 276 * LP64 (i.e., PowerPC64, SPARC64, IA-64, Alpha, etc.) systems. That *will* 277 * eventually happen, though. I chose 'unsigned long' to be the fallback type 278 * because that works on all the platforms I know about. Hopefully, the 279 * real fix will happen before that bites us. 280 */ 281 282 #ifdef __SIZE_TYPE__ 283 # define DRM_SIZE_T __SIZE_TYPE__ 284 #else 285 #if !defined(__SOLARIS__) && !defined(sun) 286 # warning "__SIZE_TYPE__ not defined. Assuming sizeof(size_t) == sizeof(unsigned long)!" 287 #endif 288 # define DRM_SIZE_T unsigned long 289 #endif 290 291 /** 292 * DRM_IOCTL_VERSION ioctl argument type. 293 * 294 * \sa drmGetVersion(). 295 */ 296 typedef struct drm_version { 297 int version_major; /**< Major version */ 298 int version_minor; /**< Minor version */ 299 int version_patchlevel; /**< Patch level */ 300 DRM_SIZE_T name_len; /**< Length of name buffer */ 301 char __user *name; /**< Name of driver */ 302 DRM_SIZE_T date_len; /**< Length of date buffer */ 303 char __user *date; /**< User-space buffer to hold date */ 304 DRM_SIZE_T desc_len; /**< Length of desc buffer */ 305 char __user *desc; /**< User-space buffer to hold desc */ 306 } drm_version_t; 307 308 #if defined(__sun) && defined(_KERNEL) 309 typedef struct drm_version32 { 310 int version_major; /* Major version */ 311 int version_minor; /* Minor version */ 312 int version_patchlevel; /* Patch level */ 313 uint32_t name_len; /* Length of name buffer */ 314 caddr32_t name; /* Name of driver */ 315 uint32_t date_len; /* Length of date buffer */ 316 caddr32_t date; /* User-space buffer to hold date */ 317 uint32_t desc_len; /* Length of desc buffer */ 318 caddr32_t desc; /* User-space buffer to hold desc */ 319 } drm_version32_t; 320 #endif 321 322 /** 323 * DRM_IOCTL_GET_UNIQUE ioctl argument type. 324 * 325 * \sa drmGetBusid() and drmSetBusId(). 326 */ 327 typedef struct drm_unique { 328 DRM_SIZE_T unique_len; /**< Length of unique */ 329 char __user *unique; /**< Unique name for driver instantiation */ 330 } drm_unique_t; 331 332 #if defined(__sun) && defined(_KERNEL) 333 typedef struct drm_unique32 { 334 uint32_t unique_len; /* Length of unique */ 335 caddr32_t unique; /* Unique name for driver instantiation */ 336 } drm_unique32_t; 337 #endif 338 339 #undef DRM_SIZE_T 340 341 typedef struct drm_list { 342 int count; /**< Length of user-space structures */ 343 drm_version_t __user *version; 344 } drm_list_t; 345 346 typedef struct drm_block { 347 int unused; 348 } drm_block_t; 349 350 /** 351 * DRM_IOCTL_CONTROL ioctl argument type. 352 * 353 * \sa drmCtlInstHandler() and drmCtlUninstHandler(). 354 */ 355 typedef struct drm_control { 356 enum { 357 DRM_ADD_COMMAND, 358 DRM_RM_COMMAND, 359 DRM_INST_HANDLER, 360 DRM_UNINST_HANDLER 361 } func; 362 int irq; 363 } drm_control_t; 364 365 /** 366 * Type of memory to map. 367 */ 368 typedef enum drm_map_type { 369 _DRM_FRAME_BUFFER = 0, /**< WC (no caching), no core dump */ 370 _DRM_REGISTERS = 1, /**< no caching, no core dump */ 371 _DRM_SHM = 2, /**< shared, cached */ 372 _DRM_AGP = 3, /**< AGP/GART */ 373 _DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */ 374 _DRM_CONSISTENT = 5, /**< Consistent memory for PCI DMA */ 375 _DRM_AGP_UMEM = 6 376 } drm_map_type_t; 377 378 /** 379 * Memory mapping flags. 380 */ 381 typedef enum drm_map_flags { 382 _DRM_RESTRICTED = 0x01, /**< Cannot be mapped to user-virtual */ 383 _DRM_READ_ONLY = 0x02, 384 _DRM_LOCKED = 0x04, /**< shared, cached, locked */ 385 _DRM_KERNEL = 0x08, /**< kernel requires access */ 386 _DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */ 387 _DRM_CONTAINS_LOCK = 0x20, /**< SHM page that contains lock */ 388 _DRM_REMOVABLE = 0x40 /**< Removable mapping */ 389 } drm_map_flags_t; 390 391 typedef struct drm_ctx_priv_map { 392 unsigned int ctx_id; /**< Context requesting private mapping */ 393 void *handle; /**< Handle of map */ 394 } drm_ctx_priv_map_t; 395 396 #if defined(__sun) && defined(_KERNEL) 397 typedef struct drm_ctx_priv_map32 { 398 unsigned int ctx_id; /* Context requesting private mapping */ 399 caddr32_t handle; /* Handle of map */ 400 } drm_ctx_priv_map32_t; 401 #endif 402 403 /** 404 * DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls 405 * argument type. 406 * 407 * \sa drmAddMap(). 408 */ 409 typedef struct drm_map { 410 unsigned long long offset; /**< Requested physical address (0 for SAREA)*/ 411 unsigned long long handle; 412 /**< User-space: "Handle" to pass to mmap() */ 413 /**< Kernel-space: kernel-virtual address */ 414 unsigned long size; /**< Requested physical size (bytes) */ 415 drm_map_type_t type; /**< Type of memory to map */ 416 drm_map_flags_t flags; /**< Flags */ 417 int mtrr; /**< MTRR slot used */ 418 /* Private data */ 419 } drm_map_t; 420 421 #if defined(__sun) && defined(_KERNEL) 422 typedef struct drm_map32 { 423 unsigned long long offset; 424 unsigned long long handle; 425 uint32_t size; 426 drm_map_type_t type; 427 drm_map_flags_t flags; 428 int mtrr; 429 } drm_map32_t; 430 #endif 431 432 /** 433 * DRM_IOCTL_GET_CLIENT ioctl argument type. 434 */ 435 typedef struct drm_client { 436 int idx; /**< Which client desired? */ 437 int auth; /**< Is client authenticated? */ 438 unsigned long pid; /**< Process ID */ 439 unsigned long uid; /**< User ID */ 440 unsigned long magic; /**< Magic */ 441 unsigned long iocs; /**< Ioctl count */ 442 } drm_client_t; 443 444 #if defined(__sun) && defined(_KERNEL) 445 typedef struct drm_client32 { 446 int idx; /**< Which client desired? */ 447 int auth; /**< Is client authenticated? */ 448 uint32_t pid; /**< Process ID */ 449 uint32_t uid; /**< User ID */ 450 uint32_t magic; /**< Magic */ 451 uint32_t iocs; /**< Ioctl count */ 452 } drm_client32_t; 453 #endif 454 455 typedef enum { 456 _DRM_STAT_LOCK, 457 _DRM_STAT_OPENS, 458 _DRM_STAT_CLOSES, 459 _DRM_STAT_IOCTLS, 460 _DRM_STAT_LOCKS, 461 _DRM_STAT_UNLOCKS, 462 _DRM_STAT_VALUE, /**< Generic value */ 463 _DRM_STAT_BYTE, /**< Generic byte counter (1024bytes/K) */ 464 _DRM_STAT_COUNT, /**< Generic non-byte counter (1000/k) */ 465 466 _DRM_STAT_IRQ, /**< IRQ */ 467 _DRM_STAT_PRIMARY, /**< Primary DMA bytes */ 468 _DRM_STAT_SECONDARY, /**< Secondary DMA bytes */ 469 _DRM_STAT_DMA, /**< DMA */ 470 _DRM_STAT_SPECIAL, /**< Special DMA (e.g., priority or polled) */ 471 _DRM_STAT_MISSED /**< Missed DMA opportunity */ 472 /* Add to the *END* of the list */ 473 } drm_stat_type_t; 474 475 /** 476 * DRM_IOCTL_GET_STATS ioctl argument type. 477 */ 478 typedef struct drm_stats { 479 unsigned long count; 480 struct { 481 unsigned long value; 482 drm_stat_type_t type; 483 } data[15]; 484 } drm_stats_t; 485 486 #if defined(__sun) && defined(_KERNEL) 487 typedef struct drm_stats32 { 488 uint32_t count; 489 struct { 490 uint32_t value; 491 drm_stat_type_t type; 492 } data[15]; 493 } drm_stats32_t; 494 #endif 495 496 /** 497 * Hardware locking flags. 498 */ 499 typedef enum drm_lock_flags { 500 _DRM_LOCK_READY = 0x01, /**< Wait until hardware is ready for DMA */ 501 _DRM_LOCK_QUIESCENT = 0x02, /**< Wait until hardware quiescent */ 502 _DRM_LOCK_FLUSH = 0x04, /**< Flush this context's DMA queue first */ 503 _DRM_LOCK_FLUSH_ALL = 0x08, /**< Flush all DMA queues first */ 504 /* These *HALT* flags aren't supported yet 505 -- they will be used to support the 506 full-screen DGA-like mode. */ 507 _DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */ 508 _DRM_HALT_CUR_QUEUES = 0x20 /**< Halt all current queues */ 509 } drm_lock_flags_t; 510 511 /** 512 * DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type. 513 * 514 * \sa drmGetLock() and drmUnlock(). 515 */ 516 typedef struct drm_lock { 517 int context; 518 drm_lock_flags_t flags; 519 } drm_lock_t; 520 521 /** 522 * DMA flags 523 * 524 * \warning 525 * These values \e must match xf86drm.h. 526 * 527 * \sa drm_dma. 528 */ 529 typedef enum drm_dma_flags { 530 /* Flags for DMA buffer dispatch */ 531 _DRM_DMA_BLOCK = 0x01, /**< 532 * Block until buffer dispatched. 533 * 534 * \note The buffer may not yet have 535 * been processed by the hardware -- 536 * getting a hardware lock with the 537 * hardware quiescent will ensure 538 * that the buffer has been 539 * processed. 540 */ 541 _DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */ 542 _DRM_DMA_PRIORITY = 0x04, /**< High priority dispatch */ 543 544 /* Flags for DMA buffer request */ 545 _DRM_DMA_WAIT = 0x10, /**< Wait for free buffers */ 546 _DRM_DMA_SMALLER_OK = 0x20, /**< Smaller-than-requested buffers OK */ 547 _DRM_DMA_LARGER_OK = 0x40 /**< Larger-than-requested buffers OK */ 548 } drm_dma_flags_t; 549 550 /** 551 * DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type. 552 * 553 * \sa drmAddBufs(). 554 */ 555 typedef enum { 556 _DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */ 557 _DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */ 558 _DRM_SG_BUFFER = 0x04, /**< Scatter/gather memory buffer */ 559 _DRM_FB_BUFFER = 0x08 /**< Buffer is in frame buffer */ 560 } drm_buf_flag; 561 typedef struct drm_buf_desc { 562 int count; /**< Number of buffers of this size */ 563 int size; /**< Size in bytes */ 564 int low_mark; /**< Low water mark */ 565 int high_mark; /**< High water mark */ 566 drm_buf_flag flags; 567 unsigned long agp_start; /**< 568 * Start address of where the AGP buffers are 569 * in the AGP aperture 570 */ 571 } drm_buf_desc_t; 572 573 #if defined(__sun) && defined(_KERNEL) 574 typedef struct drm_buf_desc32 { 575 int count; /**< Number of buffers of this size */ 576 int size; /**< Size in bytes */ 577 int low_mark; /**< Low water mark */ 578 int high_mark; /**< High water mark */ 579 drm_buf_flag flags; 580 uint32_t agp_start; /**< 581 * Start address of where the AGP buffers are 582 * in the AGP aperture 583 */ 584 } drm_buf_desc32_t; 585 #endif 586 587 /** 588 * DRM_IOCTL_INFO_BUFS ioctl argument type. 589 */ 590 typedef struct drm_buf_info { 591 int count; /**< Number of buffers described in list */ 592 drm_buf_desc_t __user *list; /**< List of buffer descriptions */ 593 } drm_buf_info_t; 594 595 /** 596 * DRM_IOCTL_FREE_BUFS ioctl argument type. 597 */ 598 typedef struct drm_buf_free { 599 int count; 600 int __user *list; 601 } drm_buf_free_t; 602 603 #if defined(__sun) && defined(_KERNEL) 604 typedef struct drm_buf_free32 { 605 int count; 606 caddr32_t list; 607 } drm_buf_free32_t; 608 #endif 609 610 /** 611 * Buffer information 612 * 613 * \sa drm_buf_map. 614 */ 615 typedef struct drm_buf_pub { 616 int idx; /**< Index into the master buffer list */ 617 int total; /**< Buffer size */ 618 int used; /**< Amount of buffer in use (for DMA) */ 619 void __user *address; /**< Address of buffer */ 620 } drm_buf_pub_t; 621 622 /** 623 * DRM_IOCTL_MAP_BUFS ioctl argument type. 624 */ 625 typedef struct drm_buf_map { 626 int count; /**< Length of the buffer list */ 627 #if defined(__cplusplus) 628 void __user *c_virtual; 629 #else 630 void __user *virtual; /**< Mmap'd area in user-virtual */ 631 #endif 632 drm_buf_pub_t __user *list; /**< Buffer information */ 633 } drm_buf_map_t; 634 635 #if defined(__sun) && defined(_KERNEL) 636 typedef struct drm_buf_map32 { 637 int count; /**< Length of the buffer list */ 638 #if defined(__cplusplus) 639 caddr32_t c_virtual; 640 #else 641 caddr32_t virtual; /**< Mmap'd area in user-virtual */ 642 #endif 643 caddr32_t list; /**< Buffer information */ 644 } drm_buf_map32_t; 645 #endif 646 647 /** 648 * DRM_IOCTL_DMA ioctl argument type. 649 * 650 * Indices here refer to the offset into the buffer list in drm_buf_get. 651 * 652 * \sa drmDMA(). 653 */ 654 typedef struct drm_dma { 655 int context; /**< Context handle */ 656 int send_count; /**< Number of buffers to send */ 657 int __user *send_indices; /**< List of handles to buffers */ 658 int __user *send_sizes; /**< Lengths of data to send */ 659 drm_dma_flags_t flags; /**< Flags */ 660 int request_count; /**< Number of buffers requested */ 661 int request_size; /**< Desired size for buffers */ 662 int __user *request_indices; /**< Buffer information */ 663 int __user *request_sizes; 664 int granted_count; /**< Number of buffers granted */ 665 } drm_dma_t; 666 667 typedef enum { 668 _DRM_CONTEXT_PRESERVED = 0x01, 669 _DRM_CONTEXT_2DONLY = 0x02 670 } drm_ctx_flags_t; 671 672 /** 673 * DRM_IOCTL_ADD_CTX ioctl argument type. 674 * 675 * \sa drmCreateContext() and drmDestroyContext(). 676 */ 677 typedef struct drm_ctx { 678 drm_context_t handle; 679 drm_ctx_flags_t flags; 680 } drm_ctx_t; 681 682 /** 683 * DRM_IOCTL_RES_CTX ioctl argument type. 684 */ 685 typedef struct drm_ctx_res { 686 int count; 687 drm_ctx_t __user *contexts; 688 } drm_ctx_res_t; 689 690 #if defined(__sun) && defined(_KERNEL) 691 typedef struct drm_ctx_res32 { 692 int count; 693 caddr32_t contexts; 694 } drm_ctx_res32_t; 695 #endif 696 697 /** 698 * DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type. 699 */ 700 typedef struct drm_draw { 701 drm_drawable_t handle; 702 } drm_draw_t; 703 704 /** 705 * DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type. 706 */ 707 typedef struct drm_auth { 708 drm_magic_t magic; 709 } drm_auth_t; 710 711 /** 712 * DRM_IOCTL_IRQ_BUSID ioctl argument type. 713 * 714 * \sa drmGetInterruptFromBusID(). 715 */ 716 typedef struct drm_irq_busid { 717 int irq; /**< IRQ number */ 718 int busnum; /**< bus number */ 719 int devnum; /**< device number */ 720 int funcnum; /**< function number */ 721 } drm_irq_busid_t; 722 723 typedef enum { 724 _DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */ 725 _DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */ 726 _DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking */ 727 } drm_vblank_seq_type_t; 728 729 #define _DRM_VBLANK_FLAGS_MASK _DRM_VBLANK_SIGNAL 730 731 struct drm_wait_vblank_request { 732 drm_vblank_seq_type_t type; 733 unsigned int sequence; 734 unsigned long signal; 735 }; 736 737 struct drm_wait_vblank_reply { 738 drm_vblank_seq_type_t type; 739 unsigned int sequence; 740 long tval_sec; 741 long tval_usec; 742 }; 743 744 /** 745 * DRM_IOCTL_WAIT_VBLANK ioctl argument type. 746 * 747 * \sa drmWaitVBlank(). 748 */ 749 typedef union drm_wait_vblank { 750 struct drm_wait_vblank_request request; 751 struct drm_wait_vblank_reply reply; 752 } drm_wait_vblank_t; 753 754 /** 755 * DRM_IOCTL_AGP_ENABLE ioctl argument type. 756 * 757 * \sa drmAgpEnable(). 758 */ 759 typedef struct drm_agp_mode { 760 unsigned long mode; /**< AGP mode */ 761 } drm_agp_mode_t; 762 763 #if defined(__sun) && defined(_KERNEL) 764 typedef struct drm_agp_mode32 { 765 uint32_t mode; /**< AGP mode */ 766 } drm_agp_mode32_t; 767 #endif 768 769 /** 770 * DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type. 771 * 772 * \sa drmAgpAlloc() and drmAgpFree(). 773 */ 774 typedef struct drm_agp_buffer { 775 unsigned long size; /**< In bytes -- will round to page boundary */ 776 unsigned long handle; /**< Used for binding / unbinding */ 777 unsigned long type; /**< Type of memory to allocate */ 778 unsigned long physical; /**< Physical used by i810 */ 779 } drm_agp_buffer_t; 780 781 #if defined(__sun) && defined(_KERNEL) 782 typedef struct drm_agp_buffer32 { 783 uint32_t size; /**< In bytes -- will round to page boundary */ 784 uint32_t handle; /**< Used for binding / unbinding */ 785 uint32_t type; /**< Type of memory to allocate */ 786 uint32_t physical; /**< Physical used by i810 */ 787 } drm_agp_buffer32_t; 788 #endif 789 790 /** 791 * DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type. 792 * 793 * \sa drmAgpBind() and drmAgpUnbind(). 794 */ 795 typedef struct drm_agp_binding { 796 unsigned long handle; /**< From drm_agp_buffer */ 797 unsigned long offset; /**< In bytes -- will round to page boundary */ 798 } drm_agp_binding_t; 799 800 #if defined(__sun) && defined(_KERNEL) 801 typedef struct drm_agp_binding32 { 802 uint32_t handle; /**< From drm_agp_buffer */ 803 uint32_t offset; /**< In bytes -- will round to page boundary */ 804 } drm_agp_binding32_t; 805 #endif 806 807 /** 808 * DRM_IOCTL_AGP_INFO ioctl argument type. 809 * 810 * \sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(), 811 * drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(), 812 * drmAgpVendorId() and drmAgpDeviceId(). 813 */ 814 typedef struct drm_agp_info { 815 int agp_version_major; 816 int agp_version_minor; 817 unsigned long mode; 818 unsigned long aperture_base; /**< physical address */ 819 unsigned long aperture_size; /**< bytes */ 820 unsigned long memory_allowed; /**< bytes */ 821 unsigned long memory_used; 822 823 /** \name PCI information */ 824 /*@{ */ 825 unsigned short id_vendor; 826 unsigned short id_device; 827 /*@} */ 828 } drm_agp_info_t; 829 830 #if defined(__sun) && defined(_KERNEL) 831 typedef struct drm_agp_info32 { 832 int agp_version_major; 833 int agp_version_minor; 834 uint32_t mode; 835 uint32_t aperture_base; 836 uint32_t aperture_size; 837 uint32_t memory_allowed; 838 uint32_t memory_used; 839 unsigned short id_vendor; 840 unsigned short id_device; 841 } drm_agp_info32_t; 842 #endif 843 844 /** 845 * DRM_IOCTL_SG_ALLOC ioctl argument type. 846 */ 847 typedef struct drm_scatter_gather { 848 unsigned long size; /**< In bytes -- will round to page boundary */ 849 unsigned long handle; /**< Used for mapping / unmapping */ 850 } drm_scatter_gather_t; 851 852 #if defined(__sun) && defined(_KERNEL) 853 typedef struct drm_scatter_gather32 { 854 uint32_t size; /* In bytes -- will round to page boundary */ 855 uint32_t handle; /* Used for mapping / unmapping */ 856 } drm_scatter_gather32_t; 857 #endif 858 859 /** 860 * DRM_IOCTL_SET_VERSION ioctl argument type. 861 */ 862 typedef struct drm_set_version { 863 int drm_di_major; 864 int drm_di_minor; 865 int drm_dd_major; 866 int drm_dd_minor; 867 } drm_set_version_t; 868 869 /** 870 * \name Ioctls Definitions 871 */ 872 /*@{*/ 873 874 #define DRM_IOCTL_BASE 'd' 875 #define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr) 876 #define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type) 877 #define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type) 878 #define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type) 879 880 #define DRM_IOCTL_VERSION DRM_IOWR(0x00, drm_version_t) 881 #define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, drm_unique_t) 882 #define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, drm_auth_t) 883 #define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, drm_irq_busid_t) 884 #define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, drm_map_t) 885 #define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, drm_client_t) 886 #define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, drm_stats_t) 887 #define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, drm_set_version_t) 888 889 #define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, drm_unique_t) 890 #define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, drm_auth_t) 891 #define DRM_IOCTL_BLOCK DRM_IOWR(0x12, drm_block_t) 892 #define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, drm_block_t) 893 #define DRM_IOCTL_CONTROL DRM_IOW( 0x14, drm_control_t) 894 #define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, drm_map_t) 895 #define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, drm_buf_desc_t) 896 #define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, drm_buf_desc_t) 897 #define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, drm_buf_info_t) 898 #define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, drm_buf_map_t) 899 #define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, drm_buf_free_t) 900 901 #define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, drm_map_t) 902 903 #define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, drm_ctx_priv_map_t) 904 #define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, drm_ctx_priv_map_t) 905 906 #define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, drm_ctx_t) 907 #define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, drm_ctx_t) 908 #define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, drm_ctx_t) 909 #define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, drm_ctx_t) 910 #define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, drm_ctx_t) 911 #define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, drm_ctx_t) 912 #define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, drm_ctx_res_t) 913 #define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, drm_draw_t) 914 #define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, drm_draw_t) 915 #define DRM_IOCTL_DMA DRM_IOWR(0x29, drm_dma_t) 916 #define DRM_IOCTL_LOCK DRM_IOW( 0x2a, drm_lock_t) 917 #define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, drm_lock_t) 918 #define DRM_IOCTL_FINISH DRM_IOW( 0x2c, drm_lock_t) 919 920 #define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30) 921 #define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31) 922 #define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, drm_agp_mode_t) 923 #define DRM_IOCTL_AGP_INFO DRM_IOR( 0x33, drm_agp_info_t) 924 #define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, drm_agp_buffer_t) 925 #define DRM_IOCTL_AGP_FREE DRM_IOW( 0x35, drm_agp_buffer_t) 926 #define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, drm_agp_binding_t) 927 #define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, drm_agp_binding_t) 928 929 #define DRM_IOCTL_SG_ALLOC DRM_IOW( 0x38, drm_scatter_gather_t) 930 #define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, drm_scatter_gather_t) 931 932 #define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, drm_wait_vblank_t) 933 934 /*@}*/ 935 936 /** 937 * Device specific ioctls should only be in their respective headers 938 * The device specific ioctl range is from 0x40 to 0x99. 939 * Generic IOCTLS restart at 0xA0. 940 * 941 * \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and 942 * drmCommandReadWrite(). 943 */ 944 #define DRM_COMMAND_BASE 0x40 945 #define DRM_COMMAND_END 0xA0 946 947 #endif /* _DRM_H_ */ 948