1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #pragma ident "%Z%%M% %I% %E% SMI" 28 29 #include "bge_impl.h" 30 #include <sys/sdt.h> 31 32 /* 33 * This is the string displayed by modinfo, etc. 34 * Make sure you keep the version ID up to date! 35 */ 36 static char bge_ident[] = "Broadcom Gb Ethernet v0.53"; 37 38 /* 39 * Property names 40 */ 41 static char debug_propname[] = "bge-debug-flags"; 42 static char clsize_propname[] = "cache-line-size"; 43 static char latency_propname[] = "latency-timer"; 44 static char localmac_boolname[] = "local-mac-address?"; 45 static char localmac_propname[] = "local-mac-address"; 46 static char macaddr_propname[] = "mac-address"; 47 static char subdev_propname[] = "subsystem-id"; 48 static char subven_propname[] = "subsystem-vendor-id"; 49 static char rxrings_propname[] = "bge-rx-rings"; 50 static char txrings_propname[] = "bge-tx-rings"; 51 static char fm_cap[] = "fm-capable"; 52 static char default_mtu[] = "default_mtu"; 53 54 static int bge_add_intrs(bge_t *, int); 55 static void bge_rem_intrs(bge_t *); 56 57 /* 58 * Describes the chip's DMA engine 59 */ 60 static ddi_dma_attr_t dma_attr = { 61 DMA_ATTR_V0, /* dma_attr version */ 62 0x0000000000000000ull, /* dma_attr_addr_lo */ 63 0xFFFFFFFFFFFFFFFFull, /* dma_attr_addr_hi */ 64 0x00000000FFFFFFFFull, /* dma_attr_count_max */ 65 0x0000000000000001ull, /* dma_attr_align */ 66 0x00000FFF, /* dma_attr_burstsizes */ 67 0x00000001, /* dma_attr_minxfer */ 68 0x000000000000FFFFull, /* dma_attr_maxxfer */ 69 0xFFFFFFFFFFFFFFFFull, /* dma_attr_seg */ 70 1, /* dma_attr_sgllen */ 71 0x00000001, /* dma_attr_granular */ 72 DDI_DMA_FLAGERR /* dma_attr_flags */ 73 }; 74 75 /* 76 * PIO access attributes for registers 77 */ 78 static ddi_device_acc_attr_t bge_reg_accattr = { 79 DDI_DEVICE_ATTR_V0, 80 DDI_NEVERSWAP_ACC, 81 DDI_STRICTORDER_ACC, 82 DDI_FLAGERR_ACC 83 }; 84 85 /* 86 * DMA access attributes for descriptors: NOT to be byte swapped. 87 */ 88 static ddi_device_acc_attr_t bge_desc_accattr = { 89 DDI_DEVICE_ATTR_V0, 90 DDI_NEVERSWAP_ACC, 91 DDI_STRICTORDER_ACC, 92 DDI_FLAGERR_ACC 93 }; 94 95 /* 96 * DMA access attributes for data: NOT to be byte swapped. 97 */ 98 static ddi_device_acc_attr_t bge_data_accattr = { 99 DDI_DEVICE_ATTR_V0, 100 DDI_NEVERSWAP_ACC, 101 DDI_STRICTORDER_ACC 102 }; 103 104 static ether_addr_t bge_broadcast_addr = { 105 0xff, 0xff, 0xff, 0xff, 0xff, 0xff 106 }; 107 108 /* 109 * Versions of the O/S up to Solaris 8 didn't support network booting 110 * from any network interface except the first (NET0). Patching this 111 * flag to a non-zero value will tell the driver to work around this 112 * limitation by creating an extra (internal) pathname node. To do 113 * this, just add a line like the following to the CLIENT'S etc/system 114 * file ON THE ROOT FILESYSTEM SERVER before booting the client: 115 * 116 * set bge:bge_net1_boot_support = 1; 117 */ 118 static uint32_t bge_net1_boot_support = 1; 119 120 static int bge_m_start(void *); 121 static void bge_m_stop(void *); 122 static int bge_m_promisc(void *, boolean_t); 123 static int bge_m_multicst(void *, boolean_t, const uint8_t *); 124 static int bge_m_unicst(void *, const uint8_t *); 125 static void bge_m_resources(void *); 126 static void bge_m_ioctl(void *, queue_t *, mblk_t *); 127 static boolean_t bge_m_getcapab(void *, mac_capab_t, void *); 128 static int bge_unicst_set(void *, const uint8_t *, 129 mac_addr_slot_t); 130 static int bge_m_unicst_add(void *, mac_multi_addr_t *); 131 static int bge_m_unicst_remove(void *, mac_addr_slot_t); 132 static int bge_m_unicst_modify(void *, mac_multi_addr_t *); 133 static int bge_m_unicst_get(void *, mac_multi_addr_t *); 134 135 #define BGE_M_CALLBACK_FLAGS (MC_RESOURCES | MC_IOCTL | MC_GETCAPAB) 136 137 static mac_callbacks_t bge_m_callbacks = { 138 BGE_M_CALLBACK_FLAGS, 139 bge_m_stat, 140 bge_m_start, 141 bge_m_stop, 142 bge_m_promisc, 143 bge_m_multicst, 144 bge_m_unicst, 145 bge_m_tx, 146 bge_m_resources, 147 bge_m_ioctl, 148 bge_m_getcapab 149 }; 150 151 /* 152 * ========== Transmit and receive ring reinitialisation ========== 153 */ 154 155 /* 156 * These <reinit> routines each reset the specified ring to an initial 157 * state, assuming that the corresponding <init> routine has already 158 * been called exactly once. 159 */ 160 161 static void 162 bge_reinit_send_ring(send_ring_t *srp) 163 { 164 /* 165 * Reinitialise control variables ... 166 */ 167 ASSERT(srp->tx_flow == 0); 168 srp->tx_next = 0; 169 srp->tx_free = srp->desc.nslots; 170 171 ASSERT(mutex_owned(srp->tc_lock)); 172 srp->tc_next = 0; 173 174 /* 175 * Zero and sync all the h/w Send Buffer Descriptors 176 */ 177 DMA_ZERO(srp->desc); 178 DMA_SYNC(srp->desc, DDI_DMA_SYNC_FORDEV); 179 } 180 181 static void 182 bge_reinit_recv_ring(recv_ring_t *rrp) 183 { 184 /* 185 * Reinitialise control variables ... 186 */ 187 rrp->rx_next = 0; 188 } 189 190 static void 191 bge_reinit_buff_ring(buff_ring_t *brp, uint64_t ring) 192 { 193 bge_rbd_t *hw_rbd_p; 194 sw_rbd_t *srbdp; 195 uint32_t bufsize; 196 uint32_t nslots; 197 uint32_t slot; 198 199 static uint16_t ring_type_flag[BGE_BUFF_RINGS_MAX] = { 200 RBD_FLAG_STD_RING, 201 RBD_FLAG_JUMBO_RING, 202 RBD_FLAG_MINI_RING 203 }; 204 205 /* 206 * Zero, initialise and sync all the h/w Receive Buffer Descriptors 207 * Note: all the remaining fields (<type>, <flags>, <ip_cksum>, 208 * <tcp_udp_cksum>, <error_flag>, <vlan_tag>, and <reserved>) 209 * should be zeroed, and so don't need to be set up specifically 210 * once the whole area has been cleared. 211 */ 212 DMA_ZERO(brp->desc); 213 214 hw_rbd_p = DMA_VPTR(brp->desc); 215 nslots = brp->desc.nslots; 216 ASSERT(brp->buf[0].nslots == nslots/BGE_SPLIT); 217 bufsize = brp->buf[0].size; 218 srbdp = brp->sw_rbds; 219 for (slot = 0; slot < nslots; ++hw_rbd_p, ++srbdp, ++slot) { 220 hw_rbd_p->host_buf_addr = srbdp->pbuf.cookie.dmac_laddress; 221 hw_rbd_p->index = slot; 222 hw_rbd_p->len = bufsize; 223 hw_rbd_p->opaque = srbdp->pbuf.token; 224 hw_rbd_p->flags |= ring_type_flag[ring]; 225 } 226 227 DMA_SYNC(brp->desc, DDI_DMA_SYNC_FORDEV); 228 229 /* 230 * Finally, reinitialise the ring control variables ... 231 */ 232 brp->rf_next = (nslots != 0) ? (nslots-1) : 0; 233 } 234 235 /* 236 * Reinitialize all rings 237 */ 238 static void 239 bge_reinit_rings(bge_t *bgep) 240 { 241 uint64_t ring; 242 243 ASSERT(mutex_owned(bgep->genlock)); 244 245 /* 246 * Send Rings ... 247 */ 248 for (ring = 0; ring < bgep->chipid.tx_rings; ++ring) 249 bge_reinit_send_ring(&bgep->send[ring]); 250 251 /* 252 * Receive Return Rings ... 253 */ 254 for (ring = 0; ring < bgep->chipid.rx_rings; ++ring) 255 bge_reinit_recv_ring(&bgep->recv[ring]); 256 257 /* 258 * Receive Producer Rings ... 259 */ 260 for (ring = 0; ring < BGE_BUFF_RINGS_USED; ++ring) 261 bge_reinit_buff_ring(&bgep->buff[ring], ring); 262 } 263 264 /* 265 * ========== Internal state management entry points ========== 266 */ 267 268 #undef BGE_DBG 269 #define BGE_DBG BGE_DBG_NEMO /* debug flag for this code */ 270 271 /* 272 * These routines provide all the functionality required by the 273 * corresponding GLD entry points, but don't update the GLD state 274 * so they can be called internally without disturbing our record 275 * of what GLD thinks we should be doing ... 276 */ 277 278 /* 279 * bge_reset() -- reset h/w & rings to initial state 280 */ 281 static int 282 #ifdef BGE_IPMI_ASF 283 bge_reset(bge_t *bgep, uint_t asf_mode) 284 #else 285 bge_reset(bge_t *bgep) 286 #endif 287 { 288 uint64_t ring; 289 int retval; 290 291 BGE_TRACE(("bge_reset($%p)", (void *)bgep)); 292 293 ASSERT(mutex_owned(bgep->genlock)); 294 295 /* 296 * Grab all the other mutexes in the world (this should 297 * ensure no other threads are manipulating driver state) 298 */ 299 for (ring = 0; ring < BGE_RECV_RINGS_MAX; ++ring) 300 mutex_enter(bgep->recv[ring].rx_lock); 301 for (ring = 0; ring < BGE_BUFF_RINGS_MAX; ++ring) 302 mutex_enter(bgep->buff[ring].rf_lock); 303 rw_enter(bgep->errlock, RW_WRITER); 304 for (ring = 0; ring < BGE_SEND_RINGS_MAX; ++ring) 305 mutex_enter(bgep->send[ring].tc_lock); 306 307 #ifdef BGE_IPMI_ASF 308 retval = bge_chip_reset(bgep, B_TRUE, asf_mode); 309 #else 310 retval = bge_chip_reset(bgep, B_TRUE); 311 #endif 312 bge_reinit_rings(bgep); 313 314 /* 315 * Free the world ... 316 */ 317 for (ring = BGE_SEND_RINGS_MAX; ring-- > 0; ) 318 mutex_exit(bgep->send[ring].tc_lock); 319 rw_exit(bgep->errlock); 320 for (ring = BGE_BUFF_RINGS_MAX; ring-- > 0; ) 321 mutex_exit(bgep->buff[ring].rf_lock); 322 for (ring = BGE_RECV_RINGS_MAX; ring-- > 0; ) 323 mutex_exit(bgep->recv[ring].rx_lock); 324 325 BGE_DEBUG(("bge_reset($%p) done", (void *)bgep)); 326 return (retval); 327 } 328 329 /* 330 * bge_stop() -- stop processing, don't reset h/w or rings 331 */ 332 static void 333 bge_stop(bge_t *bgep) 334 { 335 BGE_TRACE(("bge_stop($%p)", (void *)bgep)); 336 337 ASSERT(mutex_owned(bgep->genlock)); 338 339 #ifdef BGE_IPMI_ASF 340 if (bgep->asf_enabled) { 341 bgep->asf_pseudostop = B_TRUE; 342 } else { 343 #endif 344 bge_chip_stop(bgep, B_FALSE); 345 #ifdef BGE_IPMI_ASF 346 } 347 #endif 348 349 BGE_DEBUG(("bge_stop($%p) done", (void *)bgep)); 350 } 351 352 /* 353 * bge_start() -- start transmitting/receiving 354 */ 355 static int 356 bge_start(bge_t *bgep, boolean_t reset_phys) 357 { 358 int retval; 359 360 BGE_TRACE(("bge_start($%p, %d)", (void *)bgep, reset_phys)); 361 362 ASSERT(mutex_owned(bgep->genlock)); 363 364 /* 365 * Start chip processing, including enabling interrupts 366 */ 367 retval = bge_chip_start(bgep, reset_phys); 368 369 BGE_DEBUG(("bge_start($%p, %d) done", (void *)bgep, reset_phys)); 370 return (retval); 371 } 372 373 /* 374 * bge_restart - restart transmitting/receiving after error or suspend 375 */ 376 int 377 bge_restart(bge_t *bgep, boolean_t reset_phys) 378 { 379 int retval = DDI_SUCCESS; 380 ASSERT(mutex_owned(bgep->genlock)); 381 382 #ifdef BGE_IPMI_ASF 383 if (bgep->asf_enabled) { 384 if (bge_reset(bgep, ASF_MODE_POST_INIT) != DDI_SUCCESS) 385 retval = DDI_FAILURE; 386 } else 387 if (bge_reset(bgep, ASF_MODE_NONE) != DDI_SUCCESS) 388 retval = DDI_FAILURE; 389 #else 390 if (bge_reset(bgep) != DDI_SUCCESS) 391 retval = DDI_FAILURE; 392 #endif 393 if (bgep->bge_mac_state == BGE_MAC_STARTED) { 394 if (bge_start(bgep, reset_phys) != DDI_SUCCESS) 395 retval = DDI_FAILURE; 396 bgep->watchdog = 0; 397 ddi_trigger_softintr(bgep->resched_id); 398 } 399 400 BGE_DEBUG(("bge_restart($%p, %d) done", (void *)bgep, reset_phys)); 401 return (retval); 402 } 403 404 405 /* 406 * ========== Nemo-required management entry points ========== 407 */ 408 409 #undef BGE_DBG 410 #define BGE_DBG BGE_DBG_NEMO /* debug flag for this code */ 411 412 /* 413 * bge_m_stop() -- stop transmitting/receiving 414 */ 415 static void 416 bge_m_stop(void *arg) 417 { 418 bge_t *bgep = arg; /* private device info */ 419 420 BGE_TRACE(("bge_m_stop($%p)", arg)); 421 422 /* 423 * Just stop processing, then record new GLD state 424 */ 425 mutex_enter(bgep->genlock); 426 if (!(bgep->progress & PROGRESS_INTR)) { 427 /* can happen during autorecovery */ 428 mutex_exit(bgep->genlock); 429 return; 430 } 431 432 bgep->link_up_msg = bgep->link_down_msg = " (stopped)"; 433 bge_stop(bgep); 434 bgep->bge_mac_state = BGE_MAC_STOPPED; 435 BGE_DEBUG(("bge_m_stop($%p) done", arg)); 436 if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) 437 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_UNAFFECTED); 438 mutex_exit(bgep->genlock); 439 } 440 441 /* 442 * bge_m_start() -- start transmitting/receiving 443 */ 444 static int 445 bge_m_start(void *arg) 446 { 447 bge_t *bgep = arg; /* private device info */ 448 449 BGE_TRACE(("bge_m_start($%p)", arg)); 450 451 /* 452 * Start processing and record new GLD state 453 */ 454 mutex_enter(bgep->genlock); 455 if (!(bgep->progress & PROGRESS_INTR)) { 456 /* can happen during autorecovery */ 457 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 458 mutex_exit(bgep->genlock); 459 return (EIO); 460 } 461 #ifdef BGE_IPMI_ASF 462 if (bgep->asf_enabled) { 463 if ((bgep->asf_status == ASF_STAT_RUN) && 464 (bgep->asf_pseudostop)) { 465 466 bgep->link_up_msg = bgep->link_down_msg 467 = " (initialized)"; 468 bgep->bge_mac_state = BGE_MAC_STARTED; 469 mutex_exit(bgep->genlock); 470 return (0); 471 } 472 } 473 if (bge_reset(bgep, ASF_MODE_INIT) != DDI_SUCCESS) { 474 #else 475 if (bge_reset(bgep) != DDI_SUCCESS) { 476 #endif 477 (void) bge_check_acc_handle(bgep, bgep->cfg_handle); 478 (void) bge_check_acc_handle(bgep, bgep->io_handle); 479 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 480 mutex_exit(bgep->genlock); 481 return (EIO); 482 } 483 bgep->link_up_msg = bgep->link_down_msg = " (initialized)"; 484 if (bge_start(bgep, B_TRUE) != DDI_SUCCESS) { 485 (void) bge_check_acc_handle(bgep, bgep->cfg_handle); 486 (void) bge_check_acc_handle(bgep, bgep->io_handle); 487 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 488 mutex_exit(bgep->genlock); 489 return (EIO); 490 } 491 bgep->bge_mac_state = BGE_MAC_STARTED; 492 BGE_DEBUG(("bge_m_start($%p) done", arg)); 493 494 if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 495 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 496 mutex_exit(bgep->genlock); 497 return (EIO); 498 } 499 if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) { 500 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 501 mutex_exit(bgep->genlock); 502 return (EIO); 503 } 504 #ifdef BGE_IPMI_ASF 505 if (bgep->asf_enabled) { 506 if (bgep->asf_status != ASF_STAT_RUN) { 507 /* start ASF heart beat */ 508 bgep->asf_timeout_id = timeout(bge_asf_heartbeat, 509 (void *)bgep, 510 drv_usectohz(BGE_ASF_HEARTBEAT_INTERVAL)); 511 bgep->asf_status = ASF_STAT_RUN; 512 } 513 } 514 #endif 515 mutex_exit(bgep->genlock); 516 517 return (0); 518 } 519 520 /* 521 * bge_m_unicst() -- set the physical network address 522 */ 523 static int 524 bge_m_unicst(void *arg, const uint8_t *macaddr) 525 { 526 /* 527 * Request to set address in 528 * address slot 0, i.e., default address 529 */ 530 return (bge_unicst_set(arg, macaddr, 0)); 531 } 532 533 /* 534 * bge_unicst_set() -- set the physical network address 535 */ 536 static int 537 bge_unicst_set(void *arg, const uint8_t *macaddr, mac_addr_slot_t slot) 538 { 539 bge_t *bgep = arg; /* private device info */ 540 541 BGE_TRACE(("bge_m_unicst_set($%p, %s)", arg, 542 ether_sprintf((void *)macaddr))); 543 /* 544 * Remember the new current address in the driver state 545 * Sync the chip's idea of the address too ... 546 */ 547 mutex_enter(bgep->genlock); 548 if (!(bgep->progress & PROGRESS_INTR)) { 549 /* can happen during autorecovery */ 550 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 551 mutex_exit(bgep->genlock); 552 return (EIO); 553 } 554 ethaddr_copy(macaddr, bgep->curr_addr[slot].addr); 555 #ifdef BGE_IPMI_ASF 556 if (bge_chip_sync(bgep, B_FALSE) == DDI_FAILURE) { 557 #else 558 if (bge_chip_sync(bgep) == DDI_FAILURE) { 559 #endif 560 (void) bge_check_acc_handle(bgep, bgep->cfg_handle); 561 (void) bge_check_acc_handle(bgep, bgep->io_handle); 562 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 563 mutex_exit(bgep->genlock); 564 return (EIO); 565 } 566 #ifdef BGE_IPMI_ASF 567 if (bgep->asf_enabled) { 568 /* 569 * The above bge_chip_sync() function wrote the ethernet MAC 570 * addresses registers which destroyed the IPMI/ASF sideband. 571 * Here, we have to reset chip to make IPMI/ASF sideband work. 572 */ 573 if (bgep->asf_status == ASF_STAT_RUN) { 574 /* 575 * We must stop ASF heart beat before bge_chip_stop(), 576 * otherwise some computers (ex. IBM HS20 blade server) 577 * may crash. 578 */ 579 bge_asf_update_status(bgep); 580 bge_asf_stop_timer(bgep); 581 bgep->asf_status = ASF_STAT_STOP; 582 583 bge_asf_pre_reset_operations(bgep, BGE_INIT_RESET); 584 } 585 bge_chip_stop(bgep, B_FALSE); 586 587 if (bge_restart(bgep, B_FALSE) == DDI_FAILURE) { 588 (void) bge_check_acc_handle(bgep, bgep->cfg_handle); 589 (void) bge_check_acc_handle(bgep, bgep->io_handle); 590 ddi_fm_service_impact(bgep->devinfo, 591 DDI_SERVICE_DEGRADED); 592 mutex_exit(bgep->genlock); 593 return (EIO); 594 } 595 596 /* 597 * Start our ASF heartbeat counter as soon as possible. 598 */ 599 if (bgep->asf_status != ASF_STAT_RUN) { 600 /* start ASF heart beat */ 601 bgep->asf_timeout_id = timeout(bge_asf_heartbeat, 602 (void *)bgep, 603 drv_usectohz(BGE_ASF_HEARTBEAT_INTERVAL)); 604 bgep->asf_status = ASF_STAT_RUN; 605 } 606 } 607 #endif 608 BGE_DEBUG(("bge_m_unicst_set($%p) done", arg)); 609 if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 610 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 611 mutex_exit(bgep->genlock); 612 return (EIO); 613 } 614 if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) { 615 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 616 mutex_exit(bgep->genlock); 617 return (EIO); 618 } 619 mutex_exit(bgep->genlock); 620 621 return (0); 622 } 623 624 /* 625 * The following four routines are used as callbacks for multiple MAC 626 * address support: 627 * - bge_m_unicst_add(void *, mac_multi_addr_t *); 628 * - bge_m_unicst_remove(void *, mac_addr_slot_t); 629 * - bge_m_unicst_modify(void *, mac_multi_addr_t *); 630 * - bge_m_unicst_get(void *, mac_multi_addr_t *); 631 */ 632 633 /* 634 * bge_m_unicst_add() - will find an unused address slot, set the 635 * address value to the one specified, reserve that slot and enable 636 * the NIC to start filtering on the new MAC address. 637 * address slot. Returns 0 on success. 638 */ 639 static int 640 bge_m_unicst_add(void *arg, mac_multi_addr_t *maddr) 641 { 642 bge_t *bgep = arg; /* private device info */ 643 mac_addr_slot_t slot; 644 int err; 645 646 if (mac_unicst_verify(bgep->mh, 647 maddr->mma_addr, maddr->mma_addrlen) == B_FALSE) 648 return (EINVAL); 649 650 mutex_enter(bgep->genlock); 651 if (bgep->unicst_addr_avail == 0) { 652 /* no slots available */ 653 mutex_exit(bgep->genlock); 654 return (ENOSPC); 655 } 656 657 /* 658 * Primary/default address is in slot 0. The next three 659 * addresses are the multiple MAC addresses. So multiple 660 * MAC address 0 is in slot 1, 1 in slot 2, and so on. 661 * So the first multiple MAC address resides in slot 1. 662 */ 663 for (slot = 1; slot < bgep->unicst_addr_total; slot++) { 664 if (bgep->curr_addr[slot].set == B_FALSE) { 665 bgep->curr_addr[slot].set = B_TRUE; 666 break; 667 } 668 } 669 670 ASSERT(slot < bgep->unicst_addr_total); 671 bgep->unicst_addr_avail--; 672 mutex_exit(bgep->genlock); 673 maddr->mma_slot = slot; 674 675 if ((err = bge_unicst_set(bgep, maddr->mma_addr, slot)) != 0) { 676 mutex_enter(bgep->genlock); 677 bgep->curr_addr[slot].set = B_FALSE; 678 bgep->unicst_addr_avail++; 679 mutex_exit(bgep->genlock); 680 } 681 return (err); 682 } 683 684 /* 685 * bge_m_unicst_remove() - removes a MAC address that was added by a 686 * call to bge_m_unicst_add(). The slot number that was returned in 687 * add() is passed in the call to remove the address. 688 * Returns 0 on success. 689 */ 690 static int 691 bge_m_unicst_remove(void *arg, mac_addr_slot_t slot) 692 { 693 bge_t *bgep = arg; /* private device info */ 694 695 if (slot <= 0 || slot >= bgep->unicst_addr_total) 696 return (EINVAL); 697 698 mutex_enter(bgep->genlock); 699 if (bgep->curr_addr[slot].set == B_TRUE) { 700 bgep->curr_addr[slot].set = B_FALSE; 701 bgep->unicst_addr_avail++; 702 mutex_exit(bgep->genlock); 703 /* 704 * Copy the default address to the passed slot 705 */ 706 return (bge_unicst_set(bgep, bgep->curr_addr[0].addr, slot)); 707 } 708 mutex_exit(bgep->genlock); 709 return (EINVAL); 710 } 711 712 /* 713 * bge_m_unicst_modify() - modifies the value of an address that 714 * has been added by bge_m_unicst_add(). The new address, address 715 * length and the slot number that was returned in the call to add 716 * should be passed to bge_m_unicst_modify(). mma_flags should be 717 * set to 0. Returns 0 on success. 718 */ 719 static int 720 bge_m_unicst_modify(void *arg, mac_multi_addr_t *maddr) 721 { 722 bge_t *bgep = arg; /* private device info */ 723 mac_addr_slot_t slot; 724 725 if (mac_unicst_verify(bgep->mh, 726 maddr->mma_addr, maddr->mma_addrlen) == B_FALSE) 727 return (EINVAL); 728 729 slot = maddr->mma_slot; 730 731 if (slot <= 0 || slot >= bgep->unicst_addr_total) 732 return (EINVAL); 733 734 mutex_enter(bgep->genlock); 735 if (bgep->curr_addr[slot].set == B_TRUE) { 736 mutex_exit(bgep->genlock); 737 return (bge_unicst_set(bgep, maddr->mma_addr, slot)); 738 } 739 mutex_exit(bgep->genlock); 740 741 return (EINVAL); 742 } 743 744 /* 745 * bge_m_unicst_get() - will get the MAC address and all other 746 * information related to the address slot passed in mac_multi_addr_t. 747 * mma_flags should be set to 0 in the call. 748 * On return, mma_flags can take the following values: 749 * 1) MMAC_SLOT_UNUSED 750 * 2) MMAC_SLOT_USED | MMAC_VENDOR_ADDR 751 * 3) MMAC_SLOT_UNUSED | MMAC_VENDOR_ADDR 752 * 4) MMAC_SLOT_USED 753 */ 754 static int 755 bge_m_unicst_get(void *arg, mac_multi_addr_t *maddr) 756 { 757 bge_t *bgep = arg; /* private device info */ 758 mac_addr_slot_t slot; 759 760 slot = maddr->mma_slot; 761 762 if (slot <= 0 || slot >= bgep->unicst_addr_total) 763 return (EINVAL); 764 765 mutex_enter(bgep->genlock); 766 if (bgep->curr_addr[slot].set == B_TRUE) { 767 ethaddr_copy(bgep->curr_addr[slot].addr, 768 maddr->mma_addr); 769 maddr->mma_flags = MMAC_SLOT_USED; 770 } else { 771 maddr->mma_flags = MMAC_SLOT_UNUSED; 772 } 773 mutex_exit(bgep->genlock); 774 775 return (0); 776 } 777 778 /* 779 * Compute the index of the required bit in the multicast hash map. 780 * This must mirror the way the hardware actually does it! 781 * See Broadcom document 570X-PG102-R page 125. 782 */ 783 static uint32_t 784 bge_hash_index(const uint8_t *mca) 785 { 786 uint32_t hash; 787 788 CRC32(hash, mca, ETHERADDRL, -1U, crc32_table); 789 790 return (hash); 791 } 792 793 /* 794 * bge_m_multicst_add() -- enable/disable a multicast address 795 */ 796 static int 797 bge_m_multicst(void *arg, boolean_t add, const uint8_t *mca) 798 { 799 bge_t *bgep = arg; /* private device info */ 800 uint32_t hash; 801 uint32_t index; 802 uint32_t word; 803 uint32_t bit; 804 uint8_t *refp; 805 806 BGE_TRACE(("bge_m_multicst($%p, %s, %s)", arg, 807 (add) ? "add" : "remove", ether_sprintf((void *)mca))); 808 809 /* 810 * Precalculate all required masks, pointers etc ... 811 */ 812 hash = bge_hash_index(mca); 813 index = hash % BGE_HASH_TABLE_SIZE; 814 word = index/32u; 815 bit = 1 << (index % 32u); 816 refp = &bgep->mcast_refs[index]; 817 818 BGE_DEBUG(("bge_m_multicst: hash 0x%x index %d (%d:0x%x) = %d", 819 hash, index, word, bit, *refp)); 820 821 /* 822 * We must set the appropriate bit in the hash map (and the 823 * corresponding h/w register) when the refcount goes from 0 824 * to >0, and clear it when the last ref goes away (refcount 825 * goes from >0 back to 0). If we change the hash map, we 826 * must also update the chip's hardware map registers. 827 */ 828 mutex_enter(bgep->genlock); 829 if (!(bgep->progress & PROGRESS_INTR)) { 830 /* can happen during autorecovery */ 831 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 832 mutex_exit(bgep->genlock); 833 return (EIO); 834 } 835 if (add) { 836 if ((*refp)++ == 0) { 837 bgep->mcast_hash[word] |= bit; 838 #ifdef BGE_IPMI_ASF 839 if (bge_chip_sync(bgep, B_TRUE) == DDI_FAILURE) { 840 #else 841 if (bge_chip_sync(bgep) == DDI_FAILURE) { 842 #endif 843 (void) bge_check_acc_handle(bgep, 844 bgep->cfg_handle); 845 (void) bge_check_acc_handle(bgep, 846 bgep->io_handle); 847 ddi_fm_service_impact(bgep->devinfo, 848 DDI_SERVICE_DEGRADED); 849 mutex_exit(bgep->genlock); 850 return (EIO); 851 } 852 } 853 } else { 854 if (--(*refp) == 0) { 855 bgep->mcast_hash[word] &= ~bit; 856 #ifdef BGE_IPMI_ASF 857 if (bge_chip_sync(bgep, B_TRUE) == DDI_FAILURE) { 858 #else 859 if (bge_chip_sync(bgep) == DDI_FAILURE) { 860 #endif 861 (void) bge_check_acc_handle(bgep, 862 bgep->cfg_handle); 863 (void) bge_check_acc_handle(bgep, 864 bgep->io_handle); 865 ddi_fm_service_impact(bgep->devinfo, 866 DDI_SERVICE_DEGRADED); 867 mutex_exit(bgep->genlock); 868 return (EIO); 869 } 870 } 871 } 872 BGE_DEBUG(("bge_m_multicst($%p) done", arg)); 873 if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 874 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 875 mutex_exit(bgep->genlock); 876 return (EIO); 877 } 878 if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) { 879 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 880 mutex_exit(bgep->genlock); 881 return (EIO); 882 } 883 mutex_exit(bgep->genlock); 884 885 return (0); 886 } 887 888 /* 889 * bge_m_promisc() -- set or reset promiscuous mode on the board 890 * 891 * Program the hardware to enable/disable promiscuous and/or 892 * receive-all-multicast modes. 893 */ 894 static int 895 bge_m_promisc(void *arg, boolean_t on) 896 { 897 bge_t *bgep = arg; 898 899 BGE_TRACE(("bge_m_promisc_set($%p, %d)", arg, on)); 900 901 /* 902 * Store MAC layer specified mode and pass to chip layer to update h/w 903 */ 904 mutex_enter(bgep->genlock); 905 if (!(bgep->progress & PROGRESS_INTR)) { 906 /* can happen during autorecovery */ 907 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 908 mutex_exit(bgep->genlock); 909 return (EIO); 910 } 911 bgep->promisc = on; 912 #ifdef BGE_IPMI_ASF 913 if (bge_chip_sync(bgep, B_TRUE) == DDI_FAILURE) { 914 #else 915 if (bge_chip_sync(bgep) == DDI_FAILURE) { 916 #endif 917 (void) bge_check_acc_handle(bgep, bgep->cfg_handle); 918 (void) bge_check_acc_handle(bgep, bgep->io_handle); 919 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 920 mutex_exit(bgep->genlock); 921 return (EIO); 922 } 923 BGE_DEBUG(("bge_m_promisc_set($%p) done", arg)); 924 if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 925 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 926 mutex_exit(bgep->genlock); 927 return (EIO); 928 } 929 if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) { 930 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 931 mutex_exit(bgep->genlock); 932 return (EIO); 933 } 934 mutex_exit(bgep->genlock); 935 return (0); 936 } 937 938 /*ARGSUSED*/ 939 static boolean_t 940 bge_m_getcapab(void *arg, mac_capab_t cap, void *cap_data) 941 { 942 bge_t *bgep = arg; 943 944 switch (cap) { 945 case MAC_CAPAB_HCKSUM: { 946 uint32_t *txflags = cap_data; 947 948 *txflags = HCKSUM_INET_FULL_V4 | HCKSUM_IPHDRCKSUM; 949 break; 950 } 951 952 case MAC_CAPAB_POLL: 953 /* 954 * There's nothing for us to fill in, simply returning 955 * B_TRUE stating that we support polling is sufficient. 956 */ 957 break; 958 959 case MAC_CAPAB_MULTIADDRESS: { 960 multiaddress_capab_t *mmacp = cap_data; 961 962 mutex_enter(bgep->genlock); 963 /* 964 * The number of MAC addresses made available by 965 * this capability is one less than the total as 966 * the primary address in slot 0 is counted in 967 * the total. 968 */ 969 mmacp->maddr_naddr = bgep->unicst_addr_total - 1; 970 mmacp->maddr_naddrfree = bgep->unicst_addr_avail; 971 /* No multiple factory addresses, set mma_flag to 0 */ 972 mmacp->maddr_flag = 0; 973 mmacp->maddr_handle = bgep; 974 mmacp->maddr_add = bge_m_unicst_add; 975 mmacp->maddr_remove = bge_m_unicst_remove; 976 mmacp->maddr_modify = bge_m_unicst_modify; 977 mmacp->maddr_get = bge_m_unicst_get; 978 mmacp->maddr_reserve = NULL; 979 mutex_exit(bgep->genlock); 980 break; 981 } 982 983 default: 984 return (B_FALSE); 985 } 986 return (B_TRUE); 987 } 988 989 /* 990 * Loopback ioctl code 991 */ 992 993 static lb_property_t loopmodes[] = { 994 { normal, "normal", BGE_LOOP_NONE }, 995 { external, "1000Mbps", BGE_LOOP_EXTERNAL_1000 }, 996 { external, "100Mbps", BGE_LOOP_EXTERNAL_100 }, 997 { external, "10Mbps", BGE_LOOP_EXTERNAL_10 }, 998 { internal, "PHY", BGE_LOOP_INTERNAL_PHY }, 999 { internal, "MAC", BGE_LOOP_INTERNAL_MAC } 1000 }; 1001 1002 static enum ioc_reply 1003 bge_set_loop_mode(bge_t *bgep, uint32_t mode) 1004 { 1005 const char *msg; 1006 1007 /* 1008 * If the mode isn't being changed, there's nothing to do ... 1009 */ 1010 if (mode == bgep->param_loop_mode) 1011 return (IOC_ACK); 1012 1013 /* 1014 * Validate the requested mode and prepare a suitable message 1015 * to explain the link down/up cycle that the change will 1016 * probably induce ... 1017 */ 1018 switch (mode) { 1019 default: 1020 return (IOC_INVAL); 1021 1022 case BGE_LOOP_NONE: 1023 msg = " (loopback disabled)"; 1024 break; 1025 1026 case BGE_LOOP_EXTERNAL_1000: 1027 case BGE_LOOP_EXTERNAL_100: 1028 case BGE_LOOP_EXTERNAL_10: 1029 msg = " (external loopback selected)"; 1030 break; 1031 1032 case BGE_LOOP_INTERNAL_PHY: 1033 msg = " (PHY internal loopback selected)"; 1034 break; 1035 1036 case BGE_LOOP_INTERNAL_MAC: 1037 msg = " (MAC internal loopback selected)"; 1038 break; 1039 } 1040 1041 /* 1042 * All OK; tell the caller to reprogram 1043 * the PHY and/or MAC for the new mode ... 1044 */ 1045 bgep->link_down_msg = bgep->link_up_msg = msg; 1046 bgep->param_loop_mode = mode; 1047 return (IOC_RESTART_ACK); 1048 } 1049 1050 static enum ioc_reply 1051 bge_loop_ioctl(bge_t *bgep, queue_t *wq, mblk_t *mp, struct iocblk *iocp) 1052 { 1053 lb_info_sz_t *lbsp; 1054 lb_property_t *lbpp; 1055 uint32_t *lbmp; 1056 int cmd; 1057 1058 _NOTE(ARGUNUSED(wq)) 1059 1060 /* 1061 * Validate format of ioctl 1062 */ 1063 if (mp->b_cont == NULL) 1064 return (IOC_INVAL); 1065 1066 cmd = iocp->ioc_cmd; 1067 switch (cmd) { 1068 default: 1069 /* NOTREACHED */ 1070 bge_error(bgep, "bge_loop_ioctl: invalid cmd 0x%x", cmd); 1071 return (IOC_INVAL); 1072 1073 case LB_GET_INFO_SIZE: 1074 if (iocp->ioc_count != sizeof (lb_info_sz_t)) 1075 return (IOC_INVAL); 1076 lbsp = (lb_info_sz_t *)mp->b_cont->b_rptr; 1077 *lbsp = sizeof (loopmodes); 1078 return (IOC_REPLY); 1079 1080 case LB_GET_INFO: 1081 if (iocp->ioc_count != sizeof (loopmodes)) 1082 return (IOC_INVAL); 1083 lbpp = (lb_property_t *)mp->b_cont->b_rptr; 1084 bcopy(loopmodes, lbpp, sizeof (loopmodes)); 1085 return (IOC_REPLY); 1086 1087 case LB_GET_MODE: 1088 if (iocp->ioc_count != sizeof (uint32_t)) 1089 return (IOC_INVAL); 1090 lbmp = (uint32_t *)mp->b_cont->b_rptr; 1091 *lbmp = bgep->param_loop_mode; 1092 return (IOC_REPLY); 1093 1094 case LB_SET_MODE: 1095 if (iocp->ioc_count != sizeof (uint32_t)) 1096 return (IOC_INVAL); 1097 lbmp = (uint32_t *)mp->b_cont->b_rptr; 1098 return (bge_set_loop_mode(bgep, *lbmp)); 1099 } 1100 } 1101 1102 /* 1103 * Specific bge IOCTLs, the gld module handles the generic ones. 1104 */ 1105 static void 1106 bge_m_ioctl(void *arg, queue_t *wq, mblk_t *mp) 1107 { 1108 bge_t *bgep = arg; 1109 struct iocblk *iocp; 1110 enum ioc_reply status; 1111 boolean_t need_privilege; 1112 int err; 1113 int cmd; 1114 1115 /* 1116 * Validate the command before bothering with the mutex ... 1117 */ 1118 iocp = (struct iocblk *)mp->b_rptr; 1119 iocp->ioc_error = 0; 1120 need_privilege = B_TRUE; 1121 cmd = iocp->ioc_cmd; 1122 switch (cmd) { 1123 default: 1124 miocnak(wq, mp, 0, EINVAL); 1125 return; 1126 1127 case BGE_MII_READ: 1128 case BGE_MII_WRITE: 1129 case BGE_SEE_READ: 1130 case BGE_SEE_WRITE: 1131 case BGE_FLASH_READ: 1132 case BGE_FLASH_WRITE: 1133 case BGE_DIAG: 1134 case BGE_PEEK: 1135 case BGE_POKE: 1136 case BGE_PHY_RESET: 1137 case BGE_SOFT_RESET: 1138 case BGE_HARD_RESET: 1139 break; 1140 1141 case LB_GET_INFO_SIZE: 1142 case LB_GET_INFO: 1143 case LB_GET_MODE: 1144 need_privilege = B_FALSE; 1145 /* FALLTHRU */ 1146 case LB_SET_MODE: 1147 break; 1148 1149 case ND_GET: 1150 need_privilege = B_FALSE; 1151 /* FALLTHRU */ 1152 case ND_SET: 1153 break; 1154 } 1155 1156 if (need_privilege) { 1157 /* 1158 * Check for specific net_config privilege on Solaris 10+. 1159 */ 1160 err = secpolicy_net_config(iocp->ioc_cr, B_FALSE); 1161 if (err != 0) { 1162 miocnak(wq, mp, 0, err); 1163 return; 1164 } 1165 } 1166 1167 mutex_enter(bgep->genlock); 1168 if (!(bgep->progress & PROGRESS_INTR)) { 1169 /* can happen during autorecovery */ 1170 mutex_exit(bgep->genlock); 1171 miocnak(wq, mp, 0, EIO); 1172 return; 1173 } 1174 1175 switch (cmd) { 1176 default: 1177 _NOTE(NOTREACHED) 1178 status = IOC_INVAL; 1179 break; 1180 1181 case BGE_MII_READ: 1182 case BGE_MII_WRITE: 1183 case BGE_SEE_READ: 1184 case BGE_SEE_WRITE: 1185 case BGE_FLASH_READ: 1186 case BGE_FLASH_WRITE: 1187 case BGE_DIAG: 1188 case BGE_PEEK: 1189 case BGE_POKE: 1190 case BGE_PHY_RESET: 1191 case BGE_SOFT_RESET: 1192 case BGE_HARD_RESET: 1193 status = bge_chip_ioctl(bgep, wq, mp, iocp); 1194 break; 1195 1196 case LB_GET_INFO_SIZE: 1197 case LB_GET_INFO: 1198 case LB_GET_MODE: 1199 case LB_SET_MODE: 1200 status = bge_loop_ioctl(bgep, wq, mp, iocp); 1201 break; 1202 1203 case ND_GET: 1204 case ND_SET: 1205 status = bge_nd_ioctl(bgep, wq, mp, iocp); 1206 break; 1207 } 1208 1209 /* 1210 * Do we need to reprogram the PHY and/or the MAC? 1211 * Do it now, while we still have the mutex. 1212 * 1213 * Note: update the PHY first, 'cos it controls the 1214 * speed/duplex parameters that the MAC code uses. 1215 */ 1216 switch (status) { 1217 case IOC_RESTART_REPLY: 1218 case IOC_RESTART_ACK: 1219 if (bge_phys_update(bgep) != DDI_SUCCESS) { 1220 ddi_fm_service_impact(bgep->devinfo, 1221 DDI_SERVICE_DEGRADED); 1222 status = IOC_INVAL; 1223 } 1224 #ifdef BGE_IPMI_ASF 1225 if (bge_chip_sync(bgep, B_TRUE) == DDI_FAILURE) { 1226 #else 1227 if (bge_chip_sync(bgep) == DDI_FAILURE) { 1228 #endif 1229 ddi_fm_service_impact(bgep->devinfo, 1230 DDI_SERVICE_DEGRADED); 1231 status = IOC_INVAL; 1232 } 1233 if (bgep->intr_type == DDI_INTR_TYPE_MSI) 1234 bge_chip_msi_trig(bgep); 1235 break; 1236 } 1237 1238 if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 1239 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 1240 status = IOC_INVAL; 1241 } 1242 if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) { 1243 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 1244 status = IOC_INVAL; 1245 } 1246 mutex_exit(bgep->genlock); 1247 1248 /* 1249 * Finally, decide how to reply 1250 */ 1251 switch (status) { 1252 default: 1253 case IOC_INVAL: 1254 /* 1255 * Error, reply with a NAK and EINVAL or the specified error 1256 */ 1257 miocnak(wq, mp, 0, iocp->ioc_error == 0 ? 1258 EINVAL : iocp->ioc_error); 1259 break; 1260 1261 case IOC_DONE: 1262 /* 1263 * OK, reply already sent 1264 */ 1265 break; 1266 1267 case IOC_RESTART_ACK: 1268 case IOC_ACK: 1269 /* 1270 * OK, reply with an ACK 1271 */ 1272 miocack(wq, mp, 0, 0); 1273 break; 1274 1275 case IOC_RESTART_REPLY: 1276 case IOC_REPLY: 1277 /* 1278 * OK, send prepared reply as ACK or NAK 1279 */ 1280 mp->b_datap->db_type = iocp->ioc_error == 0 ? 1281 M_IOCACK : M_IOCNAK; 1282 qreply(wq, mp); 1283 break; 1284 } 1285 } 1286 1287 static void 1288 bge_m_resources(void *arg) 1289 { 1290 bge_t *bgep = arg; 1291 recv_ring_t *rrp; 1292 mac_rx_fifo_t mrf; 1293 int ring; 1294 1295 mutex_enter(bgep->genlock); 1296 1297 /* 1298 * Register Rx rings as resources and save mac 1299 * resource id for future reference 1300 */ 1301 mrf.mrf_type = MAC_RX_FIFO; 1302 mrf.mrf_blank = bge_chip_blank; 1303 mrf.mrf_arg = (void *)bgep; 1304 mrf.mrf_normal_blank_time = bge_rx_ticks_norm; 1305 mrf.mrf_normal_pkt_count = bge_rx_count_norm; 1306 1307 for (ring = 0; ring < bgep->chipid.rx_rings; ring++) { 1308 rrp = &bgep->recv[ring]; 1309 rrp->handle = mac_resource_add(bgep->mh, 1310 (mac_resource_t *)&mrf); 1311 } 1312 1313 mutex_exit(bgep->genlock); 1314 } 1315 1316 /* 1317 * ========== Per-instance setup/teardown code ========== 1318 */ 1319 1320 #undef BGE_DBG 1321 #define BGE_DBG BGE_DBG_INIT /* debug flag for this code */ 1322 1323 /* 1324 * Utility routine to carve a slice off a chunk of allocated memory, 1325 * updating the chunk descriptor accordingly. The size of the slice 1326 * is given by the product of the <qty> and <size> parameters. 1327 */ 1328 static void 1329 bge_slice_chunk(dma_area_t *slice, dma_area_t *chunk, 1330 uint32_t qty, uint32_t size) 1331 { 1332 static uint32_t sequence = 0xbcd5704a; 1333 size_t totsize; 1334 1335 totsize = qty*size; 1336 ASSERT(size >= 0); 1337 ASSERT(totsize <= chunk->alength); 1338 1339 *slice = *chunk; 1340 slice->nslots = qty; 1341 slice->size = size; 1342 slice->alength = totsize; 1343 slice->token = ++sequence; 1344 1345 chunk->mem_va = (caddr_t)chunk->mem_va + totsize; 1346 chunk->alength -= totsize; 1347 chunk->offset += totsize; 1348 chunk->cookie.dmac_laddress += totsize; 1349 chunk->cookie.dmac_size -= totsize; 1350 } 1351 1352 /* 1353 * Initialise the specified Receive Producer (Buffer) Ring, using 1354 * the information in the <dma_area> descriptors that it contains 1355 * to set up all the other fields. This routine should be called 1356 * only once for each ring. 1357 */ 1358 static void 1359 bge_init_buff_ring(bge_t *bgep, uint64_t ring) 1360 { 1361 buff_ring_t *brp; 1362 bge_status_t *bsp; 1363 sw_rbd_t *srbdp; 1364 dma_area_t pbuf; 1365 uint32_t bufsize; 1366 uint32_t nslots; 1367 uint32_t slot; 1368 uint32_t split; 1369 1370 static bge_regno_t nic_ring_addrs[BGE_BUFF_RINGS_MAX] = { 1371 NIC_MEM_SHADOW_BUFF_STD, 1372 NIC_MEM_SHADOW_BUFF_JUMBO, 1373 NIC_MEM_SHADOW_BUFF_MINI 1374 }; 1375 static bge_regno_t mailbox_regs[BGE_BUFF_RINGS_MAX] = { 1376 RECV_STD_PROD_INDEX_REG, 1377 RECV_JUMBO_PROD_INDEX_REG, 1378 RECV_MINI_PROD_INDEX_REG 1379 }; 1380 static bge_regno_t buff_cons_xref[BGE_BUFF_RINGS_MAX] = { 1381 STATUS_STD_BUFF_CONS_INDEX, 1382 STATUS_JUMBO_BUFF_CONS_INDEX, 1383 STATUS_MINI_BUFF_CONS_INDEX 1384 }; 1385 1386 BGE_TRACE(("bge_init_buff_ring($%p, %d)", 1387 (void *)bgep, ring)); 1388 1389 brp = &bgep->buff[ring]; 1390 nslots = brp->desc.nslots; 1391 ASSERT(brp->buf[0].nslots == nslots/BGE_SPLIT); 1392 bufsize = brp->buf[0].size; 1393 1394 /* 1395 * Set up the copy of the h/w RCB 1396 * 1397 * Note: unlike Send & Receive Return Rings, (where the max_len 1398 * field holds the number of slots), in a Receive Buffer Ring 1399 * this field indicates the size of each buffer in the ring. 1400 */ 1401 brp->hw_rcb.host_ring_addr = brp->desc.cookie.dmac_laddress; 1402 brp->hw_rcb.max_len = bufsize; 1403 brp->hw_rcb.flags = nslots > 0 ? 0 : RCB_FLAG_RING_DISABLED; 1404 brp->hw_rcb.nic_ring_addr = nic_ring_addrs[ring]; 1405 1406 /* 1407 * Other one-off initialisation of per-ring data 1408 */ 1409 brp->bgep = bgep; 1410 bsp = DMA_VPTR(bgep->status_block); 1411 brp->cons_index_p = &bsp->buff_cons_index[buff_cons_xref[ring]]; 1412 brp->chip_mbx_reg = mailbox_regs[ring]; 1413 mutex_init(brp->rf_lock, NULL, MUTEX_DRIVER, 1414 DDI_INTR_PRI(bgep->intr_pri)); 1415 1416 /* 1417 * Allocate the array of s/w Receive Buffer Descriptors 1418 */ 1419 srbdp = kmem_zalloc(nslots*sizeof (*srbdp), KM_SLEEP); 1420 brp->sw_rbds = srbdp; 1421 1422 /* 1423 * Now initialise each array element once and for all 1424 */ 1425 for (split = 0; split < BGE_SPLIT; ++split) { 1426 pbuf = brp->buf[split]; 1427 for (slot = 0; slot < nslots/BGE_SPLIT; ++srbdp, ++slot) 1428 bge_slice_chunk(&srbdp->pbuf, &pbuf, 1, bufsize); 1429 ASSERT(pbuf.alength == 0); 1430 } 1431 } 1432 1433 /* 1434 * Clean up initialisation done above before the memory is freed 1435 */ 1436 static void 1437 bge_fini_buff_ring(bge_t *bgep, uint64_t ring) 1438 { 1439 buff_ring_t *brp; 1440 sw_rbd_t *srbdp; 1441 1442 BGE_TRACE(("bge_fini_buff_ring($%p, %d)", 1443 (void *)bgep, ring)); 1444 1445 brp = &bgep->buff[ring]; 1446 srbdp = brp->sw_rbds; 1447 kmem_free(srbdp, brp->desc.nslots*sizeof (*srbdp)); 1448 1449 mutex_destroy(brp->rf_lock); 1450 } 1451 1452 /* 1453 * Initialise the specified Receive (Return) Ring, using the 1454 * information in the <dma_area> descriptors that it contains 1455 * to set up all the other fields. This routine should be called 1456 * only once for each ring. 1457 */ 1458 static void 1459 bge_init_recv_ring(bge_t *bgep, uint64_t ring) 1460 { 1461 recv_ring_t *rrp; 1462 bge_status_t *bsp; 1463 uint32_t nslots; 1464 1465 BGE_TRACE(("bge_init_recv_ring($%p, %d)", 1466 (void *)bgep, ring)); 1467 1468 /* 1469 * The chip architecture requires that receive return rings have 1470 * 512 or 1024 or 2048 elements per ring. See 570X-PG108-R page 103. 1471 */ 1472 rrp = &bgep->recv[ring]; 1473 nslots = rrp->desc.nslots; 1474 ASSERT(nslots == 0 || nslots == 512 || 1475 nslots == 1024 || nslots == 2048); 1476 1477 /* 1478 * Set up the copy of the h/w RCB 1479 */ 1480 rrp->hw_rcb.host_ring_addr = rrp->desc.cookie.dmac_laddress; 1481 rrp->hw_rcb.max_len = nslots; 1482 rrp->hw_rcb.flags = nslots > 0 ? 0 : RCB_FLAG_RING_DISABLED; 1483 rrp->hw_rcb.nic_ring_addr = 0; 1484 1485 /* 1486 * Other one-off initialisation of per-ring data 1487 */ 1488 rrp->bgep = bgep; 1489 bsp = DMA_VPTR(bgep->status_block); 1490 rrp->prod_index_p = RECV_INDEX_P(bsp, ring); 1491 rrp->chip_mbx_reg = RECV_RING_CONS_INDEX_REG(ring); 1492 mutex_init(rrp->rx_lock, NULL, MUTEX_DRIVER, 1493 DDI_INTR_PRI(bgep->intr_pri)); 1494 } 1495 1496 1497 /* 1498 * Clean up initialisation done above before the memory is freed 1499 */ 1500 static void 1501 bge_fini_recv_ring(bge_t *bgep, uint64_t ring) 1502 { 1503 recv_ring_t *rrp; 1504 1505 BGE_TRACE(("bge_fini_recv_ring($%p, %d)", 1506 (void *)bgep, ring)); 1507 1508 rrp = &bgep->recv[ring]; 1509 if (rrp->rx_softint) 1510 ddi_remove_softintr(rrp->rx_softint); 1511 mutex_destroy(rrp->rx_lock); 1512 } 1513 1514 /* 1515 * Initialise the specified Send Ring, using the information in the 1516 * <dma_area> descriptors that it contains to set up all the other 1517 * fields. This routine should be called only once for each ring. 1518 */ 1519 static void 1520 bge_init_send_ring(bge_t *bgep, uint64_t ring) 1521 { 1522 send_ring_t *srp; 1523 bge_status_t *bsp; 1524 sw_sbd_t *ssbdp; 1525 dma_area_t desc; 1526 dma_area_t pbuf; 1527 uint32_t nslots; 1528 uint32_t slot; 1529 uint32_t split; 1530 1531 BGE_TRACE(("bge_init_send_ring($%p, %d)", 1532 (void *)bgep, ring)); 1533 1534 /* 1535 * The chip architecture requires that host-based send rings 1536 * have 512 elements per ring. See 570X-PG102-R page 56. 1537 */ 1538 srp = &bgep->send[ring]; 1539 nslots = srp->desc.nslots; 1540 ASSERT(nslots == 0 || nslots == 512); 1541 1542 /* 1543 * Set up the copy of the h/w RCB 1544 */ 1545 srp->hw_rcb.host_ring_addr = srp->desc.cookie.dmac_laddress; 1546 srp->hw_rcb.max_len = nslots; 1547 srp->hw_rcb.flags = nslots > 0 ? 0 : RCB_FLAG_RING_DISABLED; 1548 srp->hw_rcb.nic_ring_addr = NIC_MEM_SHADOW_SEND_RING(ring, nslots); 1549 1550 /* 1551 * Other one-off initialisation of per-ring data 1552 */ 1553 srp->bgep = bgep; 1554 bsp = DMA_VPTR(bgep->status_block); 1555 srp->cons_index_p = SEND_INDEX_P(bsp, ring); 1556 srp->chip_mbx_reg = SEND_RING_HOST_INDEX_REG(ring); 1557 mutex_init(srp->tx_lock, NULL, MUTEX_DRIVER, 1558 DDI_INTR_PRI(bgep->intr_pri)); 1559 mutex_init(srp->tc_lock, NULL, MUTEX_DRIVER, 1560 DDI_INTR_PRI(bgep->intr_pri)); 1561 1562 /* 1563 * Allocate the array of s/w Send Buffer Descriptors 1564 */ 1565 ssbdp = kmem_zalloc(nslots*sizeof (*ssbdp), KM_SLEEP); 1566 srp->sw_sbds = ssbdp; 1567 1568 /* 1569 * Now initialise each array element once and for all 1570 */ 1571 desc = srp->desc; 1572 for (split = 0; split < BGE_SPLIT; ++split) { 1573 pbuf = srp->buf[split]; 1574 for (slot = 0; slot < nslots/BGE_SPLIT; ++ssbdp, ++slot) { 1575 bge_slice_chunk(&ssbdp->desc, &desc, 1, 1576 sizeof (bge_sbd_t)); 1577 bge_slice_chunk(&ssbdp->pbuf, &pbuf, 1, 1578 bgep->chipid.snd_buff_size); 1579 } 1580 ASSERT(pbuf.alength == 0); 1581 } 1582 ASSERT(desc.alength == 0); 1583 } 1584 1585 /* 1586 * Clean up initialisation done above before the memory is freed 1587 */ 1588 static void 1589 bge_fini_send_ring(bge_t *bgep, uint64_t ring) 1590 { 1591 send_ring_t *srp; 1592 sw_sbd_t *ssbdp; 1593 1594 BGE_TRACE(("bge_fini_send_ring($%p, %d)", 1595 (void *)bgep, ring)); 1596 1597 srp = &bgep->send[ring]; 1598 ssbdp = srp->sw_sbds; 1599 kmem_free(ssbdp, srp->desc.nslots*sizeof (*ssbdp)); 1600 1601 mutex_destroy(srp->tx_lock); 1602 mutex_destroy(srp->tc_lock); 1603 } 1604 1605 /* 1606 * Initialise all transmit, receive, and buffer rings. 1607 */ 1608 void 1609 bge_init_rings(bge_t *bgep) 1610 { 1611 uint64_t ring; 1612 1613 BGE_TRACE(("bge_init_rings($%p)", (void *)bgep)); 1614 1615 /* 1616 * Perform one-off initialisation of each ring ... 1617 */ 1618 for (ring = 0; ring < BGE_SEND_RINGS_MAX; ++ring) 1619 bge_init_send_ring(bgep, ring); 1620 for (ring = 0; ring < BGE_RECV_RINGS_MAX; ++ring) 1621 bge_init_recv_ring(bgep, ring); 1622 for (ring = 0; ring < BGE_BUFF_RINGS_MAX; ++ring) 1623 bge_init_buff_ring(bgep, ring); 1624 } 1625 1626 /* 1627 * Undo the work of bge_init_rings() above before the memory is freed 1628 */ 1629 void 1630 bge_fini_rings(bge_t *bgep) 1631 { 1632 uint64_t ring; 1633 1634 BGE_TRACE(("bge_fini_rings($%p)", (void *)bgep)); 1635 1636 for (ring = 0; ring < BGE_BUFF_RINGS_MAX; ++ring) 1637 bge_fini_buff_ring(bgep, ring); 1638 for (ring = 0; ring < BGE_RECV_RINGS_MAX; ++ring) 1639 bge_fini_recv_ring(bgep, ring); 1640 for (ring = 0; ring < BGE_SEND_RINGS_MAX; ++ring) 1641 bge_fini_send_ring(bgep, ring); 1642 } 1643 1644 /* 1645 * Allocate an area of memory and a DMA handle for accessing it 1646 */ 1647 static int 1648 bge_alloc_dma_mem(bge_t *bgep, size_t memsize, ddi_device_acc_attr_t *attr_p, 1649 uint_t dma_flags, dma_area_t *dma_p) 1650 { 1651 caddr_t va; 1652 int err; 1653 1654 BGE_TRACE(("bge_alloc_dma_mem($%p, %ld, $%p, 0x%x, $%p)", 1655 (void *)bgep, memsize, attr_p, dma_flags, dma_p)); 1656 1657 /* 1658 * Allocate handle 1659 */ 1660 err = ddi_dma_alloc_handle(bgep->devinfo, &dma_attr, 1661 DDI_DMA_SLEEP, NULL, &dma_p->dma_hdl); 1662 if (err != DDI_SUCCESS) 1663 return (DDI_FAILURE); 1664 1665 /* 1666 * Allocate memory 1667 */ 1668 err = ddi_dma_mem_alloc(dma_p->dma_hdl, memsize, attr_p, 1669 dma_flags & (DDI_DMA_CONSISTENT | DDI_DMA_STREAMING), 1670 DDI_DMA_SLEEP, NULL, &va, &dma_p->alength, &dma_p->acc_hdl); 1671 if (err != DDI_SUCCESS) 1672 return (DDI_FAILURE); 1673 1674 /* 1675 * Bind the two together 1676 */ 1677 dma_p->mem_va = va; 1678 err = ddi_dma_addr_bind_handle(dma_p->dma_hdl, NULL, 1679 va, dma_p->alength, dma_flags, DDI_DMA_SLEEP, NULL, 1680 &dma_p->cookie, &dma_p->ncookies); 1681 1682 BGE_DEBUG(("bge_alloc_dma_mem(): bind %d bytes; err %d, %d cookies", 1683 dma_p->alength, err, dma_p->ncookies)); 1684 1685 if (err != DDI_DMA_MAPPED || dma_p->ncookies != 1) 1686 return (DDI_FAILURE); 1687 1688 dma_p->nslots = ~0U; 1689 dma_p->size = ~0U; 1690 dma_p->token = ~0U; 1691 dma_p->offset = 0; 1692 return (DDI_SUCCESS); 1693 } 1694 1695 /* 1696 * Free one allocated area of DMAable memory 1697 */ 1698 static void 1699 bge_free_dma_mem(dma_area_t *dma_p) 1700 { 1701 if (dma_p->dma_hdl != NULL) { 1702 if (dma_p->ncookies) { 1703 (void) ddi_dma_unbind_handle(dma_p->dma_hdl); 1704 dma_p->ncookies = 0; 1705 } 1706 ddi_dma_free_handle(&dma_p->dma_hdl); 1707 dma_p->dma_hdl = NULL; 1708 } 1709 1710 if (dma_p->acc_hdl != NULL) { 1711 ddi_dma_mem_free(&dma_p->acc_hdl); 1712 dma_p->acc_hdl = NULL; 1713 } 1714 } 1715 1716 /* 1717 * This function allocates all the transmit and receive buffers 1718 * and descriptors, in four chunks (or one, if MONOLITHIC). 1719 */ 1720 int 1721 bge_alloc_bufs(bge_t *bgep) 1722 { 1723 dma_area_t area; 1724 size_t rxbuffsize; 1725 size_t txbuffsize; 1726 size_t rxbuffdescsize; 1727 size_t rxdescsize; 1728 size_t txdescsize; 1729 uint64_t ring; 1730 uint64_t rx_rings = bgep->chipid.rx_rings; 1731 uint64_t tx_rings = bgep->chipid.tx_rings; 1732 int split; 1733 int err; 1734 1735 BGE_TRACE(("bge_alloc_bufs($%p)", 1736 (void *)bgep)); 1737 1738 rxbuffsize = BGE_STD_SLOTS_USED*bgep->chipid.std_buf_size; 1739 rxbuffsize += bgep->chipid.jumbo_slots*bgep->chipid.recv_jumbo_size; 1740 rxbuffsize += BGE_MINI_SLOTS_USED*BGE_MINI_BUFF_SIZE; 1741 1742 txbuffsize = BGE_SEND_SLOTS_USED*bgep->chipid.snd_buff_size; 1743 txbuffsize *= tx_rings; 1744 1745 rxdescsize = rx_rings*bgep->chipid.recv_slots; 1746 rxdescsize *= sizeof (bge_rbd_t); 1747 1748 rxbuffdescsize = BGE_STD_SLOTS_USED; 1749 rxbuffdescsize += bgep->chipid.jumbo_slots; 1750 rxbuffdescsize += BGE_MINI_SLOTS_USED; 1751 rxbuffdescsize *= sizeof (bge_rbd_t); 1752 1753 txdescsize = tx_rings*BGE_SEND_SLOTS_USED; 1754 txdescsize *= sizeof (bge_sbd_t); 1755 txdescsize += sizeof (bge_statistics_t); 1756 txdescsize += sizeof (bge_status_t); 1757 txdescsize += BGE_STATUS_PADDING; 1758 1759 #if BGE_MONOLITHIC 1760 1761 err = bge_alloc_dma_mem(bgep, 1762 rxbuffsize+txbuffsize+rxbuffdescsize+rxdescsize+txdescsize, 1763 &bge_data_accattr, DDI_DMA_RDWR | DDI_DMA_CONSISTENT, &area); 1764 if (err != DDI_SUCCESS) 1765 return (DDI_FAILURE); 1766 1767 BGE_DEBUG(("allocated range $%p-$%p (0x%lx-0x%lx)", 1768 DMA_VPTR(area), 1769 (caddr_t)DMA_VPTR(area)+area.alength, 1770 area.cookie.dmac_laddress, 1771 area.cookie.dmac_laddress+area.alength)); 1772 1773 bge_slice_chunk(&bgep->rx_buff[0], &area, 1, rxbuffsize); 1774 bge_slice_chunk(&bgep->tx_buff[0], &area, 1, txbuffsize); 1775 bge_slice_chunk(&bgep->rx_desc[0], &area, 1, rxdescsize); 1776 bge_slice_chunk(&bgep->tx_desc, &area, 1, txdescsize); 1777 1778 #else 1779 /* 1780 * Allocate memory & handles for RX buffers 1781 */ 1782 ASSERT((rxbuffsize % BGE_SPLIT) == 0); 1783 for (split = 0; split < BGE_SPLIT; ++split) { 1784 err = bge_alloc_dma_mem(bgep, rxbuffsize/BGE_SPLIT, 1785 &bge_data_accattr, DDI_DMA_READ | BGE_DMA_MODE, 1786 &bgep->rx_buff[split]); 1787 if (err != DDI_SUCCESS) 1788 return (DDI_FAILURE); 1789 } 1790 1791 /* 1792 * Allocate memory & handles for TX buffers 1793 */ 1794 ASSERT((txbuffsize % BGE_SPLIT) == 0); 1795 for (split = 0; split < BGE_SPLIT; ++split) { 1796 err = bge_alloc_dma_mem(bgep, txbuffsize/BGE_SPLIT, 1797 &bge_data_accattr, DDI_DMA_WRITE | BGE_DMA_MODE, 1798 &bgep->tx_buff[split]); 1799 if (err != DDI_SUCCESS) 1800 return (DDI_FAILURE); 1801 } 1802 1803 /* 1804 * Allocate memory & handles for receive return rings 1805 */ 1806 ASSERT((rxdescsize % rx_rings) == 0); 1807 for (split = 0; split < rx_rings; ++split) { 1808 err = bge_alloc_dma_mem(bgep, rxdescsize/rx_rings, 1809 &bge_desc_accattr, DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 1810 &bgep->rx_desc[split]); 1811 if (err != DDI_SUCCESS) 1812 return (DDI_FAILURE); 1813 } 1814 1815 /* 1816 * Allocate memory & handles for buffer (producer) descriptor rings 1817 */ 1818 err = bge_alloc_dma_mem(bgep, rxbuffdescsize, &bge_desc_accattr, 1819 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, &bgep->rx_desc[split]); 1820 if (err != DDI_SUCCESS) 1821 return (DDI_FAILURE); 1822 1823 /* 1824 * Allocate memory & handles for TX descriptor rings, 1825 * status block, and statistics area 1826 */ 1827 err = bge_alloc_dma_mem(bgep, txdescsize, &bge_desc_accattr, 1828 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, &bgep->tx_desc); 1829 if (err != DDI_SUCCESS) 1830 return (DDI_FAILURE); 1831 1832 #endif /* BGE_MONOLITHIC */ 1833 1834 /* 1835 * Now carve up each of the allocated areas ... 1836 */ 1837 for (split = 0; split < BGE_SPLIT; ++split) { 1838 area = bgep->rx_buff[split]; 1839 bge_slice_chunk(&bgep->buff[BGE_STD_BUFF_RING].buf[split], 1840 &area, BGE_STD_SLOTS_USED/BGE_SPLIT, 1841 bgep->chipid.std_buf_size); 1842 bge_slice_chunk(&bgep->buff[BGE_JUMBO_BUFF_RING].buf[split], 1843 &area, bgep->chipid.jumbo_slots/BGE_SPLIT, 1844 bgep->chipid.recv_jumbo_size); 1845 bge_slice_chunk(&bgep->buff[BGE_MINI_BUFF_RING].buf[split], 1846 &area, BGE_MINI_SLOTS_USED/BGE_SPLIT, 1847 BGE_MINI_BUFF_SIZE); 1848 ASSERT(area.alength >= 0); 1849 } 1850 1851 for (split = 0; split < BGE_SPLIT; ++split) { 1852 area = bgep->tx_buff[split]; 1853 for (ring = 0; ring < tx_rings; ++ring) 1854 bge_slice_chunk(&bgep->send[ring].buf[split], 1855 &area, BGE_SEND_SLOTS_USED/BGE_SPLIT, 1856 bgep->chipid.snd_buff_size); 1857 for (; ring < BGE_SEND_RINGS_MAX; ++ring) 1858 bge_slice_chunk(&bgep->send[ring].buf[split], 1859 &area, 0/BGE_SPLIT, 1860 bgep->chipid.snd_buff_size); 1861 ASSERT(area.alength >= 0); 1862 } 1863 1864 for (ring = 0; ring < rx_rings; ++ring) 1865 bge_slice_chunk(&bgep->recv[ring].desc, &bgep->rx_desc[ring], 1866 bgep->chipid.recv_slots, sizeof (bge_rbd_t)); 1867 1868 area = bgep->rx_desc[rx_rings]; 1869 for (; ring < BGE_RECV_RINGS_MAX; ++ring) 1870 bge_slice_chunk(&bgep->recv[ring].desc, &area, 1871 0, sizeof (bge_rbd_t)); 1872 bge_slice_chunk(&bgep->buff[BGE_STD_BUFF_RING].desc, &area, 1873 BGE_STD_SLOTS_USED, sizeof (bge_rbd_t)); 1874 bge_slice_chunk(&bgep->buff[BGE_JUMBO_BUFF_RING].desc, &area, 1875 bgep->chipid.jumbo_slots, sizeof (bge_rbd_t)); 1876 bge_slice_chunk(&bgep->buff[BGE_MINI_BUFF_RING].desc, &area, 1877 BGE_MINI_SLOTS_USED, sizeof (bge_rbd_t)); 1878 ASSERT(area.alength == 0); 1879 1880 area = bgep->tx_desc; 1881 for (ring = 0; ring < tx_rings; ++ring) 1882 bge_slice_chunk(&bgep->send[ring].desc, &area, 1883 BGE_SEND_SLOTS_USED, sizeof (bge_sbd_t)); 1884 for (; ring < BGE_SEND_RINGS_MAX; ++ring) 1885 bge_slice_chunk(&bgep->send[ring].desc, &area, 1886 0, sizeof (bge_sbd_t)); 1887 bge_slice_chunk(&bgep->statistics, &area, 1, sizeof (bge_statistics_t)); 1888 bge_slice_chunk(&bgep->status_block, &area, 1, sizeof (bge_status_t)); 1889 ASSERT(area.alength == BGE_STATUS_PADDING); 1890 DMA_ZERO(bgep->status_block); 1891 1892 return (DDI_SUCCESS); 1893 } 1894 1895 /* 1896 * This routine frees the transmit and receive buffers and descriptors. 1897 * Make sure the chip is stopped before calling it! 1898 */ 1899 void 1900 bge_free_bufs(bge_t *bgep) 1901 { 1902 int split; 1903 1904 BGE_TRACE(("bge_free_bufs($%p)", 1905 (void *)bgep)); 1906 1907 #if BGE_MONOLITHIC 1908 bge_free_dma_mem(&bgep->rx_buff[0]); 1909 #else 1910 bge_free_dma_mem(&bgep->tx_desc); 1911 for (split = 0; split < BGE_RECV_RINGS_SPLIT; ++split) 1912 bge_free_dma_mem(&bgep->rx_desc[split]); 1913 for (split = 0; split < BGE_SPLIT; ++split) 1914 bge_free_dma_mem(&bgep->tx_buff[split]); 1915 for (split = 0; split < BGE_SPLIT; ++split) 1916 bge_free_dma_mem(&bgep->rx_buff[split]); 1917 #endif /* BGE_MONOLITHIC */ 1918 } 1919 1920 /* 1921 * Determine (initial) MAC address ("BIA") to use for this interface 1922 */ 1923 1924 static void 1925 bge_find_mac_address(bge_t *bgep, chip_id_t *cidp) 1926 { 1927 struct ether_addr sysaddr; 1928 char propbuf[8]; /* "true" or "false", plus NUL */ 1929 uchar_t *bytes; 1930 int *ints; 1931 uint_t nelts; 1932 int err; 1933 1934 BGE_TRACE(("bge_find_mac_address($%p)", 1935 (void *)bgep)); 1936 1937 BGE_DEBUG(("bge_find_mac_address: hw_mac_addr %012llx, => %s (%sset)", 1938 cidp->hw_mac_addr, 1939 ether_sprintf((void *)cidp->vendor_addr.addr), 1940 cidp->vendor_addr.set ? "" : "not ")); 1941 1942 /* 1943 * The "vendor's factory-set address" may already have 1944 * been extracted from the chip, but if the property 1945 * "local-mac-address" is set we use that instead. It 1946 * will normally be set by OBP, but it could also be 1947 * specified in a .conf file(!) 1948 * 1949 * There doesn't seem to be a way to define byte-array 1950 * properties in a .conf, so we check whether it looks 1951 * like an array of 6 ints instead. 1952 * 1953 * Then, we check whether it looks like an array of 6 1954 * bytes (which it should, if OBP set it). If we can't 1955 * make sense of it either way, we'll ignore it. 1956 */ 1957 err = ddi_prop_lookup_int_array(DDI_DEV_T_ANY, bgep->devinfo, 1958 DDI_PROP_DONTPASS, localmac_propname, &ints, &nelts); 1959 if (err == DDI_PROP_SUCCESS) { 1960 if (nelts == ETHERADDRL) { 1961 while (nelts--) 1962 cidp->vendor_addr.addr[nelts] = ints[nelts]; 1963 cidp->vendor_addr.set = B_TRUE; 1964 } 1965 ddi_prop_free(ints); 1966 } 1967 1968 err = ddi_prop_lookup_byte_array(DDI_DEV_T_ANY, bgep->devinfo, 1969 DDI_PROP_DONTPASS, localmac_propname, &bytes, &nelts); 1970 if (err == DDI_PROP_SUCCESS) { 1971 if (nelts == ETHERADDRL) { 1972 while (nelts--) 1973 cidp->vendor_addr.addr[nelts] = bytes[nelts]; 1974 cidp->vendor_addr.set = B_TRUE; 1975 } 1976 ddi_prop_free(bytes); 1977 } 1978 1979 BGE_DEBUG(("bge_find_mac_address: +local %s (%sset)", 1980 ether_sprintf((void *)cidp->vendor_addr.addr), 1981 cidp->vendor_addr.set ? "" : "not ")); 1982 1983 /* 1984 * Look up the OBP property "local-mac-address?". Note that even 1985 * though its value is a string (which should be "true" or "false"), 1986 * it can't be decoded by ddi_prop_lookup_string(9F). So, we zero 1987 * the buffer first and then fetch the property as an untyped array; 1988 * this may or may not include a final NUL, but since there will 1989 * always be one left at the end of the buffer we can now treat it 1990 * as a string anyway. 1991 */ 1992 nelts = sizeof (propbuf); 1993 bzero(propbuf, nelts--); 1994 err = ddi_getlongprop_buf(DDI_DEV_T_ANY, bgep->devinfo, 1995 DDI_PROP_CANSLEEP, localmac_boolname, propbuf, (int *)&nelts); 1996 1997 /* 1998 * Now, if the address still isn't set from the hardware (SEEPROM) 1999 * or the OBP or .conf property, OR if the user has foolishly set 2000 * 'local-mac-address? = false', use "the system address" instead 2001 * (but only if it's non-null i.e. has been set from the IDPROM). 2002 */ 2003 if (cidp->vendor_addr.set == B_FALSE || strcmp(propbuf, "false") == 0) 2004 if (localetheraddr(NULL, &sysaddr) != 0) { 2005 ethaddr_copy(&sysaddr, cidp->vendor_addr.addr); 2006 cidp->vendor_addr.set = B_TRUE; 2007 } 2008 2009 BGE_DEBUG(("bge_find_mac_address: +system %s (%sset)", 2010 ether_sprintf((void *)cidp->vendor_addr.addr), 2011 cidp->vendor_addr.set ? "" : "not ")); 2012 2013 /* 2014 * Finally(!), if there's a valid "mac-address" property (created 2015 * if we netbooted from this interface), we must use this instead 2016 * of any of the above to ensure that the NFS/install server doesn't 2017 * get confused by the address changing as Solaris takes over! 2018 */ 2019 err = ddi_prop_lookup_byte_array(DDI_DEV_T_ANY, bgep->devinfo, 2020 DDI_PROP_DONTPASS, macaddr_propname, &bytes, &nelts); 2021 if (err == DDI_PROP_SUCCESS) { 2022 if (nelts == ETHERADDRL) { 2023 while (nelts--) 2024 cidp->vendor_addr.addr[nelts] = bytes[nelts]; 2025 cidp->vendor_addr.set = B_TRUE; 2026 } 2027 ddi_prop_free(bytes); 2028 } 2029 2030 BGE_DEBUG(("bge_find_mac_address: =final %s (%sset)", 2031 ether_sprintf((void *)cidp->vendor_addr.addr), 2032 cidp->vendor_addr.set ? "" : "not ")); 2033 } 2034 2035 2036 /*ARGSUSED*/ 2037 int 2038 bge_check_acc_handle(bge_t *bgep, ddi_acc_handle_t handle) 2039 { 2040 ddi_fm_error_t de; 2041 2042 ddi_fm_acc_err_get(handle, &de, DDI_FME_VERSION); 2043 ddi_fm_acc_err_clear(handle, DDI_FME_VERSION); 2044 return (de.fme_status); 2045 } 2046 2047 /*ARGSUSED*/ 2048 int 2049 bge_check_dma_handle(bge_t *bgep, ddi_dma_handle_t handle) 2050 { 2051 ddi_fm_error_t de; 2052 2053 ASSERT(bgep->progress & PROGRESS_BUFS); 2054 ddi_fm_dma_err_get(handle, &de, DDI_FME_VERSION); 2055 return (de.fme_status); 2056 } 2057 2058 /* 2059 * The IO fault service error handling callback function 2060 */ 2061 /*ARGSUSED*/ 2062 static int 2063 bge_fm_error_cb(dev_info_t *dip, ddi_fm_error_t *err, const void *impl_data) 2064 { 2065 /* 2066 * as the driver can always deal with an error in any dma or 2067 * access handle, we can just return the fme_status value. 2068 */ 2069 pci_ereport_post(dip, err, NULL); 2070 return (err->fme_status); 2071 } 2072 2073 static void 2074 bge_fm_init(bge_t *bgep) 2075 { 2076 ddi_iblock_cookie_t iblk; 2077 2078 /* Only register with IO Fault Services if we have some capability */ 2079 if (bgep->fm_capabilities) { 2080 bge_reg_accattr.devacc_attr_access = DDI_FLAGERR_ACC; 2081 bge_desc_accattr.devacc_attr_access = DDI_FLAGERR_ACC; 2082 dma_attr.dma_attr_flags = DDI_DMA_FLAGERR; 2083 2084 /* Register capabilities with IO Fault Services */ 2085 ddi_fm_init(bgep->devinfo, &bgep->fm_capabilities, &iblk); 2086 2087 /* 2088 * Initialize pci ereport capabilities if ereport capable 2089 */ 2090 if (DDI_FM_EREPORT_CAP(bgep->fm_capabilities) || 2091 DDI_FM_ERRCB_CAP(bgep->fm_capabilities)) 2092 pci_ereport_setup(bgep->devinfo); 2093 2094 /* 2095 * Register error callback if error callback capable 2096 */ 2097 if (DDI_FM_ERRCB_CAP(bgep->fm_capabilities)) 2098 ddi_fm_handler_register(bgep->devinfo, 2099 bge_fm_error_cb, (void*) bgep); 2100 } else { 2101 /* 2102 * These fields have to be cleared of FMA if there are no 2103 * FMA capabilities at runtime. 2104 */ 2105 bge_reg_accattr.devacc_attr_access = DDI_DEFAULT_ACC; 2106 bge_desc_accattr.devacc_attr_access = DDI_DEFAULT_ACC; 2107 dma_attr.dma_attr_flags = 0; 2108 } 2109 } 2110 2111 static void 2112 bge_fm_fini(bge_t *bgep) 2113 { 2114 /* Only unregister FMA capabilities if we registered some */ 2115 if (bgep->fm_capabilities) { 2116 2117 /* 2118 * Release any resources allocated by pci_ereport_setup() 2119 */ 2120 if (DDI_FM_EREPORT_CAP(bgep->fm_capabilities) || 2121 DDI_FM_ERRCB_CAP(bgep->fm_capabilities)) 2122 pci_ereport_teardown(bgep->devinfo); 2123 2124 /* 2125 * Un-register error callback if error callback capable 2126 */ 2127 if (DDI_FM_ERRCB_CAP(bgep->fm_capabilities)) 2128 ddi_fm_handler_unregister(bgep->devinfo); 2129 2130 /* Unregister from IO Fault Services */ 2131 ddi_fm_fini(bgep->devinfo); 2132 } 2133 } 2134 2135 static void 2136 #ifdef BGE_IPMI_ASF 2137 bge_unattach(bge_t *bgep, uint_t asf_mode) 2138 #else 2139 bge_unattach(bge_t *bgep) 2140 #endif 2141 { 2142 BGE_TRACE(("bge_unattach($%p)", 2143 (void *)bgep)); 2144 2145 /* 2146 * Flag that no more activity may be initiated 2147 */ 2148 bgep->progress &= ~PROGRESS_READY; 2149 2150 /* 2151 * Quiesce the PHY and MAC (leave it reset but still powered). 2152 * Clean up and free all BGE data structures 2153 */ 2154 if (bgep->cyclic_id) { 2155 mutex_enter(&cpu_lock); 2156 cyclic_remove(bgep->cyclic_id); 2157 mutex_exit(&cpu_lock); 2158 } 2159 if (bgep->progress & PROGRESS_KSTATS) 2160 bge_fini_kstats(bgep); 2161 if (bgep->progress & PROGRESS_NDD) 2162 bge_nd_cleanup(bgep); 2163 if (bgep->progress & PROGRESS_PHY) 2164 bge_phys_reset(bgep); 2165 if (bgep->progress & PROGRESS_HWINT) { 2166 mutex_enter(bgep->genlock); 2167 #ifdef BGE_IPMI_ASF 2168 if (bge_chip_reset(bgep, B_FALSE, asf_mode) != DDI_SUCCESS) 2169 #else 2170 if (bge_chip_reset(bgep, B_FALSE) != DDI_SUCCESS) 2171 #endif 2172 ddi_fm_service_impact(bgep->devinfo, 2173 DDI_SERVICE_UNAFFECTED); 2174 #ifdef BGE_IPMI_ASF 2175 if (bgep->asf_enabled) { 2176 /* 2177 * This register has been overlaid. We restore its 2178 * initial value here. 2179 */ 2180 bge_nic_put32(bgep, BGE_NIC_DATA_SIG_ADDR, 2181 BGE_NIC_DATA_SIG); 2182 } 2183 #endif 2184 if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) 2185 ddi_fm_service_impact(bgep->devinfo, 2186 DDI_SERVICE_UNAFFECTED); 2187 if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) 2188 ddi_fm_service_impact(bgep->devinfo, 2189 DDI_SERVICE_UNAFFECTED); 2190 mutex_exit(bgep->genlock); 2191 } 2192 if (bgep->progress & PROGRESS_INTR) { 2193 bge_intr_disable(bgep); 2194 bge_fini_rings(bgep); 2195 } 2196 if (bgep->progress & PROGRESS_HWINT) { 2197 bge_rem_intrs(bgep); 2198 rw_destroy(bgep->errlock); 2199 mutex_destroy(bgep->softintrlock); 2200 mutex_destroy(bgep->genlock); 2201 } 2202 if (bgep->progress & PROGRESS_FACTOTUM) 2203 ddi_remove_softintr(bgep->factotum_id); 2204 if (bgep->progress & PROGRESS_RESCHED) 2205 ddi_remove_softintr(bgep->resched_id); 2206 if (bgep->progress & PROGRESS_BUFS) 2207 bge_free_bufs(bgep); 2208 if (bgep->progress & PROGRESS_REGS) 2209 ddi_regs_map_free(&bgep->io_handle); 2210 if (bgep->progress & PROGRESS_CFG) 2211 pci_config_teardown(&bgep->cfg_handle); 2212 2213 bge_fm_fini(bgep); 2214 2215 ddi_remove_minor_node(bgep->devinfo, NULL); 2216 kmem_free(bgep, sizeof (*bgep)); 2217 } 2218 2219 static int 2220 bge_resume(dev_info_t *devinfo) 2221 { 2222 bge_t *bgep; /* Our private data */ 2223 chip_id_t *cidp; 2224 chip_id_t chipid; 2225 2226 bgep = ddi_get_driver_private(devinfo); 2227 if (bgep == NULL) 2228 return (DDI_FAILURE); 2229 2230 /* 2231 * Refuse to resume if the data structures aren't consistent 2232 */ 2233 if (bgep->devinfo != devinfo) 2234 return (DDI_FAILURE); 2235 2236 #ifdef BGE_IPMI_ASF 2237 /* 2238 * Power management hasn't been supported in BGE now. If you 2239 * want to implement it, please add the ASF/IPMI related 2240 * code here. 2241 */ 2242 2243 #endif 2244 2245 /* 2246 * Read chip ID & set up config space command register(s) 2247 * Refuse to resume if the chip has changed its identity! 2248 */ 2249 cidp = &bgep->chipid; 2250 mutex_enter(bgep->genlock); 2251 bge_chip_cfg_init(bgep, &chipid, B_FALSE); 2252 if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 2253 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 2254 mutex_exit(bgep->genlock); 2255 return (DDI_FAILURE); 2256 } 2257 mutex_exit(bgep->genlock); 2258 if (chipid.vendor != cidp->vendor) 2259 return (DDI_FAILURE); 2260 if (chipid.device != cidp->device) 2261 return (DDI_FAILURE); 2262 if (chipid.revision != cidp->revision) 2263 return (DDI_FAILURE); 2264 if (chipid.asic_rev != cidp->asic_rev) 2265 return (DDI_FAILURE); 2266 2267 /* 2268 * All OK, reinitialise h/w & kick off GLD scheduling 2269 */ 2270 mutex_enter(bgep->genlock); 2271 if (bge_restart(bgep, B_TRUE) != DDI_SUCCESS) { 2272 (void) bge_check_acc_handle(bgep, bgep->cfg_handle); 2273 (void) bge_check_acc_handle(bgep, bgep->io_handle); 2274 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 2275 mutex_exit(bgep->genlock); 2276 return (DDI_FAILURE); 2277 } 2278 if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 2279 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 2280 mutex_exit(bgep->genlock); 2281 return (DDI_FAILURE); 2282 } 2283 if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) { 2284 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 2285 mutex_exit(bgep->genlock); 2286 return (DDI_FAILURE); 2287 } 2288 mutex_exit(bgep->genlock); 2289 return (DDI_SUCCESS); 2290 } 2291 2292 /* 2293 * attach(9E) -- Attach a device to the system 2294 * 2295 * Called once for each board successfully probed. 2296 */ 2297 static int 2298 bge_attach(dev_info_t *devinfo, ddi_attach_cmd_t cmd) 2299 { 2300 bge_t *bgep; /* Our private data */ 2301 mac_register_t *macp; 2302 chip_id_t *cidp; 2303 cyc_handler_t cychand; 2304 cyc_time_t cyctime; 2305 caddr_t regs; 2306 int instance; 2307 int err; 2308 int intr_types; 2309 #ifdef BGE_IPMI_ASF 2310 uint32_t mhcrValue; 2311 #endif 2312 2313 instance = ddi_get_instance(devinfo); 2314 2315 BGE_GTRACE(("bge_attach($%p, %d) instance %d", 2316 (void *)devinfo, cmd, instance)); 2317 BGE_BRKPT(NULL, "bge_attach"); 2318 2319 switch (cmd) { 2320 default: 2321 return (DDI_FAILURE); 2322 2323 case DDI_RESUME: 2324 return (bge_resume(devinfo)); 2325 2326 case DDI_ATTACH: 2327 break; 2328 } 2329 2330 bgep = kmem_zalloc(sizeof (*bgep), KM_SLEEP); 2331 ddi_set_driver_private(devinfo, bgep); 2332 bgep->bge_guard = BGE_GUARD; 2333 bgep->devinfo = devinfo; 2334 2335 /* 2336 * Initialize more fields in BGE private data 2337 */ 2338 bgep->debug = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 2339 DDI_PROP_DONTPASS, debug_propname, bge_debug); 2340 (void) snprintf(bgep->ifname, sizeof (bgep->ifname), "%s%d", 2341 BGE_DRIVER_NAME, instance); 2342 2343 /* 2344 * Initialize for fma support 2345 */ 2346 bgep->fm_capabilities = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 2347 DDI_PROP_DONTPASS, fm_cap, 2348 DDI_FM_EREPORT_CAPABLE | DDI_FM_ACCCHK_CAPABLE | 2349 DDI_FM_DMACHK_CAPABLE | DDI_FM_ERRCB_CAPABLE); 2350 BGE_DEBUG(("bgep->fm_capabilities = %d", bgep->fm_capabilities)); 2351 bge_fm_init(bgep); 2352 2353 /* 2354 * Look up the IOMMU's page size for DVMA mappings (must be 2355 * a power of 2) and convert to a mask. This can be used to 2356 * determine whether a message buffer crosses a page boundary. 2357 * Note: in 2s complement binary notation, if X is a power of 2358 * 2, then -X has the representation "11...1100...00". 2359 */ 2360 bgep->pagemask = dvma_pagesize(devinfo); 2361 ASSERT(ddi_ffs(bgep->pagemask) == ddi_fls(bgep->pagemask)); 2362 bgep->pagemask = -bgep->pagemask; 2363 2364 /* 2365 * Map config space registers 2366 * Read chip ID & set up config space command register(s) 2367 * 2368 * Note: this leaves the chip accessible by Memory Space 2369 * accesses, but with interrupts and Bus Mastering off. 2370 * This should ensure that nothing untoward will happen 2371 * if it has been left active by the (net-)bootloader. 2372 * We'll re-enable Bus Mastering once we've reset the chip, 2373 * and allow interrupts only when everything else is set up. 2374 */ 2375 err = pci_config_setup(devinfo, &bgep->cfg_handle); 2376 #ifdef BGE_IPMI_ASF 2377 mhcrValue = pci_config_get32(bgep->cfg_handle, PCI_CONF_BGE_MHCR); 2378 if (mhcrValue & MHCR_ENABLE_ENDIAN_WORD_SWAP) { 2379 bgep->asf_wordswapped = B_TRUE; 2380 } else { 2381 bgep->asf_wordswapped = B_FALSE; 2382 } 2383 bge_asf_get_config(bgep); 2384 #endif 2385 if (err != DDI_SUCCESS) { 2386 bge_problem(bgep, "pci_config_setup() failed"); 2387 goto attach_fail; 2388 } 2389 bgep->progress |= PROGRESS_CFG; 2390 cidp = &bgep->chipid; 2391 bzero(cidp, sizeof (*cidp)); 2392 bge_chip_cfg_init(bgep, cidp, B_FALSE); 2393 if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 2394 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 2395 goto attach_fail; 2396 } 2397 2398 #ifdef BGE_IPMI_ASF 2399 if (DEVICE_5721_SERIES_CHIPSETS(bgep) || 2400 DEVICE_5714_SERIES_CHIPSETS(bgep)) { 2401 bgep->asf_newhandshake = B_TRUE; 2402 } else { 2403 bgep->asf_newhandshake = B_FALSE; 2404 } 2405 #endif 2406 2407 /* 2408 * Update those parts of the chip ID derived from volatile 2409 * registers with the values seen by OBP (in case the chip 2410 * has been reset externally and therefore lost them). 2411 */ 2412 cidp->subven = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 2413 DDI_PROP_DONTPASS, subven_propname, cidp->subven); 2414 cidp->subdev = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 2415 DDI_PROP_DONTPASS, subdev_propname, cidp->subdev); 2416 cidp->clsize = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 2417 DDI_PROP_DONTPASS, clsize_propname, cidp->clsize); 2418 cidp->latency = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 2419 DDI_PROP_DONTPASS, latency_propname, cidp->latency); 2420 cidp->rx_rings = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 2421 DDI_PROP_DONTPASS, rxrings_propname, cidp->rx_rings); 2422 cidp->tx_rings = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 2423 DDI_PROP_DONTPASS, txrings_propname, cidp->tx_rings); 2424 2425 if (bge_jumbo_enable == B_TRUE) { 2426 cidp->default_mtu = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 2427 DDI_PROP_DONTPASS, default_mtu, BGE_DEFAULT_MTU); 2428 if ((cidp->default_mtu < BGE_DEFAULT_MTU)|| 2429 (cidp->default_mtu > BGE_MAXIMUM_MTU)) { 2430 cidp->default_mtu = BGE_DEFAULT_MTU; 2431 } 2432 } 2433 /* 2434 * Map operating registers 2435 */ 2436 err = ddi_regs_map_setup(devinfo, BGE_PCI_OPREGS_RNUMBER, 2437 ®s, 0, 0, &bge_reg_accattr, &bgep->io_handle); 2438 if (err != DDI_SUCCESS) { 2439 bge_problem(bgep, "ddi_regs_map_setup() failed"); 2440 goto attach_fail; 2441 } 2442 bgep->io_regs = regs; 2443 bgep->progress |= PROGRESS_REGS; 2444 2445 /* 2446 * Characterise the device, so we know its requirements. 2447 * Then allocate the appropriate TX and RX descriptors & buffers. 2448 */ 2449 if (bge_chip_id_init(bgep) == EIO) { 2450 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 2451 goto attach_fail; 2452 } 2453 err = bge_alloc_bufs(bgep); 2454 if (err != DDI_SUCCESS) { 2455 bge_problem(bgep, "DMA buffer allocation failed"); 2456 goto attach_fail; 2457 } 2458 bgep->progress |= PROGRESS_BUFS; 2459 2460 /* 2461 * Add the softint handlers: 2462 * 2463 * Both of these handlers are used to avoid restrictions on the 2464 * context and/or mutexes required for some operations. In 2465 * particular, the hardware interrupt handler and its subfunctions 2466 * can detect a number of conditions that we don't want to handle 2467 * in that context or with that set of mutexes held. So, these 2468 * softints are triggered instead: 2469 * 2470 * the <resched> softint is triggered if we have previously 2471 * had to refuse to send a packet because of resource shortage 2472 * (we've run out of transmit buffers), but the send completion 2473 * interrupt handler has now detected that more buffers have 2474 * become available. 2475 * 2476 * the <factotum> is triggered if the h/w interrupt handler 2477 * sees the <link state changed> or <error> bits in the status 2478 * block. It's also triggered periodically to poll the link 2479 * state, just in case we aren't getting link status change 2480 * interrupts ... 2481 */ 2482 err = ddi_add_softintr(devinfo, DDI_SOFTINT_LOW, &bgep->resched_id, 2483 NULL, NULL, bge_reschedule, (caddr_t)bgep); 2484 if (err != DDI_SUCCESS) { 2485 bge_problem(bgep, "ddi_add_softintr() failed"); 2486 goto attach_fail; 2487 } 2488 bgep->progress |= PROGRESS_RESCHED; 2489 err = ddi_add_softintr(devinfo, DDI_SOFTINT_LOW, &bgep->factotum_id, 2490 NULL, NULL, bge_chip_factotum, (caddr_t)bgep); 2491 if (err != DDI_SUCCESS) { 2492 bge_problem(bgep, "ddi_add_softintr() failed"); 2493 goto attach_fail; 2494 } 2495 bgep->progress |= PROGRESS_FACTOTUM; 2496 2497 /* Get supported interrupt types */ 2498 if (ddi_intr_get_supported_types(devinfo, &intr_types) != DDI_SUCCESS) { 2499 bge_error(bgep, "ddi_intr_get_supported_types failed\n"); 2500 2501 goto attach_fail; 2502 } 2503 2504 BGE_DEBUG(("%s: ddi_intr_get_supported_types() returned: %x", 2505 bgep->ifname, intr_types)); 2506 2507 if ((intr_types & DDI_INTR_TYPE_MSI) && bgep->chipid.msi_enabled) { 2508 if (bge_add_intrs(bgep, DDI_INTR_TYPE_MSI) != DDI_SUCCESS) { 2509 bge_error(bgep, "MSI registration failed, " 2510 "trying FIXED interrupt type\n"); 2511 } else { 2512 BGE_DEBUG(("%s: Using MSI interrupt type", 2513 bgep->ifname)); 2514 bgep->intr_type = DDI_INTR_TYPE_MSI; 2515 bgep->progress |= PROGRESS_HWINT; 2516 } 2517 } 2518 2519 if (!(bgep->progress & PROGRESS_HWINT) && 2520 (intr_types & DDI_INTR_TYPE_FIXED)) { 2521 if (bge_add_intrs(bgep, DDI_INTR_TYPE_FIXED) != DDI_SUCCESS) { 2522 bge_error(bgep, "FIXED interrupt " 2523 "registration failed\n"); 2524 goto attach_fail; 2525 } 2526 2527 BGE_DEBUG(("%s: Using FIXED interrupt type", bgep->ifname)); 2528 2529 bgep->intr_type = DDI_INTR_TYPE_FIXED; 2530 bgep->progress |= PROGRESS_HWINT; 2531 } 2532 2533 if (!(bgep->progress & PROGRESS_HWINT)) { 2534 bge_error(bgep, "No interrupts registered\n"); 2535 goto attach_fail; 2536 } 2537 2538 /* 2539 * Note that interrupts are not enabled yet as 2540 * mutex locks are not initialized. Initialize mutex locks. 2541 */ 2542 mutex_init(bgep->genlock, NULL, MUTEX_DRIVER, 2543 DDI_INTR_PRI(bgep->intr_pri)); 2544 mutex_init(bgep->softintrlock, NULL, MUTEX_DRIVER, 2545 DDI_INTR_PRI(bgep->intr_pri)); 2546 rw_init(bgep->errlock, NULL, RW_DRIVER, 2547 DDI_INTR_PRI(bgep->intr_pri)); 2548 2549 /* 2550 * Initialize rings. 2551 */ 2552 bge_init_rings(bgep); 2553 2554 /* 2555 * Now that mutex locks are initialized, enable interrupts. 2556 */ 2557 bge_intr_enable(bgep); 2558 bgep->progress |= PROGRESS_INTR; 2559 2560 /* 2561 * Initialise link state variables 2562 * Stop, reset & reinitialise the chip. 2563 * Initialise the (internal) PHY. 2564 */ 2565 bgep->link_state = LINK_STATE_UNKNOWN; 2566 bgep->link_up_msg = bgep->link_down_msg = " (initialized)"; 2567 2568 mutex_enter(bgep->genlock); 2569 2570 /* 2571 * Reset chip & rings to initial state; also reset address 2572 * filtering, promiscuity, loopback mode. 2573 */ 2574 #ifdef BGE_IPMI_ASF 2575 if (bge_reset(bgep, ASF_MODE_SHUTDOWN) != DDI_SUCCESS) { 2576 #else 2577 if (bge_reset(bgep) != DDI_SUCCESS) { 2578 #endif 2579 (void) bge_check_acc_handle(bgep, bgep->cfg_handle); 2580 (void) bge_check_acc_handle(bgep, bgep->io_handle); 2581 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 2582 mutex_exit(bgep->genlock); 2583 goto attach_fail; 2584 } 2585 2586 #ifdef BGE_IPMI_ASF 2587 if (bgep->asf_enabled) { 2588 bgep->asf_status = ASF_STAT_RUN_INIT; 2589 } 2590 #endif 2591 2592 bzero(bgep->mcast_hash, sizeof (bgep->mcast_hash)); 2593 bzero(bgep->mcast_refs, sizeof (bgep->mcast_refs)); 2594 bgep->promisc = B_FALSE; 2595 bgep->param_loop_mode = BGE_LOOP_NONE; 2596 if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 2597 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 2598 mutex_exit(bgep->genlock); 2599 goto attach_fail; 2600 } 2601 if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) { 2602 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 2603 mutex_exit(bgep->genlock); 2604 goto attach_fail; 2605 } 2606 2607 mutex_exit(bgep->genlock); 2608 2609 if (bge_phys_init(bgep) == EIO) { 2610 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 2611 goto attach_fail; 2612 } 2613 bgep->progress |= PROGRESS_PHY; 2614 2615 /* 2616 * Register NDD-tweakable parameters 2617 */ 2618 if (bge_nd_init(bgep)) { 2619 bge_problem(bgep, "bge_nd_init() failed"); 2620 goto attach_fail; 2621 } 2622 bgep->progress |= PROGRESS_NDD; 2623 2624 /* 2625 * Create & initialise named kstats 2626 */ 2627 bge_init_kstats(bgep, instance); 2628 bgep->progress |= PROGRESS_KSTATS; 2629 2630 /* 2631 * Determine whether to override the chip's own MAC address 2632 */ 2633 bge_find_mac_address(bgep, cidp); 2634 ethaddr_copy(cidp->vendor_addr.addr, bgep->curr_addr[0].addr); 2635 bgep->curr_addr[0].set = B_TRUE; 2636 2637 bgep->unicst_addr_total = MAC_ADDRESS_REGS_MAX; 2638 /* 2639 * Address available is one less than MAX 2640 * as primary address is not advertised 2641 * as a multiple MAC address. 2642 */ 2643 bgep->unicst_addr_avail = MAC_ADDRESS_REGS_MAX - 1; 2644 2645 if ((macp = mac_alloc(MAC_VERSION)) == NULL) 2646 goto attach_fail; 2647 macp->m_type_ident = MAC_PLUGIN_IDENT_ETHER; 2648 macp->m_driver = bgep; 2649 macp->m_dip = devinfo; 2650 macp->m_src_addr = bgep->curr_addr[0].addr; 2651 macp->m_callbacks = &bge_m_callbacks; 2652 macp->m_min_sdu = 0; 2653 macp->m_max_sdu = cidp->ethmax_size - sizeof (struct ether_header); 2654 /* 2655 * Finally, we're ready to register ourselves with the MAC layer 2656 * interface; if this succeeds, we're all ready to start() 2657 */ 2658 err = mac_register(macp, &bgep->mh); 2659 mac_free(macp); 2660 if (err != 0) 2661 goto attach_fail; 2662 2663 cychand.cyh_func = bge_chip_cyclic; 2664 cychand.cyh_arg = bgep; 2665 cychand.cyh_level = CY_LOCK_LEVEL; 2666 cyctime.cyt_when = 0; 2667 cyctime.cyt_interval = BGE_CYCLIC_PERIOD; 2668 mutex_enter(&cpu_lock); 2669 bgep->cyclic_id = cyclic_add(&cychand, &cyctime); 2670 mutex_exit(&cpu_lock); 2671 2672 bgep->progress |= PROGRESS_READY; 2673 ASSERT(bgep->bge_guard == BGE_GUARD); 2674 return (DDI_SUCCESS); 2675 2676 attach_fail: 2677 #ifdef BGE_IPMI_ASF 2678 bge_unattach(bgep, ASF_MODE_SHUTDOWN); 2679 #else 2680 bge_unattach(bgep); 2681 #endif 2682 return (DDI_FAILURE); 2683 } 2684 2685 /* 2686 * bge_suspend() -- suspend transmit/receive for powerdown 2687 */ 2688 static int 2689 bge_suspend(bge_t *bgep) 2690 { 2691 /* 2692 * Stop processing and idle (powerdown) the PHY ... 2693 */ 2694 mutex_enter(bgep->genlock); 2695 #ifdef BGE_IPMI_ASF 2696 /* 2697 * Power management hasn't been supported in BGE now. If you 2698 * want to implement it, please add the ASF/IPMI related 2699 * code here. 2700 */ 2701 #endif 2702 bge_stop(bgep); 2703 if (bge_phys_idle(bgep) != DDI_SUCCESS) { 2704 (void) bge_check_acc_handle(bgep, bgep->io_handle); 2705 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 2706 mutex_exit(bgep->genlock); 2707 return (DDI_FAILURE); 2708 } 2709 if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) { 2710 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 2711 mutex_exit(bgep->genlock); 2712 return (DDI_FAILURE); 2713 } 2714 mutex_exit(bgep->genlock); 2715 2716 return (DDI_SUCCESS); 2717 } 2718 2719 /* 2720 * detach(9E) -- Detach a device from the system 2721 */ 2722 static int 2723 bge_detach(dev_info_t *devinfo, ddi_detach_cmd_t cmd) 2724 { 2725 bge_t *bgep; 2726 #ifdef BGE_IPMI_ASF 2727 uint_t asf_mode; 2728 asf_mode = ASF_MODE_NONE; 2729 #endif 2730 2731 BGE_GTRACE(("bge_detach($%p, %d)", (void *)devinfo, cmd)); 2732 2733 bgep = ddi_get_driver_private(devinfo); 2734 2735 switch (cmd) { 2736 default: 2737 return (DDI_FAILURE); 2738 2739 case DDI_SUSPEND: 2740 return (bge_suspend(bgep)); 2741 2742 case DDI_DETACH: 2743 break; 2744 } 2745 2746 #ifdef BGE_IPMI_ASF 2747 mutex_enter(bgep->genlock); 2748 if (bgep->asf_enabled && ((bgep->asf_status == ASF_STAT_RUN) || 2749 (bgep->asf_status == ASF_STAT_RUN_INIT))) { 2750 2751 bge_asf_update_status(bgep); 2752 if (bgep->asf_status == ASF_STAT_RUN) { 2753 bge_asf_stop_timer(bgep); 2754 } 2755 bgep->asf_status = ASF_STAT_STOP; 2756 2757 bge_asf_pre_reset_operations(bgep, BGE_SHUTDOWN_RESET); 2758 2759 if (bgep->asf_pseudostop) { 2760 bgep->link_up_msg = bgep->link_down_msg = " (stopped)"; 2761 bge_chip_stop(bgep, B_FALSE); 2762 bgep->bge_mac_state = BGE_MAC_STOPPED; 2763 bgep->asf_pseudostop = B_FALSE; 2764 } 2765 2766 asf_mode = ASF_MODE_POST_SHUTDOWN; 2767 2768 if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) 2769 ddi_fm_service_impact(bgep->devinfo, 2770 DDI_SERVICE_UNAFFECTED); 2771 if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) 2772 ddi_fm_service_impact(bgep->devinfo, 2773 DDI_SERVICE_UNAFFECTED); 2774 } 2775 mutex_exit(bgep->genlock); 2776 #endif 2777 2778 /* 2779 * Unregister from the GLD subsystem. This can fail, in 2780 * particular if there are DLPI style-2 streams still open - 2781 * in which case we just return failure without shutting 2782 * down chip operations. 2783 */ 2784 if (mac_unregister(bgep->mh) != 0) 2785 return (DDI_FAILURE); 2786 2787 /* 2788 * All activity stopped, so we can clean up & exit 2789 */ 2790 #ifdef BGE_IPMI_ASF 2791 bge_unattach(bgep, asf_mode); 2792 #else 2793 bge_unattach(bgep); 2794 #endif 2795 return (DDI_SUCCESS); 2796 } 2797 2798 2799 /* 2800 * ========== Module Loading Data & Entry Points ========== 2801 */ 2802 2803 #undef BGE_DBG 2804 #define BGE_DBG BGE_DBG_INIT /* debug flag for this code */ 2805 2806 DDI_DEFINE_STREAM_OPS(bge_dev_ops, nulldev, nulldev, bge_attach, bge_detach, 2807 nodev, NULL, D_MP, NULL); 2808 2809 static struct modldrv bge_modldrv = { 2810 &mod_driverops, /* Type of module. This one is a driver */ 2811 bge_ident, /* short description */ 2812 &bge_dev_ops /* driver specific ops */ 2813 }; 2814 2815 static struct modlinkage modlinkage = { 2816 MODREV_1, (void *)&bge_modldrv, NULL 2817 }; 2818 2819 2820 int 2821 _info(struct modinfo *modinfop) 2822 { 2823 return (mod_info(&modlinkage, modinfop)); 2824 } 2825 2826 int 2827 _init(void) 2828 { 2829 int status; 2830 2831 mac_init_ops(&bge_dev_ops, "bge"); 2832 status = mod_install(&modlinkage); 2833 if (status == DDI_SUCCESS) 2834 mutex_init(bge_log_mutex, NULL, MUTEX_DRIVER, NULL); 2835 else 2836 mac_fini_ops(&bge_dev_ops); 2837 return (status); 2838 } 2839 2840 int 2841 _fini(void) 2842 { 2843 int status; 2844 2845 status = mod_remove(&modlinkage); 2846 if (status == DDI_SUCCESS) { 2847 mac_fini_ops(&bge_dev_ops); 2848 mutex_destroy(bge_log_mutex); 2849 } 2850 return (status); 2851 } 2852 2853 2854 /* 2855 * bge_add_intrs: 2856 * 2857 * Register FIXED or MSI interrupts. 2858 */ 2859 static int 2860 bge_add_intrs(bge_t *bgep, int intr_type) 2861 { 2862 dev_info_t *dip = bgep->devinfo; 2863 int avail, actual, intr_size, count = 0; 2864 int i, flag, ret; 2865 2866 BGE_DEBUG(("bge_add_intrs($%p, 0x%x)", (void *)bgep, intr_type)); 2867 2868 /* Get number of interrupts */ 2869 ret = ddi_intr_get_nintrs(dip, intr_type, &count); 2870 if ((ret != DDI_SUCCESS) || (count == 0)) { 2871 bge_error(bgep, "ddi_intr_get_nintrs() failure, ret: %d, " 2872 "count: %d", ret, count); 2873 2874 return (DDI_FAILURE); 2875 } 2876 2877 /* Get number of available interrupts */ 2878 ret = ddi_intr_get_navail(dip, intr_type, &avail); 2879 if ((ret != DDI_SUCCESS) || (avail == 0)) { 2880 bge_error(bgep, "ddi_intr_get_navail() failure, " 2881 "ret: %d, avail: %d\n", ret, avail); 2882 2883 return (DDI_FAILURE); 2884 } 2885 2886 if (avail < count) { 2887 BGE_DEBUG(("%s: nintrs() returned %d, navail returned %d", 2888 bgep->ifname, count, avail)); 2889 } 2890 2891 /* 2892 * BGE hardware generates only single MSI even though it claims 2893 * to support multiple MSIs. So, hard code MSI count value to 1. 2894 */ 2895 if (intr_type == DDI_INTR_TYPE_MSI) { 2896 count = 1; 2897 flag = DDI_INTR_ALLOC_STRICT; 2898 } else { 2899 flag = DDI_INTR_ALLOC_NORMAL; 2900 } 2901 2902 /* Allocate an array of interrupt handles */ 2903 intr_size = count * sizeof (ddi_intr_handle_t); 2904 bgep->htable = kmem_alloc(intr_size, KM_SLEEP); 2905 2906 /* Call ddi_intr_alloc() */ 2907 ret = ddi_intr_alloc(dip, bgep->htable, intr_type, 0, 2908 count, &actual, flag); 2909 2910 if ((ret != DDI_SUCCESS) || (actual == 0)) { 2911 bge_error(bgep, "ddi_intr_alloc() failed %d\n", ret); 2912 2913 kmem_free(bgep->htable, intr_size); 2914 return (DDI_FAILURE); 2915 } 2916 2917 if (actual < count) { 2918 BGE_DEBUG(("%s: Requested: %d, Received: %d", 2919 bgep->ifname, count, actual)); 2920 } 2921 2922 bgep->intr_cnt = actual; 2923 2924 /* 2925 * Get priority for first msi, assume remaining are all the same 2926 */ 2927 if ((ret = ddi_intr_get_pri(bgep->htable[0], &bgep->intr_pri)) != 2928 DDI_SUCCESS) { 2929 bge_error(bgep, "ddi_intr_get_pri() failed %d\n", ret); 2930 2931 /* Free already allocated intr */ 2932 for (i = 0; i < actual; i++) { 2933 (void) ddi_intr_free(bgep->htable[i]); 2934 } 2935 2936 kmem_free(bgep->htable, intr_size); 2937 return (DDI_FAILURE); 2938 } 2939 2940 /* Call ddi_intr_add_handler() */ 2941 for (i = 0; i < actual; i++) { 2942 if ((ret = ddi_intr_add_handler(bgep->htable[i], bge_intr, 2943 (caddr_t)bgep, (caddr_t)(uintptr_t)i)) != DDI_SUCCESS) { 2944 bge_error(bgep, "ddi_intr_add_handler() " 2945 "failed %d\n", ret); 2946 2947 /* Free already allocated intr */ 2948 for (i = 0; i < actual; i++) { 2949 (void) ddi_intr_free(bgep->htable[i]); 2950 } 2951 2952 kmem_free(bgep->htable, intr_size); 2953 return (DDI_FAILURE); 2954 } 2955 } 2956 2957 if ((ret = ddi_intr_get_cap(bgep->htable[0], &bgep->intr_cap)) 2958 != DDI_SUCCESS) { 2959 bge_error(bgep, "ddi_intr_get_cap() failed %d\n", ret); 2960 2961 for (i = 0; i < actual; i++) { 2962 (void) ddi_intr_remove_handler(bgep->htable[i]); 2963 (void) ddi_intr_free(bgep->htable[i]); 2964 } 2965 2966 kmem_free(bgep->htable, intr_size); 2967 return (DDI_FAILURE); 2968 } 2969 2970 return (DDI_SUCCESS); 2971 } 2972 2973 /* 2974 * bge_rem_intrs: 2975 * 2976 * Unregister FIXED or MSI interrupts 2977 */ 2978 static void 2979 bge_rem_intrs(bge_t *bgep) 2980 { 2981 int i; 2982 2983 BGE_DEBUG(("bge_rem_intrs($%p)", (void *)bgep)); 2984 2985 /* Call ddi_intr_remove_handler() */ 2986 for (i = 0; i < bgep->intr_cnt; i++) { 2987 (void) ddi_intr_remove_handler(bgep->htable[i]); 2988 (void) ddi_intr_free(bgep->htable[i]); 2989 } 2990 2991 kmem_free(bgep->htable, bgep->intr_cnt * sizeof (ddi_intr_handle_t)); 2992 } 2993 2994 2995 void 2996 bge_intr_enable(bge_t *bgep) 2997 { 2998 int i; 2999 3000 if (bgep->intr_cap & DDI_INTR_FLAG_BLOCK) { 3001 /* Call ddi_intr_block_enable() for MSI interrupts */ 3002 (void) ddi_intr_block_enable(bgep->htable, bgep->intr_cnt); 3003 } else { 3004 /* Call ddi_intr_enable for MSI or FIXED interrupts */ 3005 for (i = 0; i < bgep->intr_cnt; i++) { 3006 (void) ddi_intr_enable(bgep->htable[i]); 3007 } 3008 } 3009 } 3010 3011 3012 void 3013 bge_intr_disable(bge_t *bgep) 3014 { 3015 int i; 3016 3017 if (bgep->intr_cap & DDI_INTR_FLAG_BLOCK) { 3018 /* Call ddi_intr_block_disable() */ 3019 (void) ddi_intr_block_disable(bgep->htable, bgep->intr_cnt); 3020 } else { 3021 for (i = 0; i < bgep->intr_cnt; i++) { 3022 (void) ddi_intr_disable(bgep->htable[i]); 3023 } 3024 } 3025 } 3026