1*f808c858Sraf# 2*f808c858Sraf# CDDL HEADER START 3*f808c858Sraf# 4*f808c858Sraf# The contents of this file are subject to the terms of the 5*f808c858Sraf# Common Development and Distribution License (the "License"). 6*f808c858Sraf# You may not use this file except in compliance with the License. 7*f808c858Sraf# 8*f808c858Sraf# You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9*f808c858Sraf# or http://www.opensolaris.org/os/licensing. 10*f808c858Sraf# See the License for the specific language governing permissions 11*f808c858Sraf# and limitations under the License. 12*f808c858Sraf# 13*f808c858Sraf# When distributing Covered Code, include this CDDL HEADER in each 14*f808c858Sraf# file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15*f808c858Sraf# If applicable, add the following below this CDDL HEADER, with the 16*f808c858Sraf# fields enclosed by brackets "[]" replaced with your own identifying 17*f808c858Sraf# information: Portions Copyright [yyyy] [name of copyright owner] 18*f808c858Sraf# 19*f808c858Sraf# CDDL HEADER END 20*f808c858Sraf# 21*f808c858Sraf# 22*f808c858Sraf# Copyright 2006 Sun Microsystems, Inc. All rights reserved. 23*f808c858Sraf# Use is subject to license terms. 24*f808c858Sraf# 25*f808c858Sraf# ident "%Z%%M% %I% %E% SMI" 26*f808c858Sraf# 27*f808c858Sraf 28*f808c858SrafSUNWprivate_1.1 { 29*f808c858Sraf global: 30*f808c858Sraf rsm_create_localmemory_handle; 31*f808c858Sraf _rsm_create_localmemory_handle; 32*f808c858Sraf rsm_free_interconnect_topology; 33*f808c858Sraf _rsm_free_interconnect_topology; 34*f808c858Sraf rsm_free_localmemory_handle; 35*f808c858Sraf _rsm_free_localmemory_handle; 36*f808c858Sraf rsm_get_controller; 37*f808c858Sraf _rsm_get_controller; 38*f808c858Sraf rsm_get_controller_attr; 39*f808c858Sraf _rsm_get_controller_attr; 40*f808c858Sraf rsm_get_interconnect_topology; 41*f808c858Sraf _rsm_get_interconnect_topology; 42*f808c858Sraf rsm_get_segmentid_range; 43*f808c858Sraf _rsm_get_segmentid_range; 44*f808c858Sraf rsm_intr_signal_post; 45*f808c858Sraf _rsm_intr_signal_post; 46*f808c858Sraf rsm_intr_signal_wait; 47*f808c858Sraf _rsm_intr_signal_wait; 48*f808c858Sraf rsm_intr_signal_wait_pollfd; 49*f808c858Sraf _rsm_intr_signal_wait_pollfd; 50*f808c858Sraf rsm_memseg_export_create; 51*f808c858Sraf _rsm_memseg_export_create; 52*f808c858Sraf rsm_memseg_export_destroy; 53*f808c858Sraf _rsm_memseg_export_destroy; 54*f808c858Sraf rsm_memseg_export_publish; 55*f808c858Sraf _rsm_memseg_export_publish; 56*f808c858Sraf rsm_memseg_export_rebind; 57*f808c858Sraf _rsm_memseg_export_rebind; 58*f808c858Sraf rsm_memseg_export_republish; 59*f808c858Sraf _rsm_memseg_export_republish; 60*f808c858Sraf rsm_memseg_export_unpublish; 61*f808c858Sraf _rsm_memseg_export_unpublish; 62*f808c858Sraf rsm_memseg_get_pollfd; 63*f808c858Sraf _rsm_memseg_get_pollfd; 64*f808c858Sraf rsm_memseg_import_close_barrier; 65*f808c858Sraf _rsm_memseg_import_close_barrier; 66*f808c858Sraf rsm_memseg_import_connect; 67*f808c858Sraf _rsm_memseg_import_connect; 68*f808c858Sraf rsm_memseg_import_destroy_barrier; 69*f808c858Sraf _rsm_memseg_import_destroy_barrier; 70*f808c858Sraf rsm_memseg_import_disconnect; 71*f808c858Sraf _rsm_memseg_import_disconnect; 72*f808c858Sraf rsm_memseg_import_get; 73*f808c858Sraf _rsm_memseg_import_get; 74*f808c858Sraf rsm_memseg_import_get16; 75*f808c858Sraf _rsm_memseg_import_get16; 76*f808c858Sraf rsm_memseg_import_get32; 77*f808c858Sraf _rsm_memseg_import_get32; 78*f808c858Sraf rsm_memseg_import_get64; 79*f808c858Sraf _rsm_memseg_import_get64; 80*f808c858Sraf rsm_memseg_import_get8; 81*f808c858Sraf _rsm_memseg_import_get8; 82*f808c858Sraf rsm_memseg_import_get_mode; 83*f808c858Sraf _rsm_memseg_import_get_mode; 84*f808c858Sraf rsm_memseg_import_getv; 85*f808c858Sraf _rsm_memseg_import_getv; 86*f808c858Sraf rsm_memseg_import_init_barrier; 87*f808c858Sraf _rsm_memseg_import_init_barrier; 88*f808c858Sraf rsm_memseg_import_map; 89*f808c858Sraf _rsm_memseg_import_map; 90*f808c858Sraf rsm_memseg_import_open_barrier; 91*f808c858Sraf _rsm_memseg_import_open_barrier; 92*f808c858Sraf rsm_memseg_import_order_barrier; 93*f808c858Sraf _rsm_memseg_import_order_barrier; 94*f808c858Sraf rsm_memseg_import_put; 95*f808c858Sraf _rsm_memseg_import_put; 96*f808c858Sraf rsm_memseg_import_put16; 97*f808c858Sraf _rsm_memseg_import_put16; 98*f808c858Sraf rsm_memseg_import_put32; 99*f808c858Sraf _rsm_memseg_import_put32; 100*f808c858Sraf rsm_memseg_import_put64; 101*f808c858Sraf _rsm_memseg_import_put64; 102*f808c858Sraf rsm_memseg_import_put8; 103*f808c858Sraf _rsm_memseg_import_put8; 104*f808c858Sraf rsm_memseg_import_putv; 105*f808c858Sraf _rsm_memseg_import_putv; 106*f808c858Sraf rsm_memseg_import_set_mode; 107*f808c858Sraf _rsm_memseg_import_set_mode; 108*f808c858Sraf rsm_memseg_import_unmap; 109*f808c858Sraf _rsm_memseg_import_unmap; 110*f808c858Sraf rsm_memseg_release_pollfd; 111*f808c858Sraf _rsm_memseg_release_pollfd; 112*f808c858Sraf rsm_release_controller; 113*f808c858Sraf _rsm_release_controller; 114*f808c858Sraf local: 115*f808c858Sraf *; 116*f808c858Sraf}; 117