xref: /titanic_44/usr/src/uts/sun4v/os/mach_cpu_states.c (revision 1a7c1b724419d3cb5fa6eea75123c6b2060ba31b)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License, Version 1.0 only
6  * (the "License").  You may not use this file except in compliance
7  * with the License.
8  *
9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10  * or http://www.opensolaris.org/os/licensing.
11  * See the License for the specific language governing permissions
12  * and limitations under the License.
13  *
14  * When distributing Covered Code, include this CDDL HEADER in each
15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16  * If applicable, add the following below this CDDL HEADER, with the
17  * fields enclosed by brackets "[]" replaced with your own identifying
18  * information: Portions Copyright [yyyy] [name of copyright owner]
19  *
20  * CDDL HEADER END
21  */
22 /*
23  * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #pragma ident	"%Z%%M%	%I%	%E% SMI"
28 
29 #include <sys/types.h>
30 #include <sys/systm.h>
31 #include <sys/archsystm.h>
32 #include <sys/t_lock.h>
33 #include <sys/uadmin.h>
34 #include <sys/panic.h>
35 #include <sys/reboot.h>
36 #include <sys/autoconf.h>
37 #include <sys/machsystm.h>
38 #include <sys/promif.h>
39 #include <sys/membar.h>
40 #include <vm/hat_sfmmu.h>
41 #include <sys/cpu_module.h>
42 #include <sys/cpu_sgnblk_defs.h>
43 #include <sys/intreg.h>
44 #include <sys/consdev.h>
45 #include <sys/kdi_impl.h>
46 #include <sys/hypervisor_api.h>
47 #include <sys/vmsystm.h>
48 #include <sys/dtrace.h>
49 #include <sys/xc_impl.h>
50 #include <sys/callb.h>
51 
52 /*
53  * hvdump_buf_va is a pointer to the currently-configured hvdump_buf.
54  * A value of NULL indicates that this area is not configured.
55  * hvdump_buf_sz is tunable but will be clamped to HVDUMP_SIZE_MAX.
56  */
57 
58 caddr_t hvdump_buf_va;
59 uint64_t hvdump_buf_sz = HVDUMP_SIZE_DEFAULT;
60 static uint64_t hvdump_buf_pa;
61 
62 
63 #ifdef	TRAPTRACE
64 #include <sys/traptrace.h>
65 #include <sys/hypervisor_api.h>
66 u_longlong_t panic_tick;
67 #endif /* TRAPTRACE */
68 
69 extern u_longlong_t	gettick();
70 static void reboot_machine(char *);
71 static void update_hvdump_buffer(void);
72 
73 /*
74  * For xt_sync synchronization.
75  */
76 extern uint64_t xc_tick_limit;
77 extern uint64_t xc_tick_jump_limit;
78 
79 /*
80  * We keep our own copies, used for cache flushing, because we can be called
81  * before cpu_fiximpl().
82  */
83 static int kdi_dcache_size;
84 static int kdi_dcache_linesize;
85 static int kdi_icache_size;
86 static int kdi_icache_linesize;
87 
88 /*
89  * Assembly support for generic modules in sun4v/ml/mach_xc.s
90  */
91 extern void init_mondo_nocheck(xcfunc_t *func, uint64_t arg1, uint64_t arg2);
92 extern void kdi_flush_idcache(int, int, int, int);
93 extern uint64_t get_cpuaddr(uint64_t, uint64_t);
94 
95 /*
96  * Machine dependent code to reboot.
97  * "mdep" is interpreted as a character pointer; if non-null, it is a pointer
98  * to a string to be used as the argument string when rebooting.
99  *
100  * "invoke_cb" is a boolean. It is set to true when mdboot() can safely
101  * invoke CB_CL_MDBOOT callbacks before shutting the system down, i.e. when
102  * we are in a normal shutdown sequence (interrupts are not blocked, the
103  * system is not panic'ing or being suspended).
104  */
105 /*ARGSUSED*/
106 void
107 mdboot(int cmd, int fcn, char *bootstr, boolean_t invoke_cb)
108 {
109 	page_t *first, *pp;
110 	extern void pm_cfb_check_and_powerup(void);
111 
112 	/*
113 	 * Clear any unresolved UEs from memory.  We rely on the fact that on
114 	 * sun4u, pagezero() will always clear UEs.  Since we're rebooting, we
115 	 * just force p_selock to appear locked so pagezero()'s assert works.
116 	 *
117 	 * Pages that were retired successfully due to multiple CEs will
118 	 * also be cleared.
119 	 */
120 	if (memsegs != NULL) {
121 		pp = first = page_first();
122 		do {
123 			if (page_isretired(pp) || page_istoxic(pp)) {
124 				/* pagezero asserts PAGE_LOCKED */
125 				pp->p_selock = -1;
126 				pagezero(pp, 0, PAGESIZE);
127 			}
128 		} while ((pp = page_next(pp)) != first);
129 	}
130 
131 	/*
132 	 * XXX - rconsvp is set to NULL to ensure that output messages
133 	 * are sent to the underlying "hardware" device using the
134 	 * monitor's printf routine since we are in the process of
135 	 * either rebooting or halting the machine.
136 	 */
137 	rconsvp = NULL;
138 
139 	/*
140 	 * At a high interrupt level we can't:
141 	 *	1) bring up the console
142 	 * or
143 	 *	2) wait for pending interrupts prior to redistribution
144 	 *	   to the current CPU
145 	 *
146 	 * so we do them now.
147 	 */
148 	pm_cfb_check_and_powerup();
149 
150 	/* make sure there are no more changes to the device tree */
151 	devtree_freeze();
152 
153 	if (invoke_cb)
154 		(void) callb_execute_class(CB_CL_MDBOOT, NULL);
155 
156 	/*
157 	 * stop other cpus which also raise our priority. since there is only
158 	 * one active cpu after this, and our priority will be too high
159 	 * for us to be preempted, we're essentially single threaded
160 	 * from here on out.
161 	 */
162 	stop_other_cpus();
163 
164 	/*
165 	 * try and reset leaf devices.  reset_leaves() should only
166 	 * be called when there are no other threads that could be
167 	 * accessing devices
168 	 */
169 	reset_leaves();
170 
171 	if (fcn == AD_HALT) {
172 		halt((char *)NULL);
173 	} else if (fcn == AD_POWEROFF) {
174 		power_down(NULL);
175 	} else {
176 		if (bootstr == NULL) {
177 			switch (fcn) {
178 
179 			case AD_BOOT:
180 				bootstr = "";
181 				break;
182 
183 			case AD_IBOOT:
184 				bootstr = "-a";
185 				break;
186 
187 			case AD_SBOOT:
188 				bootstr = "-s";
189 				break;
190 
191 			case AD_SIBOOT:
192 				bootstr = "-sa";
193 				break;
194 			default:
195 				cmn_err(CE_WARN,
196 				    "mdboot: invalid function %d", fcn);
197 				bootstr = "";
198 				break;
199 			}
200 		}
201 		reboot_machine(bootstr);
202 	}
203 	/* MAYBE REACHED */
204 }
205 
206 /* mdpreboot - may be called prior to mdboot while root fs still mounted */
207 /*ARGSUSED*/
208 void
209 mdpreboot(int cmd, int fcn, char *bootstr)
210 {
211 }
212 
213 /*
214  * Halt the machine and then reboot with the device
215  * and arguments specified in bootstr.
216  */
217 static void
218 reboot_machine(char *bootstr)
219 {
220 	flush_windows();
221 	stop_other_cpus();		/* send stop signal to other CPUs */
222 	prom_printf("rebooting...\n");
223 	/*
224 	 * For platforms that use CPU signatures, we
225 	 * need to set the signature block to OS and
226 	 * the state to exiting for all the processors.
227 	 */
228 	CPU_SIGNATURE(OS_SIG, SIGST_EXIT, SIGSUBST_REBOOT, -1);
229 	prom_reboot(bootstr);
230 	/*NOTREACHED*/
231 }
232 
233 /*
234  * We use the x-trap mechanism and idle_stop_xcall() to stop the other CPUs.
235  * Once in panic_idle() they raise spl, record their location, and spin.
236  */
237 static void
238 panic_idle(void)
239 {
240 	(void) spl7();
241 
242 	debug_flush_windows();
243 	(void) setjmp(&curthread->t_pcb);
244 
245 	CPU->cpu_m.in_prom = 1;
246 	membar_stld();
247 
248 	for (;;);
249 }
250 
251 /*
252  * Force the other CPUs to trap into panic_idle(), and then remove them
253  * from the cpu_ready_set so they will no longer receive cross-calls.
254  */
255 /*ARGSUSED*/
256 void
257 panic_stopcpus(cpu_t *cp, kthread_t *t, int spl)
258 {
259 	cpuset_t cps;
260 	int i;
261 
262 	(void) splzs();
263 	CPUSET_ALL_BUT(cps, cp->cpu_id);
264 	xt_some(cps, (xcfunc_t *)idle_stop_xcall, (uint64_t)&panic_idle, NULL);
265 
266 	for (i = 0; i < NCPU; i++) {
267 		if (i != cp->cpu_id && CPU_XCALL_READY(i)) {
268 			int ntries = 0x10000;
269 
270 			while (!cpu[i]->cpu_m.in_prom && ntries) {
271 				DELAY(50);
272 				ntries--;
273 			}
274 
275 			if (!cpu[i]->cpu_m.in_prom)
276 				printf("panic: failed to stop cpu%d\n", i);
277 
278 			cpu[i]->cpu_flags &= ~CPU_READY;
279 			cpu[i]->cpu_flags |= CPU_QUIESCED;
280 			CPUSET_DEL(cpu_ready_set, cpu[i]->cpu_id);
281 		}
282 	}
283 }
284 
285 /*
286  * Platform callback following each entry to panicsys().  If we've panicked at
287  * level 14, we examine t_panic_trap to see if a fatal trap occurred.  If so,
288  * we disable further %tick_cmpr interrupts.  If not, an explicit call to panic
289  * was made and so we re-enqueue an interrupt request structure to allow
290  * further level 14 interrupts to be processed once we lower PIL.  This allows
291  * us to handle panics from the deadman() CY_HIGH_LEVEL cyclic.
292  */
293 void
294 panic_enter_hw(int spl)
295 {
296 	if (spl == ipltospl(PIL_14)) {
297 		uint_t opstate = disable_vec_intr();
298 
299 		if (curthread->t_panic_trap != NULL) {
300 			tickcmpr_disable();
301 			intr_dequeue_req(PIL_14, cbe_level14_inum);
302 		} else {
303 			if (!tickcmpr_disabled())
304 				intr_enqueue_req(PIL_14, cbe_level14_inum);
305 			/*
306 			 * Clear SOFTINT<14>, SOFTINT<0> (TICK_INT)
307 			 * and SOFTINT<16> (STICK_INT) to indicate
308 			 * that the current level 14 has been serviced.
309 			 */
310 			wr_clr_softint((1 << PIL_14) |
311 				TICK_INT_MASK | STICK_INT_MASK);
312 		}
313 
314 		enable_vec_intr(opstate);
315 	}
316 }
317 
318 /*
319  * Miscellaneous hardware-specific code to execute after panicstr is set
320  * by the panic code: we also print and record PTL1 panic information here.
321  */
322 /*ARGSUSED*/
323 void
324 panic_quiesce_hw(panic_data_t *pdp)
325 {
326 	extern uint_t getpstate(void);
327 	extern void setpstate(uint_t);
328 
329 #ifdef TRAPTRACE
330 	uint64_t prev_freeze;
331 	/*
332 	 * Turn off TRAPTRACE and save the current %tick value in panic_tick.
333 	 */
334 	if (!panic_tick)
335 		panic_tick = gettick();
336 	/*  there are no possible error codes for this hcall */
337 	(void) hv_ttrace_freeze((uint64_t)TRAP_TFREEZE_ALL, &prev_freeze);
338 	TRAPTRACE_FREEZE;
339 #endif
340 	/*
341 	 * For Platforms that use CPU signatures, we
342 	 * need to set the signature block to OS, the state to
343 	 * exiting, and the substate to panic for all the processors.
344 	 */
345 	CPU_SIGNATURE(OS_SIG, SIGST_EXIT, SIGSUBST_PANIC, -1);
346 
347 	update_hvdump_buffer();
348 
349 	/*
350 	 * Disable further ECC errors from the bus nexus.
351 	 */
352 	(void) bus_func_invoke(BF_TYPE_ERRDIS);
353 
354 	/*
355 	 * Redirect all interrupts to the current CPU.
356 	 */
357 	intr_redist_all_cpus_shutdown();
358 
359 	/*
360 	 * This call exists solely to support dumps to network
361 	 * devices after sync from OBP.
362 	 *
363 	 * If we came here via the sync callback, then on some
364 	 * platforms, interrupts may have arrived while we were
365 	 * stopped in OBP.  OBP will arrange for those interrupts to
366 	 * be redelivered if you say "go", but not if you invoke a
367 	 * client callback like 'sync'.	 For some dump devices
368 	 * (network swap devices), we need interrupts to be
369 	 * delivered in order to dump, so we have to call the bus
370 	 * nexus driver to reset the interrupt state machines.
371 	 */
372 	(void) bus_func_invoke(BF_TYPE_RESINTR);
373 
374 	setpstate(getpstate() | PSTATE_IE);
375 }
376 
377 /*
378  * Platforms that use CPU signatures need to set the signature block to OS and
379  * the state to exiting for all CPUs. PANIC_CONT indicates that we're about to
380  * write the crash dump, which tells the SSP/SMS to begin a timeout routine to
381  * reboot the machine if the dump never completes.
382  */
383 /*ARGSUSED*/
384 void
385 panic_dump_hw(int spl)
386 {
387 	CPU_SIGNATURE(OS_SIG, SIGST_EXIT, SIGSUBST_DUMP, -1);
388 }
389 
390 /*
391  * for ptl1_panic
392  */
393 void
394 ptl1_init_cpu(struct cpu *cpu)
395 {
396 	ptl1_state_t *pstate = &cpu->cpu_m.ptl1_state;
397 
398 	/*CONSTCOND*/
399 	if (sizeof (struct cpu) + PTL1_SSIZE > CPU_ALLOC_SIZE) {
400 		panic("ptl1_init_cpu: not enough space left for ptl1_panic "
401 		    "stack, sizeof (struct cpu) = %d", sizeof (struct cpu));
402 	}
403 
404 	pstate->ptl1_stktop = (uintptr_t)cpu + CPU_ALLOC_SIZE;
405 	cpu_pa[cpu->cpu_id] = va_to_pa(cpu);
406 }
407 
408 void
409 ptl1_panic_handler(ptl1_state_t *pstate)
410 {
411 	static const char *ptl1_reasons[] = {
412 #ifdef	PTL1_PANIC_DEBUG
413 		"trap for debug purpose",	/* PTL1_BAD_DEBUG */
414 #else
415 		"unknown trap",			/* PTL1_BAD_DEBUG */
416 #endif
417 		"register window trap",		/* PTL1_BAD_WTRAP */
418 		"kernel MMU miss",		/* PTL1_BAD_KMISS */
419 		"kernel protection fault",	/* PTL1_BAD_KPROT_FAULT */
420 		"ISM MMU miss",			/* PTL1_BAD_ISM */
421 		"kernel MMU trap",		/* PTL1_BAD_MMUTRAP */
422 		"kernel trap handler state",	/* PTL1_BAD_TRAP */
423 		"floating point trap",		/* PTL1_BAD_FPTRAP */
424 #ifdef	DEBUG
425 		"pointer to intr_req",		/* PTL1_BAD_INTR_REQ */
426 #else
427 		"unknown trap",			/* PTL1_BAD_INTR_REQ */
428 #endif
429 #ifdef	TRAPTRACE
430 		"TRACE_PTR state",		/* PTL1_BAD_TRACE_PTR */
431 #else
432 		"unknown trap",			/* PTL1_BAD_TRACE_PTR */
433 #endif
434 		"stack overflow",		/* PTL1_BAD_STACK */
435 		"DTrace flags",			/* PTL1_BAD_DTRACE_FLAGS */
436 		"attempt to steal locked ctx",  /* PTL1_BAD_CTX_STEAL */
437 		"CPU ECC error loop",		/* PTL1_BAD_ECC */
438 		"unexpected error from hypervisor call", /* PTL1_BAD_HCALL */
439 	};
440 
441 	uint_t reason = pstate->ptl1_regs.ptl1_g1;
442 	uint_t tl = pstate->ptl1_regs.ptl1_trap_regs[0].ptl1_tl;
443 	struct trap_info ti = { 0 };
444 
445 	/*
446 	 * Use trap_info for a place holder to call panic_savetrap() and
447 	 * panic_showtrap() to save and print out ptl1_panic information.
448 	 */
449 	if (curthread->t_panic_trap == NULL)
450 		curthread->t_panic_trap = &ti;
451 
452 	if (reason < sizeof (ptl1_reasons) / sizeof (ptl1_reasons[0]))
453 		panic("bad %s at TL %u", ptl1_reasons[reason], tl);
454 	else
455 		panic("ptl1_panic reason 0x%x at TL %u", reason, tl);
456 }
457 
458 void
459 clear_watchdog_on_exit(void)
460 {
461 }
462 
463 void
464 clear_watchdog_timer(void)
465 {
466 }
467 
468 int
469 kdi_watchdog_disable(void)
470 {
471 	return (0);	/* sun4v has no watchdog */
472 }
473 
474 void
475 kdi_watchdog_restore(void)
476 {
477 	/* nothing to do -- no watchdog to re-enable */
478 }
479 
480 void
481 mach_dump_buffer_init(void)
482 {
483 	uint64_t  ret, minsize = 0;
484 
485 	if (hvdump_buf_sz > HVDUMP_SIZE_MAX)
486 		hvdump_buf_sz = HVDUMP_SIZE_MAX;
487 
488 	hvdump_buf_va = contig_mem_alloc(hvdump_buf_sz);
489 	if (hvdump_buf_va == NULL)
490 		return;
491 
492 	hvdump_buf_pa = va_to_pa(hvdump_buf_va);
493 
494 	ret = hv_dump_buf_update(hvdump_buf_pa, hvdump_buf_sz,
495 	    &minsize);
496 
497 	if (ret != H_EOK) {
498 		contig_mem_free(hvdump_buf_va, hvdump_buf_sz);
499 		hvdump_buf_va = NULL;
500 		cmn_err(CE_NOTE, "!Error in setting up hvstate"
501 		    "dump buffer. Error = 0x%lx, size = 0x%lx,"
502 		    "buf_pa = 0x%lx", ret, hvdump_buf_sz,
503 		    hvdump_buf_pa);
504 
505 		if (ret == H_EINVAL) {
506 			cmn_err(CE_NOTE, "!Buffer size too small."
507 			    "Available buffer size = 0x%lx,"
508 			    "Minimum buffer size required = 0x%lx",
509 			    hvdump_buf_sz, minsize);
510 		}
511 	}
512 }
513 
514 
515 static void
516 update_hvdump_buffer(void)
517 {
518 	uint64_t ret, dummy_val;
519 
520 	if (hvdump_buf_va == NULL)
521 		return;
522 
523 	ret = hv_dump_buf_update(hvdump_buf_pa, hvdump_buf_sz,
524 	    &dummy_val);
525 	if (ret != H_EOK) {
526 		cmn_err(CE_NOTE, "!Cannot update hvstate dump"
527 		    "buffer. Error = 0x%lx", ret);
528 	}
529 }
530 
531 
532 static int
533 getintprop(dnode_t node, char *name, int deflt)
534 {
535 	int	value;
536 
537 	switch (prom_getproplen(node, name)) {
538 	case 0:
539 		value = 1;	/* boolean properties */
540 		break;
541 
542 	case sizeof (int):
543 		(void) prom_getprop(node, name, (caddr_t)&value);
544 		break;
545 
546 	default:
547 		value = deflt;
548 		break;
549 	}
550 
551 	return (value);
552 }
553 
554 /*
555  * Called by setcpudelay
556  */
557 void
558 cpu_init_tick_freq(void)
559 {
560 	sys_tick_freq = cpunodes[CPU->cpu_id].clock_freq;
561 }
562 
563 int shipit(int n, uint64_t cpu_list_ra);
564 extern uint64_t xc_tick_limit;
565 extern uint64_t xc_tick_jump_limit;
566 
567 #ifdef DEBUG
568 #define	SEND_MONDO_STATS	1
569 #endif
570 
571 #ifdef SEND_MONDO_STATS
572 uint32_t x_one_stimes[64];
573 uint32_t x_one_ltimes[16];
574 uint32_t x_set_stimes[64];
575 uint32_t x_set_ltimes[16];
576 uint32_t x_set_cpus[NCPU];
577 #endif
578 
579 void
580 send_one_mondo(int cpuid)
581 {
582 	int retries, stat;
583 	uint64_t starttick, endtick, tick, lasttick;
584 	struct machcpu	*mcpup = &(CPU->cpu_m);
585 
586 	CPU_STATS_ADDQ(CPU, sys, xcalls, 1);
587 	starttick = lasttick = gettick();
588 	mcpup->cpu_list[0] = (uint16_t)cpuid;
589 	stat = shipit(1, mcpup->cpu_list_ra);
590 	endtick = starttick + xc_tick_limit;
591 	retries = 0;
592 	while (stat != 0) {
593 		ASSERT(stat == H_EWOULDBLOCK);
594 		tick = gettick();
595 		/*
596 		 * If there is a big jump between the current tick
597 		 * count and lasttick, we have probably hit a break
598 		 * point.  Adjust endtick accordingly to avoid panic.
599 		 */
600 		if (tick > (lasttick + xc_tick_jump_limit))
601 			endtick += (tick - lasttick);
602 		lasttick = tick;
603 		if (tick > endtick) {
604 			if (panic_quiesce)
605 				return;
606 			cmn_err(CE_PANIC, "send mondo timeout "
607 			    "(target 0x%x) [retries: 0x%x hvstat: 0x%x]",
608 			    cpuid, retries, stat);
609 		}
610 		drv_usecwait(1);
611 		stat = shipit(1, mcpup->cpu_list_ra);
612 		retries++;
613 	}
614 #ifdef SEND_MONDO_STATS
615 	{
616 		int n = gettick() - starttick;
617 		if (n < 8192)
618 			x_one_stimes[n >> 7]++;
619 		else if (n < 16*8192)
620 			x_one_ltimes[(n >> 13) & 0xf]++;
621 		else
622 			x_one_ltimes[0xf]++;
623 	}
624 #endif
625 }
626 
627 void
628 send_mondo_set(cpuset_t set)
629 {
630 	uint64_t starttick, endtick, tick, lasttick;
631 	int i, retries, stat, fcpuid, lcpuid;
632 	int ncpuids = 0;
633 	int shipped = 0;
634 	struct machcpu	*mcpup = &(CPU->cpu_m);
635 
636 	ASSERT(!CPUSET_ISNULL(set));
637 	starttick = lasttick = gettick();
638 	endtick = starttick + xc_tick_limit;
639 
640 	fcpuid = -1;
641 	for (i = 0; i < NCPU; i++) {
642 		if (CPU_IN_SET(set, i)) {
643 			ncpuids++;
644 			mcpup->cpu_list[0] = (uint16_t)i;
645 			stat = shipit(1, mcpup->cpu_list_ra);
646 			if (stat != 0) {
647 				ASSERT(stat == H_EWOULDBLOCK);
648 				if (fcpuid < 0)
649 					fcpuid = i;
650 				lcpuid = i;
651 				continue;
652 			}
653 			shipped++;
654 			CPUSET_DEL(set, i);
655 			if (CPUSET_ISNULL(set))
656 				break;
657 		}
658 	}
659 
660 	retries = 0;
661 	while (shipped < ncpuids) {
662 		ASSERT(fcpuid >= 0 && fcpuid <= lcpuid && lcpuid < NCPU);
663 		tick = gettick();
664 		/*
665 		 * If there is a big jump between the current tick
666 		 * count and lasttick, we have probably hit a break
667 		 * point.  Adjust endtick accordingly to avoid panic.
668 		 */
669 		if (tick > (lasttick + xc_tick_jump_limit))
670 			endtick += (tick - lasttick);
671 		lasttick = tick;
672 		if (tick > endtick) {
673 			if (panic_quiesce)
674 				return;
675 			cmn_err(CE_CONT, "send mondo timeout "
676 			    "[retries: 0x%x]  cpuids: ", retries);
677 			for (i = fcpuid; i <= lcpuid; i++) {
678 				if (CPU_IN_SET(set, i))
679 					cmn_err(CE_CONT, " 0x%x", i);
680 			}
681 			cmn_err(CE_CONT, "\n");
682 			cmn_err(CE_PANIC, "send_mondo_set: timeout");
683 		}
684 
685 		/* adjust fcpuid to the first CPU in set */
686 		for (; fcpuid <= lcpuid; fcpuid++)
687 			if (CPU_IN_SET(set, fcpuid))
688 				break;
689 
690 		/* adjust lcpuid to the last CPU in set */
691 		for (; lcpuid >= fcpuid; lcpuid--)
692 			if (CPU_IN_SET(set, lcpuid))
693 				break;
694 
695 		/* resend undelivered mondo */
696 		for (i = fcpuid; i <= lcpuid; i++) {
697 			if (CPU_IN_SET(set, i)) {
698 				mcpup->cpu_list[0] = (uint16_t)i;
699 				stat = shipit(1, mcpup->cpu_list_ra);
700 				if (stat != 0) {
701 					ASSERT(stat == H_EWOULDBLOCK);
702 					continue;
703 				}
704 				shipped++;
705 				CPUSET_DEL(set, i);
706 				if (shipped == ncpuids)
707 					break;
708 			}
709 		}
710 		if (shipped == ncpuids)
711 			break;
712 
713 		while (gettick() < (tick + sys_clock_mhz))
714 			;
715 		retries++;
716 	}
717 
718 #ifdef SEND_MONDO_STATS
719 	{
720 		int n = gettick() - starttick;
721 		if (n < 8192)
722 			x_set_stimes[n >> 7]++;
723 		else if (n < 16*8192)
724 			x_set_ltimes[(n >> 13) & 0xf]++;
725 		else
726 			x_set_ltimes[0xf]++;
727 	}
728 	x_set_cpus[shipped]++;
729 #endif
730 }
731 
732 void
733 syncfpu(void)
734 {
735 }
736 
737 void
738 cpu_flush_ecache(void)
739 {
740 }
741 
742 void
743 sticksync_slave(void)
744 {}
745 
746 void
747 sticksync_master(void)
748 {}
749 
750 void
751 cpu_init_cache_scrub(void)
752 {}
753 
754 int
755 dtrace_blksuword32_err(uintptr_t addr, uint32_t *data)
756 {
757 	int ret, watched;
758 
759 	watched = watch_disable_addr((void *)addr, 4, S_WRITE);
760 	ret = dtrace_blksuword32(addr, data, 0);
761 	if (watched)
762 		watch_enable_addr((void *)addr, 4, S_WRITE);
763 
764 	return (ret);
765 }
766 
767 int
768 dtrace_blksuword32(uintptr_t addr, uint32_t *data, int tryagain)
769 {
770 	if (suword32((void *)addr, *data) == -1)
771 		return (tryagain ? dtrace_blksuword32_err(addr, data) : -1);
772 	dtrace_flush_sec(addr);
773 
774 	return (0);
775 }
776 
777 /*ARGSUSED*/
778 void
779 cpu_faulted_enter(struct cpu *cp)
780 {
781 }
782 
783 /*ARGSUSED*/
784 void
785 cpu_faulted_exit(struct cpu *cp)
786 {
787 }
788 
789 static int
790 kdi_cpu_ready_iter(int (*cb)(int, void *), void *arg)
791 {
792 	int rc, i;
793 
794 	for (rc = 0, i = 0; i < NCPU; i++) {
795 		if (CPU_IN_SET(cpu_ready_set, i))
796 			rc += cb(i, arg);
797 	}
798 
799 	return (rc);
800 }
801 
802 /*
803  * Sends a cross-call to a specified processor.  The caller assumes
804  * responsibility for repetition of cross-calls, as appropriate (MARSA for
805  * debugging).
806  */
807 static int
808 kdi_xc_one(int cpuid, void (*func)(uintptr_t, uintptr_t), uintptr_t arg1,
809     uintptr_t arg2)
810 {
811 	int stat;
812 	struct machcpu	*mcpup;
813 	uint64_t cpuaddr_reg = 0, cpuaddr_scr = 0;
814 
815 	mcpup = &(((cpu_t *)get_cpuaddr(cpuaddr_reg, cpuaddr_scr))->cpu_m);
816 
817 	/*
818 	 * if (idsr_busy())
819 	 *	return (KDI_XC_RES_ERR);
820 	 */
821 
822 	init_mondo_nocheck((xcfunc_t *)func, arg1, arg2);
823 
824 	mcpup->cpu_list[0] = (uint16_t)cpuid;
825 	stat = shipit(1, mcpup->cpu_list_ra);
826 
827 	if (stat == 0)
828 		return (KDI_XC_RES_OK);
829 	else
830 		return (KDI_XC_RES_NACK);
831 }
832 
833 static void
834 kdi_tickwait(clock_t nticks)
835 {
836 	clock_t endtick = gettick() + nticks;
837 
838 	while (gettick() < endtick);
839 }
840 
841 static void
842 kdi_cpu_init(int dcache_size, int dcache_linesize, int icache_size,
843     int icache_linesize)
844 {
845 	kdi_dcache_size = dcache_size;
846 	kdi_dcache_linesize = dcache_linesize;
847 	kdi_icache_size = icache_size;
848 	kdi_icache_linesize = icache_linesize;
849 }
850 
851 /* used directly by kdi_read/write_phys */
852 void
853 kdi_flush_caches(void)
854 {
855 	/* Not required on sun4v architecture. */
856 }
857 
858 /*ARGSUSED*/
859 int
860 kdi_get_stick(uint64_t *stickp)
861 {
862 	return (-1);
863 }
864 
865 void
866 cpu_kdi_init(kdi_t *kdi)
867 {
868 	kdi->kdi_flush_caches = kdi_flush_caches;
869 	kdi->mkdi_cpu_init = kdi_cpu_init;
870 	kdi->mkdi_cpu_ready_iter = kdi_cpu_ready_iter;
871 	kdi->mkdi_xc_one = kdi_xc_one;
872 	kdi->mkdi_tickwait = kdi_tickwait;
873 	kdi->mkdi_get_stick = kdi_get_stick;
874 }
875 
876 /*
877  * Routine to return memory information associated
878  * with a physical address and syndrome.
879  */
880 /* ARGSUSED */
881 int
882 cpu_get_mem_info(uint64_t synd, uint64_t afar,
883     uint64_t *mem_sizep, uint64_t *seg_sizep, uint64_t *bank_sizep,
884     int *segsp, int *banksp, int *mcidp)
885 {
886 	return (ENOTSUP);
887 }
888 
889 /*
890  * This routine returns the size of the kernel's FRU name buffer.
891  */
892 size_t
893 cpu_get_name_bufsize()
894 {
895 	return (UNUM_NAMLEN);
896 }
897 
898 /*
899  * This routine is a more generic interface to cpu_get_mem_unum(),
900  * that may be used by other modules (e.g. mm).
901  */
902 /* ARGSUSED */
903 int
904 cpu_get_mem_name(uint64_t synd, uint64_t *afsr, uint64_t afar,
905     char *buf, int buflen, int *lenp)
906 {
907 	return (ENOTSUP);
908 }
909 
910 /*
911  * xt_sync - wait for previous x-traps to finish
912  */
913 void
914 xt_sync(cpuset_t cpuset)
915 {
916 	union {
917 		uint8_t volatile byte[NCPU];
918 		uint64_t volatile xword[NCPU / 8];
919 	} cpu_sync;
920 	uint64_t starttick, endtick, tick, lasttick;
921 	int i;
922 
923 	kpreempt_disable();
924 	CPUSET_DEL(cpuset, CPU->cpu_id);
925 	CPUSET_AND(cpuset, cpu_ready_set);
926 
927 	/*
928 	 * Sun4v uses a queue for receiving mondos. Successful
929 	 * transmission of a mondo only indicates that the mondo
930 	 * has been written into the queue.
931 	 *
932 	 * We use an array of bytes to let each cpu to signal back
933 	 * to the cross trap sender that the cross trap has been
934 	 * executed. Set the byte to 1 before sending the cross trap
935 	 * and wait until other cpus reset it to 0.
936 	 */
937 	bzero((void *)&cpu_sync, NCPU);
938 	for (i = 0; i < NCPU; i++)
939 		if (CPU_IN_SET(cpuset, i))
940 			cpu_sync.byte[i] = 1;
941 
942 	xt_some(cpuset, (xcfunc_t *)xt_sync_tl1,
943 	    (uint64_t)cpu_sync.byte, 0);
944 
945 	starttick = lasttick = gettick();
946 	endtick = starttick + xc_tick_limit;
947 
948 	for (i = 0; i < (NCPU / 8); i ++) {
949 		while (cpu_sync.xword[i] != 0) {
950 			tick = gettick();
951 			/*
952 			 * If there is a big jump between the current tick
953 			 * count and lasttick, we have probably hit a break
954 			 * point. Adjust endtick accordingly to avoid panic.
955 			 */
956 			if (tick > (lasttick + xc_tick_jump_limit)) {
957 				endtick += (tick - lasttick);
958 			}
959 			lasttick = tick;
960 			if (tick > endtick) {
961 				if (panic_quiesce)
962 					goto out;
963 				cmn_err(CE_CONT, "Cross trap sync timeout "
964 				    "at cpu_sync.xword[%d]: 0x%lx\n",
965 				    i, cpu_sync.xword[i]);
966 				cmn_err(CE_PANIC, "xt_sync: timeout");
967 			}
968 		}
969 	}
970 
971 out:
972 	kpreempt_enable();
973 }
974