1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #pragma ident "%Z%%M% %I% %E% SMI" 28 29 #include <sys/types.h> 30 #include <sys/systm.h> 31 #include <sys/archsystm.h> 32 #include <sys/t_lock.h> 33 #include <sys/uadmin.h> 34 #include <sys/panic.h> 35 #include <sys/reboot.h> 36 #include <sys/autoconf.h> 37 #include <sys/machsystm.h> 38 #include <sys/promif.h> 39 #include <sys/membar.h> 40 #include <vm/hat_sfmmu.h> 41 #include <sys/cpu_module.h> 42 #include <sys/cpu_sgnblk_defs.h> 43 #include <sys/intreg.h> 44 #include <sys/consdev.h> 45 #include <sys/kdi_impl.h> 46 #include <sys/hypervisor_api.h> 47 #include <sys/vmsystm.h> 48 #include <sys/dtrace.h> 49 #include <sys/xc_impl.h> 50 #include <sys/callb.h> 51 52 /* 53 * hvdump_buf_va is a pointer to the currently-configured hvdump_buf. 54 * A value of NULL indicates that this area is not configured. 55 * hvdump_buf_sz is tunable but will be clamped to HVDUMP_SIZE_MAX. 56 */ 57 58 caddr_t hvdump_buf_va; 59 uint64_t hvdump_buf_sz = HVDUMP_SIZE_DEFAULT; 60 static uint64_t hvdump_buf_pa; 61 62 63 #ifdef TRAPTRACE 64 #include <sys/traptrace.h> 65 #include <sys/hypervisor_api.h> 66 u_longlong_t panic_tick; 67 #endif /* TRAPTRACE */ 68 69 extern u_longlong_t gettick(); 70 static void reboot_machine(char *); 71 static void update_hvdump_buffer(void); 72 73 /* 74 * For xt_sync synchronization. 75 */ 76 extern uint64_t xc_tick_limit; 77 extern uint64_t xc_tick_jump_limit; 78 79 /* 80 * We keep our own copies, used for cache flushing, because we can be called 81 * before cpu_fiximpl(). 82 */ 83 static int kdi_dcache_size; 84 static int kdi_dcache_linesize; 85 static int kdi_icache_size; 86 static int kdi_icache_linesize; 87 88 /* 89 * Assembly support for generic modules in sun4v/ml/mach_xc.s 90 */ 91 extern void init_mondo_nocheck(xcfunc_t *func, uint64_t arg1, uint64_t arg2); 92 extern void kdi_flush_idcache(int, int, int, int); 93 extern uint64_t get_cpuaddr(uint64_t, uint64_t); 94 95 /* 96 * Machine dependent code to reboot. 97 * "mdep" is interpreted as a character pointer; if non-null, it is a pointer 98 * to a string to be used as the argument string when rebooting. 99 * 100 * "invoke_cb" is a boolean. It is set to true when mdboot() can safely 101 * invoke CB_CL_MDBOOT callbacks before shutting the system down, i.e. when 102 * we are in a normal shutdown sequence (interrupts are not blocked, the 103 * system is not panic'ing or being suspended). 104 */ 105 /*ARGSUSED*/ 106 void 107 mdboot(int cmd, int fcn, char *bootstr, boolean_t invoke_cb) 108 { 109 page_t *first, *pp; 110 extern void pm_cfb_check_and_powerup(void); 111 112 /* 113 * Clear any unresolved UEs from memory. We rely on the fact that on 114 * sun4u, pagezero() will always clear UEs. Since we're rebooting, we 115 * just force p_selock to appear locked so pagezero()'s assert works. 116 * 117 * Pages that were retired successfully due to multiple CEs will 118 * also be cleared. 119 */ 120 if (memsegs != NULL) { 121 pp = first = page_first(); 122 do { 123 if (page_isretired(pp) || page_istoxic(pp)) { 124 /* pagezero asserts PAGE_LOCKED */ 125 pp->p_selock = -1; 126 pagezero(pp, 0, PAGESIZE); 127 } 128 } while ((pp = page_next(pp)) != first); 129 } 130 131 /* 132 * XXX - rconsvp is set to NULL to ensure that output messages 133 * are sent to the underlying "hardware" device using the 134 * monitor's printf routine since we are in the process of 135 * either rebooting or halting the machine. 136 */ 137 rconsvp = NULL; 138 139 /* 140 * At a high interrupt level we can't: 141 * 1) bring up the console 142 * or 143 * 2) wait for pending interrupts prior to redistribution 144 * to the current CPU 145 * 146 * so we do them now. 147 */ 148 pm_cfb_check_and_powerup(); 149 150 /* make sure there are no more changes to the device tree */ 151 devtree_freeze(); 152 153 if (invoke_cb) 154 (void) callb_execute_class(CB_CL_MDBOOT, NULL); 155 156 /* 157 * stop other cpus which also raise our priority. since there is only 158 * one active cpu after this, and our priority will be too high 159 * for us to be preempted, we're essentially single threaded 160 * from here on out. 161 */ 162 stop_other_cpus(); 163 164 /* 165 * try and reset leaf devices. reset_leaves() should only 166 * be called when there are no other threads that could be 167 * accessing devices 168 */ 169 reset_leaves(); 170 171 if (fcn == AD_HALT) { 172 halt((char *)NULL); 173 } else if (fcn == AD_POWEROFF) { 174 power_down(NULL); 175 } else { 176 if (bootstr == NULL) { 177 switch (fcn) { 178 179 case AD_BOOT: 180 bootstr = ""; 181 break; 182 183 case AD_IBOOT: 184 bootstr = "-a"; 185 break; 186 187 case AD_SBOOT: 188 bootstr = "-s"; 189 break; 190 191 case AD_SIBOOT: 192 bootstr = "-sa"; 193 break; 194 default: 195 cmn_err(CE_WARN, 196 "mdboot: invalid function %d", fcn); 197 bootstr = ""; 198 break; 199 } 200 } 201 reboot_machine(bootstr); 202 } 203 /* MAYBE REACHED */ 204 } 205 206 /* mdpreboot - may be called prior to mdboot while root fs still mounted */ 207 /*ARGSUSED*/ 208 void 209 mdpreboot(int cmd, int fcn, char *bootstr) 210 { 211 } 212 213 /* 214 * Halt the machine and then reboot with the device 215 * and arguments specified in bootstr. 216 */ 217 static void 218 reboot_machine(char *bootstr) 219 { 220 flush_windows(); 221 stop_other_cpus(); /* send stop signal to other CPUs */ 222 prom_printf("rebooting...\n"); 223 /* 224 * For platforms that use CPU signatures, we 225 * need to set the signature block to OS and 226 * the state to exiting for all the processors. 227 */ 228 CPU_SIGNATURE(OS_SIG, SIGST_EXIT, SIGSUBST_REBOOT, -1); 229 prom_reboot(bootstr); 230 /*NOTREACHED*/ 231 } 232 233 /* 234 * We use the x-trap mechanism and idle_stop_xcall() to stop the other CPUs. 235 * Once in panic_idle() they raise spl, record their location, and spin. 236 */ 237 static void 238 panic_idle(void) 239 { 240 (void) spl7(); 241 242 debug_flush_windows(); 243 (void) setjmp(&curthread->t_pcb); 244 245 CPU->cpu_m.in_prom = 1; 246 membar_stld(); 247 248 for (;;); 249 } 250 251 /* 252 * Force the other CPUs to trap into panic_idle(), and then remove them 253 * from the cpu_ready_set so they will no longer receive cross-calls. 254 */ 255 /*ARGSUSED*/ 256 void 257 panic_stopcpus(cpu_t *cp, kthread_t *t, int spl) 258 { 259 cpuset_t cps; 260 int i; 261 262 (void) splzs(); 263 CPUSET_ALL_BUT(cps, cp->cpu_id); 264 xt_some(cps, (xcfunc_t *)idle_stop_xcall, (uint64_t)&panic_idle, NULL); 265 266 for (i = 0; i < NCPU; i++) { 267 if (i != cp->cpu_id && CPU_XCALL_READY(i)) { 268 int ntries = 0x10000; 269 270 while (!cpu[i]->cpu_m.in_prom && ntries) { 271 DELAY(50); 272 ntries--; 273 } 274 275 if (!cpu[i]->cpu_m.in_prom) 276 printf("panic: failed to stop cpu%d\n", i); 277 278 cpu[i]->cpu_flags &= ~CPU_READY; 279 cpu[i]->cpu_flags |= CPU_QUIESCED; 280 CPUSET_DEL(cpu_ready_set, cpu[i]->cpu_id); 281 } 282 } 283 } 284 285 /* 286 * Platform callback following each entry to panicsys(). If we've panicked at 287 * level 14, we examine t_panic_trap to see if a fatal trap occurred. If so, 288 * we disable further %tick_cmpr interrupts. If not, an explicit call to panic 289 * was made and so we re-enqueue an interrupt request structure to allow 290 * further level 14 interrupts to be processed once we lower PIL. This allows 291 * us to handle panics from the deadman() CY_HIGH_LEVEL cyclic. 292 */ 293 void 294 panic_enter_hw(int spl) 295 { 296 #ifdef TRAPTRACE 297 if (!panic_tick) { 298 uint64_t prev_freeze; 299 300 panic_tick = gettick(); 301 /* there are no possible error codes for this hcall */ 302 (void) hv_ttrace_freeze((uint64_t)TRAP_TFREEZE_ALL, 303 &prev_freeze); 304 TRAPTRACE_FREEZE; 305 } 306 #endif 307 308 if (spl == ipltospl(PIL_14)) { 309 uint_t opstate = disable_vec_intr(); 310 311 if (curthread->t_panic_trap != NULL) { 312 tickcmpr_disable(); 313 intr_dequeue_req(PIL_14, cbe_level14_inum); 314 } else { 315 if (!tickcmpr_disabled()) 316 intr_enqueue_req(PIL_14, cbe_level14_inum); 317 /* 318 * Clear SOFTINT<14>, SOFTINT<0> (TICK_INT) 319 * and SOFTINT<16> (STICK_INT) to indicate 320 * that the current level 14 has been serviced. 321 */ 322 wr_clr_softint((1 << PIL_14) | 323 TICK_INT_MASK | STICK_INT_MASK); 324 } 325 326 enable_vec_intr(opstate); 327 } 328 } 329 330 /* 331 * Miscellaneous hardware-specific code to execute after panicstr is set 332 * by the panic code: we also print and record PTL1 panic information here. 333 */ 334 /*ARGSUSED*/ 335 void 336 panic_quiesce_hw(panic_data_t *pdp) 337 { 338 extern uint_t getpstate(void); 339 extern void setpstate(uint_t); 340 341 #ifdef TRAPTRACE 342 uint64_t prev_freeze; 343 /* 344 * Turn off TRAPTRACE and save the current %tick value in panic_tick. 345 */ 346 if (!panic_tick) 347 panic_tick = gettick(); 348 /* there are no possible error codes for this hcall */ 349 (void) hv_ttrace_freeze((uint64_t)TRAP_TFREEZE_ALL, &prev_freeze); 350 TRAPTRACE_FREEZE; 351 #endif 352 /* 353 * For Platforms that use CPU signatures, we 354 * need to set the signature block to OS, the state to 355 * exiting, and the substate to panic for all the processors. 356 */ 357 CPU_SIGNATURE(OS_SIG, SIGST_EXIT, SIGSUBST_PANIC, -1); 358 359 update_hvdump_buffer(); 360 361 /* 362 * Disable further ECC errors from the bus nexus. 363 */ 364 (void) bus_func_invoke(BF_TYPE_ERRDIS); 365 366 /* 367 * Redirect all interrupts to the current CPU. 368 */ 369 intr_redist_all_cpus_shutdown(); 370 371 /* 372 * This call exists solely to support dumps to network 373 * devices after sync from OBP. 374 * 375 * If we came here via the sync callback, then on some 376 * platforms, interrupts may have arrived while we were 377 * stopped in OBP. OBP will arrange for those interrupts to 378 * be redelivered if you say "go", but not if you invoke a 379 * client callback like 'sync'. For some dump devices 380 * (network swap devices), we need interrupts to be 381 * delivered in order to dump, so we have to call the bus 382 * nexus driver to reset the interrupt state machines. 383 */ 384 (void) bus_func_invoke(BF_TYPE_RESINTR); 385 386 setpstate(getpstate() | PSTATE_IE); 387 } 388 389 /* 390 * Platforms that use CPU signatures need to set the signature block to OS and 391 * the state to exiting for all CPUs. PANIC_CONT indicates that we're about to 392 * write the crash dump, which tells the SSP/SMS to begin a timeout routine to 393 * reboot the machine if the dump never completes. 394 */ 395 /*ARGSUSED*/ 396 void 397 panic_dump_hw(int spl) 398 { 399 CPU_SIGNATURE(OS_SIG, SIGST_EXIT, SIGSUBST_DUMP, -1); 400 } 401 402 /* 403 * for ptl1_panic 404 */ 405 void 406 ptl1_init_cpu(struct cpu *cpu) 407 { 408 ptl1_state_t *pstate = &cpu->cpu_m.ptl1_state; 409 410 /*CONSTCOND*/ 411 if (sizeof (struct cpu) + PTL1_SSIZE > CPU_ALLOC_SIZE) { 412 panic("ptl1_init_cpu: not enough space left for ptl1_panic " 413 "stack, sizeof (struct cpu) = %lu", 414 (unsigned long)sizeof (struct cpu)); 415 } 416 417 pstate->ptl1_stktop = (uintptr_t)cpu + CPU_ALLOC_SIZE; 418 cpu_pa[cpu->cpu_id] = va_to_pa(cpu); 419 } 420 421 void 422 ptl1_panic_handler(ptl1_state_t *pstate) 423 { 424 static const char *ptl1_reasons[] = { 425 #ifdef PTL1_PANIC_DEBUG 426 "trap for debug purpose", /* PTL1_BAD_DEBUG */ 427 #else 428 "unknown trap", /* PTL1_BAD_DEBUG */ 429 #endif 430 "register window trap", /* PTL1_BAD_WTRAP */ 431 "kernel MMU miss", /* PTL1_BAD_KMISS */ 432 "kernel protection fault", /* PTL1_BAD_KPROT_FAULT */ 433 "ISM MMU miss", /* PTL1_BAD_ISM */ 434 "kernel MMU trap", /* PTL1_BAD_MMUTRAP */ 435 "kernel trap handler state", /* PTL1_BAD_TRAP */ 436 "floating point trap", /* PTL1_BAD_FPTRAP */ 437 #ifdef DEBUG 438 "pointer to intr_req", /* PTL1_BAD_INTR_REQ */ 439 #else 440 "unknown trap", /* PTL1_BAD_INTR_REQ */ 441 #endif 442 #ifdef TRAPTRACE 443 "TRACE_PTR state", /* PTL1_BAD_TRACE_PTR */ 444 #else 445 "unknown trap", /* PTL1_BAD_TRACE_PTR */ 446 #endif 447 "stack overflow", /* PTL1_BAD_STACK */ 448 "DTrace flags", /* PTL1_BAD_DTRACE_FLAGS */ 449 "attempt to steal locked ctx", /* PTL1_BAD_CTX_STEAL */ 450 "CPU ECC error loop", /* PTL1_BAD_ECC */ 451 "unexpected error from hypervisor call", /* PTL1_BAD_HCALL */ 452 "unexpected global level(%gl)", /* PTL1_BAD_GL */ 453 }; 454 455 uint_t reason = pstate->ptl1_regs.ptl1_gregs[0].ptl1_g1; 456 uint_t tl = pstate->ptl1_regs.ptl1_trap_regs[0].ptl1_tl; 457 struct trap_info ti = { 0 }; 458 459 /* 460 * Use trap_info for a place holder to call panic_savetrap() and 461 * panic_showtrap() to save and print out ptl1_panic information. 462 */ 463 if (curthread->t_panic_trap == NULL) 464 curthread->t_panic_trap = &ti; 465 466 if (reason < sizeof (ptl1_reasons) / sizeof (ptl1_reasons[0])) 467 panic("bad %s at TL %u", ptl1_reasons[reason], tl); 468 else 469 panic("ptl1_panic reason 0x%x at TL %u", reason, tl); 470 } 471 472 void 473 clear_watchdog_on_exit(void) 474 { 475 } 476 477 void 478 clear_watchdog_timer(void) 479 { 480 } 481 482 int 483 kdi_watchdog_disable(void) 484 { 485 return (0); /* sun4v has no watchdog */ 486 } 487 488 void 489 kdi_watchdog_restore(void) 490 { 491 /* nothing to do -- no watchdog to re-enable */ 492 } 493 494 void 495 mach_dump_buffer_init(void) 496 { 497 uint64_t ret, minsize = 0; 498 499 if (hvdump_buf_sz > HVDUMP_SIZE_MAX) 500 hvdump_buf_sz = HVDUMP_SIZE_MAX; 501 502 hvdump_buf_va = contig_mem_alloc_align(hvdump_buf_sz, PAGESIZE); 503 if (hvdump_buf_va == NULL) 504 return; 505 506 hvdump_buf_pa = va_to_pa(hvdump_buf_va); 507 508 ret = hv_dump_buf_update(hvdump_buf_pa, hvdump_buf_sz, 509 &minsize); 510 511 if (ret != H_EOK) { 512 contig_mem_free(hvdump_buf_va, hvdump_buf_sz); 513 hvdump_buf_va = NULL; 514 cmn_err(CE_NOTE, "!Error in setting up hvstate" 515 "dump buffer. Error = 0x%lx, size = 0x%lx," 516 "buf_pa = 0x%lx", ret, hvdump_buf_sz, 517 hvdump_buf_pa); 518 519 if (ret == H_EINVAL) { 520 cmn_err(CE_NOTE, "!Buffer size too small." 521 "Available buffer size = 0x%lx," 522 "Minimum buffer size required = 0x%lx", 523 hvdump_buf_sz, minsize); 524 } 525 } 526 } 527 528 529 static void 530 update_hvdump_buffer(void) 531 { 532 uint64_t ret, dummy_val; 533 534 if (hvdump_buf_va == NULL) 535 return; 536 537 ret = hv_dump_buf_update(hvdump_buf_pa, hvdump_buf_sz, 538 &dummy_val); 539 if (ret != H_EOK) { 540 cmn_err(CE_NOTE, "!Cannot update hvstate dump" 541 "buffer. Error = 0x%lx", ret); 542 } 543 } 544 545 546 static int 547 getintprop(pnode_t node, char *name, int deflt) 548 { 549 int value; 550 551 switch (prom_getproplen(node, name)) { 552 case 0: 553 value = 1; /* boolean properties */ 554 break; 555 556 case sizeof (int): 557 (void) prom_getprop(node, name, (caddr_t)&value); 558 break; 559 560 default: 561 value = deflt; 562 break; 563 } 564 565 return (value); 566 } 567 568 /* 569 * Called by setcpudelay 570 */ 571 void 572 cpu_init_tick_freq(void) 573 { 574 sys_tick_freq = cpunodes[CPU->cpu_id].clock_freq; 575 } 576 577 int shipit(int n, uint64_t cpu_list_ra); 578 extern uint64_t xc_tick_limit; 579 extern uint64_t xc_tick_jump_limit; 580 581 #ifdef DEBUG 582 #define SEND_MONDO_STATS 1 583 #endif 584 585 #ifdef SEND_MONDO_STATS 586 uint32_t x_one_stimes[64]; 587 uint32_t x_one_ltimes[16]; 588 uint32_t x_set_stimes[64]; 589 uint32_t x_set_ltimes[16]; 590 uint32_t x_set_cpus[NCPU]; 591 #endif 592 593 void 594 send_one_mondo(int cpuid) 595 { 596 int retries, stat; 597 uint64_t starttick, endtick, tick, lasttick; 598 struct machcpu *mcpup = &(CPU->cpu_m); 599 600 CPU_STATS_ADDQ(CPU, sys, xcalls, 1); 601 starttick = lasttick = gettick(); 602 mcpup->cpu_list[0] = (uint16_t)cpuid; 603 stat = shipit(1, mcpup->cpu_list_ra); 604 endtick = starttick + xc_tick_limit; 605 retries = 0; 606 while (stat != 0) { 607 ASSERT(stat == H_EWOULDBLOCK); 608 tick = gettick(); 609 /* 610 * If there is a big jump between the current tick 611 * count and lasttick, we have probably hit a break 612 * point. Adjust endtick accordingly to avoid panic. 613 */ 614 if (tick > (lasttick + xc_tick_jump_limit)) 615 endtick += (tick - lasttick); 616 lasttick = tick; 617 if (tick > endtick) { 618 if (panic_quiesce) 619 return; 620 cmn_err(CE_PANIC, "send mondo timeout " 621 "(target 0x%x) [retries: 0x%x hvstat: 0x%x]", 622 cpuid, retries, stat); 623 } 624 drv_usecwait(1); 625 stat = shipit(1, mcpup->cpu_list_ra); 626 retries++; 627 } 628 #ifdef SEND_MONDO_STATS 629 { 630 int n = gettick() - starttick; 631 if (n < 8192) 632 x_one_stimes[n >> 7]++; 633 else if (n < 16*8192) 634 x_one_ltimes[(n >> 13) & 0xf]++; 635 else 636 x_one_ltimes[0xf]++; 637 } 638 #endif 639 } 640 641 void 642 send_mondo_set(cpuset_t set) 643 { 644 uint64_t starttick, endtick, tick, lasttick; 645 int i, retries, stat, fcpuid, lcpuid; 646 int ncpuids = 0; 647 int shipped = 0; 648 struct machcpu *mcpup = &(CPU->cpu_m); 649 650 ASSERT(!CPUSET_ISNULL(set)); 651 starttick = lasttick = gettick(); 652 endtick = starttick + xc_tick_limit; 653 654 fcpuid = -1; 655 for (i = 0; i < NCPU; i++) { 656 if (CPU_IN_SET(set, i)) { 657 ncpuids++; 658 mcpup->cpu_list[0] = (uint16_t)i; 659 stat = shipit(1, mcpup->cpu_list_ra); 660 if (stat != 0) { 661 ASSERT(stat == H_EWOULDBLOCK); 662 if (fcpuid < 0) 663 fcpuid = i; 664 lcpuid = i; 665 continue; 666 } 667 shipped++; 668 CPUSET_DEL(set, i); 669 if (CPUSET_ISNULL(set)) 670 break; 671 } 672 } 673 674 retries = 0; 675 while (shipped < ncpuids) { 676 ASSERT(fcpuid >= 0 && fcpuid <= lcpuid && lcpuid < NCPU); 677 tick = gettick(); 678 /* 679 * If there is a big jump between the current tick 680 * count and lasttick, we have probably hit a break 681 * point. Adjust endtick accordingly to avoid panic. 682 */ 683 if (tick > (lasttick + xc_tick_jump_limit)) 684 endtick += (tick - lasttick); 685 lasttick = tick; 686 if (tick > endtick) { 687 if (panic_quiesce) 688 return; 689 cmn_err(CE_CONT, "send mondo timeout " 690 "[retries: 0x%x] cpuids: ", retries); 691 for (i = fcpuid; i <= lcpuid; i++) { 692 if (CPU_IN_SET(set, i)) 693 cmn_err(CE_CONT, " 0x%x", i); 694 } 695 cmn_err(CE_CONT, "\n"); 696 cmn_err(CE_PANIC, "send_mondo_set: timeout"); 697 } 698 699 /* adjust fcpuid to the first CPU in set */ 700 for (; fcpuid <= lcpuid; fcpuid++) 701 if (CPU_IN_SET(set, fcpuid)) 702 break; 703 704 /* adjust lcpuid to the last CPU in set */ 705 for (; lcpuid >= fcpuid; lcpuid--) 706 if (CPU_IN_SET(set, lcpuid)) 707 break; 708 709 /* resend undelivered mondo */ 710 for (i = fcpuid; i <= lcpuid; i++) { 711 if (CPU_IN_SET(set, i)) { 712 mcpup->cpu_list[0] = (uint16_t)i; 713 stat = shipit(1, mcpup->cpu_list_ra); 714 if (stat != 0) { 715 ASSERT(stat == H_EWOULDBLOCK); 716 continue; 717 } 718 shipped++; 719 CPUSET_DEL(set, i); 720 if (shipped == ncpuids) 721 break; 722 } 723 } 724 if (shipped == ncpuids) 725 break; 726 727 while (gettick() < (tick + sys_clock_mhz)) 728 ; 729 retries++; 730 } 731 732 #ifdef SEND_MONDO_STATS 733 { 734 int n = gettick() - starttick; 735 if (n < 8192) 736 x_set_stimes[n >> 7]++; 737 else if (n < 16*8192) 738 x_set_ltimes[(n >> 13) & 0xf]++; 739 else 740 x_set_ltimes[0xf]++; 741 } 742 x_set_cpus[shipped]++; 743 #endif 744 } 745 746 void 747 syncfpu(void) 748 { 749 } 750 751 void 752 cpu_flush_ecache(void) 753 { 754 } 755 756 void 757 sticksync_slave(void) 758 {} 759 760 void 761 sticksync_master(void) 762 {} 763 764 void 765 cpu_init_cache_scrub(void) 766 {} 767 768 int 769 dtrace_blksuword32_err(uintptr_t addr, uint32_t *data) 770 { 771 int ret, watched; 772 773 watched = watch_disable_addr((void *)addr, 4, S_WRITE); 774 ret = dtrace_blksuword32(addr, data, 0); 775 if (watched) 776 watch_enable_addr((void *)addr, 4, S_WRITE); 777 778 return (ret); 779 } 780 781 int 782 dtrace_blksuword32(uintptr_t addr, uint32_t *data, int tryagain) 783 { 784 if (suword32((void *)addr, *data) == -1) 785 return (tryagain ? dtrace_blksuword32_err(addr, data) : -1); 786 dtrace_flush_sec(addr); 787 788 return (0); 789 } 790 791 /*ARGSUSED*/ 792 void 793 cpu_faulted_enter(struct cpu *cp) 794 { 795 } 796 797 /*ARGSUSED*/ 798 void 799 cpu_faulted_exit(struct cpu *cp) 800 { 801 } 802 803 static int 804 kdi_cpu_ready_iter(int (*cb)(int, void *), void *arg) 805 { 806 int rc, i; 807 808 for (rc = 0, i = 0; i < NCPU; i++) { 809 if (CPU_IN_SET(cpu_ready_set, i)) 810 rc += cb(i, arg); 811 } 812 813 return (rc); 814 } 815 816 /* 817 * Sends a cross-call to a specified processor. The caller assumes 818 * responsibility for repetition of cross-calls, as appropriate (MARSA for 819 * debugging). 820 */ 821 static int 822 kdi_xc_one(int cpuid, void (*func)(uintptr_t, uintptr_t), uintptr_t arg1, 823 uintptr_t arg2) 824 { 825 int stat; 826 struct machcpu *mcpup; 827 uint64_t cpuaddr_reg = 0, cpuaddr_scr = 0; 828 829 mcpup = &(((cpu_t *)get_cpuaddr(cpuaddr_reg, cpuaddr_scr))->cpu_m); 830 831 /* 832 * if (idsr_busy()) 833 * return (KDI_XC_RES_ERR); 834 */ 835 836 init_mondo_nocheck((xcfunc_t *)func, arg1, arg2); 837 838 mcpup->cpu_list[0] = (uint16_t)cpuid; 839 stat = shipit(1, mcpup->cpu_list_ra); 840 841 if (stat == 0) 842 return (KDI_XC_RES_OK); 843 else 844 return (KDI_XC_RES_NACK); 845 } 846 847 static void 848 kdi_tickwait(clock_t nticks) 849 { 850 clock_t endtick = gettick() + nticks; 851 852 while (gettick() < endtick); 853 } 854 855 static void 856 kdi_cpu_init(int dcache_size, int dcache_linesize, int icache_size, 857 int icache_linesize) 858 { 859 kdi_dcache_size = dcache_size; 860 kdi_dcache_linesize = dcache_linesize; 861 kdi_icache_size = icache_size; 862 kdi_icache_linesize = icache_linesize; 863 } 864 865 /* used directly by kdi_read/write_phys */ 866 void 867 kdi_flush_caches(void) 868 { 869 /* Not required on sun4v architecture. */ 870 } 871 872 /*ARGSUSED*/ 873 int 874 kdi_get_stick(uint64_t *stickp) 875 { 876 return (-1); 877 } 878 879 void 880 cpu_kdi_init(kdi_t *kdi) 881 { 882 kdi->kdi_flush_caches = kdi_flush_caches; 883 kdi->mkdi_cpu_init = kdi_cpu_init; 884 kdi->mkdi_cpu_ready_iter = kdi_cpu_ready_iter; 885 kdi->mkdi_xc_one = kdi_xc_one; 886 kdi->mkdi_tickwait = kdi_tickwait; 887 kdi->mkdi_get_stick = kdi_get_stick; 888 } 889 890 /* 891 * Routine to return memory information associated 892 * with a physical address and syndrome. 893 */ 894 /* ARGSUSED */ 895 int 896 cpu_get_mem_info(uint64_t synd, uint64_t afar, 897 uint64_t *mem_sizep, uint64_t *seg_sizep, uint64_t *bank_sizep, 898 int *segsp, int *banksp, int *mcidp) 899 { 900 return (ENOTSUP); 901 } 902 903 /* 904 * This routine returns the size of the kernel's FRU name buffer. 905 */ 906 size_t 907 cpu_get_name_bufsize() 908 { 909 return (UNUM_NAMLEN); 910 } 911 912 /* 913 * This routine is a more generic interface to cpu_get_mem_unum(), 914 * that may be used by other modules (e.g. mm). 915 */ 916 /* ARGSUSED */ 917 int 918 cpu_get_mem_name(uint64_t synd, uint64_t *afsr, uint64_t afar, 919 char *buf, int buflen, int *lenp) 920 { 921 return (ENOTSUP); 922 } 923 924 /* 925 * xt_sync - wait for previous x-traps to finish 926 */ 927 void 928 xt_sync(cpuset_t cpuset) 929 { 930 union { 931 uint8_t volatile byte[NCPU]; 932 uint64_t volatile xword[NCPU / 8]; 933 } cpu_sync; 934 uint64_t starttick, endtick, tick, lasttick; 935 int i; 936 937 kpreempt_disable(); 938 CPUSET_DEL(cpuset, CPU->cpu_id); 939 CPUSET_AND(cpuset, cpu_ready_set); 940 941 /* 942 * Sun4v uses a queue for receiving mondos. Successful 943 * transmission of a mondo only indicates that the mondo 944 * has been written into the queue. 945 * 946 * We use an array of bytes to let each cpu to signal back 947 * to the cross trap sender that the cross trap has been 948 * executed. Set the byte to 1 before sending the cross trap 949 * and wait until other cpus reset it to 0. 950 */ 951 bzero((void *)&cpu_sync, NCPU); 952 for (i = 0; i < NCPU; i++) 953 if (CPU_IN_SET(cpuset, i)) 954 cpu_sync.byte[i] = 1; 955 956 xt_some(cpuset, (xcfunc_t *)xt_sync_tl1, 957 (uint64_t)cpu_sync.byte, 0); 958 959 starttick = lasttick = gettick(); 960 endtick = starttick + xc_tick_limit; 961 962 for (i = 0; i < (NCPU / 8); i ++) { 963 while (cpu_sync.xword[i] != 0) { 964 tick = gettick(); 965 /* 966 * If there is a big jump between the current tick 967 * count and lasttick, we have probably hit a break 968 * point. Adjust endtick accordingly to avoid panic. 969 */ 970 if (tick > (lasttick + xc_tick_jump_limit)) { 971 endtick += (tick - lasttick); 972 } 973 lasttick = tick; 974 if (tick > endtick) { 975 if (panic_quiesce) 976 goto out; 977 cmn_err(CE_CONT, "Cross trap sync timeout " 978 "at cpu_sync.xword[%d]: 0x%lx\n", 979 i, cpu_sync.xword[i]); 980 cmn_err(CE_PANIC, "xt_sync: timeout"); 981 } 982 } 983 } 984 985 out: 986 kpreempt_enable(); 987 } 988