1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #ifndef _SYS_TRAPTRACE_H 27 #define _SYS_TRAPTRACE_H 28 29 #pragma ident "%Z%%M% %I% %E% SMI" 30 31 #ifdef __cplusplus 32 extern "C" { 33 #endif 34 35 /* 36 * Trap tracing. If TRAPTRACE is defined, every trap records info 37 * in a circular buffer. Define TRAPTRACE in Makefile.$ARCH. 38 * 39 * Trap trace records are TRAP_ENT_SIZE bytes, consisting of the 40 * %tick, %tl, %tt, %tpc, %tstate, %sp, and a few other words: 41 * 42 * struct trap_trace_record { 43 * ushort_t tl, tt; 44 * long pc; 45 * int64_t tstate, tick; 46 * long sp, tr, f1, f2, f3, f4; 47 * }; 48 * 49 * Note that for UltraSparc III and beyond %stick is used in place of %tick 50 * unless compiled with TRAPTRACE_FORCE_TICK. 51 * 52 * Auxilliary entries (not of just a trap), have obvious non-%tt values in 53 * the TRAP_ENT_TT field 54 */ 55 56 #define TRAP_TSIZE (2 * PAGESIZE) /* default size is two pages */ 57 58 #ifndef _ASM 59 60 struct trap_trace_record { 61 uint16_t tt_tl; 62 uint16_t tt_tt; 63 uintptr_t tt_tpc; 64 uint64_t tt_tstate; 65 uint64_t tt_tick; 66 uintptr_t tt_sp; 67 uintptr_t tt_tr; 68 uintptr_t tt_f1; 69 uintptr_t tt_f2; 70 uintptr_t tt_f3; 71 uintptr_t tt_f4; 72 }; 73 74 #endif 75 76 #define HTRAP_TSIZE 0 77 78 /* 79 * Trap tracing buffer header. 80 */ 81 82 #ifndef _ASM 83 84 /* 85 * Example buffer header stored in locore.s: 86 * 87 * (the actual implementation could be .skip TRAPTR_SIZE*NCPU) 88 */ 89 typedef union { 90 struct { 91 caddr_t vaddr_base; /* virtual address of top of buffer */ 92 uint64_t paddr_base; /* physical address of buffer */ 93 uint_t last_offset; /* to "know" what trace completed */ 94 uint_t offset; /* current index into buffer (bytes) */ 95 uint_t limit; /* upper limit on index */ 96 uchar_t asi; /* cache for real asi */ 97 } d; 98 char cache_linesize[64]; 99 } TRAP_TRACE_CTL; 100 101 #ifdef _KERNEL 102 103 extern TRAP_TRACE_CTL trap_trace_ctl[]; /* allocated in locore.s */ 104 extern int trap_trace_bufsize; /* default buffer size */ 105 extern char trap_tr0[]; /* prealloc buf for boot cpu */ 106 extern int trap_freeze; /* freeze the trap trace */ 107 extern caddr_t ttrace_buf; /* kmem64 buffer */ 108 extern int ttrace_index; /* index used */ 109 extern size_t calc_traptrace_sz(void); 110 extern void mach_htraptrace_setup(int); 111 extern void mach_htraptrace_configure(int); 112 extern void mach_htraptrace_cleanup(int); 113 114 #endif 115 116 /* 117 * freeze the trap trace 118 */ 119 #define TRAPTRACE_FREEZE trap_freeze = 1; 120 #define TRAPTRACE_UNFREEZE trap_freeze = 0; 121 122 #else /* _ASM */ 123 124 #include <sys/machthread.h> 125 126 /* 127 * Offsets of words in trap_trace_ctl: 128 */ 129 /* 130 * XXX This should be done with genassym 131 */ 132 #define TRAPTR_VBASE 0 /* virtual address of buffer */ 133 #define TRAPTR_LAST_OFFSET 16 /* last completed trace entry */ 134 #define TRAPTR_OFFSET 20 /* next trace entry pointer */ 135 #define TRAPTR_LIMIT 24 /* pointer past end of buffer */ 136 #define TRAPTR_PBASE 8 /* start of buffer */ 137 #define TRAPTR_ASIBUF 28 /* cache of current asi */ 138 #define TRAPTR_SIZE_SHIFT 6 /* shift count -- per CPU indexing */ 139 #define TRAPTR_SIZE (1<<TRAPTR_SIZE_SHIFT) 140 141 #define TRAPTR_ASI ASI_MEM /* ASI to use for TRAPTR access */ 142 143 /* 144 * Use new %stick register for UltraSparc III and beyond for 145 * sane debugging of mixed speed CPU systems. Use TRAPTRACE_FORCE_TICK 146 * for finer granularity on same speed systems. 147 * 148 * Note the label-less branches used due to contraints of where 149 * and when trap trace macros are used. 150 */ 151 #ifdef TRAPTRACE_FORCE_TICK 152 #define GET_TRACE_TICK(reg) \ 153 rdpr %tick, reg; 154 #else 155 #define GET_TRACE_TICK(reg) \ 156 sethi %hi(traptrace_use_stick), reg; \ 157 lduw [reg + %lo(traptrace_use_stick)], reg; \ 158 /* CSTYLED */ \ 159 brz,a reg, .+12; \ 160 rdpr %tick, reg; \ 161 rd %asr24, reg; 162 #endif 163 164 /* 165 * TRACE_PTR(ptr, scr1) - get trap trace entry physical pointer. 166 * ptr is the register to receive the trace pointer. 167 * scr1 is a different register to be used as scratch. 168 * TRACING now needs a known processor state. Hence the assertion. 169 * NOTE: this caches and resets %asi 170 */ 171 #define TRACE_PTR(ptr, scr1) \ 172 sethi %hi(trap_freeze), ptr; \ 173 ld [ptr + %lo(trap_freeze)], ptr; \ 174 /* CSTYLED */ \ 175 brnz,pn ptr, .+20; /* skip assertion */ \ 176 rdpr %pstate, scr1; \ 177 andcc scr1, PSTATE_IE | PSTATE_AM, scr1; \ 178 /* CSTYLED */ \ 179 bne,a,pn %icc, trace_ptr_panic; \ 180 rd %pc, %g1; \ 181 CPU_INDEX(scr1, ptr); \ 182 sll scr1, TRAPTR_SIZE_SHIFT, scr1; \ 183 set trap_trace_ctl, ptr; \ 184 add ptr, scr1, scr1; \ 185 rd %asi, ptr; \ 186 stb ptr, [scr1 + TRAPTR_ASIBUF]; \ 187 sethi %hi(trap_freeze), ptr; \ 188 ld [ptr + %lo(trap_freeze)], ptr; \ 189 /* CSTYLED */ \ 190 brnz,pn ptr, .+20; /* skip assertion */ \ 191 ld [scr1 + TRAPTR_LIMIT], ptr; \ 192 tst ptr; \ 193 /* CSTYLED */ \ 194 be,a,pn %icc, trace_ptr_panic; \ 195 rd %pc, %g1; \ 196 ldx [scr1 + TRAPTR_PBASE], ptr; \ 197 ld [scr1 + TRAPTR_OFFSET], scr1; \ 198 wr %g0, TRAPTR_ASI, %asi; \ 199 add ptr, scr1, ptr; 200 201 /* 202 * TRACE_NEXT(scr1, scr2, scr3) - advance the trap trace pointer. 203 * scr1, scr2, scr3 are scratch registers. 204 * This routine will skip updating the trap pointers if the 205 * global freeze register is set (e.g. in panic). 206 * (we also restore the asi register) 207 */ 208 #define TRACE_NEXT(scr1, scr2, scr3) \ 209 CPU_INDEX(scr2, scr1); \ 210 sll scr2, TRAPTR_SIZE_SHIFT, scr2; \ 211 set trap_trace_ctl, scr1; \ 212 add scr1, scr2, scr2; \ 213 ldub [scr2 + TRAPTR_ASIBUF], scr1; \ 214 wr %g0, scr1, %asi; \ 215 sethi %hi(trap_freeze), scr1; \ 216 ld [scr1 + %lo(trap_freeze)], scr1; \ 217 /* CSTYLED */ \ 218 brnz scr1, .+36; /* skip update on freeze */ \ 219 ld [scr2 + TRAPTR_OFFSET], scr1; \ 220 ld [scr2 + TRAPTR_LIMIT], scr3; \ 221 st scr1, [scr2 + TRAPTR_LAST_OFFSET]; \ 222 add scr1, TRAP_ENT_SIZE, scr1; \ 223 sub scr3, TRAP_ENT_SIZE, scr3; \ 224 cmp scr1, scr3; \ 225 movge %icc, 0, scr1; \ 226 st scr1, [scr2 + TRAPTR_OFFSET]; 227 228 /* 229 * macro to save %tl to trap trace record at addr 230 */ 231 #define TRACE_SAVE_TL_GL_REGS(addr, scr1) \ 232 rdpr %tl, scr1; \ 233 stha scr1, [addr + TRAP_ENT_TL]%asi 234 235 /* 236 * macro to save tl to trap trace record at addr 237 */ 238 #define TRACE_SAVE_TL_VAL(addr, tl) \ 239 stha tl, [addr + TRAP_ENT_TL]%asi 240 241 /* 242 * dummy macro 243 */ 244 #define TRACE_SAVE_GL_VAL(addr, gl) 245 246 247 /* 248 * Trace macro for sys_trap return entries: 249 * prom_rtt, priv_rtt, and user_rtt 250 * %l7 - regs 251 * %l6 - trap %pil for prom_rtt and priv_rtt; THREAD_REG for user_rtt 252 */ 253 #define TRACE_RTT(code, scr1, scr2, scr3, scr4) \ 254 rdpr %pstate, scr4; \ 255 andn scr4, PSTATE_IE | PSTATE_AM, scr3; \ 256 wrpr %g0, scr3, %pstate; \ 257 TRACE_PTR(scr1, scr2); \ 258 GET_TRACE_TICK(scr2); \ 259 stxa scr2, [scr1 + TRAP_ENT_TICK]%asi; \ 260 rdpr %tl, scr2; \ 261 stha scr2, [scr1 + TRAP_ENT_TL]%asi; \ 262 set code, scr2; \ 263 stha scr2, [scr1 + TRAP_ENT_TT]%asi; \ 264 ldn [%l7 + PC_OFF], scr2; \ 265 stna scr2, [scr1 + TRAP_ENT_TPC]%asi; \ 266 ldx [%l7 + TSTATE_OFF], scr2; \ 267 stxa scr2, [scr1 + TRAP_ENT_TSTATE]%asi; \ 268 stna %sp, [scr1 + TRAP_ENT_SP]%asi; \ 269 stna %l6, [scr1 + TRAP_ENT_TR]%asi; \ 270 stna %l7, [scr1 + TRAP_ENT_F1]%asi; \ 271 ldn [THREAD_REG + T_CPU], scr2; \ 272 ld [scr2 + CPU_BASE_SPL], scr2; \ 273 stna scr2, [scr1 + TRAP_ENT_F2]%asi; \ 274 mov MMU_SCONTEXT, scr2; \ 275 ldxa [scr2]ASI_DMMU, scr2; \ 276 stna scr2, [scr1 + TRAP_ENT_F3]%asi; \ 277 rdpr %cwp, scr2; \ 278 stna scr2, [scr1 + TRAP_ENT_F4]%asi; \ 279 TRACE_NEXT(scr1, scr2, scr3); \ 280 wrpr %g0, scr4, %pstate 281 282 /* 283 * Trace macro for spill and fill trap handlers 284 * tl and tt fields indicate which spill handler is entered 285 */ 286 #define TRACE_WIN_INFO(code, scr1, scr2, scr3) \ 287 TRACE_PTR(scr1, scr2); \ 288 GET_TRACE_TICK(scr2); \ 289 stxa scr2, [scr1 + TRAP_ENT_TICK]%asi; \ 290 rdpr %tl, scr2; \ 291 stha scr2, [scr1 + TRAP_ENT_TL]%asi; \ 292 rdpr %tt, scr2; \ 293 set code, scr3; \ 294 or scr2, scr3, scr2; \ 295 stha scr2, [scr1 + TRAP_ENT_TT]%asi; \ 296 rdpr %tstate, scr2; \ 297 stxa scr2, [scr1 + TRAP_ENT_TSTATE]%asi; \ 298 stna %sp, [scr1 + TRAP_ENT_SP]%asi; \ 299 rdpr %tpc, scr2; \ 300 stna scr2, [scr1 + TRAP_ENT_TPC]%asi; \ 301 set TT_FSPILL_DEBUG, scr2; \ 302 stna scr2, [scr1 + TRAP_ENT_TR]%asi; \ 303 rdpr %pstate, scr2; \ 304 stna scr2, [scr1 + TRAP_ENT_F1]%asi; \ 305 rdpr %cwp, scr2; \ 306 sll scr2, 24, scr2; \ 307 rdpr %cansave, scr3; \ 308 sll scr3, 16, scr3; \ 309 or scr2, scr3, scr2; \ 310 rdpr %canrestore, scr3; \ 311 or scr2, scr3, scr2; \ 312 stna scr2, [scr1 + TRAP_ENT_F2]%asi; \ 313 rdpr %otherwin, scr2; \ 314 sll scr2, 24, scr2; \ 315 rdpr %cleanwin, scr3; \ 316 sll scr3, 16, scr3; \ 317 or scr2, scr3, scr2; \ 318 rdpr %wstate, scr3; \ 319 or scr2, scr3, scr2; \ 320 stna scr2, [scr1 + TRAP_ENT_F3]%asi; \ 321 stna %o7, [scr1 + TRAP_ENT_F4]%asi; \ 322 TRACE_NEXT(scr1, scr2, scr3) 323 324 #ifdef TRAPTRACE 325 326 #define FAULT_WINTRACE(scr1, scr2, scr3, type) \ 327 TRACE_PTR(scr1, scr2); \ 328 GET_TRACE_TICK(scr2); \ 329 stxa scr2, [scr1 + TRAP_ENT_TICK]%asi; \ 330 rdpr %tl, scr2; \ 331 stha scr2, [scr1 + TRAP_ENT_TL]%asi; \ 332 set type, scr2; \ 333 stha scr2, [scr1 + TRAP_ENT_TT]%asi; \ 334 rdpr %tpc, scr2; \ 335 stna scr2, [scr1 + TRAP_ENT_TPC]%asi; \ 336 rdpr %tstate, scr2; \ 337 stxa scr2, [scr1 + TRAP_ENT_TSTATE]%asi; \ 338 stna %sp, [scr1 + TRAP_ENT_SP]%asi; \ 339 stna %g0, [scr1 + TRAP_ENT_TR]%asi; \ 340 stna %g0, [scr1 + TRAP_ENT_F1]%asi; \ 341 stna %g4, [scr1 + TRAP_ENT_F2]%asi; \ 342 rdpr %pil, scr2; \ 343 stna scr2, [scr1 + TRAP_ENT_F3]%asi; \ 344 stna %g0, [scr1 + TRAP_ENT_F4]%asi; \ 345 TRACE_NEXT(scr1, scr2, scr3) 346 347 #define SYSTRAP_TT 0x1300 348 349 #define SYSTRAP_TRACE(scr1, scr2, scr3) \ 350 TRACE_PTR(scr1, scr2); \ 351 GET_TRACE_TICK(scr2); \ 352 stxa scr2, [scr1 + TRAP_ENT_TICK]%asi; \ 353 rdpr %tl, scr2; \ 354 stha scr2, [scr1 + TRAP_ENT_TL]%asi; \ 355 set SYSTRAP_TT, scr3; \ 356 rdpr %tt, scr2; \ 357 or scr3, scr2, scr2; \ 358 stha scr2, [scr1 + TRAP_ENT_TT]%asi; \ 359 rdpr %tpc, scr2; \ 360 stna scr2, [scr1 + TRAP_ENT_TPC]%asi; \ 361 rdpr %tstate, scr2; \ 362 stxa scr2, [scr1 + TRAP_ENT_TSTATE]%asi; \ 363 stna %g1, [scr1 + TRAP_ENT_SP]%asi; \ 364 stna %g2, [scr1 + TRAP_ENT_TR]%asi; \ 365 stna %g3, [scr1 + TRAP_ENT_F1]%asi; \ 366 stna %g4, [scr1 + TRAP_ENT_F2]%asi; \ 367 rdpr %pil, scr2; \ 368 stna scr2, [scr1 + TRAP_ENT_F3]%asi; \ 369 rdpr %cwp, scr2; \ 370 stna scr2, [scr1 + TRAP_ENT_F4]%asi; \ 371 TRACE_NEXT(scr1, scr2, scr3) 372 373 #else /* TRAPTRACE */ 374 375 #define FAULT_WINTRACE(scr1, scr2, scr3, type) 376 #define SYSTRAP_TRACE(scr1, scr2, scr3) 377 378 #endif /* TRAPTRACE */ 379 380 #endif /* _ASM */ 381 382 /* 383 * Trap trace codes used in place of a %tbr value when more than one 384 * entry is made by a trap. The general scheme is that the trap-type is 385 * in the same position as in the TT, and the low-order bits indicate 386 * which precise entry is being made. 387 */ 388 389 #define TT_F32_SN0 0x1084 390 #define TT_F64_SN0 0x1088 391 #define TT_F32_NT0 0x1094 392 #define TT_F64_NT0 0x1098 393 #define TT_F32_SO0 0x10A4 394 #define TT_F64_SO0 0x10A8 395 #define TT_F32_FN0 0x10C4 396 #define TT_F64_FN0 0x10C8 397 #define TT_F32_SN1 0x1284 398 #define TT_F64_SN1 0x1288 399 #define TT_F32_NT1 0x1294 400 #define TT_F64_NT1 0x1298 401 #define TT_F32_SO1 0x12A4 402 #define TT_F64_SO1 0x12A8 403 #define TT_F32_FN1 0x12C4 404 #define TT_F64_FN1 0x12C8 405 406 #define TT_SC_ENTR 0x880 /* enter system call */ 407 #define TT_SC_RET 0x881 /* system call normal return */ 408 409 #define TT_SYS_RTT_PROM 0x5555 /* return from trap to prom */ 410 #define TT_SYS_RTT_PRIV 0x6666 /* return from trap to privilege */ 411 #define TT_SYS_RTT_USER 0x7777 /* return from trap to user */ 412 413 #define TT_INTR_EXIT 0x8888 /* interrupt thread exit (no pinned thread) */ 414 #define TT_FSPILL_DEBUG 0x9999 /* fill/spill debugging */ 415 416 #define TT_SERVE_INTR 0x6000 /* SERVE_INTR */ 417 #define TT_XCALL 0xd000 /* xcall/xtrap */ 418 #define TT_XCALL_CONT 0xdc00 /* continuation of an xcall/xtrap record */ 419 420 #define TT_MMU_MISS 0x200 /* or'd into %tt to indicate a miss */ 421 #define TT_SPURIOUS_INT 0x400 /* or'd into %tt for spurious intr. */ 422 423 424 #ifdef __cplusplus 425 } 426 #endif 427 428 #endif /* _SYS_TRAPTRACE_H */ 429