125cf1a30Sjl139090 /* 225cf1a30Sjl139090 * CDDL HEADER START 325cf1a30Sjl139090 * 425cf1a30Sjl139090 * The contents of this file are subject to the terms of the 525cf1a30Sjl139090 * Common Development and Distribution License (the "License"). 625cf1a30Sjl139090 * You may not use this file except in compliance with the License. 725cf1a30Sjl139090 * 825cf1a30Sjl139090 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 925cf1a30Sjl139090 * or http://www.opensolaris.org/os/licensing. 1025cf1a30Sjl139090 * See the License for the specific language governing permissions 1125cf1a30Sjl139090 * and limitations under the License. 1225cf1a30Sjl139090 * 1325cf1a30Sjl139090 * When distributing Covered Code, include this CDDL HEADER in each 1425cf1a30Sjl139090 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 1525cf1a30Sjl139090 * If applicable, add the following below this CDDL HEADER, with the 1625cf1a30Sjl139090 * fields enclosed by brackets "[]" replaced with your own identifying 1725cf1a30Sjl139090 * information: Portions Copyright [yyyy] [name of copyright owner] 1825cf1a30Sjl139090 * 1925cf1a30Sjl139090 * CDDL HEADER END 2025cf1a30Sjl139090 */ 2125cf1a30Sjl139090 /* 2225cf1a30Sjl139090 * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 2325cf1a30Sjl139090 * Use is subject to license terms. 2425cf1a30Sjl139090 */ 2525cf1a30Sjl139090 2625cf1a30Sjl139090 #ifndef _OPL_H 2725cf1a30Sjl139090 #define _OPL_H 2825cf1a30Sjl139090 2925cf1a30Sjl139090 #pragma ident "%Z%%M% %I% %E% SMI" 3025cf1a30Sjl139090 3125cf1a30Sjl139090 #ifdef __cplusplus 3225cf1a30Sjl139090 extern "C" { 3325cf1a30Sjl139090 #endif 3425cf1a30Sjl139090 3525cf1a30Sjl139090 #define OPL_MAX_CPU_PER_CMP 4 3625cf1a30Sjl139090 #define OPL_MAX_CORES_PER_CMP 4 3725cf1a30Sjl139090 #define OPL_MAX_STRANDS_PER_CORE 2 3825cf1a30Sjl139090 #define OPL_MAX_CMP_UNITS_PER_BOARD 4 3925cf1a30Sjl139090 #define OPL_MAX_BOARDS 16 4025cf1a30Sjl139090 #define OPL_MAX_CPU_PER_BOARD \ 4125cf1a30Sjl139090 (OPL_MAX_CPU_PER_CMP * OPL_MAX_CMP_UNITS_PER_BOARD) 4225cf1a30Sjl139090 #define OPL_MAX_MEM_UNITS_PER_BOARD 1 4325cf1a30Sjl139090 #define OPL_MAX_IO_UNITS_PER_BOARD 16 4425cf1a30Sjl139090 #define OPL_MAX_PCICH_UNITS_PER_BOARD 4 4525cf1a30Sjl139090 #define OPL_MAX_TSBS_PER_PCICH 2 4625cf1a30Sjl139090 #define OPL_MAX_CORE_UNITS_PER_BOARD \ 4725cf1a30Sjl139090 (OPL_MAX_CORES_PER_CMP * OPL_MAX_CMP_UNITS_PER_BOARD) 4825cf1a30Sjl139090 4925cf1a30Sjl139090 #define OPL_MAX_COREID_PER_CMP 4 5025cf1a30Sjl139090 #define OPL_MAX_STRANDID_PER_CORE 2 5125cf1a30Sjl139090 #define OPL_MAX_CPUID_PER_CMP (OPL_MAX_COREID_PER_CMP * \ 5225cf1a30Sjl139090 OPL_MAX_STRANDID_PER_CORE) 5325cf1a30Sjl139090 #define OPL_MAX_CMPID_PER_BOARD 4 5425cf1a30Sjl139090 #define OPL_MAX_CPUID_PER_BOARD \ 5525cf1a30Sjl139090 (OPL_MAX_CPUID_PER_CMP * OPL_MAX_CMPID_PER_BOARD) 5625cf1a30Sjl139090 #define OPL_MAX_COREID_PER_BOARD \ 5725cf1a30Sjl139090 (OPL_MAX_COREID_PER_CMP * OPL_MAX_CMPID_PER_BOARD) 5825cf1a30Sjl139090 /* 5925cf1a30Sjl139090 * Macros to extract LSB_ID, CHIP_ID, CORE_ID, and STRAND_ID 6025cf1a30Sjl139090 * from the given cpuid. 6125cf1a30Sjl139090 */ 6225cf1a30Sjl139090 #define LSB_ID(x) (((uint_t)(x)/OPL_MAX_CPUID_PER_BOARD) & \ 6325cf1a30Sjl139090 (OPL_MAX_BOARDS - 1)) 6425cf1a30Sjl139090 #define CHIP_ID(x) (((uint_t)(x)/OPL_MAX_CPUID_PER_CMP) & \ 6525cf1a30Sjl139090 (OPL_MAX_CMPID_PER_BOARD - 1)) 6625cf1a30Sjl139090 #define CORE_ID(x) (((uint_t)(x)/OPL_MAX_STRANDID_PER_CORE) & \ 6725cf1a30Sjl139090 (OPL_MAX_COREID_PER_CMP - 1)) 6825cf1a30Sjl139090 #define STRAND_ID(x) ((uint_t)(x) & (OPL_MAX_STRANDID_PER_CORE - 1)) 6931f6f5eeSmv143129 #define MMU_ID(x) \ 7031f6f5eeSmv143129 ((opl_get_physical_board(LSB_ID(x)) * OPL_MAX_COREID_PER_BOARD) + \ 7131f6f5eeSmv143129 (CHIP_ID(x) * OPL_MAX_COREID_PER_CMP) + \ 7231f6f5eeSmv143129 CORE_ID(x)) 7325cf1a30Sjl139090 741e2e7a75Shuah /* 751e2e7a75Shuah * Max. boards supported in a domain per model. 761e2e7a75Shuah */ 771e2e7a75Shuah #define OPL_MAX_BOARDS_FF1 1 781e2e7a75Shuah #define OPL_MAX_BOARDS_FF2 2 791e2e7a75Shuah #define OPL_MAX_BOARDS_DC1 4 801e2e7a75Shuah #define OPL_MAX_BOARDS_DC2 8 811e2e7a75Shuah #define OPL_MAX_BOARDS_DC3 16 821e2e7a75Shuah 83*195196c6Ssubhan /* OPL model type */ 84*195196c6Ssubhan typedef enum { 85*195196c6Ssubhan FF1 = 0, FF2, DC1, DC2, DC3 86*195196c6Ssubhan } opl_type_t; 87*195196c6Ssubhan 88*195196c6Ssubhan /* OPL model specific cmds selection */ 89*195196c6Ssubhan #define STD_DISPATCH_TABLE 0x0 90*195196c6Ssubhan #define EXT_DISPATCH_TABLE 0x1 91*195196c6Ssubhan 921e2e7a75Shuah /* 931e2e7a75Shuah * Structure to gather model-specific information at boot. 941e2e7a75Shuah */ 951e2e7a75Shuah typedef struct opl_model_info { 96*195196c6Ssubhan char model_name[MAXSYSNAME]; /* OPL model name */ 97*195196c6Ssubhan int model_max_boards; /* Maximum boards per model */ 98*195196c6Ssubhan opl_type_t model_type; /* Model type */ 99*195196c6Ssubhan int model_cmds; /* Model specific cmds */ 1001e2e7a75Shuah } opl_model_info_t; 1011e2e7a75Shuah 10225cf1a30Sjl139090 extern int plat_max_boards(void); 10325cf1a30Sjl139090 extern int plat_max_cpu_units_per_board(void); 10425cf1a30Sjl139090 extern int plat_max_mem_units_per_board(void); 10525cf1a30Sjl139090 extern int plat_max_io_units_per_board(void); 10625cf1a30Sjl139090 extern int plat_max_cmp_units_per_board(void); 10725cf1a30Sjl139090 10825cf1a30Sjl139090 #ifdef __cplusplus 10925cf1a30Sjl139090 } 11025cf1a30Sjl139090 #endif 11125cf1a30Sjl139090 11225cf1a30Sjl139090 #endif /* _OPL_H */ 113