1*03831d35Sstevel /* 2*03831d35Sstevel * CDDL HEADER START 3*03831d35Sstevel * 4*03831d35Sstevel * The contents of this file are subject to the terms of the 5*03831d35Sstevel * Common Development and Distribution License, Version 1.0 only 6*03831d35Sstevel * (the "License"). You may not use this file except in compliance 7*03831d35Sstevel * with the License. 8*03831d35Sstevel * 9*03831d35Sstevel * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10*03831d35Sstevel * or http://www.opensolaris.org/os/licensing. 11*03831d35Sstevel * See the License for the specific language governing permissions 12*03831d35Sstevel * and limitations under the License. 13*03831d35Sstevel * 14*03831d35Sstevel * When distributing Covered Code, include this CDDL HEADER in each 15*03831d35Sstevel * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16*03831d35Sstevel * If applicable, add the following below this CDDL HEADER, with the 17*03831d35Sstevel * fields enclosed by brackets "[]" replaced with your own identifying 18*03831d35Sstevel * information: Portions Copyright [yyyy] [name of copyright owner] 19*03831d35Sstevel * 20*03831d35Sstevel * CDDL HEADER END 21*03831d35Sstevel */ 22*03831d35Sstevel /* 23*03831d35Sstevel * Copyright 2004 Sun Microsystems, Inc. All rights reserved. 24*03831d35Sstevel * Use is subject to license terms. 25*03831d35Sstevel */ 26*03831d35Sstevel 27*03831d35Sstevel #ifndef _SYS_SERENGETI_H 28*03831d35Sstevel #define _SYS_SERENGETI_H 29*03831d35Sstevel 30*03831d35Sstevel #pragma ident "%Z%%M% %I% %E% SMI" 31*03831d35Sstevel 32*03831d35Sstevel #ifdef __cplusplus 33*03831d35Sstevel extern "C" { 34*03831d35Sstevel #endif 35*03831d35Sstevel 36*03831d35Sstevel /* 37*03831d35Sstevel * serengeti.h - Serengeti/WildCat common header file 38*03831d35Sstevel * 39*03831d35Sstevel * This header file contains the common definitions and macros for the 40*03831d35Sstevel * Serengeti and WildCat platforms. We define them all here to avoid them 41*03831d35Sstevel * being redefined in numerous different drivers. 42*03831d35Sstevel */ 43*03831d35Sstevel 44*03831d35Sstevel #include <sys/dditypes.h> 45*03831d35Sstevel 46*03831d35Sstevel /* 47*03831d35Sstevel * Definitions 48*03831d35Sstevel * =========== 49*03831d35Sstevel */ 50*03831d35Sstevel 51*03831d35Sstevel #ifndef TRUE 52*03831d35Sstevel #define TRUE 1 53*03831d35Sstevel #endif 54*03831d35Sstevel 55*03831d35Sstevel #ifndef FALSE 56*03831d35Sstevel #define FALSE 0 57*03831d35Sstevel #endif 58*03831d35Sstevel 59*03831d35Sstevel 60*03831d35Sstevel #define SG_MAX_IO_PER_BD 5 /* 4 pci buses + cpci */ 61*03831d35Sstevel #define SG_MAX_CMPS_PER_BD 4 62*03831d35Sstevel #define SG_MAX_CPUS_PER_BD 8 63*03831d35Sstevel #define SG_MAX_MEM_PER_BD 1 64*03831d35Sstevel #define SG_MAX_CPU_BDS 6 65*03831d35Sstevel #define SG_MAX_IO_BDS 4 66*03831d35Sstevel #define SG_MAX_POWER_SUPPLIES 6 67*03831d35Sstevel #define SG_MAX_FAN_TRAYS 6 68*03831d35Sstevel #define SG_MAX_REPEATER_BDS 4 69*03831d35Sstevel #define SG_MAX_BDS (SG_MAX_CPU_BDS + SG_MAX_IO_BDS) 70*03831d35Sstevel #define SG_MAX_CPUS (SG_MAX_CPUS_PER_BD * SG_MAX_CPU_BDS) 71*03831d35Sstevel 72*03831d35Sstevel #define SG_MAX_SLOTS_PER_IO_BD 8 73*03831d35Sstevel #define SG_SCHIZO_PER_IO_BD 2 74*03831d35Sstevel 75*03831d35Sstevel #define SSM_MAX_INSTANCES 16 76*03831d35Sstevel #define SSM_MAX_BDS (SSM_MAX_INSTANCES * SG_MAX_BDS) 77*03831d35Sstevel 78*03831d35Sstevel #define SG_MIN_CPU_SAFARI_ID 0 /* 0x00 */ 79*03831d35Sstevel #define SG_MAX_CPU_SAFARI_ID 23 /* 0x17 */ 80*03831d35Sstevel #define SG_MIN_IO_SAFARI_ID 24 /* 0x18 */ 81*03831d35Sstevel #define SG_MAX_IO_SAFARI_ID 31 /* 0x1F */ 82*03831d35Sstevel 83*03831d35Sstevel 84*03831d35Sstevel /* 85*03831d35Sstevel * possible states for the Keyswitch Position. 86*03831d35Sstevel */ 87*03831d35Sstevel #define SG_KEYSWITCH_POSN_UNKNOWN (-1) 88*03831d35Sstevel #define SG_KEYSWITCH_POSN_ON 2 89*03831d35Sstevel #define SG_KEYSWITCH_POSN_DIAG 3 90*03831d35Sstevel #define SG_KEYSWITCH_POSN_SECURE 4 91*03831d35Sstevel 92*03831d35Sstevel 93*03831d35Sstevel 94*03831d35Sstevel /* 95*03831d35Sstevel * Macros 96*03831d35Sstevel * ====== 97*03831d35Sstevel */ 98*03831d35Sstevel 99*03831d35Sstevel /* we only need the 5 LSB of the portid to calculate the board number */ 100*03831d35Sstevel #define SG_SAFARI_ID_MASK 0x1F /* 5 bits */ 101*03831d35Sstevel #define SG_CPU_ID_MASK 0x21F /* bit 9 and bits 0-4 */ 102*03831d35Sstevel #define SG_CORE_ID_MASK 0x200 /* bit 9 */ 103*03831d35Sstevel #define SG_NODE_MASK 0x0F /* 4 bits */ 104*03831d35Sstevel #define SG_PORTID_NODE_SHIFT 5 105*03831d35Sstevel 106*03831d35Sstevel /* 107*03831d35Sstevel * For Serengeti and WildCat the portid consists of 10 bits. 108*03831d35Sstevel * 109*03831d35Sstevel * [9] [8 -------- 5][4 --------- 0] 110*03831d35Sstevel * ^ NodeID AgentID 111*03831d35Sstevel * |___ Used in CMP to identify core 1. Unused with non-CMP. 112*03831d35Sstevel * 113*03831d35Sstevel * For CPU boards: 114*03831d35Sstevel * Aid <4:2> : Board ID/Number 115*03831d35Sstevel * Aid <1:0> : CPU ID 116*03831d35Sstevel * For IO boards: 117*03831d35Sstevel * (Aid <4:0> - 24) / 2 + 6 : Board ID/Number 118*03831d35Sstevel * (Aid <4:0> - 24) % 2 : Schizo ID 119*03831d35Sstevel */ 120*03831d35Sstevel 121*03831d35Sstevel /* 122*03831d35Sstevel * For Jaguar there are two CPU IDs the can be derived from portid 123*03831d35Sstevel * and coreid. On Serengeti, bit 9 is set for core 1, resulting in 124*03831d35Sstevel * the cpuid for core 1 being 512 off from the one for core 0. 125*03831d35Sstevel */ 126*03831d35Sstevel #define SG_JG_CORE1_SHIFT 9 127*03831d35Sstevel #define SG_JG_CORE1_OFFSET (1 << SG_JG_CORE1_SHIFT) 128*03831d35Sstevel #define SG_PORTID_TO_CPUID(p, c) ((p) + ((c) << SG_JG_CORE1_SHIFT)) 129*03831d35Sstevel #define SG_PORTID_TO_CPU_UNIT(p, c) ((p % SG_MAX_CMPS_PER_BD) | \ 130*03831d35Sstevel ((c) * SG_MAX_CMPS_PER_BD)) 131*03831d35Sstevel #define SG_CPUID_TO_PORTID(c) ((c) & SG_SAFARI_ID_MASK) 132*03831d35Sstevel #define SG_CPUID_TO_COREID(c) (((c) & SG_CORE_ID_MASK) >> \ 133*03831d35Sstevel SG_JG_CORE1_SHIFT) 134*03831d35Sstevel #define SG_CPUID_TO_CPU_UNIT(c) SG_PORTID_TO_CPU_UNIT( \ 135*03831d35Sstevel SG_CPUID_TO_PORTID(c), \ 136*03831d35Sstevel SG_CPUID_TO_COREID(c)) 137*03831d35Sstevel 138*03831d35Sstevel /* 139*03831d35Sstevel * SG_PORTID_TO_NODEID 140*03831d35Sstevel * 141*03831d35Sstevel * Calculates the SSM NodeID from the portid 142*03831d35Sstevel */ 143*03831d35Sstevel #define SG_PORTID_TO_NODEID(portid) (((portid) >> SG_PORTID_NODE_SHIFT) & \ 144*03831d35Sstevel SG_NODE_MASK) 145*03831d35Sstevel 146*03831d35Sstevel /* 147*03831d35Sstevel * SG_PORTID_TO_SAFARI_ID 148*03831d35Sstevel * 149*03831d35Sstevel * Calculates the Safari Agent ID from the portid. 150*03831d35Sstevel */ 151*03831d35Sstevel #define SG_PORTID_TO_SAFARI_ID(portid) ((portid) & SG_SAFARI_ID_MASK) 152*03831d35Sstevel 153*03831d35Sstevel 154*03831d35Sstevel /* 155*03831d35Sstevel * SG_PORTID_TO_BOARD_NUM 156*03831d35Sstevel * 157*03831d35Sstevel * If a valid portid is passed in, this macro returns the board number 158*03831d35Sstevel * associated with it, otherwise it returns -1. 159*03831d35Sstevel */ 160*03831d35Sstevel #define SG_PORTID_TO_BOARD_NUM(portid) \ 161*03831d35Sstevel ((SG_PORTID_IS_CPU_TYPE(portid)) ? \ 162*03831d35Sstevel (SG_CPU_BD_PORTID_TO_BD_NUM(portid)) : \ 163*03831d35Sstevel ((SG_PORTID_IS_IO_TYPE(portid)) ? \ 164*03831d35Sstevel SG_IO_BD_PORTID_TO_BD_NUM(portid) : (-1))) 165*03831d35Sstevel 166*03831d35Sstevel /* 167*03831d35Sstevel * SG_BOARD_IS_CPU_TYPE 168*03831d35Sstevel * 169*03831d35Sstevel * If the board number of a board of CPU type is passed in, TRUE is returned, 170*03831d35Sstevel * otherwise FALSE. 171*03831d35Sstevel */ 172*03831d35Sstevel #define SG_BOARD_IS_CPU_TYPE(board_num) \ 173*03831d35Sstevel ((((board_num) >= 0) && ((board_num) < SG_MAX_CPU_BDS)) ? TRUE: FALSE) 174*03831d35Sstevel 175*03831d35Sstevel /* 176*03831d35Sstevel * SG_BOARD_IS_IO_TYPE 177*03831d35Sstevel * 178*03831d35Sstevel * If the board number of a board of IO type is passed in, TRUE is returned, 179*03831d35Sstevel * otherwise FALSE. 180*03831d35Sstevel */ 181*03831d35Sstevel #define SG_BOARD_IS_IO_TYPE(board_num) \ 182*03831d35Sstevel ((((board_num) >= SG_MAX_CPU_BDS) && \ 183*03831d35Sstevel ((board_num) < SG_MAX_BDS)) ? TRUE: FALSE) 184*03831d35Sstevel 185*03831d35Sstevel /* 186*03831d35Sstevel * SG_PORTID_IS_CPU_TYPE 187*03831d35Sstevel * 188*03831d35Sstevel * If the portid associated with a CPU board is passed in, TRUE is returned, 189*03831d35Sstevel * otherwise FALSE. 190*03831d35Sstevel */ 191*03831d35Sstevel #define SG_PORTID_IS_CPU_TYPE(portid) \ 192*03831d35Sstevel (((((portid) & SG_SAFARI_ID_MASK) >= SG_MIN_CPU_SAFARI_ID) && \ 193*03831d35Sstevel (((portid) & SG_SAFARI_ID_MASK) <= SG_MAX_CPU_SAFARI_ID)) ? TRUE: FALSE) 194*03831d35Sstevel 195*03831d35Sstevel /* 196*03831d35Sstevel * SG_PORTID_IS_IO_TYPE 197*03831d35Sstevel * 198*03831d35Sstevel * If the portid associated with an IO board is passed in, TRUE is returned, 199*03831d35Sstevel * otherwise FALSE. 200*03831d35Sstevel */ 201*03831d35Sstevel #define SG_PORTID_IS_IO_TYPE(portid) \ 202*03831d35Sstevel (((((portid) & SG_SAFARI_ID_MASK) >= SG_MIN_IO_SAFARI_ID) && \ 203*03831d35Sstevel (((portid) & SG_SAFARI_ID_MASK) <= SG_MAX_IO_SAFARI_ID)) ? TRUE: FALSE) 204*03831d35Sstevel 205*03831d35Sstevel /* 206*03831d35Sstevel * SG_CPU_BD_PORTID_TO_BD_NUM 207*03831d35Sstevel * 208*03831d35Sstevel * If the portid associated with a CPU board is passed in, the board number 209*03831d35Sstevel * associated with this portid is returned, otherwise -1. 210*03831d35Sstevel */ 211*03831d35Sstevel #define SG_CPU_BD_PORTID_TO_BD_NUM(portid) \ 212*03831d35Sstevel ((SG_PORTID_IS_CPU_TYPE(portid)) ? \ 213*03831d35Sstevel (((portid) & SG_SAFARI_ID_MASK) / 4) : (-1)) 214*03831d35Sstevel 215*03831d35Sstevel /* 216*03831d35Sstevel * SG_IO_BD_PORTID_TO_BD_NUM 217*03831d35Sstevel * 218*03831d35Sstevel * If the portid associated with an IO board is passed in, the board number 219*03831d35Sstevel * associated with this portid is returned, otherwise -1. 220*03831d35Sstevel */ 221*03831d35Sstevel #define SG_IO_BD_PORTID_TO_BD_NUM(portid) \ 222*03831d35Sstevel (SG_PORTID_IS_IO_TYPE(portid) ? \ 223*03831d35Sstevel (((((portid) & SG_SAFARI_ID_MASK) - 24) / 2) + 6) : (-1)) 224*03831d35Sstevel 225*03831d35Sstevel /* 226*03831d35Sstevel * SG_PORTID_TO_CPU_POSN 227*03831d35Sstevel * 228*03831d35Sstevel * If the portid associated with a CPU board is passed in, the position 229*03831d35Sstevel * of the CPU module for this portid is returned, otherwise -1. 230*03831d35Sstevel */ 231*03831d35Sstevel #define SG_PORTID_TO_CPU_POSN(portid) \ 232*03831d35Sstevel ((SG_PORTID_IS_CPU_TYPE(portid)) ? \ 233*03831d35Sstevel (((portid) & SG_SAFARI_ID_MASK) % 4) : (-1)) 234*03831d35Sstevel 235*03831d35Sstevel /* 236*03831d35Sstevel * Serengeti slices are defined by bits 34..41 of the physical address 237*03831d35Sstevel * space, and can contain Safari agent ID bits depending upon the SC 238*03831d35Sstevel * firmware being used. 239*03831d35Sstevel */ 240*03831d35Sstevel 241*03831d35Sstevel #define PA_SLICE_SHIFT (34) 242*03831d35Sstevel #define PFN_SLICE_SHIFT (PA_SLICE_SHIFT - MMU_PAGESHIFT) 243*03831d35Sstevel #define PA_2_SLICE(pa) (((pa) >> PA_SLICE_SHIFT) & SG_SLICE_MASK) 244*03831d35Sstevel #define PFN_2_SLICE(pfn) (((pfn) >> PFN_SLICE_SHIFT) & SG_SLICE_MASK) 245*03831d35Sstevel 246*03831d35Sstevel /* Define the max memory banks per CPU board */ 247*03831d35Sstevel #define SG_MAX_BANKS_PER_MC (4) 248*03831d35Sstevel 249*03831d35Sstevel /* Define the number of possible slices for the span of slice bits */ 250*03831d35Sstevel #define SG_SLICE_MASK (0xff) 251*03831d35Sstevel #define SG_MAX_SLICE (SG_SLICE_MASK + 1) 252*03831d35Sstevel 253*03831d35Sstevel /* 254*03831d35Sstevel * b represents the SB and c represents the processor (P) 255*03831d35Sstevel * in relation to the SB. 256*03831d35Sstevel */ 257*03831d35Sstevel #define MAKE_CPUID(b, c) ((b*4) + c) 258*03831d35Sstevel 259*03831d35Sstevel /* Each physical CPU has 2 ecache DIMMs */ 260*03831d35Sstevel #define SG_NUM_ECACHE_DIMMS_PER_CPU 2 261*03831d35Sstevel 262*03831d35Sstevel /* Bit 4 of the physical address indicates ecache dimm 0 or 1 */ 263*03831d35Sstevel #define SG_ECACHE_DIMM_SHIFT 4 264*03831d35Sstevel #define SG_ECACHE_DIMM_MASK 0x10 265*03831d35Sstevel 266*03831d35Sstevel extern dev_info_t *find_chosen_dip(void); 267*03831d35Sstevel 268*03831d35Sstevel extern int sg_get_prom_version(int *sysp, int *intfp, int *bldp); 269*03831d35Sstevel extern int sg_prom_sb_dr_check(void); 270*03831d35Sstevel extern int sg_prom_cpci_dr_check(void); 271*03831d35Sstevel extern int sg_get_ecacheunum(int cpuid, uint64_t physaddr, char *buf, 272*03831d35Sstevel uint_t buflen, int *lenp); 273*03831d35Sstevel 274*03831d35Sstevel #ifdef __cplusplus 275*03831d35Sstevel } 276*03831d35Sstevel #endif 277*03831d35Sstevel 278*03831d35Sstevel #endif /* _SYS_SERENGETI_H */ 279