1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #pragma ident "%Z%%M% %I% %E% SMI" 28 29 /* 30 * PCI nexus HotPlug devctl interface 31 */ 32 #include <sys/types.h> 33 #include <sys/conf.h> 34 #include <sys/kmem.h> 35 #include <sys/async.h> 36 #include <sys/sysmacros.h> 37 #include <sys/sunddi.h> 38 #include <sys/sunndi.h> 39 #include <sys/ddi_impldefs.h> 40 #include <sys/pci/pci_obj.h> 41 #include <sys/pci_tools.h> 42 #include <sys/pci_tools_var.h> 43 #include <sys/open.h> 44 #include <sys/errno.h> 45 #include <sys/file.h> 46 #include <sys/policy.h> 47 #include <sys/hotplug/pci/pcihp.h> 48 49 /*LINTLIBRARY*/ 50 51 static int pci_open(dev_t *devp, int flags, int otyp, cred_t *credp); 52 static int pci_close(dev_t dev, int flags, int otyp, cred_t *credp); 53 static int pci_devctl_ioctl(dev_info_t *dip, int cmd, intptr_t arg, int mode, 54 cred_t *credp, int *rvalp); 55 static int pci_ioctl(dev_t dev, int cmd, intptr_t arg, int mode, 56 cred_t *credp, int *rvalp); 57 static int pci_prop_op(dev_t dev, dev_info_t *dip, ddi_prop_op_t prop_op, 58 int flags, char *name, caddr_t valuep, int *lengthp); 59 60 struct cb_ops pci_cb_ops = { 61 pci_open, /* open */ 62 pci_close, /* close */ 63 nodev, /* strategy */ 64 nodev, /* print */ 65 nodev, /* dump */ 66 nodev, /* read */ 67 nodev, /* write */ 68 pci_ioctl, /* ioctl */ 69 nodev, /* devmap */ 70 nodev, /* mmap */ 71 nodev, /* segmap */ 72 nochpoll, /* poll */ 73 pci_prop_op, /* cb_prop_op */ 74 NULL, /* streamtab */ 75 D_NEW | D_MP | D_HOTPLUG, /* Driver compatibility flag */ 76 CB_REV, /* rev */ 77 nodev, /* int (*cb_aread)() */ 78 nodev /* int (*cb_awrite)() */ 79 }; 80 81 /* ARGSUSED3 */ 82 static int 83 pci_open(dev_t *devp, int flags, int otyp, cred_t *credp) 84 { 85 pci_t *pci_p; 86 87 /* 88 * Make sure the open is for the right file type. 89 */ 90 if (otyp != OTYP_CHR) 91 return (EINVAL); 92 93 /* 94 * Get the soft state structure for the device. 95 */ 96 pci_p = DEV_TO_SOFTSTATE(*devp); 97 if (pci_p == NULL) 98 return (ENXIO); 99 100 /* 101 * Handle the open by tracking the device state. 102 */ 103 DEBUG2(DBG_OPEN, pci_p->pci_dip, "devp=%x: flags=%x\n", devp, flags); 104 mutex_enter(&pci_p->pci_mutex); 105 if (flags & FEXCL) { 106 if (pci_p->pci_soft_state != PCI_SOFT_STATE_CLOSED) { 107 mutex_exit(&pci_p->pci_mutex); 108 DEBUG0(DBG_OPEN, pci_p->pci_dip, "busy\n"); 109 return (EBUSY); 110 } 111 pci_p->pci_soft_state = PCI_SOFT_STATE_OPEN_EXCL; 112 } else { 113 if (pci_p->pci_soft_state == PCI_SOFT_STATE_OPEN_EXCL) { 114 mutex_exit(&pci_p->pci_mutex); 115 DEBUG0(DBG_OPEN, pci_p->pci_dip, "busy\n"); 116 return (EBUSY); 117 } 118 pci_p->pci_soft_state = PCI_SOFT_STATE_OPEN; 119 } 120 pci_p->pci_open_count++; 121 mutex_exit(&pci_p->pci_mutex); 122 return (0); 123 } 124 125 126 /* ARGSUSED */ 127 static int 128 pci_close(dev_t dev, int flags, int otyp, cred_t *credp) 129 { 130 pci_t *pci_p; 131 132 if (otyp != OTYP_CHR) 133 return (EINVAL); 134 135 pci_p = DEV_TO_SOFTSTATE(dev); 136 if (pci_p == NULL) 137 return (ENXIO); 138 139 DEBUG2(DBG_CLOSE, pci_p->pci_dip, "dev=%x: flags=%x\n", dev, flags); 140 mutex_enter(&pci_p->pci_mutex); 141 pci_p->pci_soft_state = PCI_SOFT_STATE_CLOSED; 142 pci_p->pci_open_count = 0; 143 mutex_exit(&pci_p->pci_mutex); 144 return (0); 145 } 146 147 /* ARGSUSED */ 148 static int 149 pci_devctl_ioctl(dev_info_t *dip, int cmd, intptr_t arg, int mode, 150 cred_t *credp, int *rvalp) 151 { 152 int rv = 0; 153 struct devctl_iocdata *dcp; 154 uint_t bus_state; 155 156 /* 157 * We can use the generic implementation for these ioctls 158 */ 159 switch (cmd) { 160 case DEVCTL_DEVICE_GETSTATE: 161 case DEVCTL_DEVICE_ONLINE: 162 case DEVCTL_DEVICE_OFFLINE: 163 case DEVCTL_BUS_GETSTATE: 164 return (ndi_devctl_ioctl(dip, cmd, arg, mode, 0)); 165 } 166 167 /* 168 * read devctl ioctl data 169 */ 170 if (ndi_dc_allochdl((void *)arg, &dcp) != NDI_SUCCESS) 171 return (EFAULT); 172 173 switch (cmd) { 174 175 case DEVCTL_DEVICE_RESET: 176 DEBUG0(DBG_IOCTL, dip, "DEVCTL_DEVICE_RESET\n"); 177 rv = ENOTSUP; 178 break; 179 180 181 case DEVCTL_BUS_QUIESCE: 182 DEBUG0(DBG_IOCTL, dip, "DEVCTL_BUS_QUIESCE\n"); 183 if (ndi_get_bus_state(dip, &bus_state) == NDI_SUCCESS) 184 if (bus_state == BUS_QUIESCED) 185 break; 186 (void) ndi_set_bus_state(dip, BUS_QUIESCED); 187 break; 188 189 case DEVCTL_BUS_UNQUIESCE: 190 DEBUG0(DBG_IOCTL, dip, "DEVCTL_BUS_UNQUIESCE\n"); 191 if (ndi_get_bus_state(dip, &bus_state) == NDI_SUCCESS) 192 if (bus_state == BUS_ACTIVE) 193 break; 194 (void) ndi_set_bus_state(dip, BUS_ACTIVE); 195 break; 196 197 case DEVCTL_BUS_RESET: 198 DEBUG0(DBG_IOCTL, dip, "DEVCTL_BUS_RESET\n"); 199 rv = ENOTSUP; 200 break; 201 202 case DEVCTL_BUS_RESETALL: 203 DEBUG0(DBG_IOCTL, dip, "DEVCTL_BUS_RESETALL\n"); 204 rv = ENOTSUP; 205 break; 206 207 default: 208 rv = ENOTTY; 209 } 210 211 ndi_dc_freehdl(dcp); 212 return (rv); 213 } 214 215 216 static int 217 pci_ioctl(dev_t dev, int cmd, intptr_t arg, int mode, cred_t *credp, int *rvalp) 218 { 219 pci_t *pci_p; 220 dev_info_t *dip; 221 minor_t minor = getminor(dev); 222 int rv = ENOTTY; 223 224 pci_p = DEV_TO_SOFTSTATE(dev); 225 if (pci_p == NULL) 226 return (ENXIO); 227 228 dip = pci_p->pci_dip; 229 DEBUG2(DBG_IOCTL, dip, "dev=%x: cmd=%x\n", dev, cmd); 230 231 #ifdef PCI_DMA_TEST 232 if (IS_DMATEST(cmd)) { 233 *rvalp = pci_dma_test(cmd, dip, pci_p, arg); 234 return (0); 235 } 236 #endif 237 238 switch (PCIHP_AP_MINOR_NUM_TO_PCI_DEVNUM(minor)) { 239 case PCI_TOOL_REG_MINOR_NUM: 240 241 switch (cmd) { 242 case PCITOOL_DEVICE_SET_REG: 243 case PCITOOL_DEVICE_GET_REG: 244 245 /* Require full privileges. */ 246 if (secpolicy_kmdb(credp)) 247 rv = EPERM; 248 else 249 rv = pcitool_dev_reg_ops( 250 dev, (void *)arg, cmd, mode); 251 break; 252 253 case PCITOOL_NEXUS_SET_REG: 254 case PCITOOL_NEXUS_GET_REG: 255 256 /* Require full privileges. */ 257 if (secpolicy_kmdb(credp)) 258 rv = EPERM; 259 else 260 rv = pcitool_bus_reg_ops( 261 dev, (void *)arg, cmd, mode); 262 break; 263 } 264 265 break; 266 267 case PCI_TOOL_INTR_MINOR_NUM: 268 269 switch (cmd) { 270 case PCITOOL_DEVICE_SET_INTR: 271 272 /* Require PRIV_SYS_RES_CONFIG, same as psradm */ 273 if (secpolicy_ponline(credp)) { 274 rv = EPERM; 275 break; 276 } 277 278 /*FALLTHRU*/ 279 /* These require no special privileges. */ 280 case PCITOOL_DEVICE_GET_INTR: 281 case PCITOOL_DEVICE_NUM_INTR: 282 rv = pcitool_intr_admn(dev, (void *)arg, cmd, mode); 283 break; 284 } 285 286 break; 287 288 case PCIHP_DEVCTL_MINOR: 289 rv = pci_devctl_ioctl(dip, cmd, arg, mode, credp, rvalp); 290 break; 291 292 default: 293 break; 294 } 295 296 return (rv); 297 } 298 299 static int pci_prop_op(dev_t dev, dev_info_t *dip, ddi_prop_op_t prop_op, 300 int flags, char *name, caddr_t valuep, int *lengthp) 301 { 302 if (ddi_prop_exists(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS, 303 "hotplug-capable")) 304 return ((pcihp_get_cb_ops())->cb_prop_op(dev, dip, 305 prop_op, flags, name, valuep, lengthp)); 306 307 return (ddi_prop_op(dev, dip, prop_op, flags, name, valuep, lengthp)); 308 } 309