1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #pragma ident "%Z%%M% %I% %E% SMI" 28 29 /* 30 * PCI nexus HotPlug devctl interface 31 */ 32 #include <sys/types.h> 33 #include <sys/conf.h> 34 #include <sys/kmem.h> 35 #include <sys/async.h> 36 #include <sys/sysmacros.h> 37 #include <sys/sunddi.h> 38 #include <sys/sunndi.h> 39 #include <sys/ddi_impldefs.h> 40 #include <sys/pci/pci_obj.h> 41 #include <sys/pci_tools.h> 42 #include <sys/pci_tools_var.h> 43 #include <sys/open.h> 44 #include <sys/errno.h> 45 #include <sys/file.h> 46 #include <sys/policy.h> 47 #include <sys/hotplug/pci/pcihp.h> 48 49 /*LINTLIBRARY*/ 50 51 static int pci_open(dev_t *devp, int flags, int otyp, cred_t *credp); 52 static int pci_close(dev_t dev, int flags, int otyp, cred_t *credp); 53 static int pci_ioctl(dev_t dev, int cmd, intptr_t arg, int mode, 54 cred_t *credp, int *rvalp); 55 static int pci_prop_op(dev_t dev, dev_info_t *dip, ddi_prop_op_t prop_op, 56 int flags, char *name, caddr_t valuep, int *lengthp); 57 58 struct cb_ops pci_cb_ops = { 59 pci_open, /* open */ 60 pci_close, /* close */ 61 nodev, /* strategy */ 62 nodev, /* print */ 63 nodev, /* dump */ 64 nodev, /* read */ 65 nodev, /* write */ 66 pci_ioctl, /* ioctl */ 67 nodev, /* devmap */ 68 nodev, /* mmap */ 69 nodev, /* segmap */ 70 nochpoll, /* poll */ 71 pci_prop_op, /* cb_prop_op */ 72 NULL, /* streamtab */ 73 D_NEW | D_MP | D_HOTPLUG, /* Driver compatibility flag */ 74 CB_REV, /* rev */ 75 nodev, /* int (*cb_aread)() */ 76 nodev /* int (*cb_awrite)() */ 77 }; 78 79 /* ARGSUSED3 */ 80 static int 81 pci_open(dev_t *devp, int flags, int otyp, cred_t *credp) 82 { 83 pci_t *pci_p; 84 85 /* 86 * Make sure the open is for the right file type. 87 */ 88 if (otyp != OTYP_CHR) 89 return (EINVAL); 90 91 /* 92 * Get the soft state structure for the device. 93 */ 94 pci_p = DEV_TO_SOFTSTATE(*devp); 95 if (pci_p == NULL) 96 return (ENXIO); 97 98 /* 99 * Handle the open by tracking the device state. 100 */ 101 DEBUG2(DBG_OPEN, pci_p->pci_dip, "devp=%x: flags=%x\n", devp, flags); 102 mutex_enter(&pci_p->pci_mutex); 103 if (flags & FEXCL) { 104 if (pci_p->pci_soft_state != PCI_SOFT_STATE_CLOSED) { 105 mutex_exit(&pci_p->pci_mutex); 106 DEBUG0(DBG_OPEN, pci_p->pci_dip, "busy\n"); 107 return (EBUSY); 108 } 109 pci_p->pci_soft_state = PCI_SOFT_STATE_OPEN_EXCL; 110 } else { 111 if (pci_p->pci_soft_state == PCI_SOFT_STATE_OPEN_EXCL) { 112 mutex_exit(&pci_p->pci_mutex); 113 DEBUG0(DBG_OPEN, pci_p->pci_dip, "busy\n"); 114 return (EBUSY); 115 } 116 pci_p->pci_soft_state = PCI_SOFT_STATE_OPEN; 117 } 118 pci_p->pci_open_count++; 119 mutex_exit(&pci_p->pci_mutex); 120 return (0); 121 } 122 123 124 /* ARGSUSED */ 125 static int 126 pci_close(dev_t dev, int flags, int otyp, cred_t *credp) 127 { 128 pci_t *pci_p; 129 130 if (otyp != OTYP_CHR) 131 return (EINVAL); 132 133 pci_p = DEV_TO_SOFTSTATE(dev); 134 if (pci_p == NULL) 135 return (ENXIO); 136 137 DEBUG2(DBG_CLOSE, pci_p->pci_dip, "dev=%x: flags=%x\n", dev, flags); 138 mutex_enter(&pci_p->pci_mutex); 139 pci_p->pci_soft_state = PCI_SOFT_STATE_CLOSED; 140 pci_p->pci_open_count = 0; 141 mutex_exit(&pci_p->pci_mutex); 142 return (0); 143 } 144 145 /* ARGSUSED */ 146 static int 147 pci_ioctl(dev_t dev, int cmd, intptr_t arg, int mode, cred_t *credp, int *rvalp) 148 { 149 pci_t *pci_p; 150 dev_info_t *dip; 151 struct devctl_iocdata *dcp; 152 uint_t bus_state; 153 int rv = 0; 154 155 pci_p = DEV_TO_SOFTSTATE(dev); 156 if (pci_p == NULL) 157 return (ENXIO); 158 159 dip = pci_p->pci_dip; 160 DEBUG2(DBG_IOCTL, dip, "dev=%x: cmd=%x\n", dev, cmd); 161 #ifdef PCI_DMA_TEST 162 if (IS_DMATEST(cmd)) { 163 *rvalp = pci_dma_test(cmd, dip, pci_p, arg); 164 return (0); 165 } 166 #endif 167 168 /* 169 * PCI tools. 170 */ 171 172 if ((cmd & ~IOCPARM_MASK) == PCITOOL_IOC) { 173 switch (cmd) { 174 case PCITOOL_DEVICE_SET_REG: 175 case PCITOOL_DEVICE_GET_REG: 176 177 /* Require full privileges. */ 178 if (secpolicy_kmdb(credp)) 179 rv = EPERM; 180 else 181 rv = pcitool_dev_reg_ops( 182 dev, (void *)arg, cmd, mode); 183 break; 184 185 case PCITOOL_NEXUS_SET_REG: 186 case PCITOOL_NEXUS_GET_REG: 187 188 /* Require full privileges. */ 189 if (secpolicy_kmdb(credp)) 190 rv = EPERM; 191 else 192 rv = pcitool_bus_reg_ops( 193 dev, (void *)arg, cmd, mode); 194 break; 195 196 case PCITOOL_DEVICE_SET_INTR: 197 198 /* Require PRIV_SYS_RES_CONFIG, same as psradm */ 199 if (secpolicy_ponline(credp)) { 200 rv = EPERM; 201 break; 202 } 203 204 /*FALLTHRU*/ 205 /* These require no special privileges. */ 206 case PCITOOL_DEVICE_GET_INTR: 207 case PCITOOL_DEVICE_NUM_INTR: 208 rv = pcitool_intr_admn(dev, (void *)arg, cmd, mode); 209 break; 210 211 default: 212 rv = ENOTTY; 213 break; 214 } 215 216 return (rv); 217 } 218 219 /* 220 * We can use the generic implementation for these ioctls 221 */ 222 switch (cmd) { 223 case DEVCTL_DEVICE_GETSTATE: 224 case DEVCTL_DEVICE_ONLINE: 225 case DEVCTL_DEVICE_OFFLINE: 226 case DEVCTL_BUS_GETSTATE: 227 return (ndi_devctl_ioctl(dip, cmd, arg, mode, 0)); 228 } 229 230 /* 231 * read devctl ioctl data 232 */ 233 if (ndi_dc_allochdl((void *)arg, &dcp) != NDI_SUCCESS) 234 return (EFAULT); 235 236 switch (cmd) { 237 238 case DEVCTL_DEVICE_RESET: 239 DEBUG0(DBG_IOCTL, dip, "DEVCTL_DEVICE_RESET\n"); 240 rv = ENOTSUP; 241 break; 242 243 244 case DEVCTL_BUS_QUIESCE: 245 DEBUG0(DBG_IOCTL, dip, "DEVCTL_BUS_QUIESCE\n"); 246 if (ndi_get_bus_state(dip, &bus_state) == NDI_SUCCESS) 247 if (bus_state == BUS_QUIESCED) 248 break; 249 (void) ndi_set_bus_state(dip, BUS_QUIESCED); 250 break; 251 252 case DEVCTL_BUS_UNQUIESCE: 253 DEBUG0(DBG_IOCTL, dip, "DEVCTL_BUS_UNQUIESCE\n"); 254 if (ndi_get_bus_state(dip, &bus_state) == NDI_SUCCESS) 255 if (bus_state == BUS_ACTIVE) 256 break; 257 (void) ndi_set_bus_state(dip, BUS_ACTIVE); 258 break; 259 260 case DEVCTL_BUS_RESET: 261 DEBUG0(DBG_IOCTL, dip, "DEVCTL_BUS_RESET\n"); 262 rv = ENOTSUP; 263 break; 264 265 case DEVCTL_BUS_RESETALL: 266 DEBUG0(DBG_IOCTL, dip, "DEVCTL_BUS_RESETALL\n"); 267 rv = ENOTSUP; 268 break; 269 270 default: 271 rv = ENOTTY; 272 } 273 274 ndi_dc_freehdl(dcp); 275 return (rv); 276 } 277 278 static int pci_prop_op(dev_t dev, dev_info_t *dip, ddi_prop_op_t prop_op, 279 int flags, char *name, caddr_t valuep, int *lengthp) 280 { 281 if (ddi_prop_exists(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS, 282 "hotplug-capable")) 283 return ((pcihp_get_cb_ops())->cb_prop_op(dev, dip, 284 prop_op, flags, name, valuep, lengthp)); 285 286 return (ddi_prop_op(dev, dip, prop_op, flags, name, valuep, lengthp)); 287 } 288