xref: /titanic_44/usr/src/uts/sun4/io/px/px_space.h (revision c36bd4ef54329d6af405a11302d4d4bbf1bc65c7)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License, Version 1.0 only
6  * (the "License").  You may not use this file except in compliance
7  * with the License.
8  *
9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10  * or http://www.opensolaris.org/os/licensing.
11  * See the License for the specific language governing permissions
12  * and limitations under the License.
13  *
14  * When distributing Covered Code, include this CDDL HEADER in each
15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16  * If applicable, add the following below this CDDL HEADER, with the
17  * fields enclosed by brackets "[]" replaced with your own identifying
18  * information: Portions Copyright [yyyy] [name of copyright owner]
19  *
20  * CDDL HEADER END
21  */
22 /*
23  * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #ifndef	_SYS_PX_SPACE_H
28 #define	_SYS_PX_SPACE_H
29 
30 #pragma ident	"%Z%%M%	%I%	%E% SMI"
31 
32 #ifdef	__cplusplus
33 extern "C" {
34 #endif
35 
36 #define	PX_SPURINTR_MSG_DEFAULT -1ull
37 
38 extern ushort_t px_command_default;
39 extern uint_t px_set_latency_timer_register;
40 extern uint64_t px_perr_fatal;
41 extern uint64_t px_serr_fatal;
42 extern hrtime_t px_intrpend_timeout;
43 extern uint_t px_unclaimed_intr_max;
44 extern uint_t px_unclaimed_intr_block;
45 extern uint32_t px_spurintr_duration;
46 extern uint64_t px_spurintr_msgs;
47 extern uint_t px_stream_buf_enable;
48 extern uint_t px_stream_buf_exists;
49 extern uint_t px_use_contexts;
50 extern uint_t px_ctx_no_active_flush;
51 extern uint_t px_context_minpages;
52 
53 extern uint_t px_mmu_error_intr_enable;
54 extern uint_t px_rerun_disable;
55 
56 extern uint_t px_error_intr_enable;
57 extern uint_t px_dwsync_disable;
58 extern uint_t px_intsync_disable;
59 
60 extern uint_t px_intr_retry_intv;
61 extern uint8_t px_latency_timer;
62 extern uint_t px_panic_on_fatal_errors;
63 extern uint_t px_thermal_intr_fatal;
64 extern uint_t px_buserr_interrupt;
65 
66 extern uint64_t px_errtrig_pa;
67 
68 extern uint_t px_check_all_handlers;
69 extern uint_t px_lock_tlb;
70 
71 extern uint64_t px_dvma_debug_on;
72 extern uint64_t px_dvma_debug_off;
73 extern uint32_t px_dvma_debug_rec;
74 extern uint_t px_dvma_page_cache_entries;
75 extern uint_t px_dvma_page_cache_clustsz;
76 extern int px_dvma_sync_before_unmap;
77 #ifdef	PX_DMA_PROF
78 extern uint_t px_dvmaft_npages;
79 extern uint_t px_dvmaft_limit;
80 extern uint_t px_dvmaft_free;
81 extern uint_t px_dvmaft_success;
82 extern uint_t px_dvmaft_exhaust;
83 extern uint_t px_dvma_vmem_alloc;
84 extern uint_t px_dvma_vmem_xalloc;
85 extern uint_t px_dvma_vmem_free;
86 extern uint_t px_dvma_vmem_xfree;
87 #endif	/* PX_DMA_PROF */
88 extern uint_t px_disable_fdvma;
89 
90 extern uint_t px_iommu_ctx_lock_failure;
91 extern uint_t px_preserve_iommu_tsb;
92 extern uintptr_t px_kmem_clid;
93 extern uint_t px_err_log_all;
94 
95 #define	PX_ERR_EN_ALL			-1ull
96 #define	PX_ERR_MASK_NONE		0ull
97 
98 extern uint64_t px_tlu_ue_intr_mask;
99 extern uint64_t px_tlu_ue_log_mask;
100 extern uint64_t px_tlu_ue_count_mask;
101 
102 extern uint64_t px_tlu_ce_intr_mask;
103 extern uint64_t px_tlu_ce_log_mask;
104 extern uint64_t px_tlu_ce_count_mask;
105 
106 extern uint64_t px_tlu_oe_intr_mask;
107 extern uint64_t px_tlu_oe_log_mask;
108 extern uint64_t px_tlu_oe_count_mask;
109 
110 extern uint64_t px_mmu_intr_mask;
111 extern uint64_t px_mmu_log_mask;
112 extern uint64_t px_mmu_count_mask;
113 
114 extern uint64_t px_imu_intr_mask;
115 extern uint64_t px_imu_log_mask;
116 extern uint64_t px_imu_count_mask;
117 
118 #define	LPU_INTR_ENABLE 0ull
119 #define	LPU_INTR_DISABLE -1ull
120 
121 extern uint64_t px_ilu_intr_mask;
122 extern uint64_t px_ilu_log_mask;
123 extern uint64_t px_ilu_count_mask;
124 
125 extern uint64_t px_cb_intr_mask;
126 extern uint64_t px_cb_log_mask;
127 extern uint64_t px_cb_count_mask;
128 
129 extern uint64_t px_lpul_intr_mask;
130 extern uint64_t px_lpul_log_mask;
131 extern uint64_t px_lpul_count_mask;
132 
133 extern uint64_t px_lpup_intr_mask;
134 extern uint64_t px_lpup_log_mask;
135 extern uint64_t px_lpup_count_mask;
136 
137 extern uint64_t px_lpur_intr_mask;
138 extern uint64_t px_lpur_log_mask;
139 extern uint64_t px_lpur_count_mask;
140 
141 extern uint64_t px_lpux_intr_mask;
142 extern uint64_t px_lpux_log_mask;
143 extern uint64_t px_lpux_count_mask;
144 
145 extern uint64_t px_lpus_intr_mask;
146 extern uint64_t px_lpus_log_mask;
147 extern uint64_t px_lpus_count_mask;
148 
149 extern uint64_t px_lpug_intr_mask;
150 extern uint64_t px_lpug_log_mask;
151 extern uint64_t px_lpug_count_mask;
152 
153 #define	PX_PME_TO_ACK_TIMEOUT	1000000
154 #define	PX_PWR_PIL		1
155 
156 extern uint64_t px_pme_to_ack_timeout;
157 extern uint32_t	px_pwr_pil;
158 
159 #ifdef	__cplusplus
160 }
161 #endif
162 
163 #endif	/* _SYS_PX_SPACE_H */
164