1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _SYS_PX_PEC_H 28 #define _SYS_PX_PEC_H 29 30 #pragma ident "%Z%%M% %I% %E% SMI" 31 32 #include <sys/types.h> 33 #include <sys/ontrap.h> 34 35 #ifdef __cplusplus 36 extern "C" { 37 #endif 38 39 /* 40 * The following structure represents the pci-express configuration 41 * header for a fire PEC. 42 */ 43 typedef struct px_config_header { 44 volatile uint16_t ch_vendor_id; 45 volatile uint16_t ch_device_id; 46 volatile uint16_t ch_command_reg; 47 volatile uint16_t ch_status_reg; 48 volatile uint8_t ch_revision_id_reg; 49 volatile uint8_t ch_programming_if_code_reg; 50 volatile uint8_t ch_sub_class_reg; 51 volatile uint8_t ch_base_class_reg; 52 volatile uint8_t ch_cache_line_size_reg; 53 volatile uint8_t ch_latency_timer_reg; 54 volatile uint8_t ch_header_type_reg; 55 } px_config_header_t; 56 57 /* 58 * Bit fields of ch_status_reg for cmn_err's %b 59 */ 60 #define PX_STATUS_BITS "\020\ 61 \11signaled-parity-error\ 62 \14signaled-target-abort\ 63 \15received-target-abort\ 64 \16received-master-abort\ 65 \17signaled-system-error\ 66 \20detected-parity-error" 67 68 /* 69 * pec block soft state structure: 70 * 71 * Each px node has its own private pec block structure. 72 */ 73 typedef struct px_pec { 74 px_t *pec_px_p; /* link back to px soft state */ 75 76 /* 77 * PCI configuration header block for the PBM: 78 * config_header_t *pec_config_header; 79 * ddi_acc_handle_t pec_config_ac; 80 */ 81 82 /* 83 * Memory address range on this PBM used to determine DMA on this pec 84 */ 85 px_iopfn_t pec_base32_pfn; 86 px_iopfn_t pec_last32_pfn; 87 px_iopfn_t pec_base64_pfn; 88 px_iopfn_t pec_last64_pfn; 89 90 /* 91 * support for ddi_poke: 92 */ 93 on_trap_data_t *pec_ontrap_data; 94 kmutex_t pec_pokefault_mutex; 95 96 #define PBM_NAMESTR_BUFLEN 64 97 /* driver name & instance */ 98 char pec_nameinst_str[PBM_NAMESTR_BUFLEN]; 99 100 /* nodename & node_addr */ 101 char *pec_nameaddr_str; 102 103 /* MSIQ used for correctable/fatal/non fatala PCIe messages */ 104 msiqid_t pec_corr_msg_msiq_id; 105 msiqid_t pec_non_fatal_msg_msiq_id; 106 msiqid_t pec_fatal_msg_msiq_id; 107 msiq_rec_t *pec_msiq_rec_p; 108 } px_pec_t; 109 110 /* 111 * forward declarations (object creation and destruction): 112 */ 113 114 extern int px_pec_attach(px_t *px_p); 115 extern void px_pec_detach(px_t *px_p); 116 117 extern uint_t px_pec_corr_msg_intr(caddr_t arg); 118 extern uint_t px_pec_non_fatal_msg_intr(caddr_t arg); 119 extern uint_t px_pec_fatal_msg_intr(caddr_t arg); 120 121 #ifdef __cplusplus 122 } 123 #endif 124 125 #endif /* _SYS_PX_PEC_H */ 126