xref: /titanic_44/usr/src/uts/sparc/v7/sys/psr.h (revision 0dc2366f7b9f9f36e10909b1e95edbf2a261c2ac)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License, Version 1.0 only
6  * (the "License").  You may not use this file except in compliance
7  * with the License.
8  *
9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10  * or http://www.opensolaris.org/os/licensing.
11  * See the License for the specific language governing permissions
12  * and limitations under the License.
13  *
14  * When distributing Covered Code, include this CDDL HEADER in each
15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16  * If applicable, add the following below this CDDL HEADER, with the
17  * fields enclosed by brackets "[]" replaced with your own identifying
18  * information: Portions Copyright [yyyy] [name of copyright owner]
19  *
20  * CDDL HEADER END
21  */
22 /*
23  * Copyright 1986,2003 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #ifndef _SYS_PSR_H
28 #define	_SYS_PSR_H
29 
30 #pragma ident	"%Z%%M%	%I%	%E% SMI" /* from SunOS psl.h 1.2 */
31 
32 #ifdef	__cplusplus
33 extern "C" {
34 #endif
35 
36 /*
37  * Definition of bits in the SPARC PSR (Processor Status Register)
38  *  ________________________________________________________________________
39  * | IMPL | VER	|	ICC	| resvd	| EC | EF | PIL	| S | PS | ET | CWP |
40  * |	  |	| N | Z | V | C |	|    |	  |	|   |	 |    |	    |
41  * |------|-----|---|---|---|---|-------|----|----|-----|---|----|----|-----|
42  *  31  28 27 24  23  22  21  20 19   14  13   12  11  8   7   6    5  4   0
43  *
44  * Reserved bits are defined to be initialized to zero and must
45  * be preserved if written, for compatabily with future revisions.
46  */
47 
48 #define	PSR_CWP		0x0000001F	/* current window pointer */
49 #define	PSR_ET		0x00000020	/* enable traps */
50 #define	PSR_PS		0x00000040	/* previous supervisor mode */
51 #define	PSR_S		0x00000080	/* supervisor mode */
52 #define	PSR_PIL		0x00000F00	/* processor interrupt level */
53 #define	PSR_EF		0x00001000	/* enable floating point unit */
54 #define	PSR_EC		0x00002000	/* enable coprocessor */
55 #define	PSR_RSV		0x000FC000	/* reserved */
56 #define	PSR_ICC		0x00F00000	/* integer condition codes */
57 #define	PSR_C		0x00100000	/* carry bit */
58 #define	PSR_V		0x00200000	/* overflow bit */
59 #define	PSR_Z		0x00400000	/* zero bit */
60 #define	PSR_N		0x00800000	/* negative bit */
61 #define	PSR_VER		0x0F000000	/* mask version */
62 #define	PSR_IMPL	0xF0000000	/* implementation */
63 
64 #define	PSL_ALLCC	PSR_ICC		/* for portability */
65 
66 #ifndef _ASM
67 typedef int	psw_t;
68 #endif
69 
70 /*
71  * Handy psr values.
72  */
73 #define	PSL_USER	(PSR_S)		/* initial user psr */
74 #define	PSL_USERMASK	(PSR_ICC)	/* user variable psr bits */
75 
76 #define	PSL_UBITS	(PSR_ICC|PSR_EF)	/* user modifiable fields */
77 						/* should set PSR_EC also */
78 
79 #ifdef	__cplusplus
80 }
81 #endif
82 
83 #endif	/* _SYS_PSR_H */
84