xref: /titanic_44/usr/src/uts/intel/sys/kdi_regs.h (revision 82629e3015252bf18319ba3815c773df23e21436)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 #ifndef _SYS_KDI_REGS_H
27 #define	_SYS_KDI_REGS_H
28 
29 #pragma ident	"%Z%%M%	%I%	%E% SMI"
30 
31 #ifndef _ASM
32 #include <sys/types.h>
33 #include <sys/segments.h>
34 #include <sys/regset.h>
35 #include <sys/privregs.h>
36 #endif
37 
38 #if defined(__amd64)
39 #include <amd64/sys/kdi_regs.h>
40 #elif defined(__i386)
41 #include <ia32/sys/kdi_regs.h>
42 #endif
43 
44 #ifdef __cplusplus
45 extern "C" {
46 #endif
47 
48 #define	KDI_NCRUMBS	5
49 
50 #define	KDI_CPU_STATE_NONE		0
51 #define	KDI_CPU_STATE_MASTER		1
52 #define	KDI_CPU_STATE_SLAVE		2
53 
54 #define	KDIREG_DRCTL_WPALLEN_MASK	0x000000ff
55 #define	KDIREG_DRSTAT_RESERVED		0xffff0ff0
56 #define	KDIREG_DRCTL_RESERVED		0x00000700
57 
58 #define	KDI_MSR_READ		0x1	/* read during entry (unlimited) */
59 #define	KDI_MSR_WRITE		0x2	/* write during exit (unlimited) */
60 #define	KDI_MSR_WRITEDELAY	0x4	/* write after last branch (<= 1) */
61 #define	KDI_MSR_CLEARENTRY	0x3	/* clear before 1st branch (<= 1) */
62 
63 #ifndef _ASM
64 
65 /*
66  * We maintain a ring buffer of bread crumbs for debugging purposes.  The
67  * current buffer pointer is advanced along the ring with each intercepted
68  * trap (debugger entry, invalid memory access, fault during step, etc).
69  */
70 typedef struct kdi_crumb {
71 	greg_t krm_cpu_state;	/* This CPU's state at last entry */
72 	greg_t krm_pc;		/* Instruction pointer at trap */
73 	greg_t krm_sp;		/* Stack pointer at trap */
74 	greg_t krm_trapno;	/* The last trap number */
75 	greg_t krm_flag;	/* KAIF_CRUMB_F_* */
76 } kdi_crumb_t;
77 
78 #define	KDI_MAXWPIDX	3
79 
80 /*
81  * Storage for %dr0-3, %dr6, and %dr7.
82  */
83 typedef struct kdi_drreg {
84 	greg_t			dr_ctl;
85 	greg_t			dr_stat;
86 	greg_t			dr_addr[KDI_MAXWPIDX + 1];
87 } kdi_drreg_t;
88 
89 typedef struct kdi_msr {
90 	uint_t		msr_num;
91 	uint_t		msr_type;
92 	union {
93 		uint64_t *_msr_valp;
94 		uint64_t _msr_val;
95 	} _u;
96 } kdi_msr_t;
97 
98 #define	kdi_msr_val	_u._msr_val
99 #define	kdi_msr_valp	_u._msr_valp
100 
101 /*
102  * Data structure used to hold all of the state for a given CPU.
103  */
104 typedef struct kdi_cpusave {
105 	greg_t			*krs_gregs;	/* saved registers */
106 
107 	kdi_drreg_t		krs_dr;		/* saved debug registers */
108 
109 	user_desc_t		*krs_gdt;	/* GDT address */
110 	gate_desc_t		*krs_idt;	/* IDT address */
111 
112 	greg_t			krs_cr0;	/* saved %cr0 */
113 
114 	kdi_msr_t		*krs_msr;	/* ptr to MSR save area */
115 
116 	uint_t			krs_cpu_state;	/* KDI_CPU_STATE_* mstr/slv */
117 	uint_t			krs_cpu_flushed; /* Have caches been flushed? */
118 	uint_t			krs_cpu_id;	/* this CPU's ID */
119 
120 	/* Bread crumb ring buffer */
121 	ulong_t			krs_curcrumbidx; /* Current krs_crumbs idx */
122 	kdi_crumb_t		*krs_curcrumb;	/* Pointer to current crumb */
123 	kdi_crumb_t		krs_crumbs[KDI_NCRUMBS]; /* Crumbs */
124 } kdi_cpusave_t;
125 
126 #endif /* !_ASM */
127 
128 #ifdef __cplusplus
129 }
130 #endif
131 
132 #endif /* _SYS_KDI_REGS_H */
133