1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _SYS_FM_CPU_GMCA_H 28 #define _SYS_FM_CPU_GMCA_H 29 30 #ifdef __cplusplus 31 extern "C" { 32 #endif 33 34 /* 35 * Generic x86 cpu ereports. 36 * 37 * On a machine-check exception, or on a periodic poll for error status 38 * of a cpu, we read through all the MCA banks of the processor and 39 * log an ereport for each MCA bank that contains valid error telemetry. 40 * These ereports will all share the same detector FMRI and ENA. 41 * 42 * Since we have no model-specific knowledge of the cpu we cannot 43 * decode all details of the error, so we'll stick to the "architectural" 44 * bits. Similarly since we have no associated memory-controller driver 45 * or detailed topology information we cannot produce "resource" ereport 46 * FMRIs. 47 */ 48 49 /* Ereport class subcategory for generic x86 processors */ 50 #define FM_EREPORT_CPU_GENERIC "generic-x86" 51 52 /* 53 * Simple error code ereport leaf classes 54 */ 55 #define FM_EREPORT_CPU_GENERIC_UNCLASSIFIED "unclassified" 56 #define FM_EREPORT_CPU_GENERIC_MC_CODE_PARITY "microcode_rom_parity" 57 #define FM_EREPORT_CPU_GENERIC_EXTERNAL "external" 58 #define FM_EREPORT_CPU_GENERIC_FRC "frc" 59 #define FM_EREPORT_CPU_GENERIC_INTERNAL_PARITY "internal_parity" 60 #define FM_EREPORT_CPU_GENERIC_INTERNAL_TIMER "internal_timer" 61 #define FM_EREPORT_CPU_GENERIC_INTERNAL_UNCLASS "internal_unclassified" 62 63 /* 64 * Leaf class to be used when we can match no simple or compound class 65 */ 66 #define FM_EREPORT_CPU_GENERIC_UNKNOWN "unknown" 67 68 /* 69 * Compound error code ereport leaf classes. The arguments for snprintf 70 * will appear in the following order: 71 * 72 * 1 - TT interpretation 73 * 2 - LL interpretation 74 * 3 - RRRR interpretation 75 * 4 - PP interpretation 76 * 5 - II interpretation 77 * 6 - T interpretation 78 * 7 - "_uc" if this is a compound error with MCi_STATUS.UC set, else "" 79 * 8 - CCCC interpretation 80 * 9 - MMM interpretation 81 * 82 * They can be selected in the format string using the %n$s specifier form. 83 * 84 * The set of interpretations that we expand to will not be exactly the 85 * same as the set of mnemonics described in Vol 3A (see the 86 * FM_EREPORT_PAYLOAD_NAME_COMPOUND_ERR ereport payload member for that). 87 * Instead we wish to compress the possible ereport classes that can 88 * be generated by pushing things such as "LG" for generic cache level 89 * down to "". 90 * 91 * 92 * "Memory Hierarchy" in compound errors actually refers to CPU cache 93 * memory. 94 */ 95 #define FM_EREPORT_CPU_GENERIC_GENMEMHIER "%2$s" "cache" "%7$s" 96 #define FM_EREPORT_CPU_GENERIC_TLB "%2$s" "%1$s" "tlb" "%7$s" 97 #define FM_EREPORT_CPU_GENERIC_MEMHIER "%2$s" "%1$s" "cache" "%7$s" 98 #define FM_EREPORT_CPU_GENERIC_BUS_INTERCONNECT "bus_interconnect" "%5$s" "%7$s" 99 #define FM_EREPORT_CPU_GENERIC_MEMORY_CONTROLLER "mc" 100 101 /* 102 * The "interpretation" expansions for the above ereport leaf subclasses. 103 */ 104 #define FM_EREPORT_CPU_GENERIC_TT_INSTR "i" 105 #define FM_EREPORT_CPU_GENERIC_TT_DATA "d" 106 #define FM_EREPORT_CPU_GENERIC_TT_GEN "" 107 108 #define FM_EREPORT_CPU_GENERIC_LL_L0 "l0" 109 #define FM_EREPORT_CPU_GENERIC_LL_L1 "l1" 110 #define FM_EREPORT_CPU_GENERIC_LL_L2 "l2" 111 #define FM_EREPORT_CPU_GENERIC_LL_LG "" 112 113 #define FM_EREPORT_CPU_GENERIC_RRRR_ERR "" 114 #define FM_EREPORT_CPU_GENERIC_RRRR_RD "" 115 #define FM_EREPORT_CPU_GENERIC_RRRR_WR "" 116 #define FM_EREPORT_CPU_GENERIC_RRRR_DRD "" 117 #define FM_EREPORT_CPU_GENERIC_RRRR_DWR "" 118 #define FM_EREPORT_CPU_GENERIC_RRRR_IRD "" 119 #define FM_EREPORT_CPU_GENERIC_RRRR_PREFETCH "" 120 #define FM_EREPORT_CPU_GENERIC_RRRR_EVICT "" 121 #define FM_EREPORT_CPU_GENERIC_RRRR_SNOOP "" 122 123 #define FM_EREPORT_CPU_GENERIC_PP_SRC "" 124 #define FM_EREPORT_CPU_GENERIC_PP_RES "" 125 #define FM_EREPORT_CPU_GENERIC_PP_OBS "" 126 #define FM_EREPORT_CPU_GENERIC_PP_GEN "" 127 128 #define FM_EREPORT_CPU_GENERIC_II_MEM "_memory" 129 #define FM_EREPORT_CPU_GENERIC_II_IO "_io" 130 #define FM_EREPORT_CPU_GENERIC_II_GEN "" 131 132 #define FM_EREPORT_CPU_GENERIC_T_NOTIMEOUT "" 133 #define FM_EREPORT_CPU_GENERIC_T_TIMEOUT "" 134 135 #define FM_EREPORT_CPU_GENERIC_CCCC "" 136 137 #define FM_EREPORT_CPU_GENERIC_MMM_ERR "" 138 #define FM_EREPORT_CPU_GENERIC_MMM_RD "" 139 #define FM_EREPORT_CPU_GENERIC_MMM_WR "" 140 #define FM_EREPORT_CPU_GENERIC_MMM_ADRCMD "" 141 #define FM_EREPORT_CPU_GENERIC_MMM_SCRUB "" 142 143 /* 144 * Ereport payload member names together with bitmask values to select 145 * their inclusion in ereports. 146 */ 147 148 #define _FM_EREPORT_FLAG(n) (1ULL << (n)) 149 150 #define FM_EREPORT_PAYLOAD_FLAG_COMPOUND_ERR _FM_EREPORT_FLAG(1) 151 #define FM_EREPORT_PAYLOAD_NAME_COMPOUND_ERR "compound_errorname" 152 153 #define FM_EREPORT_PAYLOAD_FLAG_MCG_STATUS _FM_EREPORT_FLAG(2) 154 #define FM_EREPORT_PAYLOAD_NAME_MCG_STATUS "IA32_MCG_STATUS" 155 #define FM_EREPORT_PAYLOAD_NAME_MCG_STATUS_MCIP "machine_check_in_progress" 156 157 #define FM_EREPORT_PAYLOAD_FLAG_IP _FM_EREPORT_FLAG(3) 158 #define FM_EREPORT_PAYLOAD_NAME_IP "ip" 159 160 #define FM_EREPORT_PAYLOAD_FLAG_PRIV _FM_EREPORT_FLAG(4) 161 #define FM_EREPORT_PAYLOAD_NAME_PRIV "privileged" 162 163 #define FM_EREPORT_PAYLOAD_FLAG_BANK_NUM _FM_EREPORT_FLAG(5) 164 #define FM_EREPORT_PAYLOAD_NAME_BANK_NUM "bank_number" 165 #define FM_EREPORT_PAYLOAD_NAME_BANK_MSR_OFFSET "bank_msr_offset" 166 167 #define FM_EREPORT_PAYLOAD_FLAG_MC_STATUS _FM_EREPORT_FLAG(6) 168 #define FM_EREPORT_PAYLOAD_NAME_MC_STATUS "IA32_MCi_STATUS" 169 #define FM_EREPORT_PAYLOAD_NAME_MC_STATUS_OVER "overflow" 170 #define FM_EREPORT_PAYLOAD_NAME_MC_STATUS_UC "error_uncorrected" 171 #define FM_EREPORT_PAYLOAD_NAME_MC_STATUS_EN "error_enabled" 172 #define FM_EREPORT_PAYLOAD_NAME_MC_STATUS_PCC "processor_context_corrupt" 173 #define FM_EREPORT_PAYLOAD_NAME_MC_STATUS_TES "threshold_based_error_status" 174 #define FM_EREPORT_PAYLOAD_NAME_MC_STATUS_ERRCODE "error_code" 175 #define FM_EREPORT_PAYLOAD_NAME_MC_STATUS_EXTERRCODE "model_specific_error_code" 176 177 #define FM_EREPORT_PAYLOAD_FLAG_MC_ADDR _FM_EREPORT_FLAG(7) 178 #define FM_EREPORT_PAYLOAD_NAME_MC_ADDR "IA32_MCi_ADDR" 179 180 #define FM_EREPORT_PAYLOAD_FLAG_MC_MISC _FM_EREPORT_FLAG(8) 181 #define FM_EREPORT_PAYLOAD_NAME_MC_MISC "IA32_MCi_MISC" 182 183 #define FM_EREPORT_PAYLOAD_FLAG_DISP _FM_EREPORT_FLAG(9) 184 #define FM_EREPORT_PAYLOAD_NAME_DISP "disp" 185 186 /* 187 * Common combinations of payload members 188 */ 189 #define FM_EREPORT_PAYLOAD_FLAGS_GLOBAL \ 190 (FM_EREPORT_PAYLOAD_FLAG_MCG_STATUS | \ 191 FM_EREPORT_PAYLOAD_FLAG_IP | \ 192 FM_EREPORT_PAYLOAD_FLAG_PRIV) 193 194 #define FM_EREPORT_PAYLOAD_FLAGS_BANK \ 195 (FM_EREPORT_PAYLOAD_FLAG_BANK_NUM | \ 196 FM_EREPORT_PAYLOAD_FLAG_MC_STATUS | \ 197 FM_EREPORT_PAYLOAD_FLAG_MC_ADDR | \ 198 FM_EREPORT_PAYLOAD_FLAG_MC_MISC | \ 199 FM_EREPORT_PAYLOAD_FLAG_DISP) 200 201 #define FM_EREPORT_PAYLOAD_FLAGS_COMMON \ 202 (FM_EREPORT_PAYLOAD_FLAGS_GLOBAL | FM_EREPORT_PAYLOAD_FLAGS_BANK) 203 204 #define FM_EREPORT_PAYLOAD_FLAGS_COMPOUND_ERR \ 205 (FM_EREPORT_PAYLOAD_FLAGS_COMMON | FM_EREPORT_PAYLOAD_FLAG_COMPOUND_ERR) 206 207 #ifdef __cplusplus 208 } 209 #endif 210 211 #endif /* _SYS_FM_CPU_GMCA_H */ 212