1 /****************************************************************************** 2 * 3 * Name: actbl2.h - ACPI Specification Revision 2.0 Tables 4 * $Revision: 41 $ 5 * 6 *****************************************************************************/ 7 8 /****************************************************************************** 9 * 10 * 1. Copyright Notice 11 * 12 * Some or all of this work - Copyright (c) 1999 - 2005, Intel Corp. 13 * All rights reserved. 14 * 15 * 2. License 16 * 17 * 2.1. This is your license from Intel Corp. under its intellectual property 18 * rights. You may have additional license terms from the party that provided 19 * you this software, covering your right to use that party's intellectual 20 * property rights. 21 * 22 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 23 * copy of the source code appearing in this file ("Covered Code") an 24 * irrevocable, perpetual, worldwide license under Intel's copyrights in the 25 * base code distributed originally by Intel ("Original Intel Code") to copy, 26 * make derivatives, distribute, use and display any portion of the Covered 27 * Code in any form, with the right to sublicense such rights; and 28 * 29 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 30 * license (with the right to sublicense), under only those claims of Intel 31 * patents that are infringed by the Original Intel Code, to make, use, sell, 32 * offer to sell, and import the Covered Code and derivative works thereof 33 * solely to the minimum extent necessary to exercise the above copyright 34 * license, and in no event shall the patent license extend to any additions 35 * to or modifications of the Original Intel Code. No other license or right 36 * is granted directly or by implication, estoppel or otherwise; 37 * 38 * The above copyright and patent license is granted only if the following 39 * conditions are met: 40 * 41 * 3. Conditions 42 * 43 * 3.1. Redistribution of Source with Rights to Further Distribute Source. 44 * Redistribution of source code of any substantial portion of the Covered 45 * Code or modification with rights to further distribute source must include 46 * the above Copyright Notice, the above License, this list of Conditions, 47 * and the following Disclaimer and Export Compliance provision. In addition, 48 * Licensee must cause all Covered Code to which Licensee contributes to 49 * contain a file documenting the changes Licensee made to create that Covered 50 * Code and the date of any change. Licensee must include in that file the 51 * documentation of any changes made by any predecessor Licensee. Licensee 52 * must include a prominent statement that the modification is derived, 53 * directly or indirectly, from Original Intel Code. 54 * 55 * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 56 * Redistribution of source code of any substantial portion of the Covered 57 * Code or modification without rights to further distribute source must 58 * include the following Disclaimer and Export Compliance provision in the 59 * documentation and/or other materials provided with distribution. In 60 * addition, Licensee may not authorize further sublicense of source of any 61 * portion of the Covered Code, and must include terms to the effect that the 62 * license from Licensee to its licensee is limited to the intellectual 63 * property embodied in the software Licensee provides to its licensee, and 64 * not to intellectual property embodied in modifications its licensee may 65 * make. 66 * 67 * 3.3. Redistribution of Executable. Redistribution in executable form of any 68 * substantial portion of the Covered Code or modification must reproduce the 69 * above Copyright Notice, and the following Disclaimer and Export Compliance 70 * provision in the documentation and/or other materials provided with the 71 * distribution. 72 * 73 * 3.4. Intel retains all right, title, and interest in and to the Original 74 * Intel Code. 75 * 76 * 3.5. Neither the name Intel nor any other trademark owned or controlled by 77 * Intel shall be used in advertising or otherwise to promote the sale, use or 78 * other dealings in products derived from or relating to the Covered Code 79 * without prior written authorization from Intel. 80 * 81 * 4. Disclaimer and Export Compliance 82 * 83 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 84 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 85 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 86 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 87 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 88 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 89 * PARTICULAR PURPOSE. 90 * 91 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 92 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 93 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 94 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 95 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 96 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 97 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 98 * LIMITED REMEDY. 99 * 100 * 4.3. Licensee shall not export, either directly or indirectly, any of this 101 * software or system incorporating such software without first obtaining any 102 * required license or other approval from the U. S. Department of Commerce or 103 * any other agency or department of the United States Government. In the 104 * event Licensee exports any such software from the United States or 105 * re-exports any such software from a foreign destination, Licensee shall 106 * ensure that the distribution and export/re-export of the software is in 107 * compliance with all laws, regulations, orders, or other restrictions of the 108 * U.S. Export Administration Regulations. Licensee agrees that neither it nor 109 * any of its subsidiaries will export/re-export any technical data, process, 110 * software, or service, directly or indirectly, to any country for which the 111 * United States government or any agency thereof requires an export license, 112 * other governmental approval, or letter of assurance, without first obtaining 113 * such license, approval or letter. 114 * 115 *****************************************************************************/ 116 117 #ifndef __ACTBL2_H__ 118 #define __ACTBL2_H__ 119 120 /* 121 * Prefered Power Management Profiles 122 */ 123 #define PM_UNSPECIFIED 0 124 #define PM_DESKTOP 1 125 #define PM_MOBILE 2 126 #define PM_WORKSTATION 3 127 #define PM_ENTERPRISE_SERVER 4 128 #define PM_SOHO_SERVER 5 129 #define PM_APPLIANCE_PC 6 130 131 /* 132 * ACPI Boot Arch Flags 133 */ 134 #define BAF_LEGACY_DEVICES 0x0001 135 #define BAF_8042_KEYBOARD_CONTROLLER 0x0002 136 137 #define FADT2_REVISION_ID 3 138 #define FADT2_MINUS_REVISION_ID 2 139 140 141 #pragma pack(1) 142 143 /* 144 * ACPI 2.0 Root System Description Table (RSDT) 145 */ 146 typedef struct rsdt_descriptor_rev2 147 { 148 ACPI_TABLE_HEADER_DEF /* ACPI common table header */ 149 UINT32 TableOffsetEntry [1]; /* Array of pointers to */ 150 /* ACPI table headers */ 151 } RSDT_DESCRIPTOR_REV2; 152 153 154 /* 155 * ACPI 2.0 Extended System Description Table (XSDT) 156 */ 157 typedef struct xsdt_descriptor_rev2 158 { 159 ACPI_TABLE_HEADER_DEF /* ACPI common table header */ 160 UINT64 TableOffsetEntry [1]; /* Array of pointers to */ 161 /* ACPI table headers */ 162 } XSDT_DESCRIPTOR_REV2; 163 164 165 /* 166 * ACPI 2.0 Firmware ACPI Control Structure (FACS) 167 */ 168 typedef struct facs_descriptor_rev2 169 { 170 char Signature[4]; /* ACPI signature */ 171 UINT32 Length; /* Length of structure, in bytes */ 172 UINT32 HardwareSignature; /* Hardware configuration signature */ 173 UINT32 FirmwareWakingVector; /* 32bit physical address of the Firmware Waking Vector. */ 174 UINT32 GlobalLock; /* Global Lock used to synchronize access to shared hardware resources */ 175 UINT32_BIT S4Bios_f : 1; /* S4Bios_f - Indicates if S4BIOS support is present */ 176 UINT32_BIT Reserved1 : 31; /* Must be 0 */ 177 UINT64 XFirmwareWakingVector; /* 64bit physical address of the Firmware Waking Vector. */ 178 UINT8 Version; /* Version of this table */ 179 UINT8 Reserved3 [31]; /* Reserved - must be zero */ 180 181 } FACS_DESCRIPTOR_REV2; 182 183 184 /* 185 * ACPI 2.0+ Generic Address Structure (GAS) 186 */ 187 typedef struct acpi_generic_address 188 { 189 UINT8 AddressSpaceId; /* Address space where struct or register exists. */ 190 UINT8 RegisterBitWidth; /* Size in bits of given register */ 191 UINT8 RegisterBitOffset; /* Bit offset within the register */ 192 UINT8 AccessWidth; /* Minimum Access size (ACPI 3.0) */ 193 UINT64 Address; /* 64-bit address of struct or register */ 194 195 } ACPI_GENERIC_ADDRESS; 196 197 198 #define FADT_REV2_COMMON \ 199 UINT32 V1_FirmwareCtrl; /* 32-bit physical address of FACS */ \ 200 UINT32 V1_Dsdt; /* 32-bit physical address of DSDT */ \ 201 UINT8 Reserved1; /* System Interrupt Model isn't used in ACPI 2.0*/ \ 202 UINT8 Prefer_PM_Profile; /* Conveys preferred power management profile to OSPM. */ \ 203 UINT16 SciInt; /* System vector of SCI interrupt */ \ 204 UINT32 SmiCmd; /* Port address of SMI command port */ \ 205 UINT8 AcpiEnable; /* Value to write to smi_cmd to enable ACPI */ \ 206 UINT8 AcpiDisable; /* Value to write to smi_cmd to disable ACPI */ \ 207 UINT8 S4BiosReq; /* Value to write to SMI CMD to enter S4BIOS state */ \ 208 UINT8 PstateCnt; /* Processor performance state control*/ \ 209 UINT32 V1_Pm1aEvtBlk; /* Port address of Power Mgt 1a AcpiEvent Reg Blk */ \ 210 UINT32 V1_Pm1bEvtBlk; /* Port address of Power Mgt 1b AcpiEvent Reg Blk */ \ 211 UINT32 V1_Pm1aCntBlk; /* Port address of Power Mgt 1a Control Reg Blk */ \ 212 UINT32 V1_Pm1bCntBlk; /* Port address of Power Mgt 1b Control Reg Blk */ \ 213 UINT32 V1_Pm2CntBlk; /* Port address of Power Mgt 2 Control Reg Blk */ \ 214 UINT32 V1_PmTmrBlk; /* Port address of Power Mgt Timer Ctrl Reg Blk */ \ 215 UINT32 V1_Gpe0Blk; /* Port addr of General Purpose AcpiEvent 0 Reg Blk */ \ 216 UINT32 V1_Gpe1Blk; /* Port addr of General Purpose AcpiEvent 1 Reg Blk */ \ 217 UINT8 Pm1EvtLen; /* Byte Length of ports at pm1X_evt_blk */ \ 218 UINT8 Pm1CntLen; /* Byte Length of ports at pm1X_cnt_blk */ \ 219 UINT8 Pm2CntLen; /* Byte Length of ports at pm2_cnt_blk */ \ 220 UINT8 PmTmLen; /* Byte Length of ports at pm_tm_blk */ \ 221 UINT8 Gpe0BlkLen; /* Byte Length of ports at gpe0_blk */ \ 222 UINT8 Gpe1BlkLen; /* Byte Length of ports at gpe1_blk */ \ 223 UINT8 Gpe1Base; /* Offset in gpe model where gpe1 events start */ \ 224 UINT8 CstCnt; /* Support for the _CST object and C States change notification.*/ \ 225 UINT16 Plvl2Lat; /* Worst case HW latency to enter/exit C2 state */ \ 226 UINT16 Plvl3Lat; /* Worst case HW latency to enter/exit C3 state */ \ 227 UINT16 FlushSize; /* Number of flush strides that need to be read */ \ 228 UINT16 FlushStride; /* Processor's memory cache line width, in bytes */ \ 229 UINT8 DutyOffset; /* Processor's duty cycle index in processor's P_CNT reg*/ \ 230 UINT8 DutyWidth; /* Processor's duty cycle value bit width in P_CNT register.*/ \ 231 UINT8 DayAlrm; /* Index to day-of-month alarm in RTC CMOS RAM */ \ 232 UINT8 MonAlrm; /* Index to month-of-year alarm in RTC CMOS RAM */ \ 233 UINT8 Century; /* Index to century in RTC CMOS RAM */ \ 234 UINT16 IapcBootArch; /* IA-PC Boot Architecture Flags. See Table 5-10 for description*/ 235 236 /* 237 * ACPI 2.0+ Fixed ACPI Description Table (FADT) 238 */ 239 typedef struct fadt_descriptor_rev2 240 { 241 ACPI_TABLE_HEADER_DEF /* ACPI common table header */ 242 FADT_REV2_COMMON 243 UINT8 Reserved2; /* Reserved */ 244 UINT32_BIT WbInvd : 1; /* The wbinvd instruction works properly */ 245 UINT32_BIT WbInvdFlush : 1; /* The wbinvd flushes but does not invalidate */ 246 UINT32_BIT ProcC1 : 1; /* All processors support C1 state */ 247 UINT32_BIT Plvl2Up : 1; /* C2 state works on MP system */ 248 UINT32_BIT PwrButton : 1; /* Power button is handled as a generic feature */ 249 UINT32_BIT SleepButton : 1; /* Sleep button is handled as a generic feature, or not present */ 250 UINT32_BIT FixedRTC : 1; /* RTC wakeup stat not in fixed register space */ 251 UINT32_BIT Rtcs4 : 1; /* RTC wakeup stat not possible from S4 */ 252 UINT32_BIT TmrValExt : 1; /* Indicates tmr_val is 32 bits 0=24-bits */ 253 UINT32_BIT DockCap : 1; /* Supports Docking */ 254 UINT32_BIT ResetRegSup : 1; /* Indicates system supports system reset via the FADT RESET_REG */ 255 UINT32_BIT SealedCase : 1; /* Indicates system has no internal expansion capabilities and case is sealed */ 256 UINT32_BIT Headless : 1; /* Indicates system does not have local video capabilities or local input devices */ 257 UINT32_BIT CpuSwSleep : 1; /* Indicates to OSPM that a processor native instruction */ 258 /* must be executed after writing the SLP_TYPx register */ 259 /* ACPI 3.0 flag bits */ 260 261 UINT32_BIT PciExpWak : 1; /* System supports PCIEXP_WAKE (STS/EN) bits */ 262 UINT32_BIT UsePlatformClock : 1; /* OSPM should use platform-provided timer */ 263 UINT32_BIT S4RtcStsValid : 1; /* Contents of RTC_STS valid after S4 wake */ 264 UINT32_BIT RemotePowerOnCapable : 1; /* System is compatible with remote power on */ 265 UINT32_BIT ForceApicClusterModel : 1; /* All local APICs must use cluster model */ 266 UINT32_BIT ForceApicPhysicalDestinationMode : 1; /* All local xAPICs must use physical dest mode */ 267 UINT32_BIT Reserved6 : 12;/* Reserved - must be zero */ 268 269 ACPI_GENERIC_ADDRESS ResetRegister; /* Reset register address in GAS format */ 270 UINT8 ResetValue; /* Value to write to the ResetRegister port to reset the system */ 271 UINT8 Reserved7[3]; /* These three bytes must be zero */ 272 UINT64 XFirmwareCtrl; /* 64-bit physical address of FACS */ 273 UINT64 XDsdt; /* 64-bit physical address of DSDT */ 274 ACPI_GENERIC_ADDRESS XPm1aEvtBlk; /* Extended Power Mgt 1a AcpiEvent Reg Blk address */ 275 ACPI_GENERIC_ADDRESS XPm1bEvtBlk; /* Extended Power Mgt 1b AcpiEvent Reg Blk address */ 276 ACPI_GENERIC_ADDRESS XPm1aCntBlk; /* Extended Power Mgt 1a Control Reg Blk address */ 277 ACPI_GENERIC_ADDRESS XPm1bCntBlk; /* Extended Power Mgt 1b Control Reg Blk address */ 278 ACPI_GENERIC_ADDRESS XPm2CntBlk; /* Extended Power Mgt 2 Control Reg Blk address */ 279 ACPI_GENERIC_ADDRESS XPmTmrBlk; /* Extended Power Mgt Timer Ctrl Reg Blk address */ 280 ACPI_GENERIC_ADDRESS XGpe0Blk; /* Extended General Purpose AcpiEvent 0 Reg Blk address */ 281 ACPI_GENERIC_ADDRESS XGpe1Blk; /* Extended General Purpose AcpiEvent 1 Reg Blk address */ 282 283 } FADT_DESCRIPTOR_REV2; 284 285 286 /* "Down-revved" ACPI 2.0 FADT descriptor */ 287 288 typedef struct fadt_descriptor_rev2_minus 289 { 290 ACPI_TABLE_HEADER_DEF /* ACPI common table header */ 291 FADT_REV2_COMMON 292 UINT8 Reserved2; /* Reserved */ 293 UINT32 Flags; 294 ACPI_GENERIC_ADDRESS ResetRegister; /* Reset register address in GAS format */ 295 UINT8 ResetValue; /* Value to write to the ResetRegister port to reset the system. */ 296 UINT8 Reserved7[3]; /* These three bytes must be zero */ 297 298 } FADT_DESCRIPTOR_REV2_MINUS; 299 300 301 /* ECDT - Embedded Controller Boot Resources Table */ 302 303 typedef struct ec_boot_resources 304 { 305 ACPI_TABLE_HEADER_DEF 306 ACPI_GENERIC_ADDRESS EcControl; /* Address of EC command/status register */ 307 ACPI_GENERIC_ADDRESS EcData; /* Address of EC data register */ 308 UINT32 Uid; /* Unique ID - must be same as the EC _UID method */ 309 UINT8 GpeBit; /* The GPE for the EC */ 310 UINT8 EcId[1]; /* Full namepath of the EC in the ACPI namespace */ 311 312 } EC_BOOT_RESOURCES; 313 314 315 /* SRAT - System Resource Affinity Table */ 316 317 typedef struct static_resource_alloc 318 { 319 UINT8 Type; 320 UINT8 Length; 321 UINT8 ProximityDomainLo; 322 UINT8 ApicId; 323 UINT32_BIT Enabled :1; 324 UINT32_BIT Reserved3 :31; 325 UINT8 LocalSapicEid; 326 UINT8 ProximityDomainHi[3]; 327 UINT32 Reserved4; 328 329 } STATIC_RESOURCE_ALLOC; 330 331 typedef struct memory_affinity 332 { 333 UINT8 Type; 334 UINT8 Length; 335 UINT32 ProximityDomain; 336 UINT16 Reserved3; 337 UINT64 BaseAddress; 338 UINT64 AddressLength; 339 UINT32 Reserved4; 340 UINT32_BIT Enabled :1; 341 UINT32_BIT HotPluggable :1; 342 UINT32_BIT NonVolatile :1; 343 UINT32_BIT Reserved5 :29; 344 UINT64 Reserved6; 345 346 } MEMORY_AFFINITY; 347 348 typedef struct system_resource_affinity 349 { 350 ACPI_TABLE_HEADER_DEF 351 UINT32 Reserved1; /* Must be value '1' */ 352 UINT64 Reserved2; 353 354 } SYSTEM_RESOURCE_AFFINITY; 355 356 357 /* SLIT - System Locality Distance Information Table */ 358 359 typedef struct system_locality_info 360 { 361 ACPI_TABLE_HEADER_DEF 362 UINT64 LocalityCount; 363 UINT8 Entry[1][1]; 364 365 } SYSTEM_LOCALITY_INFO; 366 367 368 #pragma pack() 369 370 #endif /* __ACTBL2_H__ */ 371 372