xref: /titanic_44/usr/src/uts/intel/io/acpica/hardware/hwregs.c (revision cc7641ccbef3fd0f5eeedc74f555d11723b3926c)
1 
2 /*******************************************************************************
3  *
4  * Module Name: hwregs - Read/write access functions for the various ACPI
5  *                       control and status registers.
6  *
7  ******************************************************************************/
8 
9 /******************************************************************************
10  *
11  * 1. Copyright Notice
12  *
13  * Some or all of this work - Copyright (c) 1999 - 2009, Intel Corp.
14  * All rights reserved.
15  *
16  * 2. License
17  *
18  * 2.1. This is your license from Intel Corp. under its intellectual property
19  * rights.  You may have additional license terms from the party that provided
20  * you this software, covering your right to use that party's intellectual
21  * property rights.
22  *
23  * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a
24  * copy of the source code appearing in this file ("Covered Code") an
25  * irrevocable, perpetual, worldwide license under Intel's copyrights in the
26  * base code distributed originally by Intel ("Original Intel Code") to copy,
27  * make derivatives, distribute, use and display any portion of the Covered
28  * Code in any form, with the right to sublicense such rights; and
29  *
30  * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
31  * license (with the right to sublicense), under only those claims of Intel
32  * patents that are infringed by the Original Intel Code, to make, use, sell,
33  * offer to sell, and import the Covered Code and derivative works thereof
34  * solely to the minimum extent necessary to exercise the above copyright
35  * license, and in no event shall the patent license extend to any additions
36  * to or modifications of the Original Intel Code.  No other license or right
37  * is granted directly or by implication, estoppel or otherwise;
38  *
39  * The above copyright and patent license is granted only if the following
40  * conditions are met:
41  *
42  * 3. Conditions
43  *
44  * 3.1. Redistribution of Source with Rights to Further Distribute Source.
45  * Redistribution of source code of any substantial portion of the Covered
46  * Code or modification with rights to further distribute source must include
47  * the above Copyright Notice, the above License, this list of Conditions,
48  * and the following Disclaimer and Export Compliance provision.  In addition,
49  * Licensee must cause all Covered Code to which Licensee contributes to
50  * contain a file documenting the changes Licensee made to create that Covered
51  * Code and the date of any change.  Licensee must include in that file the
52  * documentation of any changes made by any predecessor Licensee.  Licensee
53  * must include a prominent statement that the modification is derived,
54  * directly or indirectly, from Original Intel Code.
55  *
56  * 3.2. Redistribution of Source with no Rights to Further Distribute Source.
57  * Redistribution of source code of any substantial portion of the Covered
58  * Code or modification without rights to further distribute source must
59  * include the following Disclaimer and Export Compliance provision in the
60  * documentation and/or other materials provided with distribution.  In
61  * addition, Licensee may not authorize further sublicense of source of any
62  * portion of the Covered Code, and must include terms to the effect that the
63  * license from Licensee to its licensee is limited to the intellectual
64  * property embodied in the software Licensee provides to its licensee, and
65  * not to intellectual property embodied in modifications its licensee may
66  * make.
67  *
68  * 3.3. Redistribution of Executable. Redistribution in executable form of any
69  * substantial portion of the Covered Code or modification must reproduce the
70  * above Copyright Notice, and the following Disclaimer and Export Compliance
71  * provision in the documentation and/or other materials provided with the
72  * distribution.
73  *
74  * 3.4. Intel retains all right, title, and interest in and to the Original
75  * Intel Code.
76  *
77  * 3.5. Neither the name Intel nor any other trademark owned or controlled by
78  * Intel shall be used in advertising or otherwise to promote the sale, use or
79  * other dealings in products derived from or relating to the Covered Code
80  * without prior written authorization from Intel.
81  *
82  * 4. Disclaimer and Export Compliance
83  *
84  * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED
85  * HERE.  ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE
86  * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT,  ASSISTANCE,
87  * INSTALLATION, TRAINING OR OTHER SERVICES.  INTEL WILL NOT PROVIDE ANY
88  * UPDATES, ENHANCEMENTS OR EXTENSIONS.  INTEL SPECIFICALLY DISCLAIMS ANY
89  * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A
90  * PARTICULAR PURPOSE.
91  *
92  * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES
93  * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR
94  * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT,
95  * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY
96  * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL
97  * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES.  THESE LIMITATIONS
98  * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY
99  * LIMITED REMEDY.
100  *
101  * 4.3. Licensee shall not export, either directly or indirectly, any of this
102  * software or system incorporating such software without first obtaining any
103  * required license or other approval from the U. S. Department of Commerce or
104  * any other agency or department of the United States Government.  In the
105  * event Licensee exports any such software from the United States or
106  * re-exports any such software from a foreign destination, Licensee shall
107  * ensure that the distribution and export/re-export of the software is in
108  * compliance with all laws, regulations, orders, or other restrictions of the
109  * U.S. Export Administration Regulations. Licensee agrees that neither it nor
110  * any of its subsidiaries will export/re-export any technical data, process,
111  * software, or service, directly or indirectly, to any country for which the
112  * United States government or any agency thereof requires an export license,
113  * other governmental approval, or letter of assurance, without first obtaining
114  * such license, approval or letter.
115  *
116  *****************************************************************************/
117 
118 #define __HWREGS_C__
119 
120 #include "acpi.h"
121 #include "accommon.h"
122 #include "acevents.h"
123 
124 #define _COMPONENT          ACPI_HARDWARE
125         ACPI_MODULE_NAME    ("hwregs")
126 
127 
128 /* Local Prototypes */
129 
130 static ACPI_STATUS
131 AcpiHwReadMultiple (
132     UINT32                  *Value,
133     ACPI_GENERIC_ADDRESS    *RegisterA,
134     ACPI_GENERIC_ADDRESS    *RegisterB);
135 
136 static ACPI_STATUS
137 AcpiHwWriteMultiple (
138     UINT32                  Value,
139     ACPI_GENERIC_ADDRESS    *RegisterA,
140     ACPI_GENERIC_ADDRESS    *RegisterB);
141 
142 
143 
144 /******************************************************************************
145  *
146  * FUNCTION:    AcpiHwValidateRegister
147  *
148  * PARAMETERS:  Reg                 - GAS register structure
149  *              MaxBitWidth         - Max BitWidth supported (32 or 64)
150  *              Address             - Pointer to where the gas->address
151  *                                    is returned
152  *
153  * RETURN:      Status
154  *
155  * DESCRIPTION: Validate the contents of a GAS register. Checks the GAS
156  *              pointer, Address, SpaceId, BitWidth, and BitOffset.
157  *
158  ******************************************************************************/
159 
160 ACPI_STATUS
161 AcpiHwValidateRegister (
162     ACPI_GENERIC_ADDRESS    *Reg,
163     UINT8                   MaxBitWidth,
164     UINT64                  *Address)
165 {
166 
167     /* Must have a valid pointer to a GAS structure */
168 
169     if (!Reg)
170     {
171     	return (AE_BAD_PARAMETER);
172     }
173 
174     /*
175      * Copy the target address. This handles possible alignment issues.
176      * Address must not be null. A null address also indicates an optional
177      * ACPI register that is not supported, so no error message.
178      */
179     ACPI_MOVE_64_TO_64 (Address, &Reg->Address);
180     if (!(*Address))
181     {
182     	return (AE_BAD_ADDRESS);
183     }
184 
185     /* Validate the SpaceID */
186 
187     if ((Reg->SpaceId != ACPI_ADR_SPACE_SYSTEM_MEMORY) &&
188     	(Reg->SpaceId != ACPI_ADR_SPACE_SYSTEM_IO))
189     {
190     	ACPI_ERROR ((AE_INFO,
191             "Unsupported address space: 0x%X", Reg->SpaceId));
192     	return (AE_SUPPORT);
193     }
194 
195     /* Validate the BitWidth */
196 
197     if ((Reg->BitWidth != 8) &&
198     	(Reg->BitWidth != 16) &&
199     	(Reg->BitWidth != 32) &&
200     	(Reg->BitWidth != MaxBitWidth))
201     {
202     	ACPI_ERROR ((AE_INFO,
203             "Unsupported register bit width: 0x%X", Reg->BitWidth));
204     	return (AE_SUPPORT);
205     }
206 
207     /* Validate the BitOffset. Just a warning for now. */
208 
209     if (Reg->BitOffset != 0)
210     {
211     	ACPI_WARNING ((AE_INFO,
212             "Unsupported register bit offset: 0x%X", Reg->BitOffset));
213     }
214 
215     return (AE_OK);
216 }
217 
218 
219 /******************************************************************************
220  *
221  * FUNCTION:    AcpiHwWrite
222  *
223  * PARAMETERS:  Value               - Value to be written
224  *              Reg                 - GAS register structure
225  *
226  * RETURN:      Status
227  *
228  * DESCRIPTION: Write to either memory or IO space. This is a 32-bit max
229  *              version of AcpiWrite, used internally since the overhead of
230  *              64-bit values is not needed.
231  *
232  ******************************************************************************/
233 
234 ACPI_STATUS
235 AcpiHwWrite (
236     UINT32                  Value,
237     ACPI_GENERIC_ADDRESS    *Reg)
238 {
239     UINT64                  Address;
240     ACPI_STATUS             Status;
241 
242 
243     ACPI_FUNCTION_NAME (HwWrite);
244 
245 
246     /* Validate contents of the GAS register */
247 
248     Status = AcpiHwValidateRegister (Reg, 32, &Address);
249     if (ACPI_FAILURE (Status))
250     {
251         return (Status);
252     }
253 
254     /*
255      * Two address spaces supported: Memory or IO. PCI_Config is
256      * not supported here because the GAS structure is insufficient
257      */
258     if (Reg->SpaceId == ACPI_ADR_SPACE_SYSTEM_MEMORY)
259     {
260         Status = AcpiOsWriteMemory ((ACPI_PHYSICAL_ADDRESS)
261                     Address, Value, Reg->BitWidth);
262     }
263     else /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
264     {
265     	Status = AcpiHwWritePort ((ACPI_IO_ADDRESS)
266                     Address, Value, Reg->BitWidth);
267     }
268 
269     ACPI_DEBUG_PRINT ((ACPI_DB_IO,
270     	"Wrote: %8.8X width %2d	  to %8.8X%8.8X (%s)\n",
271     	Value, Reg->BitWidth, ACPI_FORMAT_UINT64 (Address),
272     	AcpiUtGetRegionName (Reg->SpaceId)));
273 
274     return (Status);
275 }
276 
277 
278 /*******************************************************************************
279  *
280  * FUNCTION:    AcpiHwClearAcpiStatus
281  *
282  * PARAMETERS:  None
283  *
284  * RETURN:      Status
285  *
286  * DESCRIPTION: Clears all fixed and general purpose status bits
287  *
288  ******************************************************************************/
289 
290 ACPI_STATUS
291 AcpiHwClearAcpiStatus (
292     void)
293 {
294     ACPI_STATUS             Status;
295     ACPI_CPU_FLAGS          LockFlags = 0;
296 
297 
298     ACPI_FUNCTION_TRACE (HwClearAcpiStatus);
299 
300 
301     ACPI_DEBUG_PRINT ((ACPI_DB_IO, "About to write %04X to %8.8X%8.8X\n",
302         ACPI_BITMASK_ALL_FIXED_STATUS,
303         ACPI_FORMAT_UINT64 (AcpiGbl_XPm1aStatus.Address)));
304 
305     LockFlags = AcpiOsAcquireLock (AcpiGbl_HardwareLock);
306 
307     /* Clear the fixed events in PM1 A/B */
308 
309     Status = AcpiHwRegisterWrite (ACPI_REGISTER_PM1_STATUS,
310                 ACPI_BITMASK_ALL_FIXED_STATUS);
311     if (ACPI_FAILURE (Status))
312     {
313         goto UnlockAndExit;
314     }
315 
316     /* Clear the GPE Bits in all GPE registers in all GPE blocks */
317 
318     Status = AcpiEvWalkGpeList (AcpiHwClearGpeBlock, NULL);
319 
320 UnlockAndExit:
321     AcpiOsReleaseLock (AcpiGbl_HardwareLock, LockFlags);
322     return_ACPI_STATUS (Status);
323 }
324 
325 
326 /*******************************************************************************
327  *
328  * FUNCTION:    AcpiHwGetRegisterBitMask
329  *
330  * PARAMETERS:  RegisterId          - Index of ACPI Register to access
331  *
332  * RETURN:      The bitmask to be used when accessing the register
333  *
334  * DESCRIPTION: Map RegisterId into a register bitmask.
335  *
336  ******************************************************************************/
337 
338 ACPI_BIT_REGISTER_INFO *
339 AcpiHwGetBitRegisterInfo (
340     UINT32                  RegisterId)
341 {
342     ACPI_FUNCTION_ENTRY ();
343 
344 
345     if (RegisterId > ACPI_BITREG_MAX)
346     {
347         ACPI_ERROR ((AE_INFO, "Invalid BitRegister ID: %X", RegisterId));
348         return (NULL);
349     }
350 
351     return (&AcpiGbl_BitRegisterInfo[RegisterId]);
352 }
353 
354 
355 /******************************************************************************
356  *
357  * FUNCTION:    AcpiHwWritePm1Control
358  *
359  * PARAMETERS:  Pm1aControl         - Value to be written to PM1A control
360  *              Pm1bControl         - Value to be written to PM1B control
361  *
362  * RETURN:      Status
363  *
364  * DESCRIPTION: Write the PM1 A/B control registers. These registers are
365  *              different than than the PM1 A/B status and enable registers
366  *              in that different values can be written to the A/B registers.
367  *              Most notably, the SLP_TYP bits can be different, as per the
368  *              values returned from the _Sx predefined methods.
369  *
370  ******************************************************************************/
371 
372 ACPI_STATUS
373 AcpiHwWritePm1Control (
374     UINT32                  Pm1aControl,
375     UINT32                  Pm1bControl)
376 {
377     ACPI_STATUS             Status;
378 
379 
380     ACPI_FUNCTION_TRACE (HwWritePm1Control);
381 
382 
383     Status = AcpiWrite (Pm1aControl, &AcpiGbl_FADT.XPm1aControlBlock);
384     if (ACPI_FAILURE (Status))
385     {
386         return_ACPI_STATUS (Status);
387     }
388 
389     if (AcpiGbl_FADT.XPm1bControlBlock.Address)
390     {
391         Status = AcpiWrite (Pm1bControl, &AcpiGbl_FADT.XPm1bControlBlock);
392     }
393     return_ACPI_STATUS (Status);
394 }
395 
396 
397 /******************************************************************************
398  *
399  * FUNCTION:    AcpiHwRegisterRead
400  *
401  * PARAMETERS:  RegisterId          - ACPI Register ID
402  *              ReturnValue         - Where the register value is returned
403  *
404  * RETURN:      Status and the value read.
405  *
406  * DESCRIPTION: Read from the specified ACPI register
407  *
408  ******************************************************************************/
409 
410 ACPI_STATUS
411 AcpiHwRegisterRead (
412     UINT32                  RegisterId,
413     UINT32                  *ReturnValue)
414 {
415     UINT32                  Value = 0;
416     ACPI_STATUS             Status;
417 
418 
419     ACPI_FUNCTION_TRACE (HwRegisterRead);
420 
421 
422     switch (RegisterId)
423     {
424     case ACPI_REGISTER_PM1_STATUS:           /* PM1 A/B: 16-bit access each */
425 
426         Status = AcpiHwReadMultiple (&Value,
427                     &AcpiGbl_XPm1aStatus,
428                     &AcpiGbl_XPm1bStatus);
429         break;
430 
431 
432     case ACPI_REGISTER_PM1_ENABLE:           /* PM1 A/B: 16-bit access each */
433 
434         Status = AcpiHwReadMultiple (&Value,
435                     &AcpiGbl_XPm1aEnable,
436                     &AcpiGbl_XPm1bEnable);
437         break;
438 
439 
440     case ACPI_REGISTER_PM1_CONTROL:          /* PM1 A/B: 16-bit access each */
441 
442         Status = AcpiHwReadMultiple (&Value,
443                     &AcpiGbl_FADT.XPm1aControlBlock,
444                     &AcpiGbl_FADT.XPm1bControlBlock);
445 
446         /*
447          * Zero the write-only bits. From the ACPI specification, "Hardware
448          * Write-Only Bits": "Upon reads to registers with write-only bits,
449          * software masks out all write-only bits."
450          */
451         Value &= ~ACPI_PM1_CONTROL_WRITEONLY_BITS;
452         break;
453 
454 
455     case ACPI_REGISTER_PM2_CONTROL:          /* 8-bit access */
456 
457         Status = AcpiRead (&Value, &AcpiGbl_FADT.XPm2ControlBlock);
458         break;
459 
460 
461     case ACPI_REGISTER_PM_TIMER:             /* 32-bit access */
462 
463         Status = AcpiRead (&Value, &AcpiGbl_FADT.XPmTimerBlock);
464         break;
465 
466 
467     case ACPI_REGISTER_SMI_COMMAND_BLOCK:    /* 8-bit access */
468 
469         Status = AcpiHwReadPort (AcpiGbl_FADT.SmiCommand, &Value, 8);
470         break;
471 
472 
473     default:
474         ACPI_ERROR ((AE_INFO, "Unknown Register ID: %X",
475             RegisterId));
476         Status = AE_BAD_PARAMETER;
477         break;
478     }
479 
480     if (ACPI_SUCCESS (Status))
481     {
482         *ReturnValue = Value;
483     }
484 
485     return_ACPI_STATUS (Status);
486 }
487 
488 
489 /******************************************************************************
490  *
491  * FUNCTION:    AcpiHwRegisterWrite
492  *
493  * PARAMETERS:  RegisterId          - ACPI Register ID
494  *              Value               - The value to write
495  *
496  * RETURN:      Status
497  *
498  * DESCRIPTION: Write to the specified ACPI register
499  *
500  * NOTE: In accordance with the ACPI specification, this function automatically
501  * preserves the value of the following bits, meaning that these bits cannot be
502  * changed via this interface:
503  *
504  * PM1_CONTROL[0] = SCI_EN
505  * PM1_CONTROL[9]
506  * PM1_STATUS[11]
507  *
508  * ACPI References:
509  * 1) Hardware Ignored Bits: When software writes to a register with ignored
510  *      bit fields, it preserves the ignored bit fields
511  * 2) SCI_EN: OSPM always preserves this bit position
512  *
513  ******************************************************************************/
514 
515 ACPI_STATUS
516 AcpiHwRegisterWrite (
517     UINT32                  RegisterId,
518     UINT32                  Value)
519 {
520     ACPI_STATUS             Status;
521     UINT32                  ReadValue;
522 
523 
524     ACPI_FUNCTION_TRACE (HwRegisterWrite);
525 
526 
527     switch (RegisterId)
528     {
529     case ACPI_REGISTER_PM1_STATUS:           /* PM1 A/B: 16-bit access each */
530         /*
531          * Handle the "ignored" bit in PM1 Status. According to the ACPI
532          * specification, ignored bits are to be preserved when writing.
533          * Normally, this would mean a read/modify/write sequence. However,
534          * preserving a bit in the status register is different. Writing a
535          * one clears the status, and writing a zero preserves the status.
536          * Therefore, we must always write zero to the ignored bit.
537          *
538          * This behavior is clarified in the ACPI 4.0 specification.
539          */
540         Value &= ~ACPI_PM1_STATUS_PRESERVED_BITS;
541 
542         Status = AcpiHwWriteMultiple (Value,
543                     &AcpiGbl_XPm1aStatus,
544                     &AcpiGbl_XPm1bStatus);
545         break;
546 
547 
548     case ACPI_REGISTER_PM1_ENABLE:           /* PM1 A/B: 16-bit access each */
549 
550         Status = AcpiHwWriteMultiple (Value,
551                     &AcpiGbl_XPm1aEnable,
552                     &AcpiGbl_XPm1bEnable);
553         break;
554 
555 
556     case ACPI_REGISTER_PM1_CONTROL:          /* PM1 A/B: 16-bit access each */
557 
558         /*
559          * Perform a read first to preserve certain bits (per ACPI spec)
560          * Note: This includes SCI_EN, we never want to change this bit
561          */
562         Status = AcpiHwReadMultiple (&ReadValue,
563                     &AcpiGbl_FADT.XPm1aControlBlock,
564                     &AcpiGbl_FADT.XPm1bControlBlock);
565         if (ACPI_FAILURE (Status))
566         {
567             goto Exit;
568         }
569 
570         /* Insert the bits to be preserved */
571 
572         ACPI_INSERT_BITS (Value, ACPI_PM1_CONTROL_PRESERVED_BITS, ReadValue);
573 
574         /* Now we can write the data */
575 
576         Status = AcpiHwWriteMultiple (Value,
577                     &AcpiGbl_FADT.XPm1aControlBlock,
578                     &AcpiGbl_FADT.XPm1bControlBlock);
579         break;
580 
581 
582     case ACPI_REGISTER_PM2_CONTROL:          /* 8-bit access */
583 
584         /*
585          * For control registers, all reserved bits must be preserved,
586          * as per the ACPI spec.
587          */
588         Status = AcpiRead (&ReadValue, &AcpiGbl_FADT.XPm2ControlBlock);
589         if (ACPI_FAILURE (Status))
590         {
591             goto Exit;
592         }
593 
594         /* Insert the bits to be preserved */
595 
596         ACPI_INSERT_BITS (Value, ACPI_PM2_CONTROL_PRESERVED_BITS, ReadValue);
597 
598         Status = AcpiWrite (Value, &AcpiGbl_FADT.XPm2ControlBlock);
599         break;
600 
601 
602     case ACPI_REGISTER_PM_TIMER:             /* 32-bit access */
603 
604         Status = AcpiWrite (Value, &AcpiGbl_FADT.XPmTimerBlock);
605         break;
606 
607 
608     case ACPI_REGISTER_SMI_COMMAND_BLOCK:    /* 8-bit access */
609 
610         /* SMI_CMD is currently always in IO space */
611 
612         Status = AcpiHwWritePort (AcpiGbl_FADT.SmiCommand, Value, 8);
613         break;
614 
615 
616     default:
617         ACPI_ERROR ((AE_INFO, "Unknown Register ID: %X",
618             RegisterId));
619         Status = AE_BAD_PARAMETER;
620         break;
621     }
622 
623 Exit:
624     return_ACPI_STATUS (Status);
625 }
626 
627 
628 /******************************************************************************
629  *
630  * FUNCTION:    AcpiHwReadMultiple
631  *
632  * PARAMETERS:  Value               - Where the register value is returned
633  *              RegisterA           - First ACPI register (required)
634  *              RegisterB           - Second ACPI register (optional)
635  *
636  * RETURN:      Status
637  *
638  * DESCRIPTION: Read from the specified two-part ACPI register (such as PM1 A/B)
639  *
640  ******************************************************************************/
641 
642 static ACPI_STATUS
643 AcpiHwReadMultiple (
644     UINT32                  *Value,
645     ACPI_GENERIC_ADDRESS    *RegisterA,
646     ACPI_GENERIC_ADDRESS    *RegisterB)
647 {
648     UINT32                  ValueA = 0;
649     UINT32                  ValueB = 0;
650     ACPI_STATUS             Status;
651 
652 
653     /* The first register is always required */
654 
655     Status = AcpiRead (&ValueA, RegisterA);
656     if (ACPI_FAILURE (Status))
657     {
658         return (Status);
659     }
660 
661     /* Second register is optional */
662 
663     if (RegisterB->Address)
664     {
665         Status = AcpiRead (&ValueB, RegisterB);
666         if (ACPI_FAILURE (Status))
667         {
668             return (Status);
669         }
670     }
671 
672     /*
673      * OR the two return values together. No shifting or masking is necessary,
674      * because of how the PM1 registers are defined in the ACPI specification:
675      *
676      * "Although the bits can be split between the two register blocks (each
677      * register block has a unique pointer within the FADT), the bit positions
678      * are maintained. The register block with unimplemented bits (that is,
679      * those implemented in the other register block) always returns zeros,
680      * and writes have no side effects"
681      */
682     *Value = (ValueA | ValueB);
683     return (AE_OK);
684 }
685 
686 
687 /******************************************************************************
688  *
689  * FUNCTION:    AcpiHwWriteMultiple
690  *
691  * PARAMETERS:  Value               - The value to write
692  *              RegisterA           - First ACPI register (required)
693  *              RegisterB           - Second ACPI register (optional)
694  *
695  * RETURN:      Status
696  *
697  * DESCRIPTION: Write to the specified two-part ACPI register (such as PM1 A/B)
698  *
699  ******************************************************************************/
700 
701 static ACPI_STATUS
702 AcpiHwWriteMultiple (
703     UINT32                  Value,
704     ACPI_GENERIC_ADDRESS    *RegisterA,
705     ACPI_GENERIC_ADDRESS    *RegisterB)
706 {
707     ACPI_STATUS             Status;
708 
709 
710     /* The first register is always required */
711 
712     Status = AcpiWrite (Value, RegisterA);
713     if (ACPI_FAILURE (Status))
714     {
715         return (Status);
716     }
717 
718     /*
719      * Second register is optional
720      *
721      * No bit shifting or clearing is necessary, because of how the PM1
722      * registers are defined in the ACPI specification:
723      *
724      * "Although the bits can be split between the two register blocks (each
725      * register block has a unique pointer within the FADT), the bit positions
726      * are maintained. The register block with unimplemented bits (that is,
727      * those implemented in the other register block) always returns zeros,
728      * and writes have no side effects"
729      */
730     if (RegisterB->Address)
731     {
732         Status = AcpiWrite (Value, RegisterB);
733     }
734 
735     return (Status);
736 }
737 
738