xref: /titanic_44/usr/src/uts/i86pc/sys/machprivregs.h (revision ae115bc77f6fcde83175c75b4206dc2e50747966)
1*ae115bc7Smrj /*
2*ae115bc7Smrj  * CDDL HEADER START
3*ae115bc7Smrj  *
4*ae115bc7Smrj  * The contents of this file are subject to the terms of the
5*ae115bc7Smrj  * Common Development and Distribution License (the "License").
6*ae115bc7Smrj  * You may not use this file except in compliance with the License.
7*ae115bc7Smrj  *
8*ae115bc7Smrj  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9*ae115bc7Smrj  * or http://www.opensolaris.org/os/licensing.
10*ae115bc7Smrj  * See the License for the specific language governing permissions
11*ae115bc7Smrj  * and limitations under the License.
12*ae115bc7Smrj  *
13*ae115bc7Smrj  * When distributing Covered Code, include this CDDL HEADER in each
14*ae115bc7Smrj  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15*ae115bc7Smrj  * If applicable, add the following below this CDDL HEADER, with the
16*ae115bc7Smrj  * fields enclosed by brackets "[]" replaced with your own identifying
17*ae115bc7Smrj  * information: Portions Copyright [yyyy] [name of copyright owner]
18*ae115bc7Smrj  *
19*ae115bc7Smrj  * CDDL HEADER END
20*ae115bc7Smrj  */
21*ae115bc7Smrj 
22*ae115bc7Smrj /*
23*ae115bc7Smrj  * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
24*ae115bc7Smrj  * Use is subject to license terms.
25*ae115bc7Smrj  */
26*ae115bc7Smrj 
27*ae115bc7Smrj #ifndef	_SYS_MACHPRIVREGS_H
28*ae115bc7Smrj #define	_SYS_MACHPRIVREGS_H
29*ae115bc7Smrj 
30*ae115bc7Smrj #pragma ident	"%Z%%M%	%I%	%E% SMI"
31*ae115bc7Smrj 
32*ae115bc7Smrj /*
33*ae115bc7Smrj  * Platform dependent instruction sequences for manipulating
34*ae115bc7Smrj  * privileged state
35*ae115bc7Smrj  */
36*ae115bc7Smrj 
37*ae115bc7Smrj #ifdef __cplusplus
38*ae115bc7Smrj extern "C" {
39*ae115bc7Smrj #endif
40*ae115bc7Smrj 
41*ae115bc7Smrj #define	ASSERT_UPCALL_MASK_IS_SET		/* empty */
42*ae115bc7Smrj 
43*ae115bc7Smrj /*
44*ae115bc7Smrj  * CLI and STI
45*ae115bc7Smrj  */
46*ae115bc7Smrj 
47*ae115bc7Smrj #define	CLI(r)			\
48*ae115bc7Smrj 	cli
49*ae115bc7Smrj 
50*ae115bc7Smrj #define	STI			\
51*ae115bc7Smrj 	sti
52*ae115bc7Smrj 
53*ae115bc7Smrj /*
54*ae115bc7Smrj  * Used to re-enable interrupts in the body of exception handlers
55*ae115bc7Smrj  */
56*ae115bc7Smrj 
57*ae115bc7Smrj #if defined(__amd64)
58*ae115bc7Smrj 
59*ae115bc7Smrj #define	ENABLE_INTR_FLAGS		\
60*ae115bc7Smrj 	pushq	$F_ON;			\
61*ae115bc7Smrj 	popfq
62*ae115bc7Smrj 
63*ae115bc7Smrj #elif defined(__i386)
64*ae115bc7Smrj 
65*ae115bc7Smrj #define	ENABLE_INTR_FLAGS		\
66*ae115bc7Smrj 	pushl	$F_ON;			\
67*ae115bc7Smrj 	popfl
68*ae115bc7Smrj 
69*ae115bc7Smrj #endif	/* __i386 */
70*ae115bc7Smrj 
71*ae115bc7Smrj /*
72*ae115bc7Smrj  * IRET and SWAPGS
73*ae115bc7Smrj  */
74*ae115bc7Smrj #if defined(__amd64)
75*ae115bc7Smrj 
76*ae115bc7Smrj #define	IRET	iretq
77*ae115bc7Smrj #define	SWAPGS	swapgs
78*ae115bc7Smrj 
79*ae115bc7Smrj #elif defined(__i386)
80*ae115bc7Smrj 
81*ae115bc7Smrj #define	IRET	iret
82*ae115bc7Smrj 
83*ae115bc7Smrj #endif	/* __i386 */
84*ae115bc7Smrj 
85*ae115bc7Smrj #define	CLEAN_CS	/* empty */
86*ae115bc7Smrj 
87*ae115bc7Smrj /*
88*ae115bc7Smrj  * Macros for saving the original segment registers and restoring them
89*ae115bc7Smrj  * for fast traps.
90*ae115bc7Smrj  */
91*ae115bc7Smrj #if defined(__amd64)
92*ae115bc7Smrj 
93*ae115bc7Smrj /*
94*ae115bc7Smrj  * Smaller versions of INTR_PUSH and INTR_POP for fast traps.
95*ae115bc7Smrj  * The following registers have been pushed onto the stack by
96*ae115bc7Smrj  * hardware at this point:
97*ae115bc7Smrj  *
98*ae115bc7Smrj  *	greg_t  r_rip;
99*ae115bc7Smrj  *	greg_t  r_cs;
100*ae115bc7Smrj  *	greg_t  r_rfl;
101*ae115bc7Smrj  *	greg_t  r_rsp;
102*ae115bc7Smrj  *	greg_t  r_ss;
103*ae115bc7Smrj  *
104*ae115bc7Smrj  * This handler is executed both by 32-bit and 64-bit applications.
105*ae115bc7Smrj  * 64-bit applications allow us to treat the set (%rdi, %rsi, %rdx,
106*ae115bc7Smrj  * %rcx, %r8, %r9, %r10, %r11, %rax) as volatile across function calls.
107*ae115bc7Smrj  * However, 32-bit applications only expect (%eax, %edx, %ecx) to be volatile
108*ae115bc7Smrj  * across a function call -- in particular, %esi and %edi MUST be saved!
109*ae115bc7Smrj  *
110*ae115bc7Smrj  * We could do this differently by making a FAST_INTR_PUSH32 for 32-bit
111*ae115bc7Smrj  * programs, and FAST_INTR_PUSH for 64-bit programs, but it doesn't seem
112*ae115bc7Smrj  * particularly worth it.
113*ae115bc7Smrj  */
114*ae115bc7Smrj #define	FAST_INTR_PUSH			\
115*ae115bc7Smrj 	INTGATE_INIT_KERNEL_FLAGS;	\
116*ae115bc7Smrj 	subq	$REGOFF_RIP, %rsp;	\
117*ae115bc7Smrj 	movq	%rsi, REGOFF_RSI(%rsp);	\
118*ae115bc7Smrj 	movq	%rdi, REGOFF_RDI(%rsp);	\
119*ae115bc7Smrj 	swapgs
120*ae115bc7Smrj 
121*ae115bc7Smrj #define	FAST_INTR_POP			\
122*ae115bc7Smrj 	swapgs;				\
123*ae115bc7Smrj 	movq	REGOFF_RSI(%rsp), %rsi;	\
124*ae115bc7Smrj 	movq	REGOFF_RDI(%rsp), %rdi;	\
125*ae115bc7Smrj 	addq	$REGOFF_RIP, %rsp
126*ae115bc7Smrj 
127*ae115bc7Smrj #define	FAST_INTR_RETURN	iretq
128*ae115bc7Smrj 
129*ae115bc7Smrj #elif defined(__i386)
130*ae115bc7Smrj 
131*ae115bc7Smrj #define	FAST_INTR_PUSH          \
132*ae115bc7Smrj 	cld;                    \
133*ae115bc7Smrj 	__SEGREGS_PUSH          \
134*ae115bc7Smrj 	__SEGREGS_LOAD_KERNEL
135*ae115bc7Smrj 
136*ae115bc7Smrj #define	FAST_INTR_POP		\
137*ae115bc7Smrj 	__SEGREGS_POP
138*ae115bc7Smrj 
139*ae115bc7Smrj #define	FAST_INTR_RETURN	iret
140*ae115bc7Smrj 
141*ae115bc7Smrj #endif	/* __i386 */
142*ae115bc7Smrj 
143*ae115bc7Smrj /*
144*ae115bc7Smrj  * Handling the CR0.TS bit for floating point handling.
145*ae115bc7Smrj  *
146*ae115bc7Smrj  * When the TS bit is *set*, attempts to touch the floating
147*ae115bc7Smrj  * point hardware will result in a #nm trap.
148*ae115bc7Smrj  */
149*ae115bc7Smrj #if defined(__amd64)
150*ae115bc7Smrj 
151*ae115bc7Smrj #define	STTS(rtmp)		\
152*ae115bc7Smrj 	movq	%cr0, rtmp;	\
153*ae115bc7Smrj 	orq	$CR0_TS, rtmp;	\
154*ae115bc7Smrj 	movq	rtmp, %cr0
155*ae115bc7Smrj 
156*ae115bc7Smrj #elif defined(__i386)
157*ae115bc7Smrj 
158*ae115bc7Smrj #define	STTS(rtmp)		\
159*ae115bc7Smrj 	movl	%cr0, rtmp;	\
160*ae115bc7Smrj 	orl	$CR0_TS, rtmp;	\
161*ae115bc7Smrj 	movl	rtmp, %cr0
162*ae115bc7Smrj 
163*ae115bc7Smrj #endif	/* __i386 */
164*ae115bc7Smrj 
165*ae115bc7Smrj #define	CLTS			\
166*ae115bc7Smrj 	clts
167*ae115bc7Smrj 
168*ae115bc7Smrj #ifdef __cplusplus
169*ae115bc7Smrj }
170*ae115bc7Smrj #endif
171*ae115bc7Smrj 
172*ae115bc7Smrj #endif	/* _SYS_MACHPRIVREGS_H */
173