xref: /titanic_44/usr/src/uts/i86pc/sys/machcpuvar.h (revision f6e214c7418f43af38bd8c3a557e3d0a1d311cfa)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 #ifndef	_SYS_MACHCPUVAR_H
27 #define	_SYS_MACHCPUVAR_H
28 
29 #ifdef	__cplusplus
30 extern "C" {
31 #endif
32 
33 #include <sys/inttypes.h>
34 #include <sys/x_call.h>
35 #include <sys/tss.h>
36 #include <sys/segments.h>
37 #include <sys/rm_platter.h>
38 #include <sys/avintr.h>
39 #include <sys/pte.h>
40 
41 #ifndef	_ASM
42 /*
43  * On a virtualized platform a virtual cpu may not be actually
44  * on a physical cpu, especially in situations where a configuration has
45  * more vcpus than pcpus.  This function tells us (if it's able) if the
46  * specified vcpu is currently running on a pcpu.  Note if it is not
47  * known or not able to determine, it will return the unknown state.
48  */
49 #define	VCPU_STATE_UNKNOWN	0
50 #define	VCPU_ON_PCPU		1
51 #define	VCPU_NOT_ON_PCPU	2
52 
53 extern int vcpu_on_pcpu(processorid_t);
54 
55 /*
56  * Machine specific fields of the cpu struct
57  * defined in common/sys/cpuvar.h.
58  *
59  * Note:  This is kinda kludgy but seems to be the best
60  * of our alternatives.
61  */
62 typedef void *cpu_pri_lev_t;
63 
64 struct cpuid_info;
65 struct cpu_ucode_info;
66 struct cmi_hdl;
67 
68 /*
69  * A note about the hypervisor affinity bits: a one bit in the affinity mask
70  * means the corresponding event channel is allowed to be serviced
71  * by this cpu.
72  */
73 struct xen_evt_data {
74 	ulong_t		pending_sel[PIL_MAX + 1]; /* event array selectors */
75 	ulong_t		pending_evts[PIL_MAX + 1][sizeof (ulong_t) * 8];
76 	ulong_t		evt_affinity[sizeof (ulong_t) * 8]; /* service on cpu */
77 };
78 
79 struct	machcpu {
80 	/*
81 	 * x_call fields - used for interprocessor cross calls
82 	 */
83 	struct xc_msg	*xc_msgbox;
84 	struct xc_msg	*xc_free;
85 	xc_data_t	xc_data;
86 	uint32_t	xc_wait_cnt;
87 	volatile uint32_t xc_work_cnt;
88 
89 	int		mcpu_nodeid;		/* node-id */
90 	int		mcpu_pri;		/* CPU priority */
91 	cpu_pri_lev_t	mcpu_pri_data;		/* ptr to machine dependent */
92 						/* data for setting priority */
93 						/* level */
94 
95 	struct hat	*mcpu_current_hat; /* cpu's current hat */
96 
97 	struct hat_cpu_info	*mcpu_hat_info;
98 
99 	volatile ulong_t	mcpu_tlb_info;
100 
101 	/* i86 hardware table addresses that cannot be shared */
102 
103 	user_desc_t	*mcpu_gdt;	/* GDT */
104 	gate_desc_t	*mcpu_idt;	/* current IDT */
105 
106 	struct tss	*mcpu_tss;	/* TSS */
107 
108 	kmutex_t	mcpu_ppaddr_mutex;
109 	caddr_t		mcpu_caddr1;	/* per cpu CADDR1 */
110 	caddr_t		mcpu_caddr2;	/* per cpu CADDR2 */
111 	uint64_t	mcpu_caddr1pte;
112 	uint64_t	mcpu_caddr2pte;
113 
114 	struct softint	mcpu_softinfo;
115 	uint64_t	pil_high_start[HIGH_LEVELS];
116 	uint64_t	intrstat[PIL_MAX + 1][2];
117 
118 	struct cpuid_info	 *mcpu_cpi;
119 
120 #if defined(__amd64)
121 	greg_t	mcpu_rtmp_rsp;		/* syscall: temporary %rsp stash */
122 	greg_t	mcpu_rtmp_r15;		/* syscall: temporary %r15 stash */
123 #endif
124 
125 	struct vcpu_info *mcpu_vcpu_info;
126 	uint64_t	mcpu_gdtpa;	/* hypervisor: GDT physical address */
127 
128 	uint16_t mcpu_intr_pending;	/* hypervisor: pending intrpt levels */
129 	uint16_t mcpu_ec_mbox;		/* hypervisor: evtchn_dev mailbox */
130 	struct xen_evt_data *mcpu_evt_pend; /* hypervisor: pending events */
131 
132 	volatile uint32_t *mcpu_mwait;	/* MONITOR/MWAIT buffer */
133 	void (*mcpu_idle_cpu)(void);	/* idle function */
134 	uint16_t mcpu_idle_type;	/* CPU next idle type */
135 	uint16_t max_cstates;		/* supported max cstates */
136 
137 	struct cpu_ucode_info	*mcpu_ucode_info;
138 
139 	void			*mcpu_pm_mach_state;
140 	struct cmi_hdl		*mcpu_cmi_hdl;
141 	void			*mcpu_mach_ctx_ptr;
142 
143 	/*
144 	 * A stamp that is unique per processor and changes
145 	 * whenever an interrupt happens. Userful for detecting
146 	 * if a section of code gets interrupted.
147 	 * The high order 16 bits will hold the cpu->cpu_id.
148 	 * The low order bits will be incremented on every interrupt.
149 	 */
150 	volatile uint32_t	mcpu_istamp;
151 };
152 
153 #define	NINTR_THREADS	(LOCK_LEVEL-1)	/* number of interrupt threads */
154 #define	MWAIT_HALTED	(1)		/* mcpu_mwait set when halting */
155 #define	MWAIT_RUNNING	(0)		/* mcpu_mwait set to wakeup */
156 #define	MWAIT_WAKEUP_IPI	(2)	/* need IPI to wakeup */
157 #define	MWAIT_WAKEUP(cpu)	(*((cpu)->cpu_m.mcpu_mwait) = MWAIT_RUNNING)
158 
159 #endif	/* _ASM */
160 
161 /* Please DON'T add any more of this namespace-poisoning sewage here */
162 
163 #define	cpu_nodeid cpu_m.mcpu_nodeid
164 #define	cpu_pri cpu_m.mcpu_pri
165 #define	cpu_pri_data cpu_m.mcpu_pri_data
166 #define	cpu_current_hat cpu_m.mcpu_current_hat
167 #define	cpu_hat_info cpu_m.mcpu_hat_info
168 #define	cpu_ppaddr_mutex cpu_m.mcpu_ppaddr_mutex
169 #define	cpu_gdt cpu_m.mcpu_gdt
170 #define	cpu_idt cpu_m.mcpu_idt
171 #define	cpu_tss cpu_m.mcpu_tss
172 #define	cpu_ldt cpu_m.mcpu_ldt
173 #define	cpu_caddr1 cpu_m.mcpu_caddr1
174 #define	cpu_caddr2 cpu_m.mcpu_caddr2
175 #define	cpu_softinfo cpu_m.mcpu_softinfo
176 #define	cpu_caddr1pte cpu_m.mcpu_caddr1pte
177 #define	cpu_caddr2pte cpu_m.mcpu_caddr2pte
178 
179 #ifdef	__cplusplus
180 }
181 #endif
182 
183 #endif	/* _SYS_MACHCPUVAR_H */
184