xref: /titanic_44/usr/src/uts/i86pc/sys/cpu_acpi.h (revision 24fe0b3bf671e123467ce1df0b67cadd3614c8e4)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 #ifndef	_CPU_ACPI_H
27 #define	_CPU_ACPI_H
28 
29 #include <sys/cpuvar.h>
30 #include <sys/acpi/acpi.h>
31 #include <sys/acpi/accommon.h>
32 #include <sys/acpi/acresrc.h>
33 #include <sys/acpica.h>
34 
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
38 
39 /*
40  * P-state related macros
41  */
42 #define	CPU_ACPI_PPC(sp)		sp->cs_ppc
43 #define	CPU_ACPI_PSD(sp)		sp->cs_psd
44 #define	CPU_ACPI_PCT(sp)		sp->cs_pct
45 #define	CPU_ACPI_PCT_CTRL(sp)		&sp->cs_pct[0]
46 #define	CPU_ACPI_PCT_STATUS(sp)		&sp->cs_pct[1]
47 #define	CPU_ACPI_PSTATES(sp)		sp->cs_pstates.ss_states
48 #define	CPU_ACPI_PSTATES_COUNT(sp)	sp->cs_pstates.ss_count
49 
50 #define	CPU_ACPI_FREQ(pstate)		pstate->ps_freq
51 #define	CPU_ACPI_PSTATE_TRANSLAT(pstate) pstate->ps_translat
52 #define	CPU_ACPI_PSTATE_CTRL(pstate)	pstate->ps_ctrl
53 
54 /*
55  * T-state related macros
56  */
57 #define	CPU_ACPI_TPC(sp)		sp->cs_tpc
58 #define	CPU_ACPI_TSD(sp)		sp->cs_tsd
59 #define	CPU_ACPI_PTC(sp)		sp->cs_ptc
60 #define	CPU_ACPI_PTC_CTRL(sp)		&sp->cs_ptc[0]
61 #define	CPU_ACPI_PTC_STATUS(sp)		&sp->cs_ptc[1]
62 #define	CPU_ACPI_TSTATES(sp)		sp->cs_tstates.ss_states
63 #define	CPU_ACPI_TSTATES_COUNT(sp)	sp->cs_tstates.ss_count
64 
65 #define	CPU_ACPI_FREQPER(tstate)	tstate->ts_freqper
66 #define	CPU_ACPI_TSTATE_TRANSLAT(tstate) tstate->ts_translat
67 #define	CPU_ACPI_TSTATE_CTRL(tstate)	tstate->ts_ctrl
68 #define	CPU_ACPI_TSTATE_STAT(tstate)	tstate->ts_state
69 
70 /*
71  * C-state realted macros
72  */
73 #define	CPU_ACPI_CSD(sp)		sp->cs_csd
74 #define	CPU_ACPI_BM_INFO(sp)		sp->bm_info
75 #define	CPU_ACPI_CSTATES(sp)		sp->cs_cstates.ss_states
76 #define	CPU_ACPI_CSTATES_COUNT(sp)	sp->cs_cstates.ss_count
77 
78 #define	CPU_ACPI_NONE_CACHED		0x0000
79 #define	CPU_ACPI_PCT_CACHED		0x0001
80 #define	CPU_ACPI_PSS_CACHED		0x0002
81 #define	CPU_ACPI_PSD_CACHED		0x0004
82 #define	CPU_ACPI_PPC_CACHED		0x0008
83 #define	CPU_ACPI_PTC_CACHED		0x0010
84 #define	CPU_ACPI_TSS_CACHED		0x0020
85 #define	CPU_ACPI_TSD_CACHED		0x0040
86 #define	CPU_ACPI_TPC_CACHED		0x0080
87 #define	CPU_ACPI_CST_CACHED		0x0100
88 #define	CPU_ACPI_CSD_CACHED		0x0200
89 
90 #define	CPU_ACPI_IS_OBJ_CACHED(sp, obj)	(sp->cpu_acpi_cached & obj)
91 #define	CPU_ACPI_OBJ_IS_CACHED(sp, obj)	(sp->cpu_acpi_cached |= obj)
92 #define	CPU_ACPI_OBJ_IS_NOT_CACHED(sp, obj) (sp->cpu_acpi_cached &= ~obj)
93 
94 #define	CPU_ACPI_PSTATES_SIZE(cnt) (cnt * sizeof (cpu_acpi_pstate_t))
95 #define	CPU_ACPI_PSS_CNT (sizeof (cpu_acpi_pstate_t) / sizeof (uint32_t))
96 #define	CPU_ACPI_TSTATES_SIZE(cnt) (cnt * sizeof (cpu_acpi_tstate_t))
97 #define	CPU_ACPI_TSS_CNT (sizeof (cpu_acpi_tstate_t) / sizeof (uint32_t))
98 #define	CPU_ACPI_CSTATES_SIZE(cnt) (cnt * sizeof (cpu_acpi_cstate_t))
99 #define	CPU_ACPI_CST_CNT (sizeof (cpu_acpi_cstate_t) / sizeof (uint32_t))
100 /*
101  * CPU Domain Coordination Types
102  */
103 #define	CPU_ACPI_SW_ALL	0xfc
104 #define	CPU_ACPI_SW_ANY	0xfd
105 #define	CPU_ACPI_HW_ALL	0xfe
106 
107 /*
108  * Container for ACPI processor state dependency information
109  */
110 typedef struct cpu_acpi_state_dependency
111 {
112 	uint8_t sd_entries;
113 	uint8_t sd_revision;
114 	uint32_t sd_domain;
115 	uint32_t sd_type;
116 	uint32_t sd_num;
117 	uint32_t sd_index;
118 } cpu_acpi_state_dependency_t;
119 
120 typedef cpu_acpi_state_dependency_t cpu_acpi_psd_t;
121 typedef cpu_acpi_state_dependency_t cpu_acpi_tsd_t;
122 typedef cpu_acpi_state_dependency_t cpu_acpi_csd_t;
123 
124 /*
125  * Container for ACPI processor control register information
126  */
127 typedef struct cpu_acpi_ctrl_regs
128 {
129 	uint8_t cr_addrspace_id;
130 	uint8_t cr_width;
131 	uint8_t cr_offset;
132 	uint8_t cr_asize;
133 	ACPI_IO_ADDRESS cr_address;
134 } cpu_acpi_ctrl_regs_t;
135 
136 typedef cpu_acpi_ctrl_regs_t cpu_acpi_pct_t;
137 typedef cpu_acpi_ctrl_regs_t cpu_acpi_ptc_t;
138 
139 /*
140  * Container for ACPI _PSS information
141  */
142 typedef struct cpu_acpi_pstate
143 {
144 	uint32_t ps_freq;
145 	uint32_t ps_disp;
146 	uint32_t ps_translat;
147 	uint32_t ps_buslat;
148 	uint32_t ps_ctrl;
149 	uint32_t ps_state;
150 } cpu_acpi_pstate_t;
151 
152 /*
153  * Container for _TSS information
154  */
155 typedef struct cpu_acpi_tstate
156 {
157 	uint32_t ts_freqper;
158 	uint32_t ts_disp;
159 	uint32_t ts_translat;
160 	uint32_t ts_ctrl;
161 	uint32_t ts_state;
162 
163 } cpu_acpi_tstate_t;
164 
165 /*
166  * Container for _CST information
167  */
168 typedef struct cpu_acpi_cstate
169 {
170 	uint32_t cs_addrspace_id;
171 	uint32_t cs_address;
172 	uint32_t cs_type;
173 	uint32_t cs_latency;
174 	uint32_t cs_power;
175 	kstat_t	*cs_ksp;
176 } cpu_acpi_cstate_t;
177 
178 typedef struct cpu_acpi_supported_states {
179 	void *ss_states;
180 	uint32_t ss_count;
181 } cpu_acpi_supported_states_t;
182 
183 typedef cpu_acpi_supported_states_t cpu_acpi_pstates_t;
184 typedef cpu_acpi_supported_states_t cpu_acpi_tstates_t;
185 typedef cpu_acpi_supported_states_t cpu_acpi_cstates_t;
186 
187 typedef int cpu_acpi_present_capabilities_t;
188 typedef int cpu_acpi_ppc_t;
189 typedef int cpu_acpi_tpc_t;
190 
191 /*
192  * Container for cached ACPI data.
193  */
194 typedef struct cpu_acpi_state {
195 	ACPI_HANDLE cs_handle;
196 	int cs_id;
197 	uint_t cpu_acpi_cached;
198 	cpu_acpi_pstates_t cs_pstates;
199 	cpu_acpi_pct_t cs_pct[2];
200 	cpu_acpi_psd_t cs_psd;
201 	cpu_acpi_ppc_t cs_ppc;
202 	cpu_acpi_tstates_t cs_tstates;
203 	cpu_acpi_ptc_t cs_ptc[2];
204 	cpu_acpi_tsd_t cs_tsd;
205 	cpu_acpi_tpc_t cs_tpc;
206 	cpu_acpi_cstates_t cs_cstates;
207 	cpu_acpi_csd_t cs_csd;
208 	uint_t bm_info;
209 } cpu_acpi_state_t;
210 
211 typedef cpu_acpi_state_t *cpu_acpi_handle_t;
212 
213 extern void cpu_acpi_cache_ppc(cpu_acpi_handle_t);
214 extern void cpu_acpi_cache_tpc(cpu_acpi_handle_t);
215 extern int cpu_acpi_cache_pstate_data(cpu_acpi_handle_t);
216 extern void cpu_acpi_free_pstate_data(cpu_acpi_handle_t);
217 extern int cpu_acpi_cache_tstate_data(cpu_acpi_handle_t);
218 extern void cpu_acpi_free_tstate_data(cpu_acpi_handle_t);
219 extern int cpu_acpi_cache_cstate_data(cpu_acpi_handle_t);
220 extern void cpu_acpi_free_cstate_data(cpu_acpi_handle_t);
221 extern void cpu_acpi_install_notify_handler(cpu_acpi_handle_t,
222     ACPI_NOTIFY_HANDLER, void *);
223 extern void cpu_acpi_remove_notify_handler(cpu_acpi_handle_t,
224     ACPI_NOTIFY_HANDLER);
225 extern int cpu_acpi_write_pdc(cpu_acpi_handle_t, uint32_t, uint32_t,
226     uint32_t *);
227 extern int cpu_acpi_write_port(ACPI_IO_ADDRESS, uint32_t, uint32_t);
228 extern int cpu_acpi_read_port(ACPI_IO_ADDRESS, uint32_t *, uint32_t);
229 extern void cpu_acpi_set_register(uint32_t, uint32_t);
230 extern void cpu_acpi_get_register(uint32_t, uint32_t *);
231 extern uint_t cpu_acpi_get_speeds(cpu_acpi_handle_t, int **);
232 extern uint_t cpu_acpi_get_max_cstates(cpu_acpi_handle_t);
233 extern void cpu_acpi_free_speeds(int *, uint_t);
234 extern cpu_acpi_handle_t cpu_acpi_init(cpu_t *);
235 extern void cpu_acpi_fini(cpu_acpi_handle_t);
236 
237 #ifdef __cplusplus
238 }
239 #endif
240 
241 #endif	/* _CPU_ACPI_H */
242