17ff178cdSJimmy Vetayases /* 27ff178cdSJimmy Vetayases * CDDL HEADER START 37ff178cdSJimmy Vetayases * 47ff178cdSJimmy Vetayases * The contents of this file are subject to the terms of the 57ff178cdSJimmy Vetayases * Common Development and Distribution License (the "License"). 67ff178cdSJimmy Vetayases * You may not use this file except in compliance with the License. 77ff178cdSJimmy Vetayases * 87ff178cdSJimmy Vetayases * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 97ff178cdSJimmy Vetayases * or http://www.opensolaris.org/os/licensing. 107ff178cdSJimmy Vetayases * See the License for the specific language governing permissions 117ff178cdSJimmy Vetayases * and limitations under the License. 127ff178cdSJimmy Vetayases * 137ff178cdSJimmy Vetayases * When distributing Covered Code, include this CDDL HEADER in each 147ff178cdSJimmy Vetayases * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 157ff178cdSJimmy Vetayases * If applicable, add the following below this CDDL HEADER, with the 167ff178cdSJimmy Vetayases * fields enclosed by brackets "[]" replaced with your own identifying 177ff178cdSJimmy Vetayases * information: Portions Copyright [yyyy] [name of copyright owner] 187ff178cdSJimmy Vetayases * 197ff178cdSJimmy Vetayases * CDDL HEADER END 207ff178cdSJimmy Vetayases */ 217ff178cdSJimmy Vetayases /* 227ff178cdSJimmy Vetayases * Copyright (c) 2010, Oracle and/or its affiliates. All rights reserved. 237ff178cdSJimmy Vetayases */ 24*a288e5a9SJoshua M. Clulow /* 25*a288e5a9SJoshua M. Clulow * Copyright (c) 2013, Joyent, Inc. All rights reserved. 26*a288e5a9SJoshua M. Clulow */ 277ff178cdSJimmy Vetayases 287ff178cdSJimmy Vetayases #ifndef _SYS_APIC_COMMON_H 297ff178cdSJimmy Vetayases #define _SYS_APIC_COMMON_H 307ff178cdSJimmy Vetayases 317ff178cdSJimmy Vetayases #include <sys/psm_types.h> 327ff178cdSJimmy Vetayases #include <sys/avintr.h> 337ff178cdSJimmy Vetayases #include <sys/privregs.h> 347ff178cdSJimmy Vetayases #include <sys/pci.h> 35*a288e5a9SJoshua M. Clulow #include <sys/cyclic.h> 367ff178cdSJimmy Vetayases 377ff178cdSJimmy Vetayases #ifdef __cplusplus 387ff178cdSJimmy Vetayases extern "C" { 397ff178cdSJimmy Vetayases #endif 407ff178cdSJimmy Vetayases 417ff178cdSJimmy Vetayases /* 427ff178cdSJimmy Vetayases * Functions & Variables common to pcplusmp & apix 437ff178cdSJimmy Vetayases */ 447ff178cdSJimmy Vetayases 457ff178cdSJimmy Vetayases #include <sys/psm_common.h> 467ff178cdSJimmy Vetayases 477ff178cdSJimmy Vetayases /* Methods for multiple IOAPIC */ 487ff178cdSJimmy Vetayases enum apic_ioapic_method_type { 497ff178cdSJimmy Vetayases APIC_MUL_IOAPIC_NONE, /* use to disable pcplusmp fallback */ 507ff178cdSJimmy Vetayases APIC_MUL_IOAPIC_MASK, /* Set RT Entry Mask bit before EOI */ 517ff178cdSJimmy Vetayases APIC_MUL_IOAPIC_DEOI, /* Directed EOI */ 527ff178cdSJimmy Vetayases APIC_MUL_IOAPIC_IOXAPIC, /* IOxAPIC */ 537ff178cdSJimmy Vetayases APIC_MUL_IOAPIC_IIR, /* IOMMU interrup remapping */ 547ff178cdSJimmy Vetayases APIC_MUL_IOAPIC_PCPLUSMP /* Fall back to old pcplusmp */ 557ff178cdSJimmy Vetayases }; 567ff178cdSJimmy Vetayases 577ff178cdSJimmy Vetayases #define APIX_IS_DIRECTED_EOI(type) \ 587ff178cdSJimmy Vetayases ((type) == APIC_MUL_IOAPIC_DEOI || (type) == APIC_MUL_IOAPIC_IIR) 597ff178cdSJimmy Vetayases #define APIX_IS_MASK_RDT(type) \ 607ff178cdSJimmy Vetayases ((type) == APIC_MUL_IOAPIC_NONE || (type) == APIC_MUL_IOAPIC_MASK) 617ff178cdSJimmy Vetayases 627ff178cdSJimmy Vetayases extern int apix_enable; 637ff178cdSJimmy Vetayases extern int apix_loaded(void); 647ff178cdSJimmy Vetayases extern enum apic_ioapic_method_type apix_mul_ioapic_method; 657ff178cdSJimmy Vetayases 667ff178cdSJimmy Vetayases extern int apic_oneshot; 677ff178cdSJimmy Vetayases /* to allow disabling one-shot capability */ 687ff178cdSJimmy Vetayases extern int apic_oneshot_enable; 697ff178cdSJimmy Vetayases 707ff178cdSJimmy Vetayases /* Now the ones for Dynamic Interrupt distribution */ 717ff178cdSJimmy Vetayases extern int apic_enable_dynamic_migration; 727ff178cdSJimmy Vetayases 737ff178cdSJimmy Vetayases extern int apic_have_32bit_cr8; 747ff178cdSJimmy Vetayases 757ff178cdSJimmy Vetayases extern struct psm_ops *psmops; 767ff178cdSJimmy Vetayases 777ff178cdSJimmy Vetayases /* 787ff178cdSJimmy Vetayases * These variables are frequently accessed in apic_intr_enter(), 797ff178cdSJimmy Vetayases * apic_intr_exit and apic_setspl, so group them together 807ff178cdSJimmy Vetayases */ 817ff178cdSJimmy Vetayases extern volatile uint32_t *apicadr; /* virtual addr of local APIC */ 827ff178cdSJimmy Vetayases extern uchar_t apic_io_vectbase[MAX_IO_APIC]; 837ff178cdSJimmy Vetayases extern uchar_t apic_io_vectend[MAX_IO_APIC]; 847ff178cdSJimmy Vetayases extern uchar_t apic_io_ver[MAX_IO_APIC]; 857ff178cdSJimmy Vetayases extern int apic_io_max; 867ff178cdSJimmy Vetayases extern int apic_nvidia_io_max; 877ff178cdSJimmy Vetayases extern int apic_setspl_delay; /* apic_setspl - delay enable */ 887ff178cdSJimmy Vetayases extern int apic_clkvect; 897ff178cdSJimmy Vetayases 907ff178cdSJimmy Vetayases /* vector at which error interrupts come in */ 917ff178cdSJimmy Vetayases extern int apic_errvect; 927ff178cdSJimmy Vetayases extern int apic_enable_error_intr; 937ff178cdSJimmy Vetayases extern int apic_error_display_delay; 947ff178cdSJimmy Vetayases 957ff178cdSJimmy Vetayases /* vector at which performance counter overflow interrupts come in */ 967ff178cdSJimmy Vetayases extern int apic_cpcovf_vect; 977ff178cdSJimmy Vetayases extern int apic_enable_cpcovf_intr; 987ff178cdSJimmy Vetayases 997ff178cdSJimmy Vetayases /* vector at which CMCI interrupts come in */ 1007ff178cdSJimmy Vetayases extern int apic_cmci_vect; 1017ff178cdSJimmy Vetayases extern int cmi_enable_cmci; 1027ff178cdSJimmy Vetayases extern void cmi_cmci_trap(void); 1037ff178cdSJimmy Vetayases 1047ff178cdSJimmy Vetayases extern kmutex_t cmci_cpu_setup_lock; /* protects cmci_cpu_setup_registered */ 1057ff178cdSJimmy Vetayases extern int cmci_cpu_setup_registered; 1067ff178cdSJimmy Vetayases 1077ff178cdSJimmy Vetayases extern int apic_forceload; 1087ff178cdSJimmy Vetayases 1097ff178cdSJimmy Vetayases extern int apic_coarse_hrtime; /* 0 - use accurate slow gethrtime() */ 1107ff178cdSJimmy Vetayases /* 1 - use gettime() for performance */ 1117ff178cdSJimmy Vetayases extern int apic_flat_model; /* 0 - clustered. 1 - flat */ 1127ff178cdSJimmy Vetayases 1137ff178cdSJimmy Vetayases extern int apic_panic_on_nmi; 1147ff178cdSJimmy Vetayases extern int apic_panic_on_apic_error; 1157ff178cdSJimmy Vetayases 1167ff178cdSJimmy Vetayases extern int apic_verbose; 1177ff178cdSJimmy Vetayases 1187ff178cdSJimmy Vetayases #ifdef DEBUG 1197ff178cdSJimmy Vetayases extern int apic_debug; 1207ff178cdSJimmy Vetayases extern int apic_restrict_vector; 1217ff178cdSJimmy Vetayases 1227ff178cdSJimmy Vetayases extern int apic_debug_msgbuf[APIC_DEBUG_MSGBUFSIZE]; 1237ff178cdSJimmy Vetayases extern int apic_debug_msgbufindex; 1247ff178cdSJimmy Vetayases 1257ff178cdSJimmy Vetayases #endif /* DEBUG */ 1267ff178cdSJimmy Vetayases 1277ff178cdSJimmy Vetayases extern uint_t apic_nsec_per_intr; 1287ff178cdSJimmy Vetayases extern uint_t apic_nticks; 1297ff178cdSJimmy Vetayases extern uint_t apic_skipped_redistribute; 1307ff178cdSJimmy Vetayases 1317ff178cdSJimmy Vetayases extern uint_t last_count_read; 1327ff178cdSJimmy Vetayases extern lock_t apic_mode_switch_lock; 1337ff178cdSJimmy Vetayases extern lock_t apic_gethrtime_lock; 1347ff178cdSJimmy Vetayases extern volatile int apic_hrtime_stamp; 1357ff178cdSJimmy Vetayases extern volatile hrtime_t apic_nsec_since_boot; 1367ff178cdSJimmy Vetayases extern uint_t apic_hertz_count; 1377ff178cdSJimmy Vetayases 1387ff178cdSJimmy Vetayases extern uint64_t apic_ticks_per_SFnsecs; /* # of ticks in SF nsecs */ 1397ff178cdSJimmy Vetayases 1407ff178cdSJimmy Vetayases extern int apic_hrtime_error; 1417ff178cdSJimmy Vetayases extern int apic_remote_hrterr; 1427ff178cdSJimmy Vetayases extern int apic_num_nmis; 1437ff178cdSJimmy Vetayases extern int apic_apic_error; 1447ff178cdSJimmy Vetayases extern int apic_num_apic_errors; 1457ff178cdSJimmy Vetayases extern int apic_num_cksum_errors; 1467ff178cdSJimmy Vetayases 1477ff178cdSJimmy Vetayases extern int apic_error; 1487ff178cdSJimmy Vetayases 1497ff178cdSJimmy Vetayases /* use to make sure only one cpu handles the nmi */ 1507ff178cdSJimmy Vetayases extern lock_t apic_nmi_lock; 1517ff178cdSJimmy Vetayases /* use to make sure only one cpu handles the error interrupt */ 1527ff178cdSJimmy Vetayases extern lock_t apic_error_lock; 1537ff178cdSJimmy Vetayases 1547ff178cdSJimmy Vetayases /* Patchable global variables. */ 1557ff178cdSJimmy Vetayases extern int apic_kmdb_on_nmi; /* 0 - no, 1 - yes enter kmdb */ 1567ff178cdSJimmy Vetayases extern uint32_t apic_divide_reg_init; /* 0 - divide by 2 */ 1577ff178cdSJimmy Vetayases 1587ff178cdSJimmy Vetayases extern apic_intrmap_ops_t *apic_vt_ops; 1597ff178cdSJimmy Vetayases 1607ff178cdSJimmy Vetayases #ifdef DEBUG 1617ff178cdSJimmy Vetayases extern int apic_break_on_cpu; 1627ff178cdSJimmy Vetayases extern int apic_stretch_interrupts; 1637ff178cdSJimmy Vetayases extern int apic_stretch_ISR; /* IPL of 3 matches nothing now */ 1647ff178cdSJimmy Vetayases #endif 1657ff178cdSJimmy Vetayases 166*a288e5a9SJoshua M. Clulow extern cyclic_id_t apic_cyclic_id; 1677ff178cdSJimmy Vetayases 1687ff178cdSJimmy Vetayases extern void apic_nmi_intr(caddr_t arg, struct regs *rp); 1697ff178cdSJimmy Vetayases extern int apic_clkinit(); 1707ff178cdSJimmy Vetayases extern hrtime_t apic_gettime(); 1717ff178cdSJimmy Vetayases extern hrtime_t apic_gethrtime(); 1727ff178cdSJimmy Vetayases extern int apic_cpu_start(processorid_t cpuid, caddr_t ctx); 1737ff178cdSJimmy Vetayases extern int apic_cpu_stop(processorid_t cpuid, caddr_t ctx); 1747ff178cdSJimmy Vetayases extern int apic_cpu_add(psm_cpu_request_t *reqp); 1757ff178cdSJimmy Vetayases extern int apic_cpu_remove(psm_cpu_request_t *reqp); 1767ff178cdSJimmy Vetayases extern int apic_cpu_ops(psm_cpu_request_t *reqp); 1777ff178cdSJimmy Vetayases extern void apic_switch_ipi_callback(boolean_t enter); 1787ff178cdSJimmy Vetayases extern void apic_send_ipi(int cpun, int ipl); 1797ff178cdSJimmy Vetayases extern void apic_set_idlecpu(processorid_t cpun); 1807ff178cdSJimmy Vetayases extern void apic_unset_idlecpu(processorid_t cpun); 1817ff178cdSJimmy Vetayases extern void apic_shutdown(int cmd, int fcn); 1827ff178cdSJimmy Vetayases extern void apic_preshutdown(int cmd, int fcn); 1837ff178cdSJimmy Vetayases extern processorid_t apic_get_next_processorid(processorid_t cpun); 18441afdfa7SKrishnendu Sadhukhan - Sun Microsystems extern uint_t apic_calibrate(volatile uint32_t *, uint16_t *); 1857ff178cdSJimmy Vetayases 1867ff178cdSJimmy Vetayases extern int apic_error_intr(); 1877ff178cdSJimmy Vetayases extern void apic_cpcovf_mask_clear(void); 1887ff178cdSJimmy Vetayases extern int cmci_cpu_setup(cpu_setup_t what, int cpuid, void *arg); 1897ff178cdSJimmy Vetayases extern void apic_intrmap_init(int apic_mode); 1907ff178cdSJimmy Vetayases extern processorid_t apic_find_cpu(int flag); 1917ff178cdSJimmy Vetayases extern processorid_t apic_get_next_bind_cpu(void); 1927ff178cdSJimmy Vetayases 1937ff178cdSJimmy Vetayases extern int apic_support_msi; 1947ff178cdSJimmy Vetayases extern int apic_multi_msi_enable; 1957ff178cdSJimmy Vetayases extern int apic_msix_enable; 1967ff178cdSJimmy Vetayases 1977ff178cdSJimmy Vetayases extern uint32_t apic_get_localapicid(uint32_t cpuid); 1987ff178cdSJimmy Vetayases extern uchar_t apic_get_ioapicid(uchar_t ioapicindex); 1997ff178cdSJimmy Vetayases 2007ff178cdSJimmy Vetayases #ifdef __cplusplus 2017ff178cdSJimmy Vetayases } 2027ff178cdSJimmy Vetayases #endif 2037ff178cdSJimmy Vetayases 2047ff178cdSJimmy Vetayases #endif /* _SYS_APIC_COMMON_H */ 205