1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #pragma ident "%Z%%M% %I% %E% SMI" 27 28 #define PSMI_1_5 29 30 #include <sys/mutex.h> 31 #include <sys/types.h> 32 #include <sys/time.h> 33 #include <sys/machlock.h> 34 #include <sys/smp_impldefs.h> 35 #include <sys/uadmin.h> 36 #include <sys/promif.h> 37 #include <sys/psm.h> 38 #include <sys/pit.h> 39 #include <sys/psm_common.h> 40 #include <sys/atomic.h> 41 42 #define NSEC_IN_SEC 1000000000 43 44 /* 45 * External References 46 */ 47 extern int intr_clear(void); 48 extern void intr_restore(uint_t); 49 50 /* 51 * Local Function Prototypes 52 */ 53 static void uppc_softinit(void); 54 static void uppc_picinit(); 55 static int uppc_clkinit(int); 56 static int uppc_addspl(int irqno, int ipl, int min_ipl, int max_ipl); 57 static int uppc_delspl(int irqno, int ipl, int min_ipl, int max_ipl); 58 static processorid_t uppc_get_next_processorid(processorid_t cpu_id); 59 static int uppc_get_clockirq(int ipl); 60 static int uppc_probe(void); 61 static int uppc_translate_irq(dev_info_t *dip, int irqno); 62 static void uppc_shutdown(int cmd, int fcn); 63 static void uppc_preshutdown(int cmd, int fcn); 64 static int uppc_init_acpi(void); 65 static void uppc_setspl(int); 66 static int uppc_intr_enter(int, int *); 67 static void uppc_intr_exit(int, int); 68 static hrtime_t uppc_gethrtime(); 69 70 static int uppc_acpi_irq_configure(acpi_psm_lnk_t *acpipsmlnkp, dev_info_t *dip, 71 int *pci_irqp, iflag_t *intr_flagp); 72 73 /* 74 * Global Data 75 */ 76 static struct standard_pic pics0; 77 int uppc_use_acpi = 1; /* Use ACPI by default */ 78 int uppc_enable_acpi = 0; 79 80 81 /* 82 * For interrupt link devices, if uppc_unconditional_srs is set, an irq resource 83 * will be assigned (via _SRS). If it is not set, use the current 84 * irq setting (via _CRS), but only if that irq is in the set of possible 85 * irqs (returned by _PRS) for the device. 86 */ 87 int uppc_unconditional_srs = 1; 88 89 /* 90 * For interrupt link devices, if uppc_prefer_crs is set when we are 91 * assigning an IRQ resource to a device, prefer the current IRQ setting 92 * over other possible irq settings under same conditions. 93 */ 94 int uppc_prefer_crs = 1; 95 96 int uppc_verbose = 0; 97 98 /* flag definitions for uppc_verbose */ 99 #define UPPC_VERBOSE_IRQ_FLAG 0x00000001 100 #define UPPC_VERBOSE_POWEROFF_FLAG 0x00000002 101 #define UPPC_VERBOSE_POWEROFF_PAUSE_FLAG 0x00000004 102 103 104 #define UPPC_VERBOSE_IRQ(fmt) \ 105 if (uppc_verbose & UPPC_VERBOSE_IRQ_FLAG) \ 106 cmn_err fmt; 107 108 #define UPPC_VERBOSE_POWEROFF(fmt) \ 109 if (uppc_verbose & UPPC_VERBOSE_POWEROFF_FLAG) \ 110 prom_printf fmt; 111 112 uchar_t uppc_reserved_irqlist[MAX_ISA_IRQ + 1]; 113 114 static uint16_t uppc_irq_shared_table[MAX_ISA_IRQ + 1]; 115 116 /* 117 * Contains SCI irqno from FADT after initialization 118 */ 119 static int uppc_sci = -1; 120 121 /* 122 * Local Static Data 123 */ 124 125 static lock_t uppc_gethrtime_lock; 126 static hrtime_t uppc_lasthrtime; 127 128 129 #ifdef UPPC_DEBUG 130 #define DENT 0x0001 131 132 static int uppc_debug = 0; 133 134 135 #endif 136 137 138 static struct psm_ops uppc_ops = { 139 uppc_probe, /* psm_probe */ 140 141 uppc_softinit, /* psm_init */ 142 uppc_picinit, /* psm_picinit */ 143 uppc_intr_enter, /* psm_intr_enter */ 144 uppc_intr_exit, /* psm_intr_exit */ 145 uppc_setspl, /* psm_setspl */ 146 uppc_addspl, /* psm_addspl */ 147 uppc_delspl, /* psm_delspl */ 148 (int (*)(processorid_t))NULL, /* psm_disable_intr */ 149 (void (*)(processorid_t))NULL, /* psm_enable_intr */ 150 (int (*)(int))NULL, /* psm_softlvl_to_irq */ 151 (void (*)(int))NULL, /* psm_set_softintr */ 152 (void (*)(processorid_t))NULL, /* psm_set_idlecpu */ 153 (void (*)(processorid_t))NULL, /* psm_unset_idlecpu */ 154 155 uppc_clkinit, /* psm_clkinit */ 156 uppc_get_clockirq, /* psm_get_clockirq */ 157 (void (*)(void))NULL, /* psm_hrtimeinit */ 158 uppc_gethrtime, /* psm_gethrtime */ 159 160 uppc_get_next_processorid, /* psm_get_next_processorid */ 161 (void (*)(processorid_t, caddr_t))NULL, /* psm_cpu_start */ 162 (int (*)(void))NULL, /* psm_post_cpu_start */ 163 uppc_shutdown, /* psm_shutdown */ 164 (int (*)(int, int))NULL, /* psm_get_ipivect */ 165 (void (*)(processorid_t, int))NULL, /* psm_send_ipi */ 166 167 uppc_translate_irq, /* psm_translate_irq */ 168 169 (int (*)(todinfo_t *))NULL, /* psm_tod_get */ 170 (int (*)(todinfo_t *))NULL, /* psm_tod_set */ 171 172 (void (*)(int, char *))NULL, /* psm_notify_error */ 173 (void (*)(int msg))NULL, /* psm_notify_func */ 174 (void (*)(hrtime_t time))NULL, /* psm_timer_reprogram */ 175 (void (*)(void))NULL, /* psm_timer_enable */ 176 (void (*)(void))NULL, /* psm_timer_disable */ 177 (void (*)(void *arg))NULL, /* psm_post_cyclic_setup */ 178 uppc_preshutdown, /* psm_preshutdown */ 179 180 (int (*)(dev_info_t *, ddi_intr_handle_impl_t *, 181 psm_intr_op_t, int *))NULL /* psm_intr_ops */ 182 }; 183 184 185 static struct psm_info uppc_info = { 186 PSM_INFO_VER01_5, /* version */ 187 PSM_OWN_SYS_DEFAULT, /* ownership */ 188 (struct psm_ops *)&uppc_ops, /* operation */ 189 "uppc", /* machine name */ 190 "UniProcessor PC", /* machine descriptions */ 191 }; 192 193 /* 194 * Configuration Data 195 */ 196 197 /* 198 * This is the loadable module wrapper. 199 */ 200 #include <sys/modctl.h> 201 202 static void *uppc_hdlp; 203 204 int 205 _init(void) 206 { 207 return (psm_mod_init(&uppc_hdlp, &uppc_info)); 208 } 209 210 int 211 _fini(void) 212 { 213 return (psm_mod_fini(&uppc_hdlp, &uppc_info)); 214 } 215 216 int 217 _info(struct modinfo *modinfop) 218 { 219 return (psm_mod_info(&uppc_hdlp, &uppc_info, modinfop)); 220 } 221 222 /* 223 * Autoconfiguration Routines 224 */ 225 226 static int 227 uppc_probe(void) 228 { 229 230 231 return (PSM_SUCCESS); 232 } 233 234 static void 235 uppc_softinit(void) 236 { 237 struct standard_pic *pp; 238 int i; 239 240 pp = &pics0; 241 242 243 if (uppc_use_acpi && uppc_init_acpi()) { 244 build_reserved_irqlist((uchar_t *)uppc_reserved_irqlist); 245 for (i = 0; i <= MAX_ISA_IRQ; i++) 246 uppc_irq_shared_table[i] = 0; 247 uppc_enable_acpi = 1; 248 } 249 250 /* 251 * initialize the ipl mask 252 */ 253 for (i = 0; i < (MAXIPL << 1); i += 2) { 254 /* enable slave lines on master */ 255 pp->c_iplmask[i] = 0xff; 256 pp->c_iplmask[i+1] = (0xff & ~(1 << MASTERLINE)); 257 } 258 } 259 260 /*ARGSUSED*/ 261 static int 262 uppc_clkinit(int hertz) 263 { 264 ulong_t clkticks = PIT_HZ / hz; 265 266 if (hertz == 0) 267 return (0); /* One shot mode not supported */ 268 269 /* 270 * program timer 0 271 */ 272 outb(PITCTL_PORT, (PIT_C0|PIT_NDIVMODE|PIT_READMODE)); 273 outb(PITCTR0_PORT, (uchar_t)clkticks); 274 outb(PITCTR0_PORT, (uchar_t)(clkticks>>8)); 275 276 return (NSEC_IN_SEC / hertz); 277 } 278 279 static void 280 uppc_picinit() 281 { 282 picsetup(); 283 284 /* 285 * If a valid SCI is present, manually addspl() 286 * since we're not set-up early enough in boot 287 * to do it "conventionally" (via add_avintr) 288 */ 289 if (uppc_sci >= 0) 290 (void) uppc_addspl(uppc_sci, SCI_IPL, SCI_IPL, SCI_IPL); 291 } 292 293 /*ARGSUSED3*/ 294 static int 295 uppc_addspl(int irqno, int ipl, int min_ipl, int max_ipl) 296 { 297 struct standard_pic *pp; 298 int i; 299 int startidx; 300 uchar_t vectmask; 301 302 if (irqno <= MAX_ISA_IRQ) 303 atomic_add_16(&uppc_irq_shared_table[irqno], 1); 304 305 if (ipl != min_ipl) 306 return (0); 307 308 if (irqno > 7) { 309 vectmask = 1 << (irqno - 8); 310 startidx = (ipl << 1); 311 } else { 312 vectmask = 1 << irqno; 313 startidx = (ipl << 1) + 1; 314 } 315 316 /* 317 * mask intr same or above ipl 318 * level MAXIPL has all intr off as init. default 319 */ 320 pp = &pics0; 321 for (i = startidx; i < (MAXIPL << 1); i += 2) { 322 if (pp->c_iplmask[i] & vectmask) 323 break; 324 pp->c_iplmask[i] |= vectmask; 325 } 326 327 /* 328 * unmask intr below ipl 329 */ 330 for (i = startidx-2; i >= 0; i -= 2) { 331 if (!(pp->c_iplmask[i] & vectmask)) 332 break; 333 pp->c_iplmask[i] &= ~vectmask; 334 } 335 return (0); 336 } 337 338 static int 339 uppc_delspl(int irqno, int ipl, int min_ipl, int max_ipl) 340 { 341 struct standard_pic *pp; 342 int i; 343 uchar_t vectmask; 344 345 if (irqno <= MAX_ISA_IRQ) 346 atomic_add_16(&uppc_irq_shared_table[irqno], -1); 347 348 /* 349 * skip if we are not deleting the last handler 350 * and the ipl is higher than minimum 351 */ 352 if ((max_ipl != PSM_INVALID_IPL) && (ipl >= min_ipl)) 353 return (0); 354 355 if (irqno > 7) { 356 vectmask = 1 << (irqno - 8); 357 i = 0; 358 } else { 359 vectmask = 1 << irqno; 360 i = 1; 361 } 362 363 pp = &pics0; 364 365 /* 366 * check any handlers left for this irqno 367 */ 368 if (max_ipl != PSM_INVALID_IPL) { 369 /* 370 * unmasks all levels below the lowest priority 371 */ 372 i += ((min_ipl - 1) << 1); 373 for (; i >= 0; i -= 2) { 374 if (!(pp->c_iplmask[i] & vectmask)) 375 break; 376 pp->c_iplmask[i] &= ~vectmask; 377 } 378 } else { 379 /* 380 * set mask to all levels 381 */ 382 for (; i < (MAXIPL << 1); i += 2) { 383 if (pp->c_iplmask[i] & vectmask) 384 break; 385 pp->c_iplmask[i] |= vectmask; 386 } 387 } 388 return (0); 389 } 390 391 static processorid_t 392 uppc_get_next_processorid(processorid_t cpu_id) 393 { 394 if (cpu_id == -1) 395 return (0); 396 return (-1); 397 } 398 399 /*ARGSUSED*/ 400 static int 401 uppc_get_clockirq(int ipl) 402 { 403 return (CLOCK_VECTOR); 404 } 405 406 407 static int 408 uppc_init_acpi(void) 409 { 410 int verboseflags = 0; 411 int sci; 412 iflag_t sci_flags; 413 414 /* 415 * Process SCI configuration here; this may return 416 * an error if acpi-user-options has specified 417 * legacy mode (use ACPI without ACPI mode or SCI) 418 */ 419 if (acpica_get_sci(&sci, &sci_flags) != AE_OK) 420 sci = -1; 421 422 /* 423 * Initialize sub-system - if error is returns, ACPI is not 424 * used. 425 */ 426 if (acpica_init() != AE_OK) 427 return (0); 428 429 /* 430 * uppc implies system is in PIC mode; set edge/level 431 * via ELCR based on return value from get_sci; this 432 * will default to level/low if no override present, 433 * as recommended by Intel ACPI CA team. 434 */ 435 if (sci >= 0) { 436 ASSERT((sci_flags.intr_el == INTR_EL_LEVEL) || 437 (sci_flags.intr_el == INTR_EL_EDGE)); 438 439 psm_set_elcr(sci, sci_flags.intr_el == INTR_EL_LEVEL); 440 } 441 442 /* 443 * Remember SCI for later use 444 */ 445 uppc_sci = sci; 446 447 if (uppc_verbose & UPPC_VERBOSE_IRQ_FLAG) 448 verboseflags |= PSM_VERBOSE_IRQ_FLAG; 449 450 if (uppc_verbose & UPPC_VERBOSE_POWEROFF_FLAG) 451 verboseflags |= PSM_VERBOSE_POWEROFF_FLAG; 452 453 if (uppc_verbose & UPPC_VERBOSE_POWEROFF_PAUSE_FLAG) 454 verboseflags |= PSM_VERBOSE_POWEROFF_PAUSE_FLAG; 455 456 if (acpi_psm_init(uppc_info.p_mach_idstring, verboseflags) == 457 ACPI_PSM_FAILURE) { 458 return (0); 459 } 460 461 return (1); 462 } 463 464 465 static void 466 uppc_preshutdown(int cmd, int fcn) 467 { 468 UPPC_VERBOSE_POWEROFF(("uppc_preshutdown(%d,%d);\n", cmd, fcn)); 469 470 if ((cmd != A_SHUTDOWN) || (fcn != AD_POWEROFF)) { 471 return; 472 } 473 474 if (uppc_enable_acpi) { 475 UPPC_VERBOSE_POWEROFF(("uppc_preshutdown: ACPI enabled\n")); 476 } else { 477 UPPC_VERBOSE_POWEROFF(("uppc_preshutdown: ACPI not enabled\n")); 478 } 479 } 480 481 static void 482 uppc_shutdown(int cmd, int fcn) 483 { 484 UPPC_VERBOSE_POWEROFF(("uppc_shutdown(%d,%d);\n", cmd, fcn)); 485 486 if ((cmd != A_SHUTDOWN) || (fcn != AD_POWEROFF)) { 487 return; 488 } 489 if (uppc_enable_acpi) 490 (void) acpi_poweroff(); 491 } 492 493 static int 494 uppc_acpi_translate_pci_irq(dev_info_t *dip, int busid, int devid, 495 int ipin, int *pci_irqp, iflag_t *intr_flagp) 496 { 497 int status; 498 acpi_psm_lnk_t acpipsmlnk; 499 500 if ((status = acpi_get_irq_cache_ent(busid, devid, ipin, pci_irqp, 501 intr_flagp)) == ACPI_PSM_SUCCESS) { 502 UPPC_VERBOSE_IRQ((CE_CONT, "!uppc: Found irqno %d " 503 "from cache for device %s, instance #%d\n", *pci_irqp, 504 ddi_get_name(dip), ddi_get_instance(dip))); 505 return (status); 506 } 507 508 bzero(&acpipsmlnk, sizeof (acpi_psm_lnk_t)); 509 510 if ((status = acpi_translate_pci_irq(dip, ipin, pci_irqp, 511 intr_flagp, &acpipsmlnk)) == ACPI_PSM_FAILURE) { 512 UPPC_VERBOSE_IRQ((CE_CONT, "!uppc: " 513 " acpi_translate_pci_irq failed for device %s, instance" 514 " #%d\n", ddi_get_name(dip), ddi_get_instance(dip))); 515 516 return (status); 517 } 518 519 if (status == ACPI_PSM_PARTIAL && acpipsmlnk.lnkobj != NULL) { 520 status = uppc_acpi_irq_configure(&acpipsmlnk, dip, pci_irqp, 521 intr_flagp); 522 if (status != ACPI_PSM_SUCCESS) { 523 status = acpi_get_current_irq_resource(&acpipsmlnk, 524 pci_irqp, intr_flagp); 525 } 526 } 527 528 if (status == ACPI_PSM_SUCCESS) { 529 acpi_new_irq_cache_ent(busid, devid, ipin, *pci_irqp, 530 intr_flagp, &acpipsmlnk); 531 psm_set_elcr(*pci_irqp, 1); /* set IRQ to PCI mode */ 532 533 UPPC_VERBOSE_IRQ((CE_CONT, "!uppc: [ACPI] " 534 "new irq %d for device %s, instance #%d\n", 535 *pci_irqp, ddi_get_name(dip), ddi_get_instance(dip))); 536 } 537 538 return (status); 539 } 540 541 /* 542 * Configures the irq for the interrupt link device identified by 543 * acpipsmlnkp. 544 * 545 * Gets the current and the list of possible irq settings for the 546 * device. If uppc_unconditional_srs is not set, and the current 547 * resource setting is in the list of possible irq settings, 548 * current irq resource setting is passed to the caller. 549 * 550 * Otherwise, picks an irq number from the list of possible irq 551 * settings, and sets the irq of the device to this value. 552 * If prefer_crs is set, among a set of irq numbers in the list that have 553 * the least number of devices sharing the interrupt, we pick current irq 554 * resource setting if it is a member of this set. 555 * 556 * Passes the irq number in the value pointed to by pci_irqp, and 557 * polarity and sensitivity in the structure pointed to by dipintrflagp 558 * to the caller. 559 * 560 * Note that if setting the irq resource failed, but successfuly obtained 561 * the current irq resource settings, passes the current irq resources 562 * and considers it a success. 563 * 564 * Returns: 565 * ACPI_PSM_SUCCESS on success. 566 * 567 * ACPI_PSM_FAILURE if an error occured during the configuration or 568 * if a suitable irq was not found for this device, or if setting the 569 * irq resource and obtaining the current resource fails. 570 * 571 */ 572 static int 573 uppc_acpi_irq_configure(acpi_psm_lnk_t *acpipsmlnkp, dev_info_t *dip, 574 int *pci_irqp, iflag_t *dipintr_flagp) 575 { 576 int i, min_share, foundnow, done = 0; 577 int32_t irq; 578 int32_t share_irq = -1; 579 int32_t chosen_irq = -1; 580 int cur_irq = -1; 581 acpi_irqlist_t *irqlistp; 582 acpi_irqlist_t *irqlistent; 583 584 if ((acpi_get_possible_irq_resources(acpipsmlnkp, &irqlistp)) 585 == ACPI_PSM_FAILURE) { 586 UPPC_VERBOSE_IRQ((CE_WARN, "!uppc: Unable to determine " 587 "or assign IRQ for device %s, instance #%d: The system was " 588 "unable to get the list of potential IRQs from ACPI.", 589 ddi_get_name(dip), ddi_get_instance(dip))); 590 591 return (ACPI_PSM_FAILURE); 592 } 593 594 if ((acpi_get_current_irq_resource(acpipsmlnkp, &cur_irq, 595 dipintr_flagp) == ACPI_PSM_SUCCESS) && (!uppc_unconditional_srs) && 596 (cur_irq > 0)) { 597 598 if (acpi_irqlist_find_irq(irqlistp, cur_irq, NULL) 599 == ACPI_PSM_SUCCESS) { 600 601 acpi_free_irqlist(irqlistp); 602 ASSERT(pci_irqp != NULL); 603 *pci_irqp = cur_irq; 604 return (ACPI_PSM_SUCCESS); 605 } 606 UPPC_VERBOSE_IRQ((CE_WARN, "!uppc: Could not find the " 607 "current irq %d for device %s, instance #%d in ACPI's " 608 "list of possible irqs for this device. Picking one from " 609 " the latter list.", cur_irq, ddi_get_name(dip), 610 ddi_get_instance(dip))); 611 612 } 613 614 irqlistent = irqlistp; 615 min_share = 255; 616 617 while (irqlistent != NULL) { 618 619 for (foundnow = 0, i = 0; i < irqlistent->num_irqs; i++) { 620 621 irq = irqlistp->irqs[i]; 622 623 if ((irq > MAX_ISA_IRQ) || 624 (irqlistent->intr_flags.intr_el == INTR_EL_EDGE) || 625 (irq == 0)) 626 continue; 627 628 if (uppc_reserved_irqlist[irq]) 629 continue; 630 631 if (uppc_irq_shared_table[irq] == 0) { 632 chosen_irq = irq; 633 foundnow = 1; 634 if (!(uppc_prefer_crs) || (irq == cur_irq)) { 635 done = 1; 636 break; 637 } 638 } 639 640 if ((uppc_irq_shared_table[irq] < min_share) || 641 ((uppc_irq_shared_table[irq] == min_share) && 642 (cur_irq == irq) && (uppc_prefer_crs))) { 643 min_share = uppc_irq_shared_table[irq]; 644 share_irq = irq; 645 foundnow = 1; 646 } 647 } 648 649 /* If we found an IRQ in the inner loop, save the details */ 650 if (foundnow && ((chosen_irq != -1) || (share_irq != -1))) { 651 /* 652 * Copy the acpi_prs_private_t and flags from this 653 * irq list entry, since we found an irq from this 654 * entry. 655 */ 656 acpipsmlnkp->acpi_prs_prv = irqlistent->acpi_prs_prv; 657 *dipintr_flagp = irqlistent->intr_flags; 658 } 659 660 if (done) 661 break; 662 663 /* Load the next entry in the irqlist */ 664 irqlistent = irqlistent->next; 665 } 666 667 acpi_free_irqlist(irqlistp); 668 669 if (chosen_irq != -1) 670 irq = chosen_irq; 671 else if (share_irq != -1) 672 irq = share_irq; 673 else { 674 UPPC_VERBOSE_IRQ((CE_CONT, "!uppc: Could not find a " 675 "suitable irq from the list of possible irqs for device " 676 "%s, instance #%d in ACPI's list of possible\n", 677 ddi_get_name(dip), ddi_get_instance(dip))); 678 679 return (ACPI_PSM_FAILURE); 680 } 681 682 683 UPPC_VERBOSE_IRQ((CE_CONT, "!uppc: Setting irq %d for device %s " 684 "instance #%d\n", irq, ddi_get_name(dip), ddi_get_instance(dip))); 685 686 if ((acpi_set_irq_resource(acpipsmlnkp, irq)) == ACPI_PSM_SUCCESS) { 687 /* 688 * setting irq was successful, check to make sure CRS 689 * reflects that. If CRS does not agree with what we 690 * set, return the irq that was set. 691 */ 692 693 if (acpi_get_current_irq_resource(acpipsmlnkp, &cur_irq, 694 dipintr_flagp) == ACPI_PSM_SUCCESS) { 695 696 if (cur_irq != irq) 697 UPPC_VERBOSE_IRQ((CE_WARN, "!uppc: " 698 "IRQ resource set (irqno %d) for device %s " 699 "instance #%d, differs from current " 700 "setting irqno %d", 701 irq, ddi_get_name(dip), 702 ddi_get_instance(dip), cur_irq)); 703 } 704 /* 705 * return the irq that was set, and not what CRS reports, 706 * since CRS has been seen to be bogus on some systems 707 */ 708 cur_irq = irq; 709 } else { 710 UPPC_VERBOSE_IRQ((CE_WARN, "!uppc: set resource irq %d " 711 "failed for device %s instance #%d", 712 irq, ddi_get_name(dip), ddi_get_instance(dip))); 713 if (cur_irq == -1) 714 return (ACPI_PSM_FAILURE); 715 } 716 717 ASSERT(pci_irqp != NULL); 718 *pci_irqp = cur_irq; 719 return (ACPI_PSM_SUCCESS); 720 } 721 722 723 /*ARGSUSED*/ 724 static int 725 uppc_translate_irq(dev_info_t *dip, int irqno) 726 { 727 char dev_type[16]; 728 int dev_len, pci_irq, devid, busid; 729 ddi_acc_handle_t cfg_handle; 730 uchar_t ipin, iline; 731 iflag_t intr_flag; 732 733 if (dip == NULL) { 734 UPPC_VERBOSE_IRQ((CE_CONT, "!uppc: irqno = %d" 735 " dip = NULL\n", irqno)); 736 return (irqno); 737 } 738 739 if (!uppc_enable_acpi) { 740 return (irqno); 741 } 742 743 dev_len = sizeof (dev_type); 744 if (ddi_getlongprop_buf(DDI_DEV_T_ANY, ddi_get_parent(dip), 745 DDI_PROP_DONTPASS, "device_type", (caddr_t)dev_type, 746 &dev_len) != DDI_PROP_SUCCESS) { 747 UPPC_VERBOSE_IRQ((CE_CONT, "!uppc: irqno %d" 748 "device %s instance %d no device_type\n", irqno, 749 ddi_get_name(dip), ddi_get_instance(dip))); 750 return (irqno); 751 } 752 753 if ((strcmp(dev_type, "pci") == 0) || 754 (strcmp(dev_type, "pciex") == 0)) { 755 756 /* pci device */ 757 if (acpica_get_bdf(dip, &busid, &devid, NULL) != 0) 758 return (irqno); 759 760 if (pci_config_setup(dip, &cfg_handle) != DDI_SUCCESS) 761 return (irqno); 762 763 ipin = pci_config_get8(cfg_handle, PCI_CONF_IPIN) - PCI_INTA; 764 iline = pci_config_get8(cfg_handle, PCI_CONF_ILINE); 765 if (uppc_acpi_translate_pci_irq(dip, busid, devid, 766 ipin, &pci_irq, &intr_flag) == ACPI_PSM_SUCCESS) { 767 768 UPPC_VERBOSE_IRQ((CE_CONT, "!uppc: [ACPI] new irq " 769 "%d old irq %d device %s, instance %d\n", pci_irq, 770 irqno, ddi_get_name(dip), ddi_get_instance(dip))); 771 772 /* 773 * Make sure pci_irq is within range. 774 * Otherwise, fall through and return irqno. 775 */ 776 if (pci_irq <= MAX_ISA_IRQ) { 777 if (iline != pci_irq) { 778 /* 779 * Update the device's ILINE byte, 780 * in case uppc_acpi_translate_pci_irq 781 * has choosen a different pci_irq 782 * than the BIOS has configured. 783 * Some chipsets use the value in 784 * ILINE to control interrupt routing, 785 * in conflict with the PCI spec. 786 */ 787 pci_config_put8(cfg_handle, 788 PCI_CONF_ILINE, pci_irq); 789 } 790 pci_config_teardown(&cfg_handle); 791 return (pci_irq); 792 } 793 } 794 pci_config_teardown(&cfg_handle); 795 796 /* FALLTHRU to common case - returning irqno */ 797 } else { 798 /* non-PCI; assumes ISA-style edge-triggered */ 799 psm_set_elcr(irqno, 0); /* set IRQ to ISA mode */ 800 801 UPPC_VERBOSE_IRQ((CE_CONT, "!uppc: non-pci," 802 "irqno %d device %s instance %d\n", irqno, 803 ddi_get_name(dip), ddi_get_instance(dip))); 804 805 } 806 807 return (irqno); 808 } 809 810 /* 811 * uppc_intr_enter() raises the ipl to the level of the current interrupt, 812 * and sends EOI to the pics. 813 * If interrupt is 7 or 15 and not spurious interrupt, send specific EOI 814 * else send non-specific EOI 815 * uppc_intr_enter() returns the new priority level, 816 * or -1 for spurious interrupt 817 */ 818 static int 819 uppc_intr_enter(int ipl, int *vector) 820 { 821 int newipl; 822 int intno; 823 824 intno = (*vector); 825 826 ASSERT(intno < 256); 827 828 newipl = autovect[intno].avh_hi_pri; 829 830 /* 831 * During wait_till_seen() periods when interrupt vector is being 832 * removed in remove_av(), the removed hardware interrupt could 833 * trigger and got here with newipl 0. It has to send EOI 834 * as usual but no need to call setspl and returns -1 like spurious. 835 */ 836 if ((intno & 7) != 7) { 837 if (newipl) 838 uppc_setspl(newipl); 839 outb(MCMD_PORT, PIC_NSEOI); 840 if (intno >= 8) { 841 outb(SCMD_PORT, PIC_NSEOI); 842 } 843 } else { /* int was 7 or 15 */ 844 if (newipl && newipl <= ipl) { /* Check for spurious int */ 845 if (intno != 7) 846 outb(MCMD_PORT, PIC_NSEOI); 847 return (-1); /* Spurious int */ 848 } else { 849 if (newipl) 850 uppc_setspl(newipl); 851 if (intno != 7) { 852 outb(MCMD_PORT, PIC_NSEOI); 853 outb(SCMD_PORT, PIC_SEOI_LVL7); 854 } else { 855 outb(MCMD_PORT, PIC_SEOI_LVL7); 856 } 857 } 858 } 859 860 if (newipl) 861 return (newipl); 862 else 863 return (-1); /* not real spurious int */ 864 } 865 866 /* 867 * uppc_intr_exit() restores the old interrupt 868 * priority level after processing an interrupt. 869 * It is called with interrupts disabled, and does not enable interrupts. 870 */ 871 /* ARGSUSED */ 872 static void 873 uppc_intr_exit(int ipl, int vector) 874 { 875 uppc_setspl(ipl); 876 } 877 878 /* 879 * uppc_setspl() loads new interrupt masks into the pics 880 * based on input ipl. 881 */ 882 /* ARGSUSED */ 883 static void 884 uppc_setspl(int ipl) 885 { 886 struct standard_pic *pp; 887 uint8_t smask, mmask; 888 uint8_t cursmask, curmmask; 889 890 pp = &pics0; 891 smask = pp->c_iplmask[ipl * 2]; 892 mmask = pp->c_iplmask[ipl * 2 + 1]; 893 cursmask = pp->c_curmask[0]; 894 curmmask = pp->c_curmask[1]; 895 if (cursmask == smask && curmmask == mmask) 896 return; 897 pp->c_curmask[0] = smask; 898 pp->c_curmask[1] = mmask; 899 900 if (cursmask != smask) { 901 /* 902 * program new slave pic mask 903 */ 904 outb(SIMR_PORT, smask); 905 } 906 if (curmmask != mmask) { 907 /* 908 * program new master pic mask 909 */ 910 outb(MIMR_PORT, mmask); 911 } 912 /* 913 * read master to allow pics to settle 914 */ 915 (void) inb(MIMR_PORT); 916 } 917 918 /* 919 * uppc_gethrtime() returns high resolution timer value 920 */ 921 static hrtime_t 922 uppc_gethrtime() 923 { 924 hrtime_t timeval, temp; 925 unsigned int oflags, ctr0; 926 927 oflags = intr_clear(); /* disable ints */ 928 lock_set(&uppc_gethrtime_lock); 929 retry: 930 temp = hrtime_base; 931 outb(PITCTL_PORT, 0); /* latch counter 0 */ 932 /* 933 * read counter 0 934 */ 935 ctr0 = inb(PITCTR0_PORT); 936 ctr0 |= inb(PITCTR0_PORT) << 8; 937 timeval = (hrtime_t)ctr0 * (NANOSEC / PIT_HZ); 938 if (temp != hrtime_base) 939 goto retry; 940 timeval -= temp; 941 if (timeval < uppc_lasthrtime) 942 timeval = uppc_lasthrtime; 943 uppc_lasthrtime = timeval; 944 lock_clear(&uppc_gethrtime_lock); 945 intr_restore(oflags); 946 return (timeval); 947 } 948