1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 23 /* 24 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 25 * Use is subject to license terms. 26 */ 27 28 /* 29 * This header file defines the interfaces available from the SMBIOS access 30 * library, libsmbios, and an equivalent kernel module. This API can be used 31 * to access DMTF SMBIOS data from a device, file, or raw memory buffer. 32 * This is NOT yet a public interface, although it may eventually become one in 33 * the fullness of time after we gain more experience with the interfaces. 34 * 35 * In the meantime, be aware that any program linked with this API in this 36 * release of Solaris is almost guaranteed to break in the next release. 37 * 38 * In short, do not user this header file or these routines for any purpose. 39 */ 40 41 #ifndef _SYS_SMBIOS_H 42 #define _SYS_SMBIOS_H 43 44 #pragma ident "%Z%%M% %I% %E% SMI" 45 46 #include <sys/types.h> 47 48 #ifdef __cplusplus 49 extern "C" { 50 #endif 51 52 /* 53 * SMBIOS Structure Table Entry Point. See DSP0134 2.1.1 for more information. 54 * The structure table entry point is located by searching for the anchor. 55 */ 56 typedef struct smbios_entry { 57 char smbe_eanchor[4]; /* anchor tag (SMB_ENTRY_EANCHOR) */ 58 uint8_t smbe_ecksum; /* checksum of entry point structure */ 59 uint8_t smbe_elen; /* length in bytes of entry point */ 60 uint8_t smbe_major; /* major version of the SMBIOS spec */ 61 uint8_t smbe_minor; /* minor version of the SMBIOS spec */ 62 uint16_t smbe_maxssize; /* maximum size in bytes of a struct */ 63 uint8_t smbe_revision; /* entry point structure revision */ 64 uint8_t smbe_format[5]; /* entry point revision-specific data */ 65 char smbe_ianchor[5]; /* intermed. tag (SMB_ENTRY_IANCHOR) */ 66 uint8_t smbe_icksum; /* intermed. checksum */ 67 uint16_t smbe_stlen; /* length in bytes of structure table */ 68 uint32_t smbe_staddr; /* physical addr of structure table */ 69 uint16_t smbe_stnum; /* number of structure table entries */ 70 uint8_t smbe_bcdrev; /* BCD value representing DMI version */ 71 } smbios_entry_t; 72 73 #define SMB_ENTRY_EANCHOR "_SM_" /* structure table entry point anchor */ 74 #define SMB_ENTRY_EANCHORLEN 4 /* length of entry point anchor */ 75 #define SMB_ENTRY_IANCHOR "_DMI_" /* intermediate anchor string */ 76 #define SMB_ENTRY_IANCHORLEN 5 /* length of intermediate anchor */ 77 78 /* 79 * Structure type codes. The comments next to each type include an (R) note to 80 * indicate a structure that is required as of SMBIOS v2.3 and an (O) note to 81 * indicate a structure that is obsolete as of SMBIOS v2.3. 82 */ 83 #define SMB_TYPE_BIOS 0 /* BIOS information (R) */ 84 #define SMB_TYPE_SYSTEM 1 /* system information (R) */ 85 #define SMB_TYPE_BASEBOARD 2 /* base board */ 86 #define SMB_TYPE_CHASSIS 3 /* system enclosure or chassis (R) */ 87 #define SMB_TYPE_PROCESSOR 4 /* processor (R) */ 88 #define SMB_TYPE_MEMCTL 5 /* memory controller (O) */ 89 #define SMB_TYPE_MEMMOD 6 /* memory module (O) */ 90 #define SMB_TYPE_CACHE 7 /* processor cache (R) */ 91 #define SMB_TYPE_PORT 8 /* port connector */ 92 #define SMB_TYPE_SLOT 9 /* upgradeable system slot (R) */ 93 #define SMB_TYPE_OBDEVS 10 /* on-board devices */ 94 #define SMB_TYPE_OEMSTR 11 /* OEM string table */ 95 #define SMB_TYPE_SYSCONFSTR 12 /* system configuration string table */ 96 #define SMB_TYPE_LANG 13 /* BIOS language information */ 97 #define SMB_TYPE_GROUP 14 /* group associations */ 98 #define SMB_TYPE_EVENTLOG 15 /* system event log */ 99 #define SMB_TYPE_MEMARRAY 16 /* physical memory array (R) */ 100 #define SMB_TYPE_MEMDEVICE 17 /* memory device (R) */ 101 #define SMB_TYPE_MEMERR32 18 /* 32-bit memory error information */ 102 #define SMB_TYPE_MEMARRAYMAP 19 /* memory array mapped address (R) */ 103 #define SMB_TYPE_MEMDEVICEMAP 20 /* memory device mapped address (R) */ 104 #define SMB_TYPE_POINTDEV 21 /* built-in pointing device */ 105 #define SMB_TYPE_BATTERY 22 /* portable battery */ 106 #define SMB_TYPE_RESET 23 /* system reset settings */ 107 #define SMB_TYPE_SECURITY 24 /* hardware security settings */ 108 #define SMB_TYPE_POWERCTL 25 /* system power controls */ 109 #define SMB_TYPE_VPROBE 26 /* voltage probe */ 110 #define SMB_TYPE_COOLDEV 27 /* cooling device */ 111 #define SMB_TYPE_TPROBE 28 /* temperature probe */ 112 #define SMB_TYPE_IPROBE 29 /* current probe */ 113 #define SMB_TYPE_OOBRA 30 /* out-of-band remote access facility */ 114 #define SMB_TYPE_BIS 31 /* boot integrity services */ 115 #define SMB_TYPE_BOOT 32 /* system boot status (R) */ 116 #define SMB_TYPE_MEMERR64 33 /* 64-bit memory error information */ 117 #define SMB_TYPE_MGMTDEV 34 /* management device */ 118 #define SMB_TYPE_MGMTDEVCP 35 /* management device component */ 119 #define SMB_TYPE_MGMTDEVDATA 36 /* management device threshold data */ 120 #define SMB_TYPE_MEMCHAN 37 /* memory channel */ 121 #define SMB_TYPE_IPMIDEV 38 /* IPMI device information */ 122 #define SMB_TYPE_POWERSUP 39 /* system power supply */ 123 #define SMB_TYPE_INACTIVE 126 /* inactive table entry */ 124 #define SMB_TYPE_EOT 127 /* end of table */ 125 126 #define SMB_TYPE_OEM_LO 128 /* start of OEM-specific type range */ 127 #define SMB_TYPE_OEM_HI 256 /* end of OEM-specific type range */ 128 129 /* 130 * SMBIOS Common Information. These structures do not correspond to anything 131 * in the SMBIOS specification, but allow library clients to more easily read 132 * information that is frequently encoded into the various SMBIOS structures. 133 */ 134 typedef struct smbios_info { 135 const char *smbi_manufacturer; /* manufacturer */ 136 const char *smbi_product; /* product name */ 137 const char *smbi_version; /* version */ 138 const char *smbi_serial; /* serial number */ 139 const char *smbi_asset; /* asset tag */ 140 const char *smbi_location; /* location tag */ 141 const char *smbi_part; /* part number */ 142 } smbios_info_t; 143 144 typedef struct smbios_version { 145 uint8_t smbv_major; /* version major number */ 146 uint8_t smbv_minor; /* version minor number */ 147 } smbios_version_t; 148 149 /* 150 * SMBIOS Bios Information. See DSP0134 Section 3.3.1 for more information. 151 * smbb_romsize is converted from the implementation format into bytes. 152 */ 153 typedef struct smbios_bios { 154 const char *smbb_vendor; /* bios vendor string */ 155 const char *smbb_version; /* bios version string */ 156 const char *smbb_reldate; /* bios release date */ 157 uint32_t smbb_segment; /* bios address segment location */ 158 uint32_t smbb_romsize; /* bios rom size in bytes */ 159 uint32_t smbb_runsize; /* bios image size in bytes */ 160 uint64_t smbb_cflags; /* bios characteristics */ 161 const uint8_t *smbb_xcflags; /* bios characteristics extensions */ 162 size_t smbb_nxcflags; /* number of smbb_xcflags[] bytes */ 163 smbios_version_t smbb_biosv; /* bios version */ 164 smbios_version_t smbb_ecfwv; /* bios embedded ctrl f/w version */ 165 } smbios_bios_t; 166 167 #define SMB_BIOSFL_RSV0 0x00000001 /* reserved bit zero */ 168 #define SMB_BIOSFL_RSV1 0x00000002 /* reserved bit one */ 169 #define SMB_BIOSFL_UNKNOWN 0x00000004 /* unknown */ 170 #define SMB_BIOSFL_BCNOTSUP 0x00000008 /* BIOS chars not supported */ 171 #define SMB_BIOSFL_ISA 0x00000010 /* ISA is supported */ 172 #define SMB_BIOSFL_MCA 0x00000020 /* MCA is supported */ 173 #define SMB_BIOSFL_EISA 0x00000040 /* EISA is supported */ 174 #define SMB_BIOSFL_PCI 0x00000080 /* PCI is supported */ 175 #define SMB_BIOSFL_PCMCIA 0x00000100 /* PCMCIA is supported */ 176 #define SMB_BIOSFL_PLUGNPLAY 0x00000200 /* Plug and Play is supported */ 177 #define SMB_BIOSFL_APM 0x00000400 /* APM is supported */ 178 #define SMB_BIOSFL_FLASH 0x00000800 /* BIOS is Flash Upgradeable */ 179 #define SMB_BIOSFL_SHADOW 0x00001000 /* BIOS shadowing is allowed */ 180 #define SMB_BIOSFL_VLVESA 0x00002000 /* VL-VESA is supported */ 181 #define SMB_BIOSFL_ESCD 0x00004000 /* ESCD support is available */ 182 #define SMB_BIOSFL_CDBOOT 0x00008000 /* Boot from CD is supported */ 183 #define SMB_BIOSFL_SELBOOT 0x00010000 /* Selectable Boot supported */ 184 #define SMB_BIOSFL_ROMSOCK 0x00020000 /* BIOS ROM is socketed */ 185 #define SMB_BIOSFL_PCMBOOT 0x00040000 /* Boot from PCMCIA supported */ 186 #define SMB_BIOSFL_EDD 0x00080000 /* EDD Spec is supported */ 187 #define SMB_BIOSFL_NEC9800 0x00100000 /* int 0x13 NEC 9800 floppy */ 188 #define SMB_BIOSFL_TOSHIBA 0x00200000 /* int 0x13 Toshiba floppy */ 189 #define SMB_BIOSFL_525_360K 0x00400000 /* int 0x13 5.25" 360K floppy */ 190 #define SMB_BIOSFL_525_12M 0x00800000 /* int 0x13 5.25" 1.2M floppy */ 191 #define SMB_BIOSFL_35_720K 0x01000000 /* int 0x13 3.5" 720K floppy */ 192 #define SMB_BIOSFL_35_288M 0x02000000 /* int 0x13 3.5" 2.88M floppy */ 193 #define SMB_BIOSFL_I5_PRINT 0x04000000 /* int 0x5 print screen svcs */ 194 #define SMB_BIOSFL_I9_KBD 0x08000000 /* int 0x9 8042 keyboard svcs */ 195 #define SMB_BIOSFL_I14_SER 0x10000000 /* int 0x14 serial svcs */ 196 #define SMB_BIOSFL_I17_PRINTER 0x20000000 /* int 0x17 printer svcs */ 197 #define SMB_BIOSFL_I10_CGA 0x40000000 /* int 0x10 CGA svcs */ 198 #define SMB_BIOSFL_NEC_PC98 0x80000000 /* NEC PC-98 */ 199 200 #define SMB_BIOSXB_1 0 /* bios extension byte 1 (3.3.1.2.1) */ 201 #define SMB_BIOSXB_2 1 /* bios extension byte 2 (3.3.1.2.2) */ 202 #define SMB_BIOSXB_BIOS_MAJ 2 /* bios major version */ 203 #define SMB_BIOSXB_BIOS_MIN 3 /* bios minor version */ 204 #define SMB_BIOSXB_ECFW_MAJ 4 /* extended ctlr f/w major version */ 205 #define SMB_BIOSXB_ECFW_MIN 5 /* extended ctlr f/w minor version */ 206 207 #define SMB_BIOSXB1_ACPI 0x01 /* ACPI is supported */ 208 #define SMB_BIOSXB1_USBL 0x02 /* USB legacy is supported */ 209 #define SMB_BIOSXB1_AGP 0x04 /* AGP is supported */ 210 #define SMB_BIOSXB1_I20 0x08 /* I2O boot is supported */ 211 #define SMB_BIOSXB1_LS120 0x10 /* LS-120 boot is supported */ 212 #define SMB_BIOSXB1_ATZIP 0x20 /* ATAPI ZIP drive boot is supported */ 213 #define SMB_BIOSXB1_1394 0x40 /* 1394 boot is supported */ 214 #define SMB_BIOSXB1_SMBAT 0x80 /* Smart Battery is supported */ 215 216 #define SMB_BIOSXB2_BBOOT 0x01 /* BIOS Boot Specification supported */ 217 #define SMB_BIOSXB2_FKNETSVC 0x02 /* F-key Network Svc boot supported */ 218 #define SMB_BIOSXB2_ETCDIST 0x04 /* Enable Targeted Content Distrib. */ 219 220 /* 221 * SMBIOS Bios Information. See DSP0134 Section 3.3.2 for more information. 222 * The current set of smbs_wakeup values is defined after the structure. 223 */ 224 typedef struct smbios_system { 225 const uint8_t *smbs_uuid; /* UUID byte array */ 226 uint8_t smbs_uuidlen; /* UUID byte array length */ 227 uint8_t smbs_wakeup; /* wake-up event */ 228 const char *smbs_sku; /* SKU number */ 229 const char *smbs_family; /* family */ 230 } smbios_system_t; 231 232 #define SMB_WAKEUP_RSV0 0x00 /* reserved */ 233 #define SMB_WAKEUP_OTHER 0x01 /* other */ 234 #define SMB_WAKEUP_UNKNOWN 0x02 /* unknown */ 235 #define SMB_WAKEUP_APM 0x03 /* APM timer */ 236 #define SMB_WAKEUP_MODEM 0x04 /* modem ring */ 237 #define SMB_WAKEUP_LAN 0x05 /* LAN remote */ 238 #define SMB_WAKEUP_SWITCH 0x06 /* power switch */ 239 #define SMB_WAKEUP_PCIPME 0x07 /* PCI PME# */ 240 #define SMB_WAKEUP_AC 0x08 /* AC power restored */ 241 242 /* 243 * SMBIOS Base Board description. See DSP0134 Section 3.3.3 for more 244 * information. smbb_flags and smbb_type definitions are below. 245 */ 246 typedef struct smbios_bboard { 247 id_t smbb_chassis; /* chassis containing this board */ 248 uint8_t smbb_flags; /* flags (see below) */ 249 uint8_t smbb_type; /* board type (see below) */ 250 } smbios_bboard_t; 251 252 #define SMB_BBFL_MOTHERBOARD 0x01 /* board is a motherboard */ 253 #define SMB_BBFL_NEEDAUX 0x02 /* auxiliary card or daughter req'd */ 254 #define SMB_BBFL_REMOVABLE 0x04 /* board is removable */ 255 #define SMB_BBFL_REPLACABLE 0x08 /* board is field-replacable */ 256 #define SMB_BBFL_HOTSWAP 0x10 /* board is hot-swappable */ 257 258 #define SMB_BBT_UNKNOWN 0x1 /* unknown */ 259 #define SMB_BBT_OTHER 0x2 /* other */ 260 #define SMB_BBT_SBLADE 0x3 /* server blade */ 261 #define SMB_BBT_CSWITCH 0x4 /* connectivity switch */ 262 #define SMB_BBT_SMM 0x5 /* system management module */ 263 #define SMB_BBT_PROC 0x6 /* processor module */ 264 #define SMB_BBT_IO 0x7 /* i/o module */ 265 #define SMB_BBT_MEM 0x8 /* memory module */ 266 #define SMB_BBT_DAUGHTER 0x9 /* daughterboard */ 267 #define SMB_BBT_MOTHER 0xA /* motherboard */ 268 #define SMB_BBT_PROCMEM 0xB /* processor/memory module */ 269 #define SMB_BBT_PROCIO 0xC /* processor/i/o module */ 270 #define SMB_BBT_INTER 0xD /* interconnect board */ 271 272 /* 273 * SMBIOS Chassis description. See DSP0134 Section 3.3.4 for more information. 274 * We move the lock bit of the type field into smbc_lock for easier processing. 275 * NOTE: We do not currently export the contained element data for each chassis 276 * as this seems useless: see DSP0134 3.3.4.4. It can be added if necessary. 277 */ 278 typedef struct smbios_chassis { 279 uint32_t smbc_oemdata; /* OEM-specific data */ 280 uint8_t smbc_lock; /* lock present? */ 281 uint8_t smbc_type; /* type */ 282 uint8_t smbc_bustate; /* boot-up state */ 283 uint8_t smbc_psstate; /* power supply state */ 284 uint8_t smbc_thstate; /* thermal state */ 285 uint8_t smbc_security; /* security status */ 286 uint8_t smbc_uheight; /* enclosure height in U's */ 287 uint8_t smbc_cords; /* number of power cords */ 288 uint8_t smbc_elems; /* number of element records */ 289 } smbios_chassis_t; 290 291 #define SMB_CHT_OTHER 0x01 /* other */ 292 #define SMB_CHT_UNKNOWN 0x02 /* unknown */ 293 #define SMB_CHT_DESKTOP 0x03 /* desktop */ 294 #define SMB_CHT_LPDESKTOP 0x04 /* low-profile desktop */ 295 #define SMB_CHT_PIZZA 0x05 /* pizza box */ 296 #define SMB_CHT_MINITOWER 0x06 /* mini-tower */ 297 #define SMB_CHT_TOWER 0x07 /* tower */ 298 #define SMB_CHT_PORTABLE 0x08 /* portable */ 299 #define SMB_CHT_LAPTOP 0x09 /* laptop */ 300 #define SMB_CHT_NOTEBOOK 0x0A /* notebook */ 301 #define SMB_CHT_HANDHELD 0x0B /* hand-held */ 302 #define SMB_CHT_DOCK 0x0C /* docking station */ 303 #define SMB_CHT_ALLIN1 0x0D /* all-in-one */ 304 #define SMB_CHT_SUBNOTE 0x0E /* sub-notebook */ 305 #define SMB_CHT_SPACESAVE 0x0F /* space-saving */ 306 #define SMB_CHT_LUNCHBOX 0x10 /* lunchbox */ 307 #define SMB_CHT_MAIN 0x11 /* main server chassis */ 308 #define SMB_CHT_EXPANSION 0x12 /* expansion chassis */ 309 #define SMB_CHT_SUB 0x13 /* sub-chassis */ 310 #define SMB_CHT_BUS 0x14 /* bus expansion chassis */ 311 #define SMB_CHT_PERIPHERAL 0x15 /* peripheral chassis */ 312 #define SMB_CHT_RAID 0x16 /* raid chassis */ 313 #define SMB_CHT_RACK 0x17 /* rack mount chassis */ 314 #define SMB_CHT_SEALED 0x18 /* sealed case pc */ 315 #define SMB_CHT_MULTI 0x19 /* multi-system chassis */ 316 317 #define SMB_CHST_OTHER 0x01 /* other */ 318 #define SMB_CHST_UNKNOWN 0x02 /* unknown */ 319 #define SMB_CHST_SAFE 0x03 /* safe */ 320 #define SMB_CHST_WARNING 0x04 /* warning */ 321 #define SMB_CHST_CRITICAL 0x05 /* critical */ 322 #define SMB_CHST_NONREC 0x06 /* non-recoverable */ 323 324 #define SMB_CHSC_OTHER 0x01 /* other */ 325 #define SMB_CHSC_UNKNOWN 0x02 /* unknown */ 326 #define SMB_CHSC_NONE 0x03 /* none */ 327 #define SMB_CHSC_EILOCK 0x04 /* external interface locked out */ 328 #define SMB_CHSC_EIENAB 0x05 /* external interface enabled */ 329 330 /* 331 * SMBIOS Processor description. See DSP0134 Section 3.3.5 for more details. 332 * If the L1, L2, or L3 cache handle is -1, the cache information is unknown. 333 * If the handle refers to something of size 0, that type of cache is absent. 334 * 335 * NOTE: Although SMBIOS exports a 64-bit CPUID result, this value should not 336 * be used for any purpose other than BIOS debugging. Solaris itself computes 337 * its own CPUID value and applies knowledge of additional errata and processor 338 * specific CPUID variations, so this value should not be used for anything. 339 */ 340 typedef struct smbios_processor { 341 uint64_t smbp_cpuid; /* processor cpuid information */ 342 uint32_t smbp_family; /* processor family */ 343 uint8_t smbp_type; /* processor type (SMB_PRT_*) */ 344 uint8_t smbp_voltage; /* voltage (SMB_PRV_*) */ 345 uint8_t smbp_status; /* status (SMB_PRS_*) */ 346 uint8_t smbp_upgrade; /* upgrade (SMB_PRU_*) */ 347 uint32_t smbp_clkspeed; /* external clock speed in MHz */ 348 uint32_t smbp_maxspeed; /* maximum speed in MHz */ 349 uint32_t smbp_curspeed; /* current speed in MHz */ 350 id_t smbp_l1cache; /* L1 cache handle */ 351 id_t smbp_l2cache; /* L2 cache handle */ 352 id_t smbp_l3cache; /* L3 cache handle */ 353 } smbios_processor_t; 354 355 #define SMB_PRT_OTHER 0x01 /* other */ 356 #define SMB_PRT_UNKNOWN 0x02 /* unknown */ 357 #define SMB_PRT_CENTRAL 0x03 /* central processor */ 358 #define SMB_PRT_MATH 0x04 /* math processor */ 359 #define SMB_PRT_DSP 0x05 /* DSP processor */ 360 #define SMB_PRT_VIDEO 0x06 /* video processor */ 361 362 #define SMB_PRV_LEGACY(v) (!((v) & 0x80)) /* legacy voltage mode */ 363 #define SMB_PRV_FIXED(v) ((v) & 0x80) /* fixed voltage mode */ 364 365 #define SMB_PRV_5V 0x01 /* 5V is supported */ 366 #define SMB_PRV_33V 0x02 /* 3.3V is supported */ 367 #define SMB_PRV_29V 0x04 /* 2.9V is supported */ 368 369 #define SMB_PRV_VOLTAGE(v) ((v) & 0x7f) 370 371 #define SMB_PRSTATUS_PRESENT(s) ((s) & 0x40) /* socket is populated */ 372 #define SMB_PRSTATUS_STATUS(s) ((s) & 0x07) /* status (see below) */ 373 374 #define SMB_PRS_UNKNOWN 0x0 /* unknown */ 375 #define SMB_PRS_ENABLED 0x1 /* enabled */ 376 #define SMB_PRS_BDISABLED 0x2 /* disabled in bios user setup */ 377 #define SMB_PRS_PDISABLED 0x3 /* disabled in bios from post error */ 378 #define SMB_PRS_IDLE 0x4 /* waiting to be enabled */ 379 #define SMB_PRS_OTHER 0x7 /* other */ 380 381 #define SMB_PRU_OTHER 0x01 /* other */ 382 #define SMB_PRU_UNKNOWN 0x02 /* unknown */ 383 #define SMB_PRU_DAUGHTER 0x03 /* daughter board */ 384 #define SMB_PRU_ZIF 0x04 /* ZIF socket */ 385 #define SMB_PRU_PIGGY 0x05 /* replaceable piggy back */ 386 #define SMB_PRU_NONE 0x06 /* none */ 387 #define SMB_PRU_LIF 0x07 /* LIF socket */ 388 #define SMB_PRU_SLOT1 0x08 /* slot 1 */ 389 #define SMB_PRU_SLOT2 0x09 /* slot 2 */ 390 #define SMB_PRU_370PIN 0x0A /* 370-pin socket */ 391 #define SMB_PRU_SLOTA 0x0B /* slot A */ 392 #define SMB_PRU_SLOTM 0x0C /* slot M */ 393 #define SMB_PRU_423 0x0D /* socket 423 */ 394 #define SMB_PRU_A 0x0E /* socket A (socket 462) */ 395 #define SMB_PRU_478 0x0F /* socket 478 */ 396 #define SMB_PRU_754 0x10 /* socket 754 */ 397 #define SMB_PRU_940 0x11 /* socket 940 */ 398 399 #define SMB_PRF_OTHER 0x01 /* other */ 400 #define SMB_PRF_UNKNOWN 0x02 /* unknown */ 401 #define SMB_PRF_8086 0x03 /* 8086 */ 402 #define SMB_PRF_80286 0x04 /* 80286 */ 403 #define SMB_PRF_I386 0x05 /* Intel 386 */ 404 #define SMB_PRF_I486 0x06 /* Intel 486 */ 405 #define SMB_PRF_8087 0x07 /* 8087 */ 406 #define SMB_PRF_80287 0x08 /* 80287 */ 407 #define SMB_PRF_80387 0x09 /* 80387 */ 408 #define SMB_PRF_80487 0x0A /* 80487 */ 409 #define SMB_PRF_PENTIUM 0x0B /* Pentium Family */ 410 #define SMB_PRF_PENTIUMPRO 0x0C /* Pentium Pro */ 411 #define SMB_PRF_PENTIUMII 0x0D /* Pentium II */ 412 #define SMB_PRF_PENTIUM_MMX 0x0E /* Pentium w/ MMX */ 413 #define SMB_PRF_CELERON 0x0F /* Celeron */ 414 #define SMB_PRF_PENTIUMII_XEON 0x10 /* Pentium II Xeon */ 415 #define SMB_PRF_PENTIUMIII 0x11 /* Pentium III */ 416 #define SMB_PRF_M1 0x12 /* M1 */ 417 #define SMB_PRF_M2 0x13 /* M2 */ 418 #define SMB_PRF_DURON 0x18 /* AMD Duron */ 419 #define SMB_PRF_K5 0x19 /* K5 */ 420 #define SMB_PRF_K6 0x1A /* K6 */ 421 #define SMB_PRF_K6_2 0x1B /* K6-2 */ 422 #define SMB_PRF_K6_3 0x1C /* K6-3 */ 423 #define SMB_PRF_ATHLON 0x1D /* Athlon */ 424 #define SMB_PRF_2900 0x1E /* AMD 2900 */ 425 #define SMB_PRF_K6_2PLUS 0x1F /* K6-2+ */ 426 #define SMB_PRF_PPC 0x20 /* PowerPC */ 427 #define SMB_PRF_PPC_601 0x21 /* PowerPC 601 */ 428 #define SMB_PRF_PPC_603 0x22 /* PowerPC 603 */ 429 #define SMB_PRF_PPC_603PLUS 0x23 /* PowerPC 603+ */ 430 #define SMB_PRF_PPC_604 0x24 /* PowerPC 604 */ 431 #define SMB_PRF_PPC_620 0x25 /* PowerPC 620 */ 432 #define SMB_PRF_PPC_704 0x26 /* PowerPC x704 */ 433 #define SMB_PRF_PPC_750 0x27 /* PowerPC 750 */ 434 #define SMB_PRF_ALPHA 0x30 /* Alpha */ 435 #define SMB_PRF_ALPHA_21064 0x31 /* Alpha 21064 */ 436 #define SMB_PRF_ALPHA_21066 0x32 /* Alpha 21066 */ 437 #define SMB_PRF_ALPHA_21164 0x33 /* Alpha 21164 */ 438 #define SMB_PRF_ALPHA_21164PC 0x34 /* Alpha 21164PC */ 439 #define SMB_PRF_ALPHA_21164A 0x35 /* Alpha 21164a */ 440 #define SMB_PRF_ALPHA_21264 0x36 /* Alpha 21264 */ 441 #define SMB_PRF_ALPHA_21364 0x37 /* Alpha 21364 */ 442 #define SMB_PRF_MIPS 0x40 /* MIPS */ 443 #define SMB_PRF_MIPS_R4000 0x41 /* MIPS R4000 */ 444 #define SMB_PRF_MIPS_R4200 0x42 /* MIPS R4200 */ 445 #define SMB_PRF_MIPS_R4400 0x43 /* MIPS R4400 */ 446 #define SMB_PRF_MIPS_R4600 0x44 /* MIPS R4600 */ 447 #define SMB_PRF_MIPS_R10000 0x45 /* MIPS R10000 */ 448 #define SMB_PRF_SPARC 0x50 /* SPARC */ 449 #define SMB_PRF_SUPERSPARC 0x51 /* SuperSPARC */ 450 #define SMB_PRF_MICROSPARCII 0x52 /* microSPARC II */ 451 #define SMB_PRF_MICROSPARCIIep 0x53 /* microSPARC IIep */ 452 #define SMB_PRF_ULTRASPARC 0x54 /* UltraSPARC */ 453 #define SMB_PRF_USII 0x55 /* UltraSPARC II */ 454 #define SMB_PRF_USIIi 0x56 /* UltraSPARC IIi */ 455 #define SMB_PRF_USIII 0x57 /* UltraSPARC III */ 456 #define SMB_PRF_USIIIi 0x58 /* UltraSPARC IIIi */ 457 #define SMB_PRF_68040 0x60 /* 68040 */ 458 #define SMB_PRF_68XXX 0x61 /* 68XXX */ 459 #define SMB_PRF_68000 0x62 /* 68000 */ 460 #define SMB_PRF_68010 0x63 /* 68010 */ 461 #define SMB_PRF_68020 0x64 /* 68020 */ 462 #define SMB_PRF_68030 0x65 /* 68030 */ 463 #define SMB_PRF_HOBBIT 0x70 /* Hobbit */ 464 #define SMB_PRF_TM5000 0x78 /* Crusoe TM5000 */ 465 #define SMB_PRF_TM3000 0x79 /* Crusoe TM3000 */ 466 #define SMB_PRF_TM8000 0x7A /* Efficeon TM8000 */ 467 #define SMB_PRF_WEITEK 0x80 /* Weitek */ 468 #define SMB_PRF_ITANIC 0x82 /* Itanium */ 469 #define SMB_PRF_ATHLON64 0x83 /* Athlon64 */ 470 #define SMB_PRF_OPTERON 0x84 /* Opteron */ 471 #define SMB_PRF_PA 0x90 /* PA-RISC */ 472 #define SMB_PRF_PA8500 0x91 /* PA-RISC 8500 */ 473 #define SMB_PRF_PA8000 0x92 /* PA-RISC 8000 */ 474 #define SMB_PRF_PA7300LC 0x93 /* PA-RISC 7300LC */ 475 #define SMB_PRF_PA7200 0x94 /* PA-RISC 7200 */ 476 #define SMB_PRF_PA7100LC 0x95 /* PA-RISC 7100LC */ 477 #define SMB_PRF_PA7100 0x96 /* PA-RISC 7100 */ 478 #define SMB_PRF_V30 0xA0 /* V30 */ 479 #define SMB_PRF_PENTIUMIII_XEON 0xB0 /* Pentium III Xeon */ 480 #define SMB_PRF_PENTIUMIII_SS 0xB1 /* Pentium III with SpeedStep */ 481 #define SMB_PRF_P4 0xB2 /* Pentium 4 */ 482 #define SMB_PRF_XEON 0xB3 /* Intel Xeon */ 483 #define SMB_PRF_AS400 0xB4 /* AS400 */ 484 #define SMB_PRF_XEON_MP 0xB5 /* Intel Xeon MP */ 485 #define SMB_PRF_ATHLON_XP 0xB6 /* AMD Athlon XP */ 486 #define SMB_PRF_ATHLON_MP 0xB7 /* AMB Athlon MP */ 487 #define SMB_PRF_ITANIC2 0xB8 /* Itanium 2 */ 488 #define SMB_PRF_PENTIUM_M 0xB9 /* Pentium M */ 489 #define SMB_PRF_IBM390 0xC8 /* IBM 390 */ 490 #define SMB_PRF_G4 0xC9 /* G4 */ 491 #define SMB_PRF_G5 0xCA /* G5 */ 492 #define SMB_PRF_I860 0xFA /* i860 */ 493 #define SMB_PRF_I960 0xFB /* i960 */ 494 495 /* 496 * SMBIOS Cache Information. See DSP0134 Section 3.3.8 for more information. 497 * If smba_size is zero, this indicates the specified cache is not present. 498 */ 499 typedef struct smbios_cache { 500 uint32_t smba_maxsize; /* maximum installed size in bytes */ 501 uint32_t smba_size; /* installed size in bytes */ 502 uint16_t smba_stype; /* supported SRAM types (SMB_CAT_*) */ 503 uint16_t smba_ctype; /* current SRAM type (SMB_CAT_*) */ 504 uint8_t smba_speed; /* speed in nanoseconds */ 505 uint8_t smba_etype; /* error correction type (SMB_CAE_*) */ 506 uint8_t smba_ltype; /* logical cache type (SMB_CAG_*) */ 507 uint8_t smba_assoc; /* associativity (SMB_CAA_*) */ 508 uint8_t smba_level; /* cache level */ 509 uint8_t smba_mode; /* cache mode (SMB_CAM_*) */ 510 uint8_t smba_location; /* cache location (SMB_CAL_*) */ 511 uint8_t smba_flags; /* cache flags (SMB_CAF_*) */ 512 } smbios_cache_t; 513 514 #define SMB_CAT_OTHER 0x0001 /* other */ 515 #define SMB_CAT_UNKNOWN 0x0002 /* unknown */ 516 #define SMB_CAT_NONBURST 0x0004 /* non-burst */ 517 #define SMB_CAT_BURST 0x0008 /* burst */ 518 #define SMB_CAT_PBURST 0x0010 /* pipeline burst */ 519 #define SMB_CAT_SYNC 0x0020 /* synchronous */ 520 #define SMB_CAT_ASYNC 0x0040 /* asynchronous */ 521 522 #define SMB_CAE_OTHER 0x01 /* other */ 523 #define SMB_CAE_UNKNOWN 0x02 /* unknown */ 524 #define SMB_CAE_NONE 0x03 /* none */ 525 #define SMB_CAE_PARITY 0x04 /* parity */ 526 #define SMB_CAE_SBECC 0x05 /* single-bit ECC */ 527 #define SMB_CAE_MBECC 0x06 /* multi-bit ECC */ 528 529 #define SMB_CAG_OTHER 0x01 /* other */ 530 #define SMB_CAG_UNKNOWN 0x02 /* unknown */ 531 #define SMB_CAG_INSTR 0x03 /* instruction */ 532 #define SMB_CAG_DATA 0x04 /* data */ 533 #define SMB_CAG_UNIFIED 0x05 /* unified */ 534 535 #define SMB_CAA_OTHER 0x01 /* other */ 536 #define SMB_CAA_UNKNOWN 0x02 /* unknown */ 537 #define SMB_CAA_DIRECT 0x03 /* direct mapped */ 538 #define SMB_CAA_2WAY 0x04 /* 2-way set associative */ 539 #define SMB_CAA_4WAY 0x05 /* 4-way set associative */ 540 #define SMB_CAA_FULL 0x06 /* fully associative */ 541 #define SMB_CAA_8WAY 0x07 /* 8-way set associative */ 542 #define SMB_CAA_16WAY 0x08 /* 16-way set associative */ 543 544 #define SMB_CAM_WT 0x00 /* write-through */ 545 #define SMB_CAM_WB 0x01 /* write-back */ 546 #define SMB_CAM_VARY 0x02 /* varies by address */ 547 #define SMB_CAM_UNKNOWN 0x03 /* unknown */ 548 549 #define SMB_CAL_INTERNAL 0x00 /* internal */ 550 #define SMB_CAL_EXTERNAL 0x01 /* external */ 551 #define SMB_CAL_RESERVED 0x02 /* reserved */ 552 #define SMB_CAL_UNKNOWN 0x03 /* unknown */ 553 554 #define SMB_CAF_ENABLED 0x01 /* enabled at boot time */ 555 #define SMB_CAF_SOCKETED 0x02 /* cache is socketed */ 556 557 /* 558 * SMBIOS Port Information. See DSP0134 Section 3.3.9 for more information. 559 * The internal reference designator string is also mapped to the location. 560 */ 561 typedef struct smbios_port { 562 const char *smbo_iref; /* internal reference designator */ 563 const char *smbo_eref; /* external reference designator */ 564 uint8_t smbo_itype; /* internal connector type (SMB_POC_*) */ 565 uint8_t smbo_etype; /* external connector type (SMB_POC_*) */ 566 uint8_t smbo_ptype; /* port type (SMB_POT_*) */ 567 uint8_t smbo_pad; /* padding */ 568 } smbios_port_t; 569 570 #define SMB_POC_NONE 0x00 /* none */ 571 #define SMB_POC_CENT 0x01 /* Centronics */ 572 #define SMB_POC_MINICENT 0x02 /* Mini-Centronics */ 573 #define SMB_POC_PROPRIETARY 0x03 /* proprietary */ 574 #define SMB_POC_DB25M 0x04 /* DB-25 pin male */ 575 #define SMB_POC_DB25F 0x05 /* DB-25 pin female */ 576 #define SMB_POC_DB15M 0x06 /* DB-15 pin male */ 577 #define SMB_POC_DB15F 0x07 /* DB-15 pin female */ 578 #define SMB_POC_DB9M 0x08 /* DB-9 pin male */ 579 #define SMB_POC_DB9F 0x09 /* DB-9 pin female */ 580 #define SMB_POC_RJ11 0x0A /* RJ-11 */ 581 #define SMB_POC_RJ45 0x0B /* RJ-45 */ 582 #define SMB_POC_MINISCSI 0x0C /* 50-pin MiniSCSI */ 583 #define SMB_POC_MINIDIN 0x0D /* Mini-DIN */ 584 #define SMB_POC_MICRODIN 0x0E /* Micro-DIN */ 585 #define SMB_POC_PS2 0x0F /* PS/2 */ 586 #define SMB_POC_IR 0x10 /* Infrared */ 587 #define SMB_POC_HPHIL 0x11 /* HP-HIL */ 588 #define SMB_POC_USB 0x12 /* USB */ 589 #define SMB_POC_SSA 0x13 /* SSA SCSI */ 590 #define SMB_POC_DIN8M 0x14 /* Circular DIN-8 male */ 591 #define SMB_POC_DIN8F 0x15 /* Circular DIN-8 female */ 592 #define SMB_POC_OBIDE 0x16 /* on-board IDE */ 593 #define SMB_POC_OBFLOPPY 0x17 /* on-board floppy */ 594 #define SMB_POC_DI9 0x18 /* 9p dual inline (p10 cut) */ 595 #define SMB_POC_DI25 0x19 /* 25p dual inline (p26 cut) */ 596 #define SMB_POC_DI50 0x1A /* 50p dual inline */ 597 #define SMB_POC_DI68 0x1B /* 68p dual inline */ 598 #define SMB_POC_CDROM 0x1C /* on-board sound from CDROM */ 599 #define SMB_POC_MINI14 0x1D /* Mini-Centronics Type 14 */ 600 #define SMB_POC_MINI26 0x1E /* Mini-Centronics Type 26 */ 601 #define SMB_POC_MINIJACK 0x1F /* Mini-jack (headphones) */ 602 #define SMB_POC_BNC 0x20 /* BNC */ 603 #define SMB_POC_1394 0x21 /* 1394 */ 604 #define SMB_POC_PC98 0xA0 /* PC-98 */ 605 #define SMB_POC_PC98HR 0xA1 /* PC-98Hireso */ 606 #define SMB_POC_PCH98 0xA2 /* PC-H98 */ 607 #define SMB_POC_PC98NOTE 0xA3 /* PC-98Note */ 608 #define SMB_POC_PC98FULL 0xA4 /* PC-98Full */ 609 #define SMB_POC_OTHER 0xFF /* other */ 610 611 #define SMB_POT_NONE 0x00 /* none */ 612 #define SMB_POT_PP_XTAT 0x01 /* Parallel Port XT/AT compat */ 613 #define SMB_POT_PP_PS2 0x02 /* Parallel Port PS/2 */ 614 #define SMB_POT_PP_ECP 0x03 /* Parallel Port ECP */ 615 #define SMB_POT_PP_EPP 0x04 /* Parallel Port EPP */ 616 #define SMB_POT_PP_ECPEPP 0x05 /* Parallel Port ECP/EPP */ 617 #define SMB_POT_SP_XTAT 0x06 /* Serial Port XT/AT compat */ 618 #define SMB_POT_SP_16450 0x07 /* Serial Port 16450 compat */ 619 #define SMB_POT_SP_16550 0x08 /* Serial Port 16550 compat */ 620 #define SMB_POT_SP_16550A 0x09 /* Serial Port 16550A compat */ 621 #define SMB_POT_SCSI 0x0A /* SCSI port */ 622 #define SMB_POT_MIDI 0x0B /* MIDI port */ 623 #define SMB_POT_JOYSTICK 0x0C /* Joystick port */ 624 #define SMB_POT_KEYBOARD 0x0D /* Keyboard port */ 625 #define SMB_POT_MOUSE 0x0E /* Mouse port */ 626 #define SMB_POT_SSA 0x0F /* SSA SCSI */ 627 #define SMB_POT_USB 0x10 /* USB */ 628 #define SMB_POT_FIREWIRE 0x11 /* FireWrite (IEEE P1394) */ 629 #define SMB_POT_PCMII 0x12 /* PCMCIA Type II */ 630 #define SMB_POT_PCMIIa 0x13 /* PCMCIA Type II (alternate) */ 631 #define SMB_POT_PCMIII 0x14 /* PCMCIA Type III */ 632 #define SMB_POT_CARDBUS 0x15 /* Cardbus */ 633 #define SMB_POT_ACCESS 0x16 /* Access Bus Port */ 634 #define SMB_POT_SCSI2 0x17 /* SCSI II */ 635 #define SMB_POT_SCSIW 0x18 /* SCSI Wide */ 636 #define SMB_POT_PC98 0x19 /* PC-98 */ 637 #define SMB_POT_PC98HR 0x1A /* PC-98Hireso */ 638 #define SMB_POT_PCH98 0x1B /* PC-H98 */ 639 #define SMB_POT_VIDEO 0x1C /* Video port */ 640 #define SMB_POT_AUDIO 0x1D /* Audio port */ 641 #define SMB_POT_MODEM 0x1E /* Modem port */ 642 #define SMB_POT_NETWORK 0x1F /* Network port */ 643 #define SMB_POT_8251 0xA0 /* 8251 compatible */ 644 #define SMB_POT_8251F 0xA1 /* 8251 FIFO compatible */ 645 #define SMB_POT_OTHER 0xFF /* other */ 646 647 /* 648 * SMBIOS Slot Information. See DSP0134 Section 3.3.10 for more information. 649 * See DSP0134 3.3.10.5 for how to interpret the value of smbl_id. 650 */ 651 typedef struct smbios_slot { 652 const char *smbl_name; /* reference designation */ 653 uint8_t smbl_type; /* slot type */ 654 uint8_t smbl_width; /* slot data bus width */ 655 uint8_t smbl_usage; /* current usage */ 656 uint8_t smbl_length; /* slot length */ 657 uint16_t smbl_id; /* slot ID */ 658 uint8_t smbl_ch1; /* slot characteristics 1 */ 659 uint8_t smbl_ch2; /* slot characteristics 2 */ 660 } smbios_slot_t; 661 662 #define SMB_SLT_OTHER 0x01 /* other */ 663 #define SMB_SLT_UNKNOWN 0x02 /* unknown */ 664 #define SMB_SLT_ISA 0x03 /* ISA */ 665 #define SMB_SLT_MCA 0x04 /* MCA */ 666 #define SMB_SLT_EISA 0x05 /* EISA */ 667 #define SMB_SLT_PCI 0x06 /* PCI */ 668 #define SMB_SLT_PCMCIA 0x07 /* PCMCIA */ 669 #define SMB_SLT_VLVESA 0x08 /* VL-VESA */ 670 #define SMB_SLT_PROPRIETARY 0x09 /* proprietary */ 671 #define SMB_SLT_PROC 0x0A /* processor card slot */ 672 #define SMB_SLT_MEM 0x0B /* proprietary memory card slot */ 673 #define SMB_SLT_IOR 0x0C /* I/O riser card slot */ 674 #define SMB_SLT_NUBUS 0x0D /* NuBus */ 675 #define SMB_SLT_PCI66 0x0E /* PCI (66MHz capable) */ 676 #define SMB_SLT_AGP 0x0F /* AGP */ 677 #define SMB_SLT_AGP2X 0x10 /* AGP 2X */ 678 #define SMB_SLT_AGP4X 0x11 /* AGP 4X */ 679 #define SMB_SLT_PCIX 0x12 /* PCI-X */ 680 #define SMB_SLT_AGP8X 0x13 /* AGP 8X */ 681 #define SMB_SLT_PC98_C20 0xA0 /* PC-98/C20 */ 682 #define SMB_SLT_PC98_C24 0xA1 /* PC-98/C24 */ 683 #define SMB_SLT_PC98_E 0xA2 /* PC-98/E */ 684 #define SMB_SLT_PC98_LB 0xA3 /* PC-98/Local Bus */ 685 #define SMB_SLT_PC98_C 0xA4 /* PC-98/Card */ 686 #define SMB_SLT_PCIE 0xA5 /* PCI Express */ 687 688 #define SMB_SLW_OTHER 0x01 /* other */ 689 #define SMB_SLW_UNKNOWN 0x02 /* unknown */ 690 #define SMB_SLW_8 0x03 /* 8 bit */ 691 #define SMB_SLW_16 0x04 /* 16 bit */ 692 #define SMB_SLW_32 0x05 /* 32 bit */ 693 #define SMB_SLW_64 0x06 /* 64 bit */ 694 #define SMB_SLW_128 0x07 /* 128 bit */ 695 #define SMB_SLW_1X 0x08 /* 1x or x1 */ 696 #define SMB_SLW_2X 0x09 /* 2x or x2 */ 697 #define SMB_SLW_4X 0x0A /* 4x or x4 */ 698 #define SMB_SLW_8X 0x0B /* 8x or x8 */ 699 #define SMB_SLW_12X 0x0C /* 12x or x12 */ 700 #define SMB_SLW_16X 0x0D /* 16x or x16 */ 701 #define SMB_SLW_32X 0x0E /* 32x or x32 */ 702 703 #define SMB_SLU_OTHER 0x01 /* other */ 704 #define SMB_SLU_UNKNOWN 0x02 /* unknown */ 705 #define SMB_SLU_AVAIL 0x03 /* available */ 706 #define SMB_SLU_INUSE 0x04 /* in use */ 707 708 #define SMB_SLL_OTHER 0x01 /* other */ 709 #define SMB_SLL_UNKNOWN 0x02 /* unknown */ 710 #define SMB_SLL_SHORT 0x03 /* short length */ 711 #define SMB_SLL_LONG 0x04 /* long length */ 712 713 #define SMB_SLCH1_UNKNOWN 0x01 /* characteristics unknown */ 714 #define SMB_SLCH1_5V 0x02 /* provides 5.0V */ 715 #define SMB_SLCH1_33V 0x04 /* provides 3.3V */ 716 #define SMB_SLCH1_SHARED 0x08 /* opening shared with other slot */ 717 #define SMB_SLCH1_PC16 0x10 /* slot supports PC Card-16 */ 718 #define SMB_SLCH1_PCCB 0x20 /* slot supports CardBus */ 719 #define SMB_SLCH1_PCZV 0x40 /* slot supports Zoom Video */ 720 #define SMB_SLCH1_PCMRR 0x80 /* slot supports Modem Ring Resume */ 721 722 #define SMB_SLCH2_PME 0x01 /* slot supports PME# signal */ 723 #define SMB_SLCH2_HOTPLUG 0x02 /* slot supports hot-plug devices */ 724 #define SMB_SLCH2_SMBUS 0x04 /* slot supports SMBus signal */ 725 726 /* 727 * SMBIOS On-Board Device Information. See DSP0134 Section 3.3.11 for more 728 * information. Any number of on-board device sections may be present, each 729 * containing one or more records. The smbios_info_obdevs() function permits 730 * the caller to retrieve one or more of the records from a given section. 731 */ 732 typedef struct smbios_obdev { 733 const char *smbd_name; /* description string for this device */ 734 uint8_t smbd_type; /* type code (SMB_OBT_*) */ 735 uint8_t smbd_enabled; /* boolean (device is enabled) */ 736 } smbios_obdev_t; 737 738 #define SMB_OBT_OTHER 0x01 /* other */ 739 #define SMB_OBT_UNKNOWN 0x02 /* unknown */ 740 #define SMB_OBT_VIDEO 0x03 /* video */ 741 #define SMB_OBT_SCSI 0x04 /* scsi */ 742 #define SMB_OBT_ETHERNET 0x05 /* ethernet */ 743 #define SMB_OBT_TOKEN 0x06 /* token ring */ 744 #define SMB_OBT_SOUND 0x07 /* sound */ 745 746 /* 747 * SMBIOS BIOS Language Information. See DSP0134 Section 3.3.14 for more 748 * information. The smbios_info_strtab() function can be applied using a 749 * count of smbla_num to retrieve the other possible language settings. 750 */ 751 typedef struct smbios_lang { 752 const char *smbla_cur; /* current language setting */ 753 uint_t smbla_fmt; /* language name format (see below) */ 754 uint_t smbla_num; /* number of installed languages */ 755 } smbios_lang_t; 756 757 #define SMB_LFMT_LONG 0 /* <ISO639>|<ISO3166>|Encoding Method */ 758 #define SMB_LFMT_SHORT 1 /* <ISO930><ISO3166> */ 759 760 /* 761 * SMBIOS System Event Log Information. See DSP0134 Section 3.3.16 for more 762 * information. Accessing the event log itself requires additional interfaces. 763 */ 764 typedef struct smbios_evtype { 765 uint8_t smbevt_ltype; /* log type */ 766 uint8_t smbevt_dtype; /* variable data format type */ 767 } smbios_evtype_t; 768 769 typedef struct smbios_evlog { 770 size_t smbev_size; /* size in bytes of log area */ 771 size_t smbev_hdr; /* offset or index of header */ 772 size_t smbev_data; /* offset or index of data */ 773 uint8_t smbev_method; /* data access method (see below) */ 774 uint8_t smbev_flags; /* flags (see below) */ 775 uint8_t smbev_format; /* log header format (see below) */ 776 uint8_t smbev_pad; /* padding */ 777 uint32_t smbev_token; /* data update change token */ 778 union { 779 struct { 780 uint16_t evi_iaddr; /* index address */ 781 uint16_t evi_daddr; /* data address */ 782 } eva_io; /* i/o address for SMB_EVM_XxY */ 783 uint32_t eva_addr; /* address for SMB_EVM_MEM32 */ 784 uint16_t eva_gpnv; /* handle for SMB_EVM_GPNV */ 785 } smbev_addr; 786 uint32_t smbev_typec; /* number of type descriptors */ 787 const smbios_evtype_t *smbev_typev; /* type descriptor array */ 788 } smbios_evlog_t; 789 790 #define SMB_EVM_1x1i_1x1d 0 /* I/O: 1 1b idx port, 1 1b data port */ 791 #define SMB_EVM_2x1i_1x1d 1 /* I/O: 2 1b idx port, 1 1b data port */ 792 #define SMB_EVM_1x2i_1x1d 2 /* I/O: 1 2b idx port, 1 1b data port */ 793 #define SMB_EVM_MEM32 3 /* Memory-Mapped 32-bit Physical Addr */ 794 #define SMB_EVM_GPNV 4 /* GP Non-Volatile API Access */ 795 796 #define SMB_EVFL_VALID 0x1 /* log area valid */ 797 #define SMB_EVFL_FULL 0x2 /* log area full */ 798 799 #define SMB_EVHF_NONE 0 /* no log headers used */ 800 #define SMB_EVHF_F1 1 /* DMTF log header type 1 */ 801 802 /* 803 * SMBIOS Physical Memory Array Information. See DSP0134 Section 3.3.17 for 804 * more information. This describes a collection of physical memory devices. 805 */ 806 typedef struct smbios_memarray { 807 uint8_t smbma_location; /* physical device location */ 808 uint8_t smbma_use; /* physical device functional purpose */ 809 uint8_t smbma_ecc; /* error detect/correct mechanism */ 810 uint8_t smbma_pad0; /* padding */ 811 uint32_t smbma_pad1; /* padding */ 812 uint32_t smbma_ndevs; /* number of slots or sockets */ 813 id_t smbma_err; /* handle of error (if any) */ 814 uint64_t smbma_size; /* maximum capacity in bytes */ 815 } smbios_memarray_t; 816 817 #define SMB_MAL_OTHER 0x01 /* other */ 818 #define SMB_MAL_UNKNOWN 0x02 /* unknown */ 819 #define SMB_MAL_SYSMB 0x03 /* system board or motherboard */ 820 #define SMB_MAL_ISA 0x04 /* ISA add-on card */ 821 #define SMB_MAL_EISA 0x05 /* EISA add-on card */ 822 #define SMB_MAL_PCI 0x06 /* PCI add-on card */ 823 #define SMB_MAL_MCA 0x07 /* MCA add-on card */ 824 #define SMB_MAL_PCMCIA 0x08 /* PCMCIA add-on card */ 825 #define SMB_MAL_PROP 0x09 /* proprietary add-on card */ 826 #define SMB_MAL_NUBUS 0x0A /* NuBus */ 827 #define SMB_MAL_PC98C20 0xA0 /* PC-98/C20 add-on card */ 828 #define SMB_MAL_PC98C24 0xA1 /* PC-98/C24 add-on card */ 829 #define SMB_MAL_PC98E 0xA2 /* PC-98/E add-on card */ 830 #define SMB_MAL_PC98LB 0xA3 /* PC-98/Local bus add-on card */ 831 832 #define SMB_MAU_OTHER 0x01 /* other */ 833 #define SMB_MAU_UNKNOWN 0x02 /* unknown */ 834 #define SMB_MAU_SYSTEM 0x03 /* system memory */ 835 #define SMB_MAU_VIDEO 0x04 /* video memory */ 836 #define SMB_MAU_FLASH 0x05 /* flash memory */ 837 #define SMB_MAU_NVRAM 0x06 /* non-volatile RAM */ 838 #define SMB_MAU_CACHE 0x07 /* cache memory */ 839 840 #define SMB_MAE_OTHER 0x01 /* other */ 841 #define SMB_MAE_UNKNOWN 0x02 /* unknown */ 842 #define SMB_MAE_NONE 0x03 /* none */ 843 #define SMB_MAE_PARITY 0x04 /* parity */ 844 #define SMB_MAE_SECC 0x05 /* single-bit ECC */ 845 #define SMB_MAE_MECC 0x06 /* multi-bit ECC */ 846 #define SMB_MAE_CRC 0x07 /* CRC */ 847 848 /* 849 * SMBIOS Memory Device Information. See DSP0134 Section 3.3.18 for more 850 * information. One or more of these structures are associated with each 851 * smbios_memarray_t. A structure is present even for unpopulated sockets. 852 * Unknown values are set to -1. A smbmd_size of 0 indicates unpopulated. 853 * WARNING: Some BIOSes appear to export the *maximum* size of the device 854 * that can appear in the corresponding socket as opposed to the current one. 855 */ 856 typedef struct smbios_memdevice { 857 id_t smbmd_array; /* handle of physical memory array */ 858 id_t smbmd_error; /* handle of memory error data */ 859 uint32_t smbmd_twidth; /* total width in bits including ecc */ 860 uint32_t smbmd_dwidth; /* data width in bits */ 861 uint64_t smbmd_size; /* size in bytes (see note above) */ 862 uint8_t smbmd_form; /* form factor */ 863 uint8_t smbmd_set; /* set (0x00=none, 0xFF=unknown) */ 864 uint8_t smbmd_type; /* memory type */ 865 uint8_t smbmd_pad; /* padding */ 866 uint32_t smbmd_flags; /* flags (see below) */ 867 uint32_t smbmd_speed; /* speed in nanoseconds */ 868 const char *smbmd_dloc; /* physical device locator string */ 869 const char *smbmd_bloc; /* physical bank locator string */ 870 } smbios_memdevice_t; 871 872 #define SMB_MDFF_OTHER 0x01 /* other */ 873 #define SMB_MDFF_UNKNOWN 0x02 /* unknown */ 874 #define SMB_MDFF_SIMM 0x03 /* SIMM */ 875 #define SMB_MDFF_SIP 0x04 /* SIP */ 876 #define SMB_MDFF_CHIP 0x05 /* chip */ 877 #define SMB_MDFF_DIP 0x06 /* DIP */ 878 #define SMB_MDFF_ZIP 0x07 /* ZIP */ 879 #define SMB_MDFF_PROP 0x08 /* proprietary card */ 880 #define SMB_MDFF_DIMM 0x09 /* DIMM */ 881 #define SMB_MDFF_TSOP 0x0A /* TSOP */ 882 #define SMB_MDFF_CHIPROW 0x0B /* row of chips */ 883 #define SMB_MDFF_RIMM 0x0C /* RIMM */ 884 #define SMB_MDFF_SODIMM 0x0D /* SODIMM */ 885 #define SMB_MDFF_SRIMM 0x0E /* SRIMM */ 886 887 #define SMB_MDT_OTHER 0x01 /* other */ 888 #define SMB_MDT_UNKNOWN 0x02 /* unknown */ 889 #define SMB_MDT_DRAM 0x03 /* DRAM */ 890 #define SMB_MDT_EDRAM 0x04 /* EDRAM */ 891 #define SMB_MDT_VRAM 0x05 /* VRAM */ 892 #define SMB_MDT_SRAM 0x06 /* SRAM */ 893 #define SMB_MDT_RAM 0x07 /* RAM */ 894 #define SMB_MDT_ROM 0x08 /* ROM */ 895 #define SMB_MDT_FLASH 0x09 /* FLASH */ 896 #define SMB_MDT_EEPROM 0x0A /* EEPROM */ 897 #define SMB_MDT_FEPROM 0x0B /* FEPROM */ 898 #define SMB_MDT_EPROM 0x0C /* EPROM */ 899 #define SMB_MDT_CDRAM 0x0D /* CDRAM */ 900 #define SMB_MDT_3DRAM 0x0E /* 3DRAM */ 901 #define SMB_MDT_SDRAM 0x0F /* SDRAM */ 902 #define SMB_MDT_SGRAM 0x10 /* SGRAM */ 903 #define SMB_MDT_RDRAM 0x11 /* RDRAM */ 904 #define SMB_MDT_DDR 0x12 /* DDR */ 905 #define SMB_MDT_DDR2 0x13 /* DDR2 */ 906 907 #define SMB_MDF_OTHER 0x0002 /* other */ 908 #define SMB_MDF_UNKNOWN 0x0004 /* unknown */ 909 #define SMB_MDF_FASTPG 0x0008 /* fast-paged */ 910 #define SMB_MDF_STATIC 0x0010 /* static column */ 911 #define SMB_MDF_PSTATIC 0x0020 /* pseudo-static */ 912 #define SMB_MDF_RAMBUS 0x0040 /* RAMBUS */ 913 #define SMB_MDF_SYNC 0x0080 /* synchronous */ 914 #define SMB_MDF_CMOS 0x0100 /* CMOS */ 915 #define SMB_MDF_EDO 0x0200 /* EDO */ 916 #define SMB_MDF_WDRAM 0x0400 /* Window DRAM */ 917 #define SMB_MDF_CDRAM 0x0800 /* Cache DRAM */ 918 #define SMB_MDF_NV 0x1000 /* non-volatile */ 919 920 /* 921 * SMBIOS Memory Array Mapped Address. See DSP0134 Section 3.3.20 for more 922 * information. We convert start/end addresses into addr/size for convenience. 923 */ 924 typedef struct smbios_memarrmap { 925 id_t smbmam_array; /* physical memory array handle */ 926 uint32_t smbmam_width; /* number of devices that form a row */ 927 uint64_t smbmam_addr; /* physical address of mapping */ 928 uint64_t smbmam_size; /* size in bytes of address range */ 929 } smbios_memarrmap_t; 930 931 /* 932 * SMBIOS Memory Device Mapped Address. See DSP0134 Section 3.3.21 for more 933 * information. We convert start/end addresses into addr/size for convenience. 934 */ 935 typedef struct smbios_memdevmap { 936 id_t smbmdm_device; /* memory device handle */ 937 id_t smbmdm_arrmap; /* memory array mapped address handle */ 938 uint64_t smbmdm_addr; /* physical address of mapping */ 939 uint64_t smbmdm_size; /* size in bytes of address range */ 940 uint8_t smbmdm_rpos; /* partition row position */ 941 uint8_t smbmdm_ipos; /* interleave position */ 942 uint8_t smbmdm_idepth; /* interleave data depth */ 943 } smbios_memdevmap_t; 944 945 /* 946 * SMBIOS Hardware Security Settings. See DSP0134 Section 3.3.25 for more 947 * information. Only one such record will be present in the SMBIOS. 948 */ 949 typedef struct smbios_hwsec { 950 uint8_t smbh_pwr_ps; /* power-on password status */ 951 uint8_t smbh_kbd_ps; /* keyboard password status */ 952 uint8_t smbh_adm_ps; /* administrator password status */ 953 uint8_t smbh_pan_ps; /* front panel reset status */ 954 } smbios_hwsec_t; 955 956 #define SMB_HWSEC_PS_DISABLED 0x00 /* password disabled */ 957 #define SMB_HWSEC_PS_ENABLED 0x01 /* password enabled */ 958 #define SMB_HWSEC_PS_NOTIMPL 0x02 /* password not implemented */ 959 #define SMB_HWSEC_PS_UNKNOWN 0x03 /* password status unknown */ 960 961 /* 962 * SMBIOS System Boot Information. See DSP0134 Section 3.3.33 for more 963 * information. The contents of the data varies by type and is undocumented 964 * from the perspective of DSP0134 -- it seems to be left as vendor-specific. 965 * The (D) annotation next to SMB_BOOT_* below indicates possible data payload. 966 */ 967 typedef struct smbios_boot { 968 uint8_t smbt_status; /* boot status code (see below) */ 969 const void *smbt_data; /* data buffer specific to status */ 970 size_t smbt_size; /* size of smbt_data buffer in bytes */ 971 } smbios_boot_t; 972 973 #define SMB_BOOT_NORMAL 0 /* no errors detected */ 974 #define SMB_BOOT_NOMEDIA 1 /* no bootable media */ 975 #define SMB_BOOT_OSFAIL 2 /* normal o/s failed to load */ 976 #define SMB_BOOT_FWHWFAIL 3 /* firmware-detected hardware failure */ 977 #define SMB_BOOT_OSHWFAIL 4 /* o/s-detected hardware failure */ 978 #define SMB_BOOT_USERREQ 5 /* user-requested boot (keystroke) */ 979 #define SMB_BOOT_SECURITY 6 /* system security violation */ 980 #define SMB_BOOT_PREVREQ 7 /* previously requested image (D) */ 981 #define SMB_BOOT_WATCHDOG 8 /* watchdog initiated reboot */ 982 #define SMB_BOOT_RESV_LO 9 /* low end of reserved range */ 983 #define SMB_BOOT_RESV_HI 127 /* high end of reserved range */ 984 #define SMB_BOOT_OEM_LO 128 /* low end of OEM-specific range */ 985 #define SMB_BOOT_OEM_HI 191 /* high end of OEM-specific range */ 986 #define SMB_BOOT_PROD_LO 192 /* low end of product-specific range */ 987 #define SMB_BOOT_PROD_HI 255 /* high end of product-specific range */ 988 989 /* 990 * SMBIOS IPMI Device Information. See DSP0134 Section 3.3.39 and also 991 * Appendix C1 of the IPMI specification for more information on this record. 992 */ 993 typedef struct smbios_ipmi { 994 uint_t smbip_type; /* BMC interface type */ 995 smbios_version_t smbip_vers; /* BMC's IPMI specification version */ 996 uint32_t smbip_i2c; /* BMC I2C bus slave address */ 997 uint32_t smbip_bus; /* bus ID of NV storage device, or -1 */ 998 uint64_t smbip_addr; /* BMC base address */ 999 uint32_t smbip_flags; /* flags (see below) */ 1000 uint16_t smbip_intr; /* interrupt number (or zero if none) */ 1001 uint16_t smbip_regspacing; /* i/o space register spacing (bytes) */ 1002 } smbios_ipmi_t; 1003 1004 #define SMB_IPMI_T_UNKNOWN 0x00 /* unknown */ 1005 #define SMB_IPMI_T_KCS 0x01 /* KCS: Keyboard Controller Style */ 1006 #define SMB_IPMI_T_SMIC 0x02 /* SMIC: Server Mgmt Interface Chip */ 1007 #define SMB_IPMI_T_BT 0x03 /* BT: Block Transfer */ 1008 #define SMB_IPMI_T_SSIF 0x04 /* SSIF: SMBus System Interface */ 1009 1010 #define SMB_IPMI_F_IOADDR 0x01 /* base address is in i/o space */ 1011 #define SMB_IPMI_F_INTRSPEC 0x02 /* intr information is specified */ 1012 #define SMB_IPMI_F_INTRHIGH 0x04 /* intr active high (else low) */ 1013 #define SMB_IPMI_F_INTREDGE 0x08 /* intr is edge triggered (else lvl) */ 1014 1015 /* 1016 * SMBIOS Interfaces. An SMBIOS image can be opened by either providing a file 1017 * pathname, device pathname, file descriptor, or raw memory buffer. Once an 1018 * image is opened the functions below can be used to iterate over the various 1019 * structures and convert the underlying data representation into the simpler 1020 * data structures described earlier in this header file. The SMB_VERSION 1021 * constant specified when opening an image indicates the version of the ABI 1022 * the caller expects and the DMTF SMBIOS version the client can understand. 1023 * The library will then map older or newer data structures to that as needed. 1024 */ 1025 1026 #define SMB_VERSION_23 0x0203 /* SMBIOS encoding for DMTF spec 2.3 */ 1027 #define SMB_VERSION_24 0x0204 /* SMBIOS encoding for DMTF spec 2.4 */ 1028 #define SMB_VERSION SMB_VERSION_24 /* SMBIOS latest version definitions */ 1029 1030 #define SMB_O_NOCKSUM 0x1 /* do not verify header checksums */ 1031 #define SMB_O_NOVERS 0x2 /* do not verify header versions */ 1032 #define SMB_O_ZIDS 0x4 /* strip out identification numbers */ 1033 #define SMB_O_MASK 0x7 /* mask of valid smbios_*open flags */ 1034 1035 #define SMB_ID_NOTSUP 0xFFFE /* structure is not supported by BIOS */ 1036 #define SMB_ID_NONE 0xFFFF /* structure is a null reference */ 1037 1038 #define SMB_ERR (-1) /* id_t value indicating error */ 1039 1040 typedef struct smbios_hdl smbios_hdl_t; 1041 1042 typedef struct smbios_struct { 1043 id_t smbstr_id; /* structure ID handle */ 1044 uint_t smbstr_type; /* structure type */ 1045 const void *smbstr_data; /* structure data */ 1046 size_t smbstr_size; /* structure size */ 1047 } smbios_struct_t; 1048 1049 typedef int smbios_struct_f(smbios_hdl_t *, 1050 const smbios_struct_t *, void *); 1051 1052 extern smbios_hdl_t *smbios_open(const char *, int, int, int *); 1053 extern smbios_hdl_t *smbios_fdopen(int, int, int, int *); 1054 extern smbios_hdl_t *smbios_bufopen(const smbios_entry_t *, 1055 const void *, size_t, int, int, int *); 1056 1057 extern const void *smbios_buf(smbios_hdl_t *); 1058 extern size_t smbios_buflen(smbios_hdl_t *); 1059 1060 extern void smbios_checksum(smbios_hdl_t *, smbios_entry_t *); 1061 extern int smbios_write(smbios_hdl_t *, int); 1062 extern void smbios_close(smbios_hdl_t *); 1063 1064 extern int smbios_errno(smbios_hdl_t *); 1065 extern const char *smbios_errmsg(int); 1066 1067 extern int smbios_lookup_id(smbios_hdl_t *, id_t, smbios_struct_t *); 1068 extern int smbios_iter(smbios_hdl_t *, smbios_struct_f *, void *); 1069 1070 extern void smbios_info_smbios(smbios_hdl_t *, smbios_entry_t *); 1071 extern int smbios_info_common(smbios_hdl_t *, id_t, smbios_info_t *); 1072 extern id_t smbios_info_bios(smbios_hdl_t *, smbios_bios_t *); 1073 extern id_t smbios_info_system(smbios_hdl_t *, smbios_system_t *); 1074 extern int smbios_info_bboard(smbios_hdl_t *, id_t, smbios_bboard_t *); 1075 extern int smbios_info_chassis(smbios_hdl_t *, id_t, smbios_chassis_t *); 1076 extern int smbios_info_processor(smbios_hdl_t *, id_t, smbios_processor_t *); 1077 extern int smbios_info_cache(smbios_hdl_t *, id_t, smbios_cache_t *); 1078 extern int smbios_info_port(smbios_hdl_t *, id_t, smbios_port_t *); 1079 extern int smbios_info_slot(smbios_hdl_t *, id_t, smbios_slot_t *); 1080 extern int smbios_info_obdevs(smbios_hdl_t *, id_t, int, smbios_obdev_t *); 1081 extern int smbios_info_strtab(smbios_hdl_t *, id_t, int, const char *[]); 1082 extern id_t smbios_info_lang(smbios_hdl_t *, smbios_lang_t *); 1083 extern id_t smbios_info_eventlog(smbios_hdl_t *, smbios_evlog_t *); 1084 extern int smbios_info_memarray(smbios_hdl_t *, id_t, smbios_memarray_t *); 1085 extern int smbios_info_memarrmap(smbios_hdl_t *, id_t, smbios_memarrmap_t *); 1086 extern int smbios_info_memdevice(smbios_hdl_t *, id_t, smbios_memdevice_t *); 1087 extern int smbios_info_memdevmap(smbios_hdl_t *, id_t, smbios_memdevmap_t *); 1088 extern id_t smbios_info_hwsec(smbios_hdl_t *, smbios_hwsec_t *); 1089 extern id_t smbios_info_boot(smbios_hdl_t *, smbios_boot_t *); 1090 extern id_t smbios_info_ipmi(smbios_hdl_t *, smbios_ipmi_t *); 1091 1092 #ifndef _KERNEL 1093 /* 1094 * The smbios_*_desc() and smbios_*_name() interfaces can be used for utilities 1095 * such as smbios(1M) that wish to decode SMBIOS fields for humans. The _desc 1096 * functions return the comment string next to the #defines listed above, and 1097 * the _name functions return the appropriate #define identifier itself. 1098 */ 1099 extern const char *smbios_bboard_flag_desc(uint_t); 1100 extern const char *smbios_bboard_flag_name(uint_t); 1101 extern const char *smbios_bboard_type_desc(uint_t); 1102 1103 extern const char *smbios_bios_flag_desc(uint64_t); 1104 extern const char *smbios_bios_flag_name(uint64_t); 1105 1106 extern const char *smbios_bios_xb1_desc(uint_t); 1107 extern const char *smbios_bios_xb1_name(uint_t); 1108 extern const char *smbios_bios_xb2_desc(uint_t); 1109 extern const char *smbios_bios_xb2_name(uint_t); 1110 1111 extern const char *smbios_boot_desc(uint_t); 1112 1113 extern const char *smbios_cache_assoc_desc(uint_t); 1114 extern const char *smbios_cache_ctype_desc(uint_t); 1115 extern const char *smbios_cache_ctype_name(uint_t); 1116 extern const char *smbios_cache_ecc_desc(uint_t); 1117 extern const char *smbios_cache_flag_desc(uint_t); 1118 extern const char *smbios_cache_flag_name(uint_t); 1119 extern const char *smbios_cache_loc_desc(uint_t); 1120 extern const char *smbios_cache_logical_desc(uint_t); 1121 extern const char *smbios_cache_mode_desc(uint_t); 1122 1123 extern const char *smbios_chassis_state_desc(uint_t); 1124 extern const char *smbios_chassis_type_desc(uint_t); 1125 1126 extern const char *smbios_evlog_flag_desc(uint_t); 1127 extern const char *smbios_evlog_flag_name(uint_t); 1128 extern const char *smbios_evlog_format_desc(uint_t); 1129 extern const char *smbios_evlog_method_desc(uint_t); 1130 1131 extern const char *smbios_ipmi_flag_name(uint_t); 1132 extern const char *smbios_ipmi_flag_desc(uint_t); 1133 extern const char *smbios_ipmi_type_desc(uint_t); 1134 1135 extern const char *smbios_hwsec_desc(uint_t); 1136 1137 extern const char *smbios_memarray_loc_desc(uint_t); 1138 extern const char *smbios_memarray_use_desc(uint_t); 1139 extern const char *smbios_memarray_ecc_desc(uint_t); 1140 1141 extern const char *smbios_memdevice_form_desc(uint_t); 1142 extern const char *smbios_memdevice_type_desc(uint_t); 1143 extern const char *smbios_memdevice_flag_name(uint_t); 1144 extern const char *smbios_memdevice_flag_desc(uint_t); 1145 1146 extern const char *smbios_port_conn_desc(uint_t); 1147 extern const char *smbios_port_type_desc(uint_t); 1148 1149 extern const char *smbios_processor_family_desc(uint_t); 1150 extern const char *smbios_processor_status_desc(uint_t); 1151 extern const char *smbios_processor_type_desc(uint_t); 1152 extern const char *smbios_processor_upgrade_desc(uint_t); 1153 1154 extern const char *smbios_slot_type_desc(uint_t); 1155 extern const char *smbios_slot_width_desc(uint_t); 1156 extern const char *smbios_slot_usage_desc(uint_t); 1157 extern const char *smbios_slot_length_desc(uint_t); 1158 extern const char *smbios_slot_ch1_desc(uint_t); 1159 extern const char *smbios_slot_ch1_name(uint_t); 1160 extern const char *smbios_slot_ch2_desc(uint_t); 1161 extern const char *smbios_slot_ch2_name(uint_t); 1162 1163 extern const char *smbios_type_desc(uint_t); 1164 extern const char *smbios_type_name(uint_t); 1165 1166 extern const char *smbios_system_wakeup_desc(uint_t); 1167 #endif /* !_KERNEL */ 1168 1169 #ifdef _KERNEL 1170 /* 1171 * For SMBIOS clients within the kernel itself, ksmbios is used to refer to 1172 * the kernel's current snapshot of the SMBIOS, if one exists, and the 1173 * ksmbios_flags tunable is the set of flags for use with smbios_open(). 1174 */ 1175 extern smbios_hdl_t *ksmbios; 1176 extern int ksmbios_flags; 1177 #endif /* _KERNEL */ 1178 1179 #ifdef __cplusplus 1180 } 1181 #endif 1182 1183 #endif /* _SYS_SMBIOS_H */ 1184