1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 /* 28 * This header file defines the interfaces available from the SMBIOS access 29 * library, libsmbios, and an equivalent kernel module. This API can be used 30 * to access DMTF SMBIOS data from a device, file, or raw memory buffer. 31 * This is NOT yet a public interface, although it may eventually become one in 32 * the fullness of time after we gain more experience with the interfaces. 33 * 34 * In the meantime, be aware that any program linked with this API in this 35 * release of Solaris is almost guaranteed to break in the next release. 36 * 37 * In short, do not user this header file or these routines for any purpose. 38 */ 39 40 #ifndef _SYS_SMBIOS_H 41 #define _SYS_SMBIOS_H 42 43 #include <sys/types.h> 44 45 #ifdef __cplusplus 46 extern "C" { 47 #endif 48 49 /* 50 * SMBIOS Structure Table Entry Point. See DSP0134 2.1.1 for more information. 51 * The structure table entry point is located by searching for the anchor. 52 */ 53 #pragma pack(1) 54 55 typedef struct smbios_entry { 56 char smbe_eanchor[4]; /* anchor tag (SMB_ENTRY_EANCHOR) */ 57 uint8_t smbe_ecksum; /* checksum of entry point structure */ 58 uint8_t smbe_elen; /* length in bytes of entry point */ 59 uint8_t smbe_major; /* major version of the SMBIOS spec */ 60 uint8_t smbe_minor; /* minor version of the SMBIOS spec */ 61 uint16_t smbe_maxssize; /* maximum size in bytes of a struct */ 62 uint8_t smbe_revision; /* entry point structure revision */ 63 uint8_t smbe_format[5]; /* entry point revision-specific data */ 64 char smbe_ianchor[5]; /* intermed. tag (SMB_ENTRY_IANCHOR) */ 65 uint8_t smbe_icksum; /* intermed. checksum */ 66 uint16_t smbe_stlen; /* length in bytes of structure table */ 67 uint32_t smbe_staddr; /* physical addr of structure table */ 68 uint16_t smbe_stnum; /* number of structure table entries */ 69 uint8_t smbe_bcdrev; /* BCD value representing DMI version */ 70 } smbios_entry_t; 71 72 #pragma pack() 73 74 #define SMB_ENTRY_EANCHOR "_SM_" /* structure table entry point anchor */ 75 #define SMB_ENTRY_EANCHORLEN 4 /* length of entry point anchor */ 76 #define SMB_ENTRY_IANCHOR "_DMI_" /* intermediate anchor string */ 77 #define SMB_ENTRY_IANCHORLEN 5 /* length of intermediate anchor */ 78 #define SMB_ENTRY_MAXLEN 255 /* maximum length of entry point */ 79 80 /* 81 * Structure type codes. The comments next to each type include an (R) note to 82 * indicate a structure that is required as of SMBIOS v2.3 and an (O) note to 83 * indicate a structure that is obsolete as of SMBIOS v2.3. 84 */ 85 #define SMB_TYPE_BIOS 0 /* BIOS information (R) */ 86 #define SMB_TYPE_SYSTEM 1 /* system information (R) */ 87 #define SMB_TYPE_BASEBOARD 2 /* base board */ 88 #define SMB_TYPE_CHASSIS 3 /* system enclosure or chassis (R) */ 89 #define SMB_TYPE_PROCESSOR 4 /* processor (R) */ 90 #define SMB_TYPE_MEMCTL 5 /* memory controller (O) */ 91 #define SMB_TYPE_MEMMOD 6 /* memory module (O) */ 92 #define SMB_TYPE_CACHE 7 /* processor cache (R) */ 93 #define SMB_TYPE_PORT 8 /* port connector */ 94 #define SMB_TYPE_SLOT 9 /* upgradeable system slot (R) */ 95 #define SMB_TYPE_OBDEVS 10 /* on-board devices */ 96 #define SMB_TYPE_OEMSTR 11 /* OEM string table */ 97 #define SMB_TYPE_SYSCONFSTR 12 /* system configuration string table */ 98 #define SMB_TYPE_LANG 13 /* BIOS language information */ 99 #define SMB_TYPE_GROUP 14 /* group associations */ 100 #define SMB_TYPE_EVENTLOG 15 /* system event log */ 101 #define SMB_TYPE_MEMARRAY 16 /* physical memory array (R) */ 102 #define SMB_TYPE_MEMDEVICE 17 /* memory device (R) */ 103 #define SMB_TYPE_MEMERR32 18 /* 32-bit memory error information */ 104 #define SMB_TYPE_MEMARRAYMAP 19 /* memory array mapped address (R) */ 105 #define SMB_TYPE_MEMDEVICEMAP 20 /* memory device mapped address (R) */ 106 #define SMB_TYPE_POINTDEV 21 /* built-in pointing device */ 107 #define SMB_TYPE_BATTERY 22 /* portable battery */ 108 #define SMB_TYPE_RESET 23 /* system reset settings */ 109 #define SMB_TYPE_SECURITY 24 /* hardware security settings */ 110 #define SMB_TYPE_POWERCTL 25 /* system power controls */ 111 #define SMB_TYPE_VPROBE 26 /* voltage probe */ 112 #define SMB_TYPE_COOLDEV 27 /* cooling device */ 113 #define SMB_TYPE_TPROBE 28 /* temperature probe */ 114 #define SMB_TYPE_IPROBE 29 /* current probe */ 115 #define SMB_TYPE_OOBRA 30 /* out-of-band remote access facility */ 116 #define SMB_TYPE_BIS 31 /* boot integrity services */ 117 #define SMB_TYPE_BOOT 32 /* system boot status (R) */ 118 #define SMB_TYPE_MEMERR64 33 /* 64-bit memory error information */ 119 #define SMB_TYPE_MGMTDEV 34 /* management device */ 120 #define SMB_TYPE_MGMTDEVCP 35 /* management device component */ 121 #define SMB_TYPE_MGMTDEVDATA 36 /* management device threshold data */ 122 #define SMB_TYPE_MEMCHAN 37 /* memory channel */ 123 #define SMB_TYPE_IPMIDEV 38 /* IPMI device information */ 124 #define SMB_TYPE_POWERSUP 39 /* system power supply */ 125 #define SMB_TYPE_INACTIVE 126 /* inactive table entry */ 126 #define SMB_TYPE_EOT 127 /* end of table */ 127 128 #define SMB_TYPE_OEM_LO 128 /* start of OEM-specific type range */ 129 #define SMB_TYPE_OEM_HI 256 /* end of OEM-specific type range */ 130 131 /* 132 * OEM string indicating "Platform Resource Management Specification" 133 * compliance. 134 */ 135 #define SMB_PRMS1 "SUNW-PRMS-1" 136 137 /* 138 * Some default values set by BIOS vendor 139 */ 140 #define SMB_DEFAULT1 "To Be Filled By O.E.M." 141 #define SMB_DEFAULT2 "Not Available" 142 143 /* 144 * SMBIOS Common Information. These structures do not correspond to anything 145 * in the SMBIOS specification, but allow library clients to more easily read 146 * information that is frequently encoded into the various SMBIOS structures. 147 */ 148 typedef struct smbios_info { 149 const char *smbi_manufacturer; /* manufacturer */ 150 const char *smbi_product; /* product name */ 151 const char *smbi_version; /* version */ 152 const char *smbi_serial; /* serial number */ 153 const char *smbi_asset; /* asset tag */ 154 const char *smbi_location; /* location tag */ 155 const char *smbi_part; /* part number */ 156 } smbios_info_t; 157 158 typedef struct smbios_version { 159 uint8_t smbv_major; /* version major number */ 160 uint8_t smbv_minor; /* version minor number */ 161 } smbios_version_t; 162 163 /* 164 * SMBIOS Bios Information. See DSP0134 Section 3.3.1 for more information. 165 * smbb_romsize is converted from the implementation format into bytes. 166 */ 167 typedef struct smbios_bios { 168 const char *smbb_vendor; /* bios vendor string */ 169 const char *smbb_version; /* bios version string */ 170 const char *smbb_reldate; /* bios release date */ 171 uint32_t smbb_segment; /* bios address segment location */ 172 uint32_t smbb_romsize; /* bios rom size in bytes */ 173 uint32_t smbb_runsize; /* bios image size in bytes */ 174 uint64_t smbb_cflags; /* bios characteristics */ 175 const uint8_t *smbb_xcflags; /* bios characteristics extensions */ 176 size_t smbb_nxcflags; /* number of smbb_xcflags[] bytes */ 177 smbios_version_t smbb_biosv; /* bios version */ 178 smbios_version_t smbb_ecfwv; /* bios embedded ctrl f/w version */ 179 } smbios_bios_t; 180 181 #define SMB_BIOSFL_RSV0 0x00000001 /* reserved bit zero */ 182 #define SMB_BIOSFL_RSV1 0x00000002 /* reserved bit one */ 183 #define SMB_BIOSFL_UNKNOWN 0x00000004 /* unknown */ 184 #define SMB_BIOSFL_BCNOTSUP 0x00000008 /* BIOS chars not supported */ 185 #define SMB_BIOSFL_ISA 0x00000010 /* ISA is supported */ 186 #define SMB_BIOSFL_MCA 0x00000020 /* MCA is supported */ 187 #define SMB_BIOSFL_EISA 0x00000040 /* EISA is supported */ 188 #define SMB_BIOSFL_PCI 0x00000080 /* PCI is supported */ 189 #define SMB_BIOSFL_PCMCIA 0x00000100 /* PCMCIA is supported */ 190 #define SMB_BIOSFL_PLUGNPLAY 0x00000200 /* Plug and Play is supported */ 191 #define SMB_BIOSFL_APM 0x00000400 /* APM is supported */ 192 #define SMB_BIOSFL_FLASH 0x00000800 /* BIOS is Flash Upgradeable */ 193 #define SMB_BIOSFL_SHADOW 0x00001000 /* BIOS shadowing is allowed */ 194 #define SMB_BIOSFL_VLVESA 0x00002000 /* VL-VESA is supported */ 195 #define SMB_BIOSFL_ESCD 0x00004000 /* ESCD support is available */ 196 #define SMB_BIOSFL_CDBOOT 0x00008000 /* Boot from CD is supported */ 197 #define SMB_BIOSFL_SELBOOT 0x00010000 /* Selectable Boot supported */ 198 #define SMB_BIOSFL_ROMSOCK 0x00020000 /* BIOS ROM is socketed */ 199 #define SMB_BIOSFL_PCMBOOT 0x00040000 /* Boot from PCMCIA supported */ 200 #define SMB_BIOSFL_EDD 0x00080000 /* EDD Spec is supported */ 201 #define SMB_BIOSFL_NEC9800 0x00100000 /* int 0x13 NEC 9800 floppy */ 202 #define SMB_BIOSFL_TOSHIBA 0x00200000 /* int 0x13 Toshiba floppy */ 203 #define SMB_BIOSFL_525_360K 0x00400000 /* int 0x13 5.25" 360K floppy */ 204 #define SMB_BIOSFL_525_12M 0x00800000 /* int 0x13 5.25" 1.2M floppy */ 205 #define SMB_BIOSFL_35_720K 0x01000000 /* int 0x13 3.5" 720K floppy */ 206 #define SMB_BIOSFL_35_288M 0x02000000 /* int 0x13 3.5" 2.88M floppy */ 207 #define SMB_BIOSFL_I5_PRINT 0x04000000 /* int 0x5 print screen svcs */ 208 #define SMB_BIOSFL_I9_KBD 0x08000000 /* int 0x9 8042 keyboard svcs */ 209 #define SMB_BIOSFL_I14_SER 0x10000000 /* int 0x14 serial svcs */ 210 #define SMB_BIOSFL_I17_PRINTER 0x20000000 /* int 0x17 printer svcs */ 211 #define SMB_BIOSFL_I10_CGA 0x40000000 /* int 0x10 CGA svcs */ 212 #define SMB_BIOSFL_NEC_PC98 0x80000000 /* NEC PC-98 */ 213 214 #define SMB_BIOSXB_1 0 /* bios extension byte 1 (3.3.1.2.1) */ 215 #define SMB_BIOSXB_2 1 /* bios extension byte 2 (3.3.1.2.2) */ 216 #define SMB_BIOSXB_BIOS_MAJ 2 /* bios major version */ 217 #define SMB_BIOSXB_BIOS_MIN 3 /* bios minor version */ 218 #define SMB_BIOSXB_ECFW_MAJ 4 /* extended ctlr f/w major version */ 219 #define SMB_BIOSXB_ECFW_MIN 5 /* extended ctlr f/w minor version */ 220 221 #define SMB_BIOSXB1_ACPI 0x01 /* ACPI is supported */ 222 #define SMB_BIOSXB1_USBL 0x02 /* USB legacy is supported */ 223 #define SMB_BIOSXB1_AGP 0x04 /* AGP is supported */ 224 #define SMB_BIOSXB1_I20 0x08 /* I2O boot is supported */ 225 #define SMB_BIOSXB1_LS120 0x10 /* LS-120 boot is supported */ 226 #define SMB_BIOSXB1_ATZIP 0x20 /* ATAPI ZIP drive boot is supported */ 227 #define SMB_BIOSXB1_1394 0x40 /* 1394 boot is supported */ 228 #define SMB_BIOSXB1_SMBAT 0x80 /* Smart Battery is supported */ 229 230 #define SMB_BIOSXB2_BBOOT 0x01 /* BIOS Boot Specification supported */ 231 #define SMB_BIOSXB2_FKNETSVC 0x02 /* F-key Network Svc boot supported */ 232 #define SMB_BIOSXB2_ETCDIST 0x04 /* Enable Targeted Content Distrib. */ 233 234 /* 235 * SMBIOS Bios Information. See DSP0134 Section 3.3.2 for more information. 236 * The current set of smbs_wakeup values is defined after the structure. 237 */ 238 typedef struct smbios_system { 239 const uint8_t *smbs_uuid; /* UUID byte array */ 240 uint8_t smbs_uuidlen; /* UUID byte array length */ 241 uint8_t smbs_wakeup; /* wake-up event */ 242 const char *smbs_sku; /* SKU number */ 243 const char *smbs_family; /* family */ 244 } smbios_system_t; 245 246 #define SMB_WAKEUP_RSV0 0x00 /* reserved */ 247 #define SMB_WAKEUP_OTHER 0x01 /* other */ 248 #define SMB_WAKEUP_UNKNOWN 0x02 /* unknown */ 249 #define SMB_WAKEUP_APM 0x03 /* APM timer */ 250 #define SMB_WAKEUP_MODEM 0x04 /* modem ring */ 251 #define SMB_WAKEUP_LAN 0x05 /* LAN remote */ 252 #define SMB_WAKEUP_SWITCH 0x06 /* power switch */ 253 #define SMB_WAKEUP_PCIPME 0x07 /* PCI PME# */ 254 #define SMB_WAKEUP_AC 0x08 /* AC power restored */ 255 256 /* 257 * SMBIOS Base Board description. See DSP0134 Section 3.3.3 for more 258 * information. smbb_flags and smbb_type definitions are below. 259 */ 260 typedef struct smbios_bboard { 261 id_t smbb_chassis; /* chassis containing this board */ 262 uint8_t smbb_flags; /* flags (see below) */ 263 uint8_t smbb_type; /* board type (see below) */ 264 } smbios_bboard_t; 265 266 #define SMB_BBFL_MOTHERBOARD 0x01 /* board is a motherboard */ 267 #define SMB_BBFL_NEEDAUX 0x02 /* auxiliary card or daughter req'd */ 268 #define SMB_BBFL_REMOVABLE 0x04 /* board is removable */ 269 #define SMB_BBFL_REPLACABLE 0x08 /* board is field-replacable */ 270 #define SMB_BBFL_HOTSWAP 0x10 /* board is hot-swappable */ 271 272 #define SMB_BBT_UNKNOWN 0x1 /* unknown */ 273 #define SMB_BBT_OTHER 0x2 /* other */ 274 #define SMB_BBT_SBLADE 0x3 /* server blade */ 275 #define SMB_BBT_CSWITCH 0x4 /* connectivity switch */ 276 #define SMB_BBT_SMM 0x5 /* system management module */ 277 #define SMB_BBT_PROC 0x6 /* processor module */ 278 #define SMB_BBT_IO 0x7 /* i/o module */ 279 #define SMB_BBT_MEM 0x8 /* memory module */ 280 #define SMB_BBT_DAUGHTER 0x9 /* daughterboard */ 281 #define SMB_BBT_MOTHER 0xA /* motherboard */ 282 #define SMB_BBT_PROCMEM 0xB /* processor/memory module */ 283 #define SMB_BBT_PROCIO 0xC /* processor/i/o module */ 284 #define SMB_BBT_INTER 0xD /* interconnect board */ 285 286 /* 287 * SMBIOS Chassis description. See DSP0134 Section 3.3.4 for more information. 288 * We move the lock bit of the type field into smbc_lock for easier processing. 289 * NOTE: We do not currently export the contained element data for each chassis 290 * as this seems useless: see DSP0134 3.3.4.4. It can be added if necessary. 291 */ 292 typedef struct smbios_chassis { 293 uint32_t smbc_oemdata; /* OEM-specific data */ 294 uint8_t smbc_lock; /* lock present? */ 295 uint8_t smbc_type; /* type */ 296 uint8_t smbc_bustate; /* boot-up state */ 297 uint8_t smbc_psstate; /* power supply state */ 298 uint8_t smbc_thstate; /* thermal state */ 299 uint8_t smbc_security; /* security status */ 300 uint8_t smbc_uheight; /* enclosure height in U's */ 301 uint8_t smbc_cords; /* number of power cords */ 302 uint8_t smbc_elems; /* number of element records */ 303 } smbios_chassis_t; 304 305 #define SMB_CHT_OTHER 0x01 /* other */ 306 #define SMB_CHT_UNKNOWN 0x02 /* unknown */ 307 #define SMB_CHT_DESKTOP 0x03 /* desktop */ 308 #define SMB_CHT_LPDESKTOP 0x04 /* low-profile desktop */ 309 #define SMB_CHT_PIZZA 0x05 /* pizza box */ 310 #define SMB_CHT_MINITOWER 0x06 /* mini-tower */ 311 #define SMB_CHT_TOWER 0x07 /* tower */ 312 #define SMB_CHT_PORTABLE 0x08 /* portable */ 313 #define SMB_CHT_LAPTOP 0x09 /* laptop */ 314 #define SMB_CHT_NOTEBOOK 0x0A /* notebook */ 315 #define SMB_CHT_HANDHELD 0x0B /* hand-held */ 316 #define SMB_CHT_DOCK 0x0C /* docking station */ 317 #define SMB_CHT_ALLIN1 0x0D /* all-in-one */ 318 #define SMB_CHT_SUBNOTE 0x0E /* sub-notebook */ 319 #define SMB_CHT_SPACESAVE 0x0F /* space-saving */ 320 #define SMB_CHT_LUNCHBOX 0x10 /* lunchbox */ 321 #define SMB_CHT_MAIN 0x11 /* main server chassis */ 322 #define SMB_CHT_EXPANSION 0x12 /* expansion chassis */ 323 #define SMB_CHT_SUB 0x13 /* sub-chassis */ 324 #define SMB_CHT_BUS 0x14 /* bus expansion chassis */ 325 #define SMB_CHT_PERIPHERAL 0x15 /* peripheral chassis */ 326 #define SMB_CHT_RAID 0x16 /* raid chassis */ 327 #define SMB_CHT_RACK 0x17 /* rack mount chassis */ 328 #define SMB_CHT_SEALED 0x18 /* sealed case pc */ 329 #define SMB_CHT_MULTI 0x19 /* multi-system chassis */ 330 #define SMB_CHT_CPCI 0x1A /* compact PCI */ 331 #define SMB_CHT_ATCA 0x1B /* advanced TCA */ 332 #define SMB_CHT_BLADE 0x1C /* blade */ 333 #define SMB_CHT_BLADEENC 0x1D /* blade enclosure */ 334 335 #define SMB_CHST_OTHER 0x01 /* other */ 336 #define SMB_CHST_UNKNOWN 0x02 /* unknown */ 337 #define SMB_CHST_SAFE 0x03 /* safe */ 338 #define SMB_CHST_WARNING 0x04 /* warning */ 339 #define SMB_CHST_CRITICAL 0x05 /* critical */ 340 #define SMB_CHST_NONREC 0x06 /* non-recoverable */ 341 342 #define SMB_CHSC_OTHER 0x01 /* other */ 343 #define SMB_CHSC_UNKNOWN 0x02 /* unknown */ 344 #define SMB_CHSC_NONE 0x03 /* none */ 345 #define SMB_CHSC_EILOCK 0x04 /* external interface locked out */ 346 #define SMB_CHSC_EIENAB 0x05 /* external interface enabled */ 347 348 /* 349 * SMBIOS Processor description. See DSP0134 Section 3.3.5 for more details. 350 * If the L1, L2, or L3 cache handle is -1, the cache information is unknown. 351 * If the handle refers to something of size 0, that type of cache is absent. 352 * 353 * NOTE: Although SMBIOS exports a 64-bit CPUID result, this value should not 354 * be used for any purpose other than BIOS debugging. Solaris itself computes 355 * its own CPUID value and applies knowledge of additional errata and processor 356 * specific CPUID variations, so this value should not be used for anything. 357 */ 358 typedef struct smbios_processor { 359 uint64_t smbp_cpuid; /* processor cpuid information */ 360 uint32_t smbp_family; /* processor family */ 361 uint8_t smbp_type; /* processor type (SMB_PRT_*) */ 362 uint8_t smbp_voltage; /* voltage (SMB_PRV_*) */ 363 uint8_t smbp_status; /* status (SMB_PRS_*) */ 364 uint8_t smbp_upgrade; /* upgrade (SMB_PRU_*) */ 365 uint32_t smbp_clkspeed; /* external clock speed in MHz */ 366 uint32_t smbp_maxspeed; /* maximum speed in MHz */ 367 uint32_t smbp_curspeed; /* current speed in MHz */ 368 id_t smbp_l1cache; /* L1 cache handle */ 369 id_t smbp_l2cache; /* L2 cache handle */ 370 id_t smbp_l3cache; /* L3 cache handle */ 371 } smbios_processor_t; 372 373 #define SMB_PRT_OTHER 0x01 /* other */ 374 #define SMB_PRT_UNKNOWN 0x02 /* unknown */ 375 #define SMB_PRT_CENTRAL 0x03 /* central processor */ 376 #define SMB_PRT_MATH 0x04 /* math processor */ 377 #define SMB_PRT_DSP 0x05 /* DSP processor */ 378 #define SMB_PRT_VIDEO 0x06 /* video processor */ 379 380 #define SMB_PRV_LEGACY(v) (!((v) & 0x80)) /* legacy voltage mode */ 381 #define SMB_PRV_FIXED(v) ((v) & 0x80) /* fixed voltage mode */ 382 383 #define SMB_PRV_5V 0x01 /* 5V is supported */ 384 #define SMB_PRV_33V 0x02 /* 3.3V is supported */ 385 #define SMB_PRV_29V 0x04 /* 2.9V is supported */ 386 387 #define SMB_PRV_VOLTAGE(v) ((v) & 0x7f) 388 389 #define SMB_PRSTATUS_PRESENT(s) ((s) & 0x40) /* socket is populated */ 390 #define SMB_PRSTATUS_STATUS(s) ((s) & 0x07) /* status (see below) */ 391 392 #define SMB_PRS_UNKNOWN 0x0 /* unknown */ 393 #define SMB_PRS_ENABLED 0x1 /* enabled */ 394 #define SMB_PRS_BDISABLED 0x2 /* disabled in bios user setup */ 395 #define SMB_PRS_PDISABLED 0x3 /* disabled in bios from post error */ 396 #define SMB_PRS_IDLE 0x4 /* waiting to be enabled */ 397 #define SMB_PRS_OTHER 0x7 /* other */ 398 399 #define SMB_PRU_OTHER 0x01 /* other */ 400 #define SMB_PRU_UNKNOWN 0x02 /* unknown */ 401 #define SMB_PRU_DAUGHTER 0x03 /* daughter board */ 402 #define SMB_PRU_ZIF 0x04 /* ZIF socket */ 403 #define SMB_PRU_PIGGY 0x05 /* replaceable piggy back */ 404 #define SMB_PRU_NONE 0x06 /* none */ 405 #define SMB_PRU_LIF 0x07 /* LIF socket */ 406 #define SMB_PRU_SLOT1 0x08 /* slot 1 */ 407 #define SMB_PRU_SLOT2 0x09 /* slot 2 */ 408 #define SMB_PRU_370PIN 0x0A /* 370-pin socket */ 409 #define SMB_PRU_SLOTA 0x0B /* slot A */ 410 #define SMB_PRU_SLOTM 0x0C /* slot M */ 411 #define SMB_PRU_423 0x0D /* socket 423 */ 412 #define SMB_PRU_A 0x0E /* socket A (socket 462) */ 413 #define SMB_PRU_478 0x0F /* socket 478 */ 414 #define SMB_PRU_754 0x10 /* socket 754 */ 415 #define SMB_PRU_940 0x11 /* socket 940 */ 416 #define SMB_PRU_939 0x12 /* socket 939 */ 417 #define SMB_PRU_MPGA604 0x13 /* mPGA604 */ 418 #define SMB_PRU_LGA771 0x14 /* LGA771 */ 419 #define SMB_PRU_LGA775 0x15 /* LGA775 */ 420 #define SMB_PRU_S1 0x16 /* socket S1 */ 421 #define SMB_PRU_AM2 0x17 /* socket AM2 */ 422 #define SMB_PRU_F 0x18 /* socket F */ 423 424 #define SMB_PRF_OTHER 0x01 /* other */ 425 #define SMB_PRF_UNKNOWN 0x02 /* unknown */ 426 #define SMB_PRF_8086 0x03 /* 8086 */ 427 #define SMB_PRF_80286 0x04 /* 80286 */ 428 #define SMB_PRF_I386 0x05 /* Intel 386 */ 429 #define SMB_PRF_I486 0x06 /* Intel 486 */ 430 #define SMB_PRF_8087 0x07 /* 8087 */ 431 #define SMB_PRF_80287 0x08 /* 80287 */ 432 #define SMB_PRF_80387 0x09 /* 80387 */ 433 #define SMB_PRF_80487 0x0A /* 80487 */ 434 #define SMB_PRF_PENTIUM 0x0B /* Pentium Family */ 435 #define SMB_PRF_PENTIUMPRO 0x0C /* Pentium Pro */ 436 #define SMB_PRF_PENTIUMII 0x0D /* Pentium II */ 437 #define SMB_PRF_PENTIUM_MMX 0x0E /* Pentium w/ MMX */ 438 #define SMB_PRF_CELERON 0x0F /* Celeron */ 439 #define SMB_PRF_PENTIUMII_XEON 0x10 /* Pentium II Xeon */ 440 #define SMB_PRF_PENTIUMIII 0x11 /* Pentium III */ 441 #define SMB_PRF_M1 0x12 /* M1 */ 442 #define SMB_PRF_M2 0x13 /* M2 */ 443 #define SMB_PRF_DURON 0x18 /* AMD Duron */ 444 #define SMB_PRF_K5 0x19 /* K5 */ 445 #define SMB_PRF_K6 0x1A /* K6 */ 446 #define SMB_PRF_K6_2 0x1B /* K6-2 */ 447 #define SMB_PRF_K6_3 0x1C /* K6-3 */ 448 #define SMB_PRF_ATHLON 0x1D /* Athlon */ 449 #define SMB_PRF_2900 0x1E /* AMD 2900 */ 450 #define SMB_PRF_K6_2PLUS 0x1F /* K6-2+ */ 451 #define SMB_PRF_PPC 0x20 /* PowerPC */ 452 #define SMB_PRF_PPC_601 0x21 /* PowerPC 601 */ 453 #define SMB_PRF_PPC_603 0x22 /* PowerPC 603 */ 454 #define SMB_PRF_PPC_603PLUS 0x23 /* PowerPC 603+ */ 455 #define SMB_PRF_PPC_604 0x24 /* PowerPC 604 */ 456 #define SMB_PRF_PPC_620 0x25 /* PowerPC 620 */ 457 #define SMB_PRF_PPC_704 0x26 /* PowerPC x704 */ 458 #define SMB_PRF_PPC_750 0x27 /* PowerPC 750 */ 459 #define SMB_PRF_ALPHA 0x30 /* Alpha */ 460 #define SMB_PRF_ALPHA_21064 0x31 /* Alpha 21064 */ 461 #define SMB_PRF_ALPHA_21066 0x32 /* Alpha 21066 */ 462 #define SMB_PRF_ALPHA_21164 0x33 /* Alpha 21164 */ 463 #define SMB_PRF_ALPHA_21164PC 0x34 /* Alpha 21164PC */ 464 #define SMB_PRF_ALPHA_21164A 0x35 /* Alpha 21164a */ 465 #define SMB_PRF_ALPHA_21264 0x36 /* Alpha 21264 */ 466 #define SMB_PRF_ALPHA_21364 0x37 /* Alpha 21364 */ 467 #define SMB_PRF_MIPS 0x40 /* MIPS */ 468 #define SMB_PRF_MIPS_R4000 0x41 /* MIPS R4000 */ 469 #define SMB_PRF_MIPS_R4200 0x42 /* MIPS R4200 */ 470 #define SMB_PRF_MIPS_R4400 0x43 /* MIPS R4400 */ 471 #define SMB_PRF_MIPS_R4600 0x44 /* MIPS R4600 */ 472 #define SMB_PRF_MIPS_R10000 0x45 /* MIPS R10000 */ 473 #define SMB_PRF_SPARC 0x50 /* SPARC */ 474 #define SMB_PRF_SUPERSPARC 0x51 /* SuperSPARC */ 475 #define SMB_PRF_MICROSPARCII 0x52 /* microSPARC II */ 476 #define SMB_PRF_MICROSPARCIIep 0x53 /* microSPARC IIep */ 477 #define SMB_PRF_ULTRASPARC 0x54 /* UltraSPARC */ 478 #define SMB_PRF_USII 0x55 /* UltraSPARC II */ 479 #define SMB_PRF_USIIi 0x56 /* UltraSPARC IIi */ 480 #define SMB_PRF_USIII 0x57 /* UltraSPARC III */ 481 #define SMB_PRF_USIIIi 0x58 /* UltraSPARC IIIi */ 482 #define SMB_PRF_68040 0x60 /* 68040 */ 483 #define SMB_PRF_68XXX 0x61 /* 68XXX */ 484 #define SMB_PRF_68000 0x62 /* 68000 */ 485 #define SMB_PRF_68010 0x63 /* 68010 */ 486 #define SMB_PRF_68020 0x64 /* 68020 */ 487 #define SMB_PRF_68030 0x65 /* 68030 */ 488 #define SMB_PRF_HOBBIT 0x70 /* Hobbit */ 489 #define SMB_PRF_TM5000 0x78 /* Crusoe TM5000 */ 490 #define SMB_PRF_TM3000 0x79 /* Crusoe TM3000 */ 491 #define SMB_PRF_TM8000 0x7A /* Efficeon TM8000 */ 492 #define SMB_PRF_WEITEK 0x80 /* Weitek */ 493 #define SMB_PRF_ITANIC 0x82 /* Itanium */ 494 #define SMB_PRF_ATHLON64 0x83 /* Athlon64 */ 495 #define SMB_PRF_OPTERON 0x84 /* Opteron */ 496 #define SMB_PRF_PA 0x90 /* PA-RISC */ 497 #define SMB_PRF_PA8500 0x91 /* PA-RISC 8500 */ 498 #define SMB_PRF_PA8000 0x92 /* PA-RISC 8000 */ 499 #define SMB_PRF_PA7300LC 0x93 /* PA-RISC 7300LC */ 500 #define SMB_PRF_PA7200 0x94 /* PA-RISC 7200 */ 501 #define SMB_PRF_PA7100LC 0x95 /* PA-RISC 7100LC */ 502 #define SMB_PRF_PA7100 0x96 /* PA-RISC 7100 */ 503 #define SMB_PRF_V30 0xA0 /* V30 */ 504 #define SMB_PRF_PENTIUMIII_XEON 0xB0 /* Pentium III Xeon */ 505 #define SMB_PRF_PENTIUMIII_SS 0xB1 /* Pentium III with SpeedStep */ 506 #define SMB_PRF_P4 0xB2 /* Pentium 4 */ 507 #define SMB_PRF_XEON 0xB3 /* Intel Xeon */ 508 #define SMB_PRF_AS400 0xB4 /* AS400 */ 509 #define SMB_PRF_XEON_MP 0xB5 /* Intel Xeon MP */ 510 #define SMB_PRF_ATHLON_XP 0xB6 /* AMD Athlon XP */ 511 #define SMB_PRF_ATHLON_MP 0xB7 /* AMD Athlon MP */ 512 #define SMB_PRF_ITANIC2 0xB8 /* Itanium 2 */ 513 #define SMB_PRF_PENTIUM_M 0xB9 /* Pentium M */ 514 #define SMB_PRF_CELERON_D 0xBA /* Celeron D */ 515 #define SMB_PRF_PENTIUM_D 0xBB /* Pentium D */ 516 #define SMB_PRF_PENTIUM_EE 0xBC /* Pentium Extreme Edition */ 517 #define SMB_PRF_CORE 0xBD /* Intel Core */ 518 #define SMB_PRF_CORE2 0xBF /* Intel Core 2 */ 519 #define SMB_PRF_IBM390 0xC8 /* IBM 390 */ 520 #define SMB_PRF_G4 0xC9 /* G4 */ 521 #define SMB_PRF_G5 0xCA /* G5 */ 522 #define SMB_PRF_ESA390 0xCB /* ESA390 */ 523 #define SMB_PRF_ZARCH 0xCC /* z/Architecture */ 524 #define SMB_PRF_C7M 0xD2 /* VIA C7-M */ 525 #define SMB_PRF_C7D 0xD3 /* VIA C7-D */ 526 #define SMB_PRF_C7 0xD4 /* VIA C7 */ 527 #define SMB_PRF_EDEN 0xD5 /* VIA Eden */ 528 #define SMB_PRF_I860 0xFA /* i860 */ 529 #define SMB_PRF_I960 0xFB /* i960 */ 530 #define SMB_PRF_SH3 0x104 /* SH-3 */ 531 #define SMB_PRF_SH4 0x105 /* SH-4 */ 532 #define SMB_PRF_ARM 0x118 /* ARM */ 533 #define SMB_PRF_SARM 0x119 /* StrongARM */ 534 #define SMB_PRF_6X86 0x12C /* 6x86 */ 535 #define SMB_PRF_MEDIAGX 0x12D /* MediaGX */ 536 #define SMB_PRF_MII 0x12E /* MII */ 537 #define SMB_PRF_WINCHIP 0x140 /* WinChip */ 538 #define SMB_PRF_DSP 0x15E /* DSP */ 539 #define SMB_PRF_VIDEO 0x1F4 /* Video Processor */ 540 541 /* 542 * SMBIOS Cache Information. See DSP0134 Section 3.3.8 for more information. 543 * If smba_size is zero, this indicates the specified cache is not present. 544 */ 545 typedef struct smbios_cache { 546 uint32_t smba_maxsize; /* maximum installed size in bytes */ 547 uint32_t smba_size; /* installed size in bytes */ 548 uint16_t smba_stype; /* supported SRAM types (SMB_CAT_*) */ 549 uint16_t smba_ctype; /* current SRAM type (SMB_CAT_*) */ 550 uint8_t smba_speed; /* speed in nanoseconds */ 551 uint8_t smba_etype; /* error correction type (SMB_CAE_*) */ 552 uint8_t smba_ltype; /* logical cache type (SMB_CAG_*) */ 553 uint8_t smba_assoc; /* associativity (SMB_CAA_*) */ 554 uint8_t smba_level; /* cache level */ 555 uint8_t smba_mode; /* cache mode (SMB_CAM_*) */ 556 uint8_t smba_location; /* cache location (SMB_CAL_*) */ 557 uint8_t smba_flags; /* cache flags (SMB_CAF_*) */ 558 } smbios_cache_t; 559 560 #define SMB_CAT_OTHER 0x0001 /* other */ 561 #define SMB_CAT_UNKNOWN 0x0002 /* unknown */ 562 #define SMB_CAT_NONBURST 0x0004 /* non-burst */ 563 #define SMB_CAT_BURST 0x0008 /* burst */ 564 #define SMB_CAT_PBURST 0x0010 /* pipeline burst */ 565 #define SMB_CAT_SYNC 0x0020 /* synchronous */ 566 #define SMB_CAT_ASYNC 0x0040 /* asynchronous */ 567 568 #define SMB_CAE_OTHER 0x01 /* other */ 569 #define SMB_CAE_UNKNOWN 0x02 /* unknown */ 570 #define SMB_CAE_NONE 0x03 /* none */ 571 #define SMB_CAE_PARITY 0x04 /* parity */ 572 #define SMB_CAE_SBECC 0x05 /* single-bit ECC */ 573 #define SMB_CAE_MBECC 0x06 /* multi-bit ECC */ 574 575 #define SMB_CAG_OTHER 0x01 /* other */ 576 #define SMB_CAG_UNKNOWN 0x02 /* unknown */ 577 #define SMB_CAG_INSTR 0x03 /* instruction */ 578 #define SMB_CAG_DATA 0x04 /* data */ 579 #define SMB_CAG_UNIFIED 0x05 /* unified */ 580 581 #define SMB_CAA_OTHER 0x01 /* other */ 582 #define SMB_CAA_UNKNOWN 0x02 /* unknown */ 583 #define SMB_CAA_DIRECT 0x03 /* direct mapped */ 584 #define SMB_CAA_2WAY 0x04 /* 2-way set associative */ 585 #define SMB_CAA_4WAY 0x05 /* 4-way set associative */ 586 #define SMB_CAA_FULL 0x06 /* fully associative */ 587 #define SMB_CAA_8WAY 0x07 /* 8-way set associative */ 588 #define SMB_CAA_16WAY 0x08 /* 16-way set associative */ 589 590 #define SMB_CAM_WT 0x00 /* write-through */ 591 #define SMB_CAM_WB 0x01 /* write-back */ 592 #define SMB_CAM_VARY 0x02 /* varies by address */ 593 #define SMB_CAM_UNKNOWN 0x03 /* unknown */ 594 595 #define SMB_CAL_INTERNAL 0x00 /* internal */ 596 #define SMB_CAL_EXTERNAL 0x01 /* external */ 597 #define SMB_CAL_RESERVED 0x02 /* reserved */ 598 #define SMB_CAL_UNKNOWN 0x03 /* unknown */ 599 600 #define SMB_CAF_ENABLED 0x01 /* enabled at boot time */ 601 #define SMB_CAF_SOCKETED 0x02 /* cache is socketed */ 602 603 /* 604 * SMBIOS Port Information. See DSP0134 Section 3.3.9 for more information. 605 * The internal reference designator string is also mapped to the location. 606 */ 607 typedef struct smbios_port { 608 const char *smbo_iref; /* internal reference designator */ 609 const char *smbo_eref; /* external reference designator */ 610 uint8_t smbo_itype; /* internal connector type (SMB_POC_*) */ 611 uint8_t smbo_etype; /* external connector type (SMB_POC_*) */ 612 uint8_t smbo_ptype; /* port type (SMB_POT_*) */ 613 uint8_t smbo_pad; /* padding */ 614 } smbios_port_t; 615 616 #define SMB_POC_NONE 0x00 /* none */ 617 #define SMB_POC_CENT 0x01 /* Centronics */ 618 #define SMB_POC_MINICENT 0x02 /* Mini-Centronics */ 619 #define SMB_POC_PROPRIETARY 0x03 /* proprietary */ 620 #define SMB_POC_DB25M 0x04 /* DB-25 pin male */ 621 #define SMB_POC_DB25F 0x05 /* DB-25 pin female */ 622 #define SMB_POC_DB15M 0x06 /* DB-15 pin male */ 623 #define SMB_POC_DB15F 0x07 /* DB-15 pin female */ 624 #define SMB_POC_DB9M 0x08 /* DB-9 pin male */ 625 #define SMB_POC_DB9F 0x09 /* DB-9 pin female */ 626 #define SMB_POC_RJ11 0x0A /* RJ-11 */ 627 #define SMB_POC_RJ45 0x0B /* RJ-45 */ 628 #define SMB_POC_MINISCSI 0x0C /* 50-pin MiniSCSI */ 629 #define SMB_POC_MINIDIN 0x0D /* Mini-DIN */ 630 #define SMB_POC_MICRODIN 0x0E /* Micro-DIN */ 631 #define SMB_POC_PS2 0x0F /* PS/2 */ 632 #define SMB_POC_IR 0x10 /* Infrared */ 633 #define SMB_POC_HPHIL 0x11 /* HP-HIL */ 634 #define SMB_POC_USB 0x12 /* USB */ 635 #define SMB_POC_SSA 0x13 /* SSA SCSI */ 636 #define SMB_POC_DIN8M 0x14 /* Circular DIN-8 male */ 637 #define SMB_POC_DIN8F 0x15 /* Circular DIN-8 female */ 638 #define SMB_POC_OBIDE 0x16 /* on-board IDE */ 639 #define SMB_POC_OBFLOPPY 0x17 /* on-board floppy */ 640 #define SMB_POC_DI9 0x18 /* 9p dual inline (p10 cut) */ 641 #define SMB_POC_DI25 0x19 /* 25p dual inline (p26 cut) */ 642 #define SMB_POC_DI50 0x1A /* 50p dual inline */ 643 #define SMB_POC_DI68 0x1B /* 68p dual inline */ 644 #define SMB_POC_CDROM 0x1C /* on-board sound from CDROM */ 645 #define SMB_POC_MINI14 0x1D /* Mini-Centronics Type 14 */ 646 #define SMB_POC_MINI26 0x1E /* Mini-Centronics Type 26 */ 647 #define SMB_POC_MINIJACK 0x1F /* Mini-jack (headphones) */ 648 #define SMB_POC_BNC 0x20 /* BNC */ 649 #define SMB_POC_1394 0x21 /* 1394 */ 650 #define SMB_POC_PC98 0xA0 /* PC-98 */ 651 #define SMB_POC_PC98HR 0xA1 /* PC-98Hireso */ 652 #define SMB_POC_PCH98 0xA2 /* PC-H98 */ 653 #define SMB_POC_PC98NOTE 0xA3 /* PC-98Note */ 654 #define SMB_POC_PC98FULL 0xA4 /* PC-98Full */ 655 #define SMB_POC_OTHER 0xFF /* other */ 656 657 #define SMB_POT_NONE 0x00 /* none */ 658 #define SMB_POT_PP_XTAT 0x01 /* Parallel Port XT/AT compat */ 659 #define SMB_POT_PP_PS2 0x02 /* Parallel Port PS/2 */ 660 #define SMB_POT_PP_ECP 0x03 /* Parallel Port ECP */ 661 #define SMB_POT_PP_EPP 0x04 /* Parallel Port EPP */ 662 #define SMB_POT_PP_ECPEPP 0x05 /* Parallel Port ECP/EPP */ 663 #define SMB_POT_SP_XTAT 0x06 /* Serial Port XT/AT compat */ 664 #define SMB_POT_SP_16450 0x07 /* Serial Port 16450 compat */ 665 #define SMB_POT_SP_16550 0x08 /* Serial Port 16550 compat */ 666 #define SMB_POT_SP_16550A 0x09 /* Serial Port 16550A compat */ 667 #define SMB_POT_SCSI 0x0A /* SCSI port */ 668 #define SMB_POT_MIDI 0x0B /* MIDI port */ 669 #define SMB_POT_JOYSTICK 0x0C /* Joystick port */ 670 #define SMB_POT_KEYBOARD 0x0D /* Keyboard port */ 671 #define SMB_POT_MOUSE 0x0E /* Mouse port */ 672 #define SMB_POT_SSA 0x0F /* SSA SCSI */ 673 #define SMB_POT_USB 0x10 /* USB */ 674 #define SMB_POT_FIREWIRE 0x11 /* FireWrite (IEEE P1394) */ 675 #define SMB_POT_PCMII 0x12 /* PCMCIA Type II */ 676 #define SMB_POT_PCMIIa 0x13 /* PCMCIA Type II (alternate) */ 677 #define SMB_POT_PCMIII 0x14 /* PCMCIA Type III */ 678 #define SMB_POT_CARDBUS 0x15 /* Cardbus */ 679 #define SMB_POT_ACCESS 0x16 /* Access Bus Port */ 680 #define SMB_POT_SCSI2 0x17 /* SCSI II */ 681 #define SMB_POT_SCSIW 0x18 /* SCSI Wide */ 682 #define SMB_POT_PC98 0x19 /* PC-98 */ 683 #define SMB_POT_PC98HR 0x1A /* PC-98Hireso */ 684 #define SMB_POT_PCH98 0x1B /* PC-H98 */ 685 #define SMB_POT_VIDEO 0x1C /* Video port */ 686 #define SMB_POT_AUDIO 0x1D /* Audio port */ 687 #define SMB_POT_MODEM 0x1E /* Modem port */ 688 #define SMB_POT_NETWORK 0x1F /* Network port */ 689 #define SMB_POT_SATA 0x20 /* SATA */ 690 #define SMB_POT_SAS 0x21 /* SAS */ 691 #define SMB_POT_8251 0xA0 /* 8251 compatible */ 692 #define SMB_POT_8251F 0xA1 /* 8251 FIFO compatible */ 693 #define SMB_POT_OTHER 0xFF /* other */ 694 695 /* 696 * SMBIOS Slot Information. See DSP0134 Section 3.3.10 for more information. 697 * See DSP0134 3.3.10.5 for how to interpret the value of smbl_id. 698 */ 699 typedef struct smbios_slot { 700 const char *smbl_name; /* reference designation */ 701 uint8_t smbl_type; /* slot type */ 702 uint8_t smbl_width; /* slot data bus width */ 703 uint8_t smbl_usage; /* current usage */ 704 uint8_t smbl_length; /* slot length */ 705 uint16_t smbl_id; /* slot ID */ 706 uint8_t smbl_ch1; /* slot characteristics 1 */ 707 uint8_t smbl_ch2; /* slot characteristics 2 */ 708 } smbios_slot_t; 709 710 #define SMB_SLT_OTHER 0x01 /* other */ 711 #define SMB_SLT_UNKNOWN 0x02 /* unknown */ 712 #define SMB_SLT_ISA 0x03 /* ISA */ 713 #define SMB_SLT_MCA 0x04 /* MCA */ 714 #define SMB_SLT_EISA 0x05 /* EISA */ 715 #define SMB_SLT_PCI 0x06 /* PCI */ 716 #define SMB_SLT_PCMCIA 0x07 /* PCMCIA */ 717 #define SMB_SLT_VLVESA 0x08 /* VL-VESA */ 718 #define SMB_SLT_PROPRIETARY 0x09 /* proprietary */ 719 #define SMB_SLT_PROC 0x0A /* processor card slot */ 720 #define SMB_SLT_MEM 0x0B /* proprietary memory card slot */ 721 #define SMB_SLT_IOR 0x0C /* I/O riser card slot */ 722 #define SMB_SLT_NUBUS 0x0D /* NuBus */ 723 #define SMB_SLT_PCI66 0x0E /* PCI (66MHz capable) */ 724 #define SMB_SLT_AGP 0x0F /* AGP */ 725 #define SMB_SLT_AGP2X 0x10 /* AGP 2X */ 726 #define SMB_SLT_AGP4X 0x11 /* AGP 4X */ 727 #define SMB_SLT_PCIX 0x12 /* PCI-X */ 728 #define SMB_SLT_AGP8X 0x13 /* AGP 8X */ 729 #define SMB_SLT_PC98_C20 0xA0 /* PC-98/C20 */ 730 #define SMB_SLT_PC98_C24 0xA1 /* PC-98/C24 */ 731 #define SMB_SLT_PC98_E 0xA2 /* PC-98/E */ 732 #define SMB_SLT_PC98_LB 0xA3 /* PC-98/Local Bus */ 733 #define SMB_SLT_PC98_C 0xA4 /* PC-98/Card */ 734 #define SMB_SLT_PCIE 0xA5 /* PCI Express */ 735 #define SMB_SLT_PCIE1 0xA6 /* PCI Express x1 */ 736 #define SMB_SLT_PCIE2 0xA7 /* PCI Express x2 */ 737 #define SMB_SLT_PCIE4 0xA8 /* PCI Express x4 */ 738 #define SMB_SLT_PCIE8 0xA9 /* PCI Express x8 */ 739 #define SMB_SLT_PCIE16 0xAA /* PCI Express x16 */ 740 741 #define SMB_SLW_OTHER 0x01 /* other */ 742 #define SMB_SLW_UNKNOWN 0x02 /* unknown */ 743 #define SMB_SLW_8 0x03 /* 8 bit */ 744 #define SMB_SLW_16 0x04 /* 16 bit */ 745 #define SMB_SLW_32 0x05 /* 32 bit */ 746 #define SMB_SLW_64 0x06 /* 64 bit */ 747 #define SMB_SLW_128 0x07 /* 128 bit */ 748 #define SMB_SLW_1X 0x08 /* 1x or x1 */ 749 #define SMB_SLW_2X 0x09 /* 2x or x2 */ 750 #define SMB_SLW_4X 0x0A /* 4x or x4 */ 751 #define SMB_SLW_8X 0x0B /* 8x or x8 */ 752 #define SMB_SLW_12X 0x0C /* 12x or x12 */ 753 #define SMB_SLW_16X 0x0D /* 16x or x16 */ 754 #define SMB_SLW_32X 0x0E /* 32x or x32 */ 755 756 #define SMB_SLU_OTHER 0x01 /* other */ 757 #define SMB_SLU_UNKNOWN 0x02 /* unknown */ 758 #define SMB_SLU_AVAIL 0x03 /* available */ 759 #define SMB_SLU_INUSE 0x04 /* in use */ 760 761 #define SMB_SLL_OTHER 0x01 /* other */ 762 #define SMB_SLL_UNKNOWN 0x02 /* unknown */ 763 #define SMB_SLL_SHORT 0x03 /* short length */ 764 #define SMB_SLL_LONG 0x04 /* long length */ 765 766 #define SMB_SLCH1_UNKNOWN 0x01 /* characteristics unknown */ 767 #define SMB_SLCH1_5V 0x02 /* provides 5.0V */ 768 #define SMB_SLCH1_33V 0x04 /* provides 3.3V */ 769 #define SMB_SLCH1_SHARED 0x08 /* opening shared with other slot */ 770 #define SMB_SLCH1_PC16 0x10 /* slot supports PC Card-16 */ 771 #define SMB_SLCH1_PCCB 0x20 /* slot supports CardBus */ 772 #define SMB_SLCH1_PCZV 0x40 /* slot supports Zoom Video */ 773 #define SMB_SLCH1_PCMRR 0x80 /* slot supports Modem Ring Resume */ 774 775 #define SMB_SLCH2_PME 0x01 /* slot supports PME# signal */ 776 #define SMB_SLCH2_HOTPLUG 0x02 /* slot supports hot-plug devices */ 777 #define SMB_SLCH2_SMBUS 0x04 /* slot supports SMBus signal */ 778 779 /* 780 * SMBIOS On-Board Device Information. See DSP0134 Section 3.3.11 for more 781 * information. Any number of on-board device sections may be present, each 782 * containing one or more records. The smbios_info_obdevs() function permits 783 * the caller to retrieve one or more of the records from a given section. 784 */ 785 typedef struct smbios_obdev { 786 const char *smbd_name; /* description string for this device */ 787 uint8_t smbd_type; /* type code (SMB_OBT_*) */ 788 uint8_t smbd_enabled; /* boolean (device is enabled) */ 789 } smbios_obdev_t; 790 791 #define SMB_OBT_OTHER 0x01 /* other */ 792 #define SMB_OBT_UNKNOWN 0x02 /* unknown */ 793 #define SMB_OBT_VIDEO 0x03 /* video */ 794 #define SMB_OBT_SCSI 0x04 /* scsi */ 795 #define SMB_OBT_ETHERNET 0x05 /* ethernet */ 796 #define SMB_OBT_TOKEN 0x06 /* token ring */ 797 #define SMB_OBT_SOUND 0x07 /* sound */ 798 #define SMB_OBT_PATA 0x08 /* pata */ 799 #define SMB_OBT_SATA 0x09 /* sata */ 800 #define SMB_OBT_SAS 0x0A /* sas */ 801 802 /* 803 * SMBIOS BIOS Language Information. See DSP0134 Section 3.3.14 for more 804 * information. The smbios_info_strtab() function can be applied using a 805 * count of smbla_num to retrieve the other possible language settings. 806 */ 807 typedef struct smbios_lang { 808 const char *smbla_cur; /* current language setting */ 809 uint_t smbla_fmt; /* language name format (see below) */ 810 uint_t smbla_num; /* number of installed languages */ 811 } smbios_lang_t; 812 813 #define SMB_LFMT_LONG 0 /* <ISO639>|<ISO3166>|Encoding Method */ 814 #define SMB_LFMT_SHORT 1 /* <ISO930><ISO3166> */ 815 816 /* 817 * SMBIOS System Event Log Information. See DSP0134 Section 3.3.16 for more 818 * information. Accessing the event log itself requires additional interfaces. 819 */ 820 typedef struct smbios_evtype { 821 uint8_t smbevt_ltype; /* log type */ 822 uint8_t smbevt_dtype; /* variable data format type */ 823 } smbios_evtype_t; 824 825 typedef struct smbios_evlog { 826 size_t smbev_size; /* size in bytes of log area */ 827 size_t smbev_hdr; /* offset or index of header */ 828 size_t smbev_data; /* offset or index of data */ 829 uint8_t smbev_method; /* data access method (see below) */ 830 uint8_t smbev_flags; /* flags (see below) */ 831 uint8_t smbev_format; /* log header format (see below) */ 832 uint8_t smbev_pad; /* padding */ 833 uint32_t smbev_token; /* data update change token */ 834 union { 835 struct { 836 uint16_t evi_iaddr; /* index address */ 837 uint16_t evi_daddr; /* data address */ 838 } eva_io; /* i/o address for SMB_EVM_XxY */ 839 uint32_t eva_addr; /* address for SMB_EVM_MEM32 */ 840 uint16_t eva_gpnv; /* handle for SMB_EVM_GPNV */ 841 } smbev_addr; 842 uint32_t smbev_typec; /* number of type descriptors */ 843 const smbios_evtype_t *smbev_typev; /* type descriptor array */ 844 } smbios_evlog_t; 845 846 #define SMB_EVM_1x1i_1x1d 0 /* I/O: 1 1b idx port, 1 1b data port */ 847 #define SMB_EVM_2x1i_1x1d 1 /* I/O: 2 1b idx port, 1 1b data port */ 848 #define SMB_EVM_1x2i_1x1d 2 /* I/O: 1 2b idx port, 1 1b data port */ 849 #define SMB_EVM_MEM32 3 /* Memory-Mapped 32-bit Physical Addr */ 850 #define SMB_EVM_GPNV 4 /* GP Non-Volatile API Access */ 851 852 #define SMB_EVFL_VALID 0x1 /* log area valid */ 853 #define SMB_EVFL_FULL 0x2 /* log area full */ 854 855 #define SMB_EVHF_NONE 0 /* no log headers used */ 856 #define SMB_EVHF_F1 1 /* DMTF log header type 1 */ 857 858 /* 859 * SMBIOS Physical Memory Array Information. See DSP0134 Section 3.3.17 for 860 * more information. This describes a collection of physical memory devices. 861 */ 862 typedef struct smbios_memarray { 863 uint8_t smbma_location; /* physical device location */ 864 uint8_t smbma_use; /* physical device functional purpose */ 865 uint8_t smbma_ecc; /* error detect/correct mechanism */ 866 uint8_t smbma_pad0; /* padding */ 867 uint32_t smbma_pad1; /* padding */ 868 uint32_t smbma_ndevs; /* number of slots or sockets */ 869 id_t smbma_err; /* handle of error (if any) */ 870 uint64_t smbma_size; /* maximum capacity in bytes */ 871 } smbios_memarray_t; 872 873 #define SMB_MAL_OTHER 0x01 /* other */ 874 #define SMB_MAL_UNKNOWN 0x02 /* unknown */ 875 #define SMB_MAL_SYSMB 0x03 /* system board or motherboard */ 876 #define SMB_MAL_ISA 0x04 /* ISA add-on card */ 877 #define SMB_MAL_EISA 0x05 /* EISA add-on card */ 878 #define SMB_MAL_PCI 0x06 /* PCI add-on card */ 879 #define SMB_MAL_MCA 0x07 /* MCA add-on card */ 880 #define SMB_MAL_PCMCIA 0x08 /* PCMCIA add-on card */ 881 #define SMB_MAL_PROP 0x09 /* proprietary add-on card */ 882 #define SMB_MAL_NUBUS 0x0A /* NuBus */ 883 #define SMB_MAL_PC98C20 0xA0 /* PC-98/C20 add-on card */ 884 #define SMB_MAL_PC98C24 0xA1 /* PC-98/C24 add-on card */ 885 #define SMB_MAL_PC98E 0xA2 /* PC-98/E add-on card */ 886 #define SMB_MAL_PC98LB 0xA3 /* PC-98/Local bus add-on card */ 887 888 #define SMB_MAU_OTHER 0x01 /* other */ 889 #define SMB_MAU_UNKNOWN 0x02 /* unknown */ 890 #define SMB_MAU_SYSTEM 0x03 /* system memory */ 891 #define SMB_MAU_VIDEO 0x04 /* video memory */ 892 #define SMB_MAU_FLASH 0x05 /* flash memory */ 893 #define SMB_MAU_NVRAM 0x06 /* non-volatile RAM */ 894 #define SMB_MAU_CACHE 0x07 /* cache memory */ 895 896 #define SMB_MAE_OTHER 0x01 /* other */ 897 #define SMB_MAE_UNKNOWN 0x02 /* unknown */ 898 #define SMB_MAE_NONE 0x03 /* none */ 899 #define SMB_MAE_PARITY 0x04 /* parity */ 900 #define SMB_MAE_SECC 0x05 /* single-bit ECC */ 901 #define SMB_MAE_MECC 0x06 /* multi-bit ECC */ 902 #define SMB_MAE_CRC 0x07 /* CRC */ 903 904 /* 905 * SMBIOS Memory Device Information. See DSP0134 Section 3.3.18 for more 906 * information. One or more of these structures are associated with each 907 * smbios_memarray_t. A structure is present even for unpopulated sockets. 908 * Unknown values are set to -1. A smbmd_size of 0 indicates unpopulated. 909 * WARNING: Some BIOSes appear to export the *maximum* size of the device 910 * that can appear in the corresponding socket as opposed to the current one. 911 */ 912 typedef struct smbios_memdevice { 913 id_t smbmd_array; /* handle of physical memory array */ 914 id_t smbmd_error; /* handle of memory error data */ 915 uint32_t smbmd_twidth; /* total width in bits including ecc */ 916 uint32_t smbmd_dwidth; /* data width in bits */ 917 uint64_t smbmd_size; /* size in bytes (see note above) */ 918 uint8_t smbmd_form; /* form factor */ 919 uint8_t smbmd_set; /* set (0x00=none, 0xFF=unknown) */ 920 uint8_t smbmd_type; /* memory type */ 921 uint8_t smbmd_pad; /* padding */ 922 uint32_t smbmd_flags; /* flags (see below) */ 923 uint32_t smbmd_speed; /* speed in nanoseconds */ 924 const char *smbmd_dloc; /* physical device locator string */ 925 const char *smbmd_bloc; /* physical bank locator string */ 926 } smbios_memdevice_t; 927 928 #define SMB_MDFF_OTHER 0x01 /* other */ 929 #define SMB_MDFF_UNKNOWN 0x02 /* unknown */ 930 #define SMB_MDFF_SIMM 0x03 /* SIMM */ 931 #define SMB_MDFF_SIP 0x04 /* SIP */ 932 #define SMB_MDFF_CHIP 0x05 /* chip */ 933 #define SMB_MDFF_DIP 0x06 /* DIP */ 934 #define SMB_MDFF_ZIP 0x07 /* ZIP */ 935 #define SMB_MDFF_PROP 0x08 /* proprietary card */ 936 #define SMB_MDFF_DIMM 0x09 /* DIMM */ 937 #define SMB_MDFF_TSOP 0x0A /* TSOP */ 938 #define SMB_MDFF_CHIPROW 0x0B /* row of chips */ 939 #define SMB_MDFF_RIMM 0x0C /* RIMM */ 940 #define SMB_MDFF_SODIMM 0x0D /* SODIMM */ 941 #define SMB_MDFF_SRIMM 0x0E /* SRIMM */ 942 #define SMB_MDFF_FBDIMM 0x0F /* FBDIMM */ 943 944 #define SMB_MDT_OTHER 0x01 /* other */ 945 #define SMB_MDT_UNKNOWN 0x02 /* unknown */ 946 #define SMB_MDT_DRAM 0x03 /* DRAM */ 947 #define SMB_MDT_EDRAM 0x04 /* EDRAM */ 948 #define SMB_MDT_VRAM 0x05 /* VRAM */ 949 #define SMB_MDT_SRAM 0x06 /* SRAM */ 950 #define SMB_MDT_RAM 0x07 /* RAM */ 951 #define SMB_MDT_ROM 0x08 /* ROM */ 952 #define SMB_MDT_FLASH 0x09 /* FLASH */ 953 #define SMB_MDT_EEPROM 0x0A /* EEPROM */ 954 #define SMB_MDT_FEPROM 0x0B /* FEPROM */ 955 #define SMB_MDT_EPROM 0x0C /* EPROM */ 956 #define SMB_MDT_CDRAM 0x0D /* CDRAM */ 957 #define SMB_MDT_3DRAM 0x0E /* 3DRAM */ 958 #define SMB_MDT_SDRAM 0x0F /* SDRAM */ 959 #define SMB_MDT_SGRAM 0x10 /* SGRAM */ 960 #define SMB_MDT_RDRAM 0x11 /* RDRAM */ 961 #define SMB_MDT_DDR 0x12 /* DDR */ 962 #define SMB_MDT_DDR2 0x13 /* DDR2 */ 963 #define SMB_MDT_DDR2FBDIMM 0x14 /* DDR2 FBDIMM */ 964 965 #define SMB_MDF_OTHER 0x0002 /* other */ 966 #define SMB_MDF_UNKNOWN 0x0004 /* unknown */ 967 #define SMB_MDF_FASTPG 0x0008 /* fast-paged */ 968 #define SMB_MDF_STATIC 0x0010 /* static column */ 969 #define SMB_MDF_PSTATIC 0x0020 /* pseudo-static */ 970 #define SMB_MDF_RAMBUS 0x0040 /* RAMBUS */ 971 #define SMB_MDF_SYNC 0x0080 /* synchronous */ 972 #define SMB_MDF_CMOS 0x0100 /* CMOS */ 973 #define SMB_MDF_EDO 0x0200 /* EDO */ 974 #define SMB_MDF_WDRAM 0x0400 /* Window DRAM */ 975 #define SMB_MDF_CDRAM 0x0800 /* Cache DRAM */ 976 #define SMB_MDF_NV 0x1000 /* non-volatile */ 977 978 /* 979 * SMBIOS Memory Array Mapped Address. See DSP0134 Section 3.3.20 for more 980 * information. We convert start/end addresses into addr/size for convenience. 981 */ 982 typedef struct smbios_memarrmap { 983 id_t smbmam_array; /* physical memory array handle */ 984 uint32_t smbmam_width; /* number of devices that form a row */ 985 uint64_t smbmam_addr; /* physical address of mapping */ 986 uint64_t smbmam_size; /* size in bytes of address range */ 987 } smbios_memarrmap_t; 988 989 /* 990 * SMBIOS Memory Device Mapped Address. See DSP0134 Section 3.3.21 for more 991 * information. We convert start/end addresses into addr/size for convenience. 992 */ 993 typedef struct smbios_memdevmap { 994 id_t smbmdm_device; /* memory device handle */ 995 id_t smbmdm_arrmap; /* memory array mapped address handle */ 996 uint64_t smbmdm_addr; /* physical address of mapping */ 997 uint64_t smbmdm_size; /* size in bytes of address range */ 998 uint8_t smbmdm_rpos; /* partition row position */ 999 uint8_t smbmdm_ipos; /* interleave position */ 1000 uint8_t smbmdm_idepth; /* interleave data depth */ 1001 } smbios_memdevmap_t; 1002 1003 /* 1004 * SMBIOS Hardware Security Settings. See DSP0134 Section 3.3.25 for more 1005 * information. Only one such record will be present in the SMBIOS. 1006 */ 1007 typedef struct smbios_hwsec { 1008 uint8_t smbh_pwr_ps; /* power-on password status */ 1009 uint8_t smbh_kbd_ps; /* keyboard password status */ 1010 uint8_t smbh_adm_ps; /* administrator password status */ 1011 uint8_t smbh_pan_ps; /* front panel reset status */ 1012 } smbios_hwsec_t; 1013 1014 #define SMB_HWSEC_PS_DISABLED 0x00 /* password disabled */ 1015 #define SMB_HWSEC_PS_ENABLED 0x01 /* password enabled */ 1016 #define SMB_HWSEC_PS_NOTIMPL 0x02 /* password not implemented */ 1017 #define SMB_HWSEC_PS_UNKNOWN 0x03 /* password status unknown */ 1018 1019 /* 1020 * SMBIOS System Boot Information. See DSP0134 Section 3.3.33 for more 1021 * information. The contents of the data varies by type and is undocumented 1022 * from the perspective of DSP0134 -- it seems to be left as vendor-specific. 1023 * The (D) annotation next to SMB_BOOT_* below indicates possible data payload. 1024 */ 1025 typedef struct smbios_boot { 1026 uint8_t smbt_status; /* boot status code (see below) */ 1027 const void *smbt_data; /* data buffer specific to status */ 1028 size_t smbt_size; /* size of smbt_data buffer in bytes */ 1029 } smbios_boot_t; 1030 1031 #define SMB_BOOT_NORMAL 0 /* no errors detected */ 1032 #define SMB_BOOT_NOMEDIA 1 /* no bootable media */ 1033 #define SMB_BOOT_OSFAIL 2 /* normal o/s failed to load */ 1034 #define SMB_BOOT_FWHWFAIL 3 /* firmware-detected hardware failure */ 1035 #define SMB_BOOT_OSHWFAIL 4 /* o/s-detected hardware failure */ 1036 #define SMB_BOOT_USERREQ 5 /* user-requested boot (keystroke) */ 1037 #define SMB_BOOT_SECURITY 6 /* system security violation */ 1038 #define SMB_BOOT_PREVREQ 7 /* previously requested image (D) */ 1039 #define SMB_BOOT_WATCHDOG 8 /* watchdog initiated reboot */ 1040 #define SMB_BOOT_RESV_LO 9 /* low end of reserved range */ 1041 #define SMB_BOOT_RESV_HI 127 /* high end of reserved range */ 1042 #define SMB_BOOT_OEM_LO 128 /* low end of OEM-specific range */ 1043 #define SMB_BOOT_OEM_HI 191 /* high end of OEM-specific range */ 1044 #define SMB_BOOT_PROD_LO 192 /* low end of product-specific range */ 1045 #define SMB_BOOT_PROD_HI 255 /* high end of product-specific range */ 1046 1047 /* 1048 * SMBIOS IPMI Device Information. See DSP0134 Section 3.3.39 and also 1049 * Appendix C1 of the IPMI specification for more information on this record. 1050 */ 1051 typedef struct smbios_ipmi { 1052 uint_t smbip_type; /* BMC interface type */ 1053 smbios_version_t smbip_vers; /* BMC's IPMI specification version */ 1054 uint32_t smbip_i2c; /* BMC I2C bus slave address */ 1055 uint32_t smbip_bus; /* bus ID of NV storage device, or -1 */ 1056 uint64_t smbip_addr; /* BMC base address */ 1057 uint32_t smbip_flags; /* flags (see below) */ 1058 uint16_t smbip_intr; /* interrupt number (or zero if none) */ 1059 uint16_t smbip_regspacing; /* i/o space register spacing (bytes) */ 1060 } smbios_ipmi_t; 1061 1062 #define SMB_IPMI_T_UNKNOWN 0x00 /* unknown */ 1063 #define SMB_IPMI_T_KCS 0x01 /* KCS: Keyboard Controller Style */ 1064 #define SMB_IPMI_T_SMIC 0x02 /* SMIC: Server Mgmt Interface Chip */ 1065 #define SMB_IPMI_T_BT 0x03 /* BT: Block Transfer */ 1066 #define SMB_IPMI_T_SSIF 0x04 /* SSIF: SMBus System Interface */ 1067 1068 #define SMB_IPMI_F_IOADDR 0x01 /* base address is in i/o space */ 1069 #define SMB_IPMI_F_INTRSPEC 0x02 /* intr information is specified */ 1070 #define SMB_IPMI_F_INTRHIGH 0x04 /* intr active high (else low) */ 1071 #define SMB_IPMI_F_INTREDGE 0x08 /* intr is edge triggered (else lvl) */ 1072 1073 /* 1074 * SMBIOS Interfaces. An SMBIOS image can be opened by either providing a file 1075 * pathname, device pathname, file descriptor, or raw memory buffer. Once an 1076 * image is opened the functions below can be used to iterate over the various 1077 * structures and convert the underlying data representation into the simpler 1078 * data structures described earlier in this header file. The SMB_VERSION 1079 * constant specified when opening an image indicates the version of the ABI 1080 * the caller expects and the DMTF SMBIOS version the client can understand. 1081 * The library will then map older or newer data structures to that as needed. 1082 */ 1083 1084 #define SMB_VERSION_23 0x0203 /* SMBIOS encoding for DMTF spec 2.3 */ 1085 #define SMB_VERSION_24 0x0204 /* SMBIOS encoding for DMTF spec 2.4 */ 1086 #define SMB_VERSION SMB_VERSION_24 /* SMBIOS latest version definitions */ 1087 1088 #define SMB_O_NOCKSUM 0x1 /* do not verify header checksums */ 1089 #define SMB_O_NOVERS 0x2 /* do not verify header versions */ 1090 #define SMB_O_ZIDS 0x4 /* strip out identification numbers */ 1091 #define SMB_O_MASK 0x7 /* mask of valid smbios_*open flags */ 1092 1093 #define SMB_ID_NOTSUP 0xFFFE /* structure is not supported by BIOS */ 1094 #define SMB_ID_NONE 0xFFFF /* structure is a null reference */ 1095 1096 #define SMB_ERR (-1) /* id_t value indicating error */ 1097 1098 typedef struct smbios_hdl smbios_hdl_t; 1099 1100 typedef struct smbios_struct { 1101 id_t smbstr_id; /* structure ID handle */ 1102 uint_t smbstr_type; /* structure type */ 1103 const void *smbstr_data; /* structure data */ 1104 size_t smbstr_size; /* structure size */ 1105 } smbios_struct_t; 1106 1107 typedef int smbios_struct_f(smbios_hdl_t *, 1108 const smbios_struct_t *, void *); 1109 1110 extern smbios_hdl_t *smbios_open(const char *, int, int, int *); 1111 extern smbios_hdl_t *smbios_fdopen(int, int, int, int *); 1112 extern smbios_hdl_t *smbios_bufopen(const smbios_entry_t *, 1113 const void *, size_t, int, int, int *); 1114 1115 extern const void *smbios_buf(smbios_hdl_t *); 1116 extern size_t smbios_buflen(smbios_hdl_t *); 1117 1118 extern void smbios_checksum(smbios_hdl_t *, smbios_entry_t *); 1119 extern int smbios_write(smbios_hdl_t *, int); 1120 extern void smbios_close(smbios_hdl_t *); 1121 1122 extern int smbios_errno(smbios_hdl_t *); 1123 extern const char *smbios_errmsg(int); 1124 1125 extern int smbios_lookup_id(smbios_hdl_t *, id_t, smbios_struct_t *); 1126 extern int smbios_iter(smbios_hdl_t *, smbios_struct_f *, void *); 1127 1128 extern void smbios_info_smbios(smbios_hdl_t *, smbios_entry_t *); 1129 extern int smbios_info_common(smbios_hdl_t *, id_t, smbios_info_t *); 1130 extern id_t smbios_info_bios(smbios_hdl_t *, smbios_bios_t *); 1131 extern id_t smbios_info_system(smbios_hdl_t *, smbios_system_t *); 1132 extern int smbios_info_bboard(smbios_hdl_t *, id_t, smbios_bboard_t *); 1133 extern int smbios_info_chassis(smbios_hdl_t *, id_t, smbios_chassis_t *); 1134 extern int smbios_info_processor(smbios_hdl_t *, id_t, smbios_processor_t *); 1135 extern int smbios_info_cache(smbios_hdl_t *, id_t, smbios_cache_t *); 1136 extern int smbios_info_port(smbios_hdl_t *, id_t, smbios_port_t *); 1137 extern int smbios_info_slot(smbios_hdl_t *, id_t, smbios_slot_t *); 1138 extern int smbios_info_obdevs(smbios_hdl_t *, id_t, int, smbios_obdev_t *); 1139 extern int smbios_info_strtab(smbios_hdl_t *, id_t, int, const char *[]); 1140 extern id_t smbios_info_lang(smbios_hdl_t *, smbios_lang_t *); 1141 extern id_t smbios_info_eventlog(smbios_hdl_t *, smbios_evlog_t *); 1142 extern int smbios_info_memarray(smbios_hdl_t *, id_t, smbios_memarray_t *); 1143 extern int smbios_info_memarrmap(smbios_hdl_t *, id_t, smbios_memarrmap_t *); 1144 extern int smbios_info_memdevice(smbios_hdl_t *, id_t, smbios_memdevice_t *); 1145 extern int smbios_info_memdevmap(smbios_hdl_t *, id_t, smbios_memdevmap_t *); 1146 extern id_t smbios_info_hwsec(smbios_hdl_t *, smbios_hwsec_t *); 1147 extern id_t smbios_info_boot(smbios_hdl_t *, smbios_boot_t *); 1148 extern id_t smbios_info_ipmi(smbios_hdl_t *, smbios_ipmi_t *); 1149 1150 extern const char *smbios_psn(smbios_hdl_t *); 1151 extern const char *smbios_csn(smbios_hdl_t *); 1152 1153 #ifndef _KERNEL 1154 /* 1155 * The smbios_*_desc() and smbios_*_name() interfaces can be used for utilities 1156 * such as smbios(1M) that wish to decode SMBIOS fields for humans. The _desc 1157 * functions return the comment string next to the #defines listed above, and 1158 * the _name functions return the appropriate #define identifier itself. 1159 */ 1160 extern const char *smbios_bboard_flag_desc(uint_t); 1161 extern const char *smbios_bboard_flag_name(uint_t); 1162 extern const char *smbios_bboard_type_desc(uint_t); 1163 1164 extern const char *smbios_bios_flag_desc(uint64_t); 1165 extern const char *smbios_bios_flag_name(uint64_t); 1166 1167 extern const char *smbios_bios_xb1_desc(uint_t); 1168 extern const char *smbios_bios_xb1_name(uint_t); 1169 extern const char *smbios_bios_xb2_desc(uint_t); 1170 extern const char *smbios_bios_xb2_name(uint_t); 1171 1172 extern const char *smbios_boot_desc(uint_t); 1173 1174 extern const char *smbios_cache_assoc_desc(uint_t); 1175 extern const char *smbios_cache_ctype_desc(uint_t); 1176 extern const char *smbios_cache_ctype_name(uint_t); 1177 extern const char *smbios_cache_ecc_desc(uint_t); 1178 extern const char *smbios_cache_flag_desc(uint_t); 1179 extern const char *smbios_cache_flag_name(uint_t); 1180 extern const char *smbios_cache_loc_desc(uint_t); 1181 extern const char *smbios_cache_logical_desc(uint_t); 1182 extern const char *smbios_cache_mode_desc(uint_t); 1183 1184 extern const char *smbios_chassis_state_desc(uint_t); 1185 extern const char *smbios_chassis_type_desc(uint_t); 1186 1187 extern const char *smbios_evlog_flag_desc(uint_t); 1188 extern const char *smbios_evlog_flag_name(uint_t); 1189 extern const char *smbios_evlog_format_desc(uint_t); 1190 extern const char *smbios_evlog_method_desc(uint_t); 1191 1192 extern const char *smbios_ipmi_flag_name(uint_t); 1193 extern const char *smbios_ipmi_flag_desc(uint_t); 1194 extern const char *smbios_ipmi_type_desc(uint_t); 1195 1196 extern const char *smbios_hwsec_desc(uint_t); 1197 1198 extern const char *smbios_memarray_loc_desc(uint_t); 1199 extern const char *smbios_memarray_use_desc(uint_t); 1200 extern const char *smbios_memarray_ecc_desc(uint_t); 1201 1202 extern const char *smbios_memdevice_form_desc(uint_t); 1203 extern const char *smbios_memdevice_type_desc(uint_t); 1204 extern const char *smbios_memdevice_flag_name(uint_t); 1205 extern const char *smbios_memdevice_flag_desc(uint_t); 1206 1207 extern const char *smbios_port_conn_desc(uint_t); 1208 extern const char *smbios_port_type_desc(uint_t); 1209 1210 extern const char *smbios_processor_family_desc(uint_t); 1211 extern const char *smbios_processor_status_desc(uint_t); 1212 extern const char *smbios_processor_type_desc(uint_t); 1213 extern const char *smbios_processor_upgrade_desc(uint_t); 1214 1215 extern const char *smbios_slot_type_desc(uint_t); 1216 extern const char *smbios_slot_width_desc(uint_t); 1217 extern const char *smbios_slot_usage_desc(uint_t); 1218 extern const char *smbios_slot_length_desc(uint_t); 1219 extern const char *smbios_slot_ch1_desc(uint_t); 1220 extern const char *smbios_slot_ch1_name(uint_t); 1221 extern const char *smbios_slot_ch2_desc(uint_t); 1222 extern const char *smbios_slot_ch2_name(uint_t); 1223 1224 extern const char *smbios_type_desc(uint_t); 1225 extern const char *smbios_type_name(uint_t); 1226 1227 extern const char *smbios_system_wakeup_desc(uint_t); 1228 #endif /* !_KERNEL */ 1229 1230 #ifdef _KERNEL 1231 /* 1232 * For SMBIOS clients within the kernel itself, ksmbios is used to refer to 1233 * the kernel's current snapshot of the SMBIOS, if one exists, and the 1234 * ksmbios_flags tunable is the set of flags for use with smbios_open(). 1235 */ 1236 extern smbios_hdl_t *ksmbios; 1237 extern int ksmbios_flags; 1238 #endif /* _KERNEL */ 1239 1240 #ifdef __cplusplus 1241 } 1242 #endif 1243 1244 #endif /* _SYS_SMBIOS_H */ 1245