1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #ifndef _SYS_PCI_TOOLS_H 27 #define _SYS_PCI_TOOLS_H 28 29 #pragma ident "%Z%%M% %I% %E% SMI" 30 31 #include <sys/modctl.h> 32 33 #ifdef __cplusplus 34 extern "C" { 35 #endif 36 37 /* 38 * Versioning. 39 */ 40 #define PCITOOL_V1 1 41 #define PCITOOL_V2 2 42 #define PCITOOL_VERSION PCITOOL_V2 43 44 /* File suffixes for nexus pcitool nodes. */ 45 #define PCI_MINOR_REG "reg" 46 #define PCI_MINOR_INTR "intr" 47 48 /* 49 * Ioctls for PCI tools. 50 */ 51 #define PCITOOL_IOC (('P' << 24) | ('C' << 16) | ('T' << 8)) 52 53 /* Read/write a device on a PCI bus, in physical space. */ 54 #define PCITOOL_DEVICE_GET_REG (PCITOOL_IOC | 1) 55 #define PCITOOL_DEVICE_SET_REG (PCITOOL_IOC | 2) 56 57 /* Read/write the PCI nexus bridge, in physical space. */ 58 #define PCITOOL_NEXUS_GET_REG (PCITOOL_IOC | 3) 59 #define PCITOOL_NEXUS_SET_REG (PCITOOL_IOC | 4) 60 61 /* Get/set interrupt-CPU mapping for PCI devices. */ 62 #define PCITOOL_DEVICE_GET_INTR (PCITOOL_IOC | 5) 63 #define PCITOOL_DEVICE_SET_INTR (PCITOOL_IOC | 6) 64 65 /* Get system interrupt information */ 66 #define PCITOOL_SYSTEM_INTR_INFO (PCITOOL_IOC | 8) 67 68 /* 69 * This file contains data structures for the pci tool. 70 */ 71 #define PCITOOL_CONFIG 0 72 #define PCITOOL_BAR0 1 73 #define PCITOOL_BAR1 2 74 #define PCITOOL_BAR2 3 75 #define PCITOOL_BAR3 4 76 #define PCITOOL_BAR4 5 77 #define PCITOOL_BAR5 6 78 #define PCITOOL_ROM 7 79 80 /* 81 * Pass this through barnum to signal to use a base addr instead. 82 * This is for platforms which do not have a way to automatically map 83 * a selected bank to a base addr. 84 */ 85 #define PCITOOL_BASE 0xFF 86 87 /* 88 * BAR corresponding to space desired. 89 */ 90 typedef enum { 91 config = PCITOOL_CONFIG, 92 bar0 = PCITOOL_BAR0, 93 bar1 = PCITOOL_BAR1, 94 bar2 = PCITOOL_BAR2, 95 bar3 = PCITOOL_BAR3, 96 bar4 = PCITOOL_BAR4, 97 bar5 = PCITOOL_BAR5, 98 rom = PCITOOL_ROM 99 } pcitool_bars_t; 100 101 102 /* 103 * PCITOOL error numbers. 104 */ 105 106 typedef enum { 107 PCITOOL_SUCCESS = 0x0, 108 PCITOOL_INVALID_CPUID, 109 PCITOOL_INVALID_INO, 110 PCITOOL_PENDING_INTRTIMEOUT, 111 PCITOOL_REGPROP_NOTWELLFORMED, 112 PCITOOL_INVALID_ADDRESS, 113 PCITOOL_NOT_ALIGNED, 114 PCITOOL_OUT_OF_RANGE, 115 PCITOOL_END_OF_RANGE, 116 PCITOOL_ROM_DISABLED, 117 PCITOOL_ROM_WRITE, 118 PCITOOL_IO_ERROR, 119 PCITOOL_INVALID_SIZE 120 } pcitool_errno_t; 121 122 123 /* 124 * PCITOOL_DEVICE_SET_INTR ioctl data structure to re-assign the interrupts. 125 */ 126 typedef struct pcitool_intr_set { 127 uint16_t user_version; /* Userland program version - to krnl */ 128 uint16_t drvr_version; /* Driver version - from kernel */ 129 uint32_t ino; /* interrupt to set - to kernel */ 130 uint32_t cpu_id; /* to: cpu to set / from: old cpu returned */ 131 pcitool_errno_t status; /* from kernel */ 132 uint32_t flags; /* to kernel */ 133 } pcitool_intr_set_t; 134 135 /* 136 * flags for pcitool_intr_set_t 137 */ 138 #define PCITOOL_INTR_SET_FLAG_GROUP 0x1 139 140 141 /* 142 * PCITOOL_DEVICE_GET_INTR ioctl data structure to dump out the 143 * ino mapping information. 144 */ 145 146 typedef struct pcitool_intr_dev { 147 uint32_t dev_inst; /* device instance - from kernel */ 148 char driver_name[MAXMODCONFNAME]; /* from kernel */ 149 char path[MAXPATHLEN]; /* device path - from kernel */ 150 } pcitool_intr_dev_t; 151 152 typedef struct pcitool_intr_get { 153 uint16_t user_version; /* Userland program version - to krnl */ 154 uint16_t drvr_version; /* Driver version - from kernel */ 155 uint32_t ino; /* interrupt number - to kernel */ 156 uint8_t num_devs_ret; /* room for this # of devs to be */ 157 /* returned - to kernel */ 158 /* # devs returned - from kernel */ 159 uint8_t num_devs; /* # devs on this ino - from kernel */ 160 /* intrs enabled for devs if > 0 */ 161 uint8_t ctlr; /* controller number - from kernel */ 162 uint32_t cpu_id; /* cpu of interrupt - from kernel */ 163 pcitool_errno_t status; /* returned status - from kernel */ 164 pcitool_intr_dev_t dev[1]; /* start of variable device list */ 165 /* from kernel */ 166 } pcitool_intr_get_t; 167 168 /* 169 * Get the size needed to return the number of devices wanted. 170 * Can't say num_devs - 1 as num_devs may be unsigned. 171 */ 172 #define PCITOOL_IGET_SIZE(num_devs) \ 173 (sizeof (pcitool_intr_get_t) - \ 174 sizeof (pcitool_intr_dev_t) + \ 175 (num_devs * sizeof (pcitool_intr_dev_t))) 176 177 typedef struct pcitool_intr_info { 178 uint16_t user_version; /* Userland program version - to krnl */ 179 uint16_t drvr_version; /* Driver version - from kernel */ 180 uint32_t num_intr; /* Number of intrs suppt by nexus */ 181 uint32_t ctlr_version; /* Intr ctlr HW version - from kernel */ 182 uchar_t ctlr_type; /* A PCITOOL_CTLR_TYPE - from kernel */ 183 } pcitool_intr_info_t; 184 185 /* 186 * Interrupt controller types 187 */ 188 #define PCITOOL_CTLR_TYPE_UNKNOWN 0 189 #define PCITOOL_CTLR_TYPE_RISC 1 190 #define PCITOOL_CTLR_TYPE_UPPC 2 191 #define PCITOOL_CTLR_TYPE_PCPLUSMP 3 192 193 /* 194 * Size and endian fields for acc_attr bitmask. 195 */ 196 #define PCITOOL_ACC_ATTR_SIZE_MASK 0x3 197 #define PCITOOL_ACC_ATTR_SIZE_1 0x0 198 #define PCITOOL_ACC_ATTR_SIZE_2 0x1 199 #define PCITOOL_ACC_ATTR_SIZE_4 0x2 200 #define PCITOOL_ACC_ATTR_SIZE_8 0x3 201 #define PCITOOL_ACC_ATTR_SIZE(x) (1 << (x & PCITOOL_ACC_ATTR_SIZE_MASK)) 202 203 #define PCITOOL_ACC_ATTR_ENDN_MASK 0x100 204 #define PCITOOL_ACC_ATTR_ENDN_LTL 0x0 205 #define PCITOOL_ACC_ATTR_ENDN_BIG 0x100 206 #define PCITOOL_ACC_IS_BIG_ENDIAN(x) (x & PCITOOL_ACC_ATTR_ENDN_BIG) 207 208 /* 209 * Data stucture to read and write to pci device registers. 210 * This is the argument to the following ioctls: 211 * PCITOOL_DEVICE_SET/GET_REG 212 * PCITOOL_NEXUS_SET/GET_REG 213 */ 214 typedef struct pcitool_reg { 215 uint16_t user_version; /* Userland program version - to krnl */ 216 uint16_t drvr_version; /* Driver version - from kernel */ 217 uint8_t bus_no; /* pci bus - to kernel */ 218 uint8_t dev_no; /* pci dev - to kernel */ 219 uint8_t func_no; /* pci function - to kernel */ 220 uint8_t barnum; /* bank (DEVCTL_NEXUS_SET/GET_REG) or */ 221 /* BAR from pcitools_bar_t */ 222 /* (DEVCTL_DEVICE_SET/GET_REG) */ 223 /* to kernel */ 224 uint64_t offset; /* to kernel */ 225 uint32_t acc_attr; /* access attributes - to kernel */ 226 uint32_t padding1; /* 8-byte align next uint64_t for X86 */ 227 uint64_t data; /* to/from kernel, 64-bit alignment */ 228 uint32_t status; /* from kernel */ 229 uint32_t padding2; /* 8-byte align next uint64_t for X86 */ 230 uint64_t phys_addr; /* from kernel, 64-bit alignment */ 231 } pcitool_reg_t; 232 233 234 #ifdef __cplusplus 235 } 236 #endif 237 238 #endif /* _SYS_PCI_TOOLS_H */ 239