1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #ifndef _SYS_NXGE_NXGE_FFLP_H 27 #define _SYS_NXGE_NXGE_FFLP_H 28 29 #pragma ident "%Z%%M% %I% %E% SMI" 30 31 #ifdef __cplusplus 32 extern "C" { 33 #endif 34 35 #include <npi_fflp.h> 36 37 #define MAX_PARTITION 8 38 39 typedef struct _fflp_errlog { 40 uint32_t vlan; 41 uint32_t tcam; 42 uint32_t hash_pio[MAX_PARTITION]; 43 uint32_t hash_lookup1; 44 uint32_t hash_lookup2; 45 } fflp_errlog_t, *p_fflp_errlog_t; 46 47 typedef struct _fflp_stats { 48 uint32_t tcam_entries; 49 uint32_t fcram_entries; 50 uint32_t tcam_parity_err; 51 uint32_t tcam_ecc_err; 52 uint32_t vlan_parity_err; 53 uint32_t hash_lookup_err; 54 uint32_t hash_pio_err[MAX_PARTITION]; 55 fflp_errlog_t errlog; 56 } nxge_fflp_stats_t, *p_nxge_fflp_stats_t; 57 58 /* 59 * The FCRAM (hash table) cosnists of 1 meg cells 60 * each 64 byte wide. Each cell can hold either of: 61 * 2 IPV4 Exact match entry (each 32 bytes) 62 * 1 IPV6 Exact match entry (each 56 bytes) and 63 * 1 Optimistic match entry (each 8 bytes) 64 * 8 Optimistic match entries (each 8 bytes) 65 * In the case IPV4 Exact match, half of the cell 66 * (the first or the second 32 bytes) could be used 67 * to hold 4 Optimistic matches 68 */ 69 70 #define FCRAM_CELL_EMPTY 0x00 71 #define FCRAM_CELL_IPV4_IPV4 0x01 72 #define FCRAM_CELL_IPV4_OPT 0x02 73 #define FCRAM_CELL_OPT_IPV4 0x04 74 #define FCRAM_CELL_IPV6_OPT 0x08 75 #define FCRAM_CELL_OPT_OPT 0x10 76 77 78 #define FCRAM_SUBAREA0_OCCUPIED 0x01 79 #define FCRAM_SUBAREA1_OCCUPIED 0x02 80 #define FCRAM_SUBAREA2_OCCUPIED 0x04 81 #define FCRAM_SUBAREA3_OCCUPIED 0x08 82 83 #define FCRAM_SUBAREA4_OCCUPIED 0x10 84 #define FCRAM_SUBAREA5_OCCUPIED 0x20 85 #define FCRAM_SUBAREA6_OCCUPIED 0x40 86 #define FCRAM_SUBAREA7_OCCUPIED 0x20 87 88 #define FCRAM_IPV4_SUBAREA0_OCCUPIED \ 89 (FCRAM_SUBAREA0_OCCUPIED | FCRAM_SUBAREA1_OCCUPIED | \ 90 FCRAM_SUBAREA2_OCCUPIED | FCRAM_SUBAREA3_OCCUPIED) 91 92 #define FCRAM_IPV4_SUBAREA4_OCCUPIED \ 93 (FCRAM_SUBAREA4_OCCUPIED | FCRAM_SUBAREA5_OCCUPIED | \ 94 FCRAM_SUBAREA6_OCCUPIED | FCRAM_SUBAREA7_OCCUPIED) 95 96 97 #define FCRAM_IPV6_SUBAREA0_OCCUPIED \ 98 (FCRAM_SUBAREA0_OCCUPIED | FCRAM_SUBAREA1_OCCUPIED | \ 99 FCRAM_SUBAREA2_OCCUPIED | FCRAM_SUBAREA3_OCCUPIED | \ 100 FCRAM_SUBAREA4_OCCUPIED | FCRAM_SUBAREA5_OCCUPIED | \ 101 FCRAM_SUBAREA6_OCCUPIED) 102 103 /* 104 * The current occupancy state of each FCRAM cell isy 105 * described by the fcram_cell_t data structure. 106 * The "type" field denotes the type of entry (or combination) 107 * the cell holds (FCRAM_CELL_EMPTY ...... FCRAM_CELL_OPT_OPT) 108 * The "occupied" field indicates if individual 8 bytes (subareas) 109 * with in the cell are occupied 110 */ 111 112 typedef struct _fcram_cell { 113 uint32_t type:8; 114 uint32_t occupied:8; 115 uint32_t shadow_loc:16; 116 } fcram_cell_t, *p_fcram_cell_t; 117 118 typedef struct _fcram_parition { 119 uint8_t id; 120 uint8_t base; 121 uint8_t mask; 122 uint8_t reloc; 123 uint32_t flags; 124 #define HASH_PARTITION_ENABLED 1 125 uint32_t offset; 126 uint32_t size; 127 } fcram_parition_t, *p_fcram_partition_t; 128 129 130 typedef struct _tcam_flow_spec { 131 tcam_entry_t tce; 132 uint64_t flags; 133 uint64_t user_info; 134 } tcam_flow_spec_t, *p_tcam_flow_spec_t; 135 136 137 /* 138 * Used for configuration. 139 * ndd as well nxge.conf use the following definitions 140 */ 141 142 #define NXGE_CLASS_CONFIG_PARAMS 20 143 /* Used for ip class flow key and tcam key config */ 144 145 #define NXGE_CLASS_TCAM_LOOKUP 0x0001 146 #define NXGE_CLASS_TCAM_USE_SRC_ADDR 0x0002 147 #define NXGE_CLASS_FLOW_USE_PORTNUM 0x0010 148 #define NXGE_CLASS_FLOW_USE_L2DA 0x0020 149 #define NXGE_CLASS_FLOW_USE_VLAN 0x0040 150 #define NXGE_CLASS_FLOW_USE_PROTO 0x0080 151 #define NXGE_CLASS_FLOW_USE_IPSRC 0x0100 152 #define NXGE_CLASS_FLOW_USE_IPDST 0x0200 153 #define NXGE_CLASS_FLOW_USE_SRC_PORT 0x0400 154 #define NXGE_CLASS_FLOW_USE_DST_PORT 0x0800 155 #define NXGE_CLASS_DISCARD 0x80000000 156 157 /* these are used for quick configs */ 158 #define NXGE_CLASS_FLOW_WEB_SERVER NXGE_CLASS_FLOW_USE_IPSRC | \ 159 NXGE_CLASS_FLOW_USE_SRC_PORT 160 161 #define NXGE_CLASS_FLOW_GEN_SERVER NXGE_CLASS_FLOW_USE_IPSRC | \ 162 NXGE_CLASS_FLOW_USE_IPDST | \ 163 NXGE_CLASS_FLOW_USE_SRC_PORT | \ 164 NXGE_CLASS_FLOW_USE_DST_PORT | \ 165 NXGE_CLASS_FLOW_USE_PROTO | \ 166 NXGE_CLASS_FLOW_USE_L2DA | \ 167 NXGE_CLASS_FLOW_USE_VLAN 168 169 /* 170 * used for use classes 171 */ 172 173 174 /* Ethernet Classes */ 175 #define NXGE_CLASS_CFG_ETHER_TYPE_MASK 0x0000FFFF 176 #define NXGE_CLASS_CFG_ETHER_ENABLE_MASK 0x40000000 177 178 /* IP Classes */ 179 #define NXGE_CLASS_CFG_IP_TOS_MASK 0x000000FF 180 #define NXGE_CLASS_CFG_IP_TOS_SHIFT 0 181 #define NXGE_CLASS_CFG_IP_TOS_MASK_MASK 0x0000FF00 182 #define NXGE_CLASS_CFG_IP_TOS_MASK_SHIFT 8 183 #define NXGE_CLASS_CFG_IP_PROTO_MASK 0x00FFFF00 184 #define NXGE_CLASS_CFG_IP_PROTO_SHIFT 16 185 186 #define NXGE_CLASS_CFG_IP_IPV6_MASK 0x01000000 187 #define NXGE_CLASS_CFG_IP_PARAM_MASK NXGE_CLASS_CFG_IP_TOS_MASK | \ 188 NXGE_CLASS_CFG_IP_TOS_MASK_MASK | \ 189 NXGE_CLASS_CFG_IP_PROTO_MASK | \ 190 NXGE_CLASS_CFG_IP_IPV6_MASK 191 192 #define NXGE_CLASS_CFG_IP_ENABLE_MASK 0x40000000 193 194 typedef struct _vlan_rdcgrp_map { 195 uint32_t rsrvd:8; 196 uint32_t vid:16; 197 uint32_t rdc_grp:8; 198 } vlan_rdcgrp_map_t, *p_vlan_rdcgrp_map_t; 199 200 #define NXGE_INIT_VLAN_RDCG_TBL 32 201 202 typedef struct _nxge_classify { 203 nxge_os_mutex_t tcam_lock; 204 nxge_os_mutex_t fcram_lock; 205 nxge_os_mutex_t hash_lock[MAX_PARTITION]; 206 uint32_t tcam_size; 207 uint32_t state; 208 #define NXGE_FFLP_HW_RESET 0x1 209 #define NXGE_FFLP_HW_INIT 0x2 210 #define NXGE_FFLP_SW_INIT 0x4 211 #define NXGE_FFLP_FCRAM_PART 0x80000000 212 p_nxge_fflp_stats_t fflp_stats; 213 214 tcam_flow_spec_t *tcam_entries; 215 uint8_t tcam_location; 216 #define NXGE_FLOW_NO_SUPPORT 0x0 217 #define NXGE_FLOW_USE_TCAM 0x1 218 #define NXGE_FLOW_USE_FCRAM 0x2 219 #define NXGE_FLOW_USE_TCAM_FCRAM 0x3 220 221 #define NXGE_FLOW_COMPUTE_H1 0x10 222 #define NXGE_FLOW_COMPUTE_H2 0x20 223 uint8_t fragment_bug; 224 uint8_t fragment_bug_location; 225 fcram_cell_t *hash_table; /* allocated for Neptune only */ 226 fcram_parition_t partition[MAX_PARTITION]; 227 } nxge_classify_t, *p_nxge_classify_t; 228 229 #ifdef __cplusplus 230 } 231 #endif 232 233 #endif /* _SYS_NXGE_NXGE_FFLP_H */ 234