xref: /titanic_44/usr/src/uts/common/sys/cpudrv.h (revision 3d0479833b8db89da4bca3e8e8e88f996686aa8e)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 #ifndef _SYS_CPUDRV_H
27 #define	_SYS_CPUDRV_H
28 
29 #pragma ident	"%Z%%M%	%I%	%E% SMI"
30 
31 #include <sys/promif.h>
32 #include <sys/cpuvar.h>
33 #include <sys/taskq.h>
34 
35 #ifdef	__cplusplus
36 extern "C" {
37 #endif
38 
39 #ifdef _KERNEL
40 
41 /*
42  * CPU power management data
43  */
44 /*
45  * Data related to a particular speed.
46  *
47  * All per speed data nodes for a CPU are linked together using down_spd.
48  * The link list is ordered with first node containing data for
49  * normal (maximum) speed. up_spd points to the next speed up. Currently
50  * all up_spd's point to the normal speed but this can be changed in future.
51  * quant_cnt is the number of ticks when monitoring system will be called
52  * next. There are different quant_cnt for different speeds.
53  *
54  * Note that 'speed' has different meaning depending upon the platform.
55  * On SPARC, the speed is really a divisor of the maximum speed (e.g., a speed
56  * of 2 means that it's 1/2 the maximum speed). On x86, speed is a processor
57  * frequency.
58  */
59 typedef struct cpudrv_pm_spd {
60 	uint_t			speed;		/* platform dependent notion */
61 	uint_t			quant_cnt;	/* quantum count in ticks */
62 	struct cpudrv_pm_spd	*down_spd;	/* ptr to next speed down */
63 	struct cpudrv_pm_spd	*up_spd;	/* ptr to next speed up */
64 	uint_t			idle_hwm;	/* down if idle thread >= hwm */
65 	uint_t			idle_lwm;	/* up if idle thread < lwm */
66 	uint_t			idle_bhwm_cnt;	/* # of iters idle is < hwm */
67 	uint_t			idle_blwm_cnt;	/* # of iters idle is < lwm */
68 	uint_t			user_hwm;	/* up if user thread > hwm */
69 	int			user_lwm;	/* down if user thread <= lwm */
70 	int			pm_level;	/* power level for framework */
71 } cpudrv_pm_spd_t;
72 
73 /*
74  * Power management data
75  */
76 typedef struct cpudrv_pm {
77 	cpudrv_pm_spd_t	*head_spd;	/* ptr to head of speed */
78 	cpudrv_pm_spd_t	*cur_spd;	/* ptr to current speed */
79 	cpudrv_pm_spd_t	*targ_spd;	/* target speed when cur_spd */
80 					/* is unknown (i.e. NULL) */
81 	uint_t		num_spd;	/* number of speeds */
82 	hrtime_t	lastquan_mstate[NCMSTATES]; /* last quantum's mstate */
83 	clock_t		lastquan_lbolt;	/* last quantum's lbolt */
84 	int		pm_busycnt;	/* pm_busy_component() count  */
85 	taskq_t		*tq;		/* taskq handler for CPU monitor */
86 	timeout_id_t	timeout_id;	/* cpudrv_pm_monitor()'s timeout_id */
87 	int		timeout_count;	/* count dispatched timeouts */
88 	kmutex_t	timeout_lock;	/* protect timeout_count */
89 	kcondvar_t	timeout_cv;	/* wait on timeout_count change */
90 #if defined(__x86)
91 	kthread_t	*pm_throttle_thread; /* throttling thread */
92 #endif
93 	boolean_t	pm_started;	/* PM really started */
94 } cpudrv_pm_t;
95 
96 /*
97  * Idle & user threads water marks in percentage
98  */
99 #if defined(__x86)
100 #define	CPUDRV_PM_IDLE_LWM		80	/* idle low water mark */
101 #else
102 #define	CPUDRV_PM_IDLE_LWM		8	/* idle low water mark */
103 #endif
104 #define	CPUDRV_PM_IDLE_HWM		98	/* idle high water mark */
105 #define	CPUDRV_PM_USER_HWM		20	/* user high water mark */
106 #define	CPUDRV_PM_IDLE_BUF_ZONE		4    /* buffer zone when going down */
107 
108 #define	CPUDRV_PM_IDLE_BLWM_CNT_MAX	2    /* # of iters idle can be < lwm */
109 #define	CPUDRV_PM_IDLE_BHWM_CNT_MAX	2    /* # of iters idle can be < hwm */
110 
111 /*
112  * Maximums for creating 'pm-components' property
113  */
114 #define	CPUDRV_PM_COMP_MAX_DIG	4	/* max digits in power level */
115 					/* or divisor */
116 #define	CPUDRV_PM_COMP_MAX_VAL	9999	/* max value in above digits */
117 
118 /*
119  * Component number for calls to PM framework
120  */
121 #define	CPUDRV_PM_COMP_NUM	0	/* first component is 0 */
122 
123 /*
124  * Quantum counts for normal and other clock speeds in terms of ticks.
125  *
126  * In determining the quantum count, we need to balance two opposing factors:
127  *
128  *	1) Minimal delay when user start using the CPU that is in low
129  *	power mode -- requires that we monitor more frequently,
130  *
131  *	2) Extra code executed because of frequent monitoring -- requires
132  *	that we monitor less frequently.
133  *
134  * We reach a tradeoff between these two requirements by monitoring
135  * more frequently when we are in low speed mode (CPUDRV_PM_QUANT_CNT_OTHR)
136  * so we can bring the CPU up without user noticing it. Moreover, at low
137  * speed we are not using CPU much so extra code execution should be fine.
138  * Since we are in no hurry to bring CPU down and at normal speed and we
139  * might really be using the CPU fully, we monitor less frequently
140  * (CPUDRV_PM_QUANT_CNT_NORMAL).
141  */
142 #define	CPUDRV_PM_QUANT_CNT_NORMAL	(hz * 5)	/* 5 sec */
143 #define	CPUDRV_PM_QUANT_CNT_OTHR	(hz * 1)	/* 1 sec */
144 
145 /*
146  * Taskq parameters
147  */
148 #define	CPUDRV_PM_TASKQ_THREADS		1    /* # threads to run CPU monitor */
149 #define	CPUDRV_PM_TASKQ_MIN		2	/* min # of taskq entries */
150 #define	CPUDRV_PM_TASKQ_MAX		2	/* max # of taskq entries */
151 
152 
153 /*
154  * Device driver state structure
155  */
156 typedef struct cpudrv_devstate {
157 	dev_info_t	*dip;		/* devinfo handle */
158 	processorid_t	cpu_id;		/* CPU number for this node */
159 	cpudrv_pm_t	cpudrv_pm;	/* power management data */
160 	kmutex_t	lock;		/* protects state struct */
161 #if defined(__x86)
162 	void		*acpi_handle;	/* ACPI cache */
163 	void		*module_state;  /* CPU module state */
164 #endif
165 } cpudrv_devstate_t;
166 
167 extern void	*cpudrv_state;
168 
169 /*
170  * Debugging definitions
171  */
172 #ifdef	DEBUG
173 #define	D_INIT			0x00000001
174 #define	D_FINI			0x00000002
175 #define	D_ATTACH		0x00000004
176 #define	D_DETACH		0x00000008
177 #define	D_POWER			0x00000010
178 #define	D_PM_INIT		0x00000020
179 #define	D_PM_FREE		0x00000040
180 #define	D_PM_COMP_CREATE	0x00000080
181 #define	D_PM_MONITOR		0x00000100
182 #define	D_PM_MONITOR_VERBOSE	0x00000200
183 #define	D_PM_MONITOR_DELAY	0x00000400
184 
185 extern uint_t	cpudrv_debug;
186 
187 #define	_PRINTF prom_printf
188 #define	DPRINTF(flag, args)	if (cpudrv_debug & flag) _PRINTF args;
189 #else
190 #define	DPRINTF(flag, args)
191 #endif /* DEBUG */
192 
193 extern int cpudrv_pm_change_speed(cpudrv_devstate_t *, cpudrv_pm_spd_t *);
194 extern boolean_t cpudrv_pm_get_cpu_id(dev_info_t *, processorid_t *);
195 extern boolean_t cpudrv_pm_all_instances_ready(void);
196 extern boolean_t cpudrv_pm_is_throttle_thread(cpudrv_pm_t *);
197 extern boolean_t cpudrv_pm_init_module(cpudrv_devstate_t *);
198 extern void cpudrv_pm_free_module(cpudrv_devstate_t *);
199 
200 #endif /* _KERNEL */
201 
202 #ifdef	__cplusplus
203 }
204 #endif
205 
206 #endif /* _SYS_CPUDRV_H */
207