1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _SYS_AC97_H 28 #define _SYS_AC97_H 29 30 #include <sys/types.h> 31 #include <sys/audio/audio_common.h> 32 33 #ifdef __cplusplus 34 extern "C" { 35 #endif 36 37 #ifdef _KERNEL 38 39 /* 40 * This header file describes the AC-97 Codec register set. See the 41 * spec for a detailed description of each register. 42 */ 43 44 /* 45 * Defines for the registers. 46 */ 47 48 /* Reset Register Index 00h */ 49 #define AC97_RESET_REGISTER 0x00 50 #define RR_DEDICATED_MIC 0x0001 51 #define RR_RESERVED 0x0002 52 #define RR_BASS_TREBLE 0x0004 53 #define RR_PSEUDO_STEREO 0x0008 54 #define RR_HEADPHONE_SUPPORT 0x0010 55 #define RR_LOUDNESS_SUPPORT 0x0020 56 #define RR_18_BIT_DAC 0x0040 57 #define RR_20_BIT_DAC 0x0080 58 #define RR_18_BIT_ADC 0x0100 59 #define RR_20_BIT_ADC 0x0200 60 #define RR_3D_STEREO_ENHANCE_MASK 0x7c00 61 62 /* Master Volume Register Index 02h */ 63 #define AC97_MASTER_VOLUME_REGISTER 0x02 64 #define MVR_RIGHT_MASK 0x001f 65 #define MVR_RIGHT_0dB_ATTEN 0x0000 66 #define MVR_RIGHT_OPTIONAL_MASK 0x003f 67 #define MVR_LEFT_MASK 0x1f00 68 #define MVR_LEFT_0dB_ATTEN 0x0000 69 #define MVR_LEFT_OPTIONAL_MASK 0x3f00 70 #define MVR_MUTE 0x8000 71 72 /* Headphone Volume Register Index 04h - Optional */ 73 #define AC97_HEADPHONE_VOLUME_REGISTER 0x04 74 #define HPVR_RIGHT_MASK 0x001f 75 #define HPVR_RIGHT_0dB_ATTEN 0x0000 76 #define HPVR_RIGHT_OPTIONAL_MASK 0x003f 77 #define HPVR_LEFT_MASK 0x1f00 78 #define HPVR_LEFT_0dB_ATTEN 0x0000 79 #define HPVR_LEFT_OPTIONAL_MASK 0x3f00 80 #define HPVR_MUTE 0x8000 81 82 /* Mono Master Volume Register Index 06h - Optional */ 83 #define AC97_MONO_MASTER_VOLUME_REGISTER 0x06 84 #define MMVR_MASK 0x001f 85 #define MMVR_0dB_ATTEN 0x0000 86 #define MMVR_OPTIONAL_MASK 0x003f 87 #define MMVR_MUTE 0x8000 88 89 /* Master Tone Control Register Index 08h - Optional */ 90 #define AC97_MASTER_TONE_CONTROL_REGISTER 0x08 91 #define MTCR_TREBLE_MASK 0x000e 92 #define MTCR_TREBLE_OPTIONAL_MASK 0x000f 93 #define MTCR_TREBLE_BYPASS 0x000f 94 #define MTCR_BASS_MASK 0x0e00 95 #define MTCR_BASS_OPTIONAL_MASK 0x0f00 96 #define MTCR_BASS_BYPASS 0x0f00 97 98 /* PC Beep Register Index 0ah - Optional */ 99 #define AC97_PC_BEEP_REGISTER 0x0a 100 #define PCBR_VOLUME_MASK 0x001e 101 #define PCBR_0dB_ATTEN 0x0000 102 #define PCBR_MUTE 0x8000 103 104 /* Phone Volume Register Index 0ch - Optional */ 105 #define AC97_PHONE_VOLUME_REGISTER 0x0c 106 #define PVR_GAIN_MASK 0x001f 107 #define PVR_0dB_GAIN 0x0010 108 #define PVR_MAX_ATTEN 0x001f 109 #define PVR_MUTE 0x8000 110 111 /* Mic Volume Register Index 0eh */ 112 #define AC97_MIC_VOLUME_REGISTER 0x0e 113 #define MICVR_GAIN_MASK 0x001f 114 #define MICVR_0dB_GAIN 0x0008 115 #define MICVR_MAX_ATTEN 0x001f 116 #define MICVR_20dB_BOOST 0x0040 117 #define MICVR_20dB_NOBOOST 0x0000 118 #define MICVR_MUTE 0x8000 119 120 /* Line In Volume Register Index 10h */ 121 #define AC97_LINE_IN_VOLUME_REGISTER 0x10 122 #define LIVR_RIGHT_GAIN_MASK 0x001f 123 #define LIVR_RIGHT_0dB_GAIN 0x0010 124 #define LIVR_RIGHT_MAX_ATTEN 0x001f 125 #define LIVR_LEFT_GAIN_MASK 0x1f00 126 #define LIVR_LEFT_0dB_GAIN 0x1000 127 #define LIVR_LEFT_MAX_ATTEN 0x1f00 128 #define LIVR_MUTE 0x8000 129 130 /* CD Volume Register Index 12h */ 131 #define AC97_CD_VOLUME_REGISTER 0x12 132 #define CDVR_RIGHT_GAIN_MASK 0x001f 133 #define CDVR_RIGHT_0dB_GAIN 0x0010 134 #define CDVR_RIGHT_MAX_ATTEN 0x001f 135 #define CDVR_LEFT_GAIN_MASK 0x1f00 136 #define CDVR_LEFT_0dB_GAIN 0x1000 137 #define CDVR_LEFT_MAX_ATTEN 0x1f00 138 #define CDVR_MUTE 0x8000 139 140 /* Video Volume Register Index 14h - Optional */ 141 #define AC97_VIDEO_VOLUME_REGISTER 0x14 142 #define VIDVR_RIGHT_GAIN_MASK 0x001f 143 #define VIDVR_RIGHT_0dB_GAIN 0x0010 144 #define VIDVR_RIGHT_MAX_ATTEN 0x001f 145 #define VIDVR_LEFT_GAIN_MASK 0x1f00 146 #define VIDVR_LEFT_0dB_GAIN 0x1000 147 #define VIDVR_LEFT_MAX_ATTEN 0x1f00 148 #define VIDVR_MUTE 0x8000 149 150 /* Aux Volume Register Index 16h - Optional */ 151 #define AC97_AUX_VOLUME_REGISTER 0x16 152 #define AUXVR_RIGHT_GAIN_MASK 0x001f 153 #define AUXVR_RIGHT_0dB_GAIN 0x0010 154 #define AUXVR_RIGHT_MAX_ATTEN 0x001f 155 #define AUXVR_LEFT_GAIN_MASK 0x1f00 156 #define AUXVR_LEFT_0dB_GAIN 0x1000 157 #define AUXVR_LEFT_MAX_ATTEN 0x1f00 158 #define AUXVR_MUTE 0x8000 159 160 /* PCM Out Volume Register Index 18h */ 161 #define AC97_PCM_OUT_VOLUME_REGISTER 0x18 162 #define PCMOVR_RIGHT_GAIN_MASK 0x001f 163 #define PCMOVR_RIGHT_0dB_GAIN 0x0010 164 #define PCMOVR_RIGHT_MAX_ATTEN 0x001f 165 #define PCMOVR_LEFT_GAIN_MASK 0x1f00 166 #define PCMOVR_LEFT_0dB_GAIN 0x1000 167 #define PCMOVR_LEFT_MAX_ATTEN 0x1f00 168 #define PCMOVR_MUTE 0x8000 169 #define PCMOVR_GAIN_BITS 5 170 171 /* Record Select Control Register Index 1ah */ 172 #define AC97_RECORD_SELECT_CTRL_REGISTER 0x1a 173 #define RSCR_R_MIC 0x0000 174 #define RSCR_R_CD 0x0001 175 #define RSCR_R_VIDEO 0x0002 176 #define RSCR_R_AUX 0x0003 177 #define RSCR_R_LINE_IN 0x0004 178 #define RSCR_R_STEREO_MIX 0x0005 179 #define RSCR_R_MONO_MIX 0x0006 180 #define RSCR_R_PHONE 0x0007 181 #define RSCR_L_MIC 0x0000 182 #define RSCR_L_CD 0x0100 183 #define RSCR_L_VIDEO 0x0200 184 #define RSCR_L_AUX 0x0300 185 #define RSCR_L_LINE_IN 0x0400 186 #define RSCR_L_STEREO_MIX 0x0500 187 #define RSCR_L_MONO_MIX 0x0600 188 #define RSCR_L_PHONE 0x0700 189 190 /* Record Gain Register Index 1ch */ 191 #define AC97_RECORD_GAIN_REGISTER 0x1c 192 #define RGR_RIGHT_MASK 0x000f 193 #define RGR_RIGHT_0db_GAIN 0x0000 194 #define RGR_RIGHT_MAX_GAIN 0x000f 195 #define RGR_LEFT_MASK 0x0f00 196 #define RGR_LEFT_0db_GAIN 0x0000 197 #define RGR_LEFT_MAX_GAIN 0x0f00 198 #define RGR_MUTE 0x8000 199 200 /* Record Gain Mic Register Index 1eh - Optional */ 201 #define AC97_RECORD_GAIN_MIC_REGISTER 0x1e 202 #define RGMR_MASK 0x000f 203 #define RGMR_MUTE 0x8000 204 #define RGMR_MASK 0x000f 205 #define RGMR_0db_GAIN 0x0000 206 #define RGMR_MAX_GAIN 0x000f 207 208 /* General Purpose Register Index 20h - Optional */ 209 #define AC97_GENERAL_PURPOSE_REGISTER 0x20 210 #define GPR_LPBK 0x0080 211 #define GPR_MS_MIC1 0x0000 212 #define GPR_MS_MIC2 0x0100 213 #define GPR_MONO_MIX_IN 0x0000 214 #define GPR_MONO_MIC_IN 0x0200 215 #define GPR_BASS_BOOST 0x1000 216 #define GPR_3D_STEREO_ENHANCE 0x2000 217 #define GPR_ST 0x4000 218 #define GPR_POP_PRE_3D 0x0000 219 #define GPR_POP_POST_3D 0x8000 220 221 /* 3D Control Regsiter Index 22h - Optional */ 222 #define AC97_THREE_D_CONTROL_REGISTER 0x22 223 #define TDCR_DEPTH_MASK 0x000f 224 #define TDCR_CENTER_MASK 0x0f00 225 #define TDCR_NULL 0x0000 226 227 /* Audio Interrupt and Paging Mechanism Index 24h - r2.3 */ 228 #define AC97_INTERRUPT_PAGING_REGISTER 0x24 229 #define IPR_IS 0x8000 230 #define IPR_CAUSE_MASK 0x6000 231 #define IPR_SC 0x1000 232 #define IPR_IE 0x0800 233 #define IPR_PG_MASK 0x000f 234 235 /* Powerdown Control Status Register Index 26h */ 236 #define AC97_POWERDOWN_CTRL_STAT_REGISTER 0x26 237 #define PCSR_ADC 0x0001 238 #define PCSR_DAC 0x0002 239 #define PCSR_ANL 0x0004 240 #define PCSR_REF 0x0008 241 #define PCSR_POWERD_UP (PCSR_ADC|PCSR_DAC|\ 242 PCSR_ANL|PCSR_REF) 243 #define PCSR_PR0 0x0100 244 #define PCSR_PR1 0x0200 245 #define PCSR_PR2 0x0400 246 #define PCSR_PR3 0x0800 247 #define PCSR_PR4 0x1000 248 #define PCSR_PR5 0x2000 249 #define PCSR_PR6 0x4000 250 #define PCSR_EAPD 0x8000 251 252 /* Extended Audio Register Index 28h - Optional */ 253 #define AC97_EXTENDED_AUDIO_REGISTER 0x28 254 #define EAR_VRA 0x0001 255 #define EAR_DRA 0x0002 256 #define EAR_SPDIF 0x0004 257 #define EAR_VRM 0x0008 258 #define EAR_DSA_MASK 0x0030 259 #define EAR_CDAC 0x0040 260 #define EAR_SDAC 0x0080 261 #define EAR_LDAC 0x0100 262 #define EAR_AMAP 0x0200 263 #define EAR_REV_MASK 0x0c00 264 #define EAR_REV_21 0x0000 265 #define EAR_REV_22 0x0400 266 #define EAR_REV_23 0x0800 267 #define EAR_PRIMARY_CODEC 0x0000 268 #define EAR_SECONDARY_01_CODEC 0x4000 269 #define EAR_SECONDARY_10_CODEC 0x8000 270 #define EAR_SECONDARY_11_CODEC 0xc000 271 272 /* Extended Audio Status and Control Register Index 2ah - Optional */ 273 #define AC97_EXTENDED_AUDIO_STAT_CTRL_REGISTER 0x2a 274 #define EASCR_VRA 0x0001 275 #define EASCR_DRA 0x0002 276 #define EASCR_SPDIF 0x0004 277 #define EASCR_VRM 0x0008 278 #define EASCR_SPSA_MASK 0x0030 279 #define EASCR_SPSA_3_4 0x0000 280 #define EASCR_SPSA_7_8 0x0010 281 #define EASCR_SPSA_6_9 0x0020 282 #define EASCR_SPSA_10_11 0x0030 283 #define EASCR_CDAC 0x0040 284 #define EASCR_SDAC 0x0080 285 #define EASCR_LDAC 0x0100 286 #define EASCR_MADC 0x0200 287 #define EASCR_SPCV 0x0400 288 #define EASCR_PRI 0x0800 289 #define EASCR_PRJ 0x1000 290 #define EASCR_PRK 0x2000 291 #define EASCR_PRL 0x4000 292 #define EASCR_VCFG 0x8000 293 294 /* Extended Front DAC Rate Register 2ch - Optional */ 295 #define AC97_EXTENDED_FRONT_DAC_RATE_REGISTER 0x2c 296 #define AC97_SAMPLE_RATE_48000 0xbb80 297 298 /* Extended Surround DAC Rate Register 2eh - Optional */ 299 #define AC97_EXTENDED_SURROUND_DAC_RATE_REGISTER 0x2e 300 301 /* Extended LFE DAC Rate Register 30h - Optional */ 302 #define AC97_EXTENDED_LFE_DAC_RATE_REGISTER 0x30 303 304 /* Extended LR DAC Rate Register 32h - Optional */ 305 #define AC97_EXTENDED_LR_DAC_RATE_REGISTER 0x32 306 307 /* Extended Mic ADC Rate Register 34h - Optional */ 308 #define AC97_EXTENDED_MIC_ADC_RATE_REGISTER 0x34 309 310 /* Extended Center and LFE Volume Register 36h - Optional */ 311 #define AC97_EXTENDED_C_LFE_VOLUME_REGISTER 0x36 312 #define EXLFEVR_CENTER_MASK 0x001f 313 #define EXLFEVR_CENTER_OPTIONAL_MASK 0x003f 314 #define EXLFEVR_CENTER_MUTE 0x0080 315 #define EXLFEVR_LFE_MASK 0x1f00 316 #define EXLFEVR_LFE_OPTIONAL_MASK 0x3f00 317 #define EXLFEVR_LFE_MUTE 0x8000 318 319 /* Extended Left and Right Surround Volume Register 38h - Optional */ 320 #define AC97_EXTENDED_LRS_VOLUME_REGISTER 0x38 321 #define EXLFEVR_RIGHT_MASK 0x001f 322 #define EXLFEVR_RIGHT_OPTIONAL_MASK 0x003f 323 #define EXLFEVR_RIGHT_MTUE 0x0080 324 #define EXLFEVR_LEFT_MASK 0x1f00 325 #define EXLFEVR_LEFT_OPTIONAL_MASK 0x3f00 326 #define EXLFEVR_LEFT_MUTE 0x8000 327 328 /* S/PDIF Control Register 3ah - Optional */ 329 #define AC97_SPDIF_CONTROL_REGISTER 0x3a 330 #define SPCR_PRO 0x0001 331 #define SPCR_AUDIO 0x0002 332 #define SPCR_COPY 0x0004 333 #define SPCR_PRE 0x0008 334 #define SPCR_CC_MASK 0x07f0 335 #define SPCR_L 0x0800 336 #define SPCR_SPSR_MASK 0x3000 337 #define SPCR_SPSR_44100 0x0000 338 #define SPCR_SPSR_48000 0x2000 339 #define SPCR_SPSR_32000 0x3000 340 #define SPCR_DRS 0x4000 341 #define SPCR_V 0x8000 342 343 /* 344 * Modem only registers from 3ch - 58h. 345 */ 346 347 /* Extended Modem ID Register 3ch - Optional */ 348 #define AC97_EXTENDED_MODEM_ID_REGISTER 0x3c 349 #define EMIDR_LINE1 0x0001 350 #define EMIDR_LINE2 0x0002 351 #define EMIDR_HSET 0x0004 352 #define EMIDR_CID1 0x0008 353 #define EMIDR_CID2 0x0010 354 #define EMIDR_PRIMARY_CODEC 0x0000 355 #define EMIDR_SECONDARY_01_CODEC 0x4000 356 #define EMIDR_SECONDARY_10_CODEC 0x8000 357 #define EMIDR_SECONDARY_11_CODEC 0xc000 358 359 /* Extended Modem Status and Control Register 3eh - Optional */ 360 #define AC97_EXTENDED_MODE_STAT_CTRL_REGISTER 0x3e 361 #define EMSCR_BPIO 0x0001 362 #define EMSCR_MREF 0x0002 363 #define EMSCR_ADC1 0x0004 364 #define EMSCR_DAC1 0x0008 365 #define EMSCR_ADC2 0x0010 366 #define EMSCR_DAC2 0x0020 367 #define EMSCR_HADC 0x0040 368 #define EMSCR_HDAC 0x0080 369 #define EMSCR_PRA 0x0100 370 #define EMSCR_PRB 0x0200 371 #define EMSCR_PRC 0x0400 372 #define EMSCR_PRD 0x0800 373 #define EMSCR_PRE 0x1000 374 #define EMSCR_PRF 0x2000 375 #define EMSCR_PRG 0x4000 376 #define EMSCR_PRH 0x8000 377 378 /* Extended Modem Line 1 DAC/ADC Sample Rate Register 40h - Optional */ 379 #define AC97_EXTENDED_MODEM_LINE1_RATE_REGISTER 0x40 380 381 /* Extended Modem Line 2 DAC/ADC Sample Rate Register 42h - Optional */ 382 #define AC97_EXTENDED_MODEM_LINE2_RATE_REGISTER 0x42 383 384 /* Extended Modem Handset Sample Rate Register 44h - Optional */ 385 #define AC97_EXTENDED_MODEM_HANDSET_RATE_REGISTER 0x44 386 387 /* Extended Modem Line 1 DAC/ADC Level Register 46h - Optional */ 388 #define AC97_EXTENDED_MODEM_LINE1_LEVEL_REGISTER 0x46 389 #define EML1LR_ADC_LEVEL_MASK 0x000f 390 #define EML1LR_ADC_LEVEL_MUTE 0x0080 391 #define EML1LR_DAC_LEVEL_MASK 0x0f00 392 #define EML1LR_DAC_LEVEL_MUTE 0x8000 393 394 /* Extended Modem Line 2 DAC/ADC Level Register 48h - Optional */ 395 #define AC97_EXTENDED_MODEM_LINE2_LEVEL_REGISTER 0x48 396 #define EML2LR_ADC_LEVEL_MASK 0x000f 397 #define EML2LR_ADC_LEVEL_MUTE 0x0080 398 #define EML2LR_DAC_LEVEL_MASK 0x0f00 399 #define EML2LR_DAC_LEVEL_MUTE 0x8000 400 401 /* Extended Modem Handset DAC/ADC Level Register 4ah - Optional */ 402 #define AC97_EXTENDED_MODEM_HANDSET_LEVEL_REGISTER 0x4a 403 #define EMHLR_ADC_LEVEL_MASK 0x000f 404 #define EMHLR_ADC_LEVEL_MUTE 0x0080 405 #define EMHLR_DAC_LEVEL_MASK 0x0f00 406 #define EMHLR_DAC_LEVEL_MUTE 0x8000 407 408 /* Extended Modem GPIO Pin Configuration Register 4ch - Optional */ 409 #define AC97_EXTENDED_MODEM_GPIO_PIN_REGISTER 0x4c 410 411 /* Extended Modem GPIO Pin Polarity Register 4eh - Optional */ 412 #define AC97_EXTENDED_MODEM_GPIO_POLARITY_REGISTER 0x4e 413 414 /* Extended Modem GPIO Pin Sticky Register 50h - Optional */ 415 #define AC97_EXTENDED_MODEM_GPIO_STICKY_REGISTER 0x50 416 417 /* Extended Modem GPIO Pin Wake-up Mask Register 52h - Optional */ 418 #define AC97_EXTENDED_MODEM_GPIO_WAKEUP_REGISTER 0x52 419 420 /* Extended Modem GPIO Pin Status Mask Register 54h - Optional */ 421 #define AC97_EXTENDED_MODEM_GPIO_STATUS_REGISTER 0x54 422 423 /* Extended Modem AFE Status and Control Register 56h - Optional */ 424 #define AC97_EXTENDED_MODEM_AFE_STAT_CTRL_REGISTER 0x56 425 #define EMAFESCR_L1B0 0x0001 426 #define EMAFESCR_L1B1 0x0002 427 #define EMAFESCR_L1B2 0x0004 428 #define EMAFESCR_L2B0 0x0010 429 #define EMAFESCR_L2B1 0x0020 430 #define EMAFESCR_L2B2 0x0040 431 #define EMAFESCR_HSB0 0x0100 432 #define EMAFESCR_HSB1 0x0200 433 #define EMAFESCR_HSB2 0x0400 434 #define EMAFESCR_MLINK_ON 0x0000 435 #define EMAFESCR_MLINK_OFF 0x1000 436 #define EMAFESCR_CIDR 0x2000 437 #define EMAFESCR_CID1 0x4000 438 #define EMAFESCR_CID2 0x8000 439 440 /* Vendor Reserved Registers 5ah - 7ah - Optional */ 441 /* 442 * Note that 60h - 6eh is also defined as the extended codec page area in 443 * AC'97 r2.3. 444 */ 445 #define AC97_VENDOR_REGISTER_01 0x5a 446 #define AC97_VENDOR_REGISTER_02 0x5c 447 #define AC97_VENDOR_REGISTER_03 0x5e 448 #define AC97_VENDOR_REGISTER_04 0x60 449 #define AC97_VENDOR_REGISTER_05 0x62 450 #define AC97_VENDOR_REGISTER_06 0x64 451 #define AC97_VENDOR_REGISTER_07 0x66 452 #define AC97_VENDOR_REGISTER_08 0x68 453 #define AC97_VENDOR_REGISTER_09 0x6a 454 #define AC97_VENDOR_REGISTER_10 0x6c 455 #define AC97_VENDOR_REGISTER_11 0x6e 456 #define AC97_VENDOR_REGISTER_12 0x70 457 #define AC97_VENDOR_REGISTER_13 0x72 458 #define AC97_VENDOR_REGISTER_14 0x74 459 #define AC97_VENDOR_REGISTER_15 0x76 460 #define AC97_VENDOR_REGISTER_16 0x78 461 #define AC97_VENDOR_REGISTER_17 0x7a 462 463 /* 464 * Page 01 Extended Codec Registers 465 */ 466 #define AC97_PAGE01_CODEC_CLASS_REV_REGISTER 0x60 467 #define AC97_PAGE01_PCI_SVID_REGISTER 0x62 468 #define AC97_PAGE01_PCI_SID_REGISTER 0x64 469 #define AC97_PAGE01_FUNCTION_SELECT_REGISTER 0x66 470 #define AC97_PAGE01_FUNCTION_INFORMATION_REGISTER 0x68 471 #define AC97_PAGE01_SENSE_DETAILS_REGISTER 0x6a 472 #define AC97_PAGE01_DAC_SLOT_MAPPING_REGISTER 0x6c 473 #define AC97_PAGE01_ADC_SLOT_MAPPING_REGISTER 0x6e 474 475 /* Vendor ID1 Register 7ch */ 476 #define AC97_VENDOR_ID1_REGISTER 0x7c 477 #define VID1R_CHAR2_MASK 0x00ff 478 #define VID1R_CHAR1_MASK 0xff00 479 480 /* Vendor ID2 Register 7eh */ 481 #define AC97_VENDOR_ID2_REGISTER 0x7e 482 #define VID2R_REVISION_MASK 0x00ff 483 #define VID2R_CHAR3_MASK 0xff00 484 485 /* 486 * Property names used by AC97. We should probably have a better way 487 * of dealing with some of these. (LINEIN_FUNC and MIC_FUNC should really 488 * be saved/restored with other global settings.) 489 */ 490 #define AC97_PROP_AMPLIFIER "ac97-amplifier" 491 #define AC97_PROP_SPEAKER "ac97-speaker" 492 #define AC97_PROP_MICBOOST "ac97-micboost" 493 #define AC97_PROP_NO_HEADPHONE "ac97-no-headphone" 494 #define AC97_PROP_NO_AUXOUT "ac97-no-auxout" 495 #define AC97_PROP_NO_CDROM "ac97-no-cdrom" 496 #define AC97_PROP_NO_VIDEO "ac97-no-video" 497 #define AC97_PROP_NO_AUXIN "ac97-no-auxin" 498 #define AC97_PROP_NO_MIC "ac97-no-mic" 499 #define AC97_PROP_NO_LINEIN "ac97-no-linein" 500 #define AC97_PROP_LINEIN_FUNC "ac97-linein-function" /* 1=linein, 2=surr */ 501 #define AC97_PROP_MIC_FUNC "ac97-mic-function" /* 1=mic, 2=cen/lfe */ 502 #define AC97_PROP_DOWNMIX "ac97-downmix" 503 #define AC97_PROP_SPREAD "ac97-spread" 504 505 /* 506 * Known Codec vendors. 507 */ 508 #define AC97_VENDOR_ADS 0x41445300 /* Analog Devices */ 509 #define AC97_VENDOR_AKM 0x414b4d00 /* Asahi Kasei */ 510 #define AC97_VENDOR_ALC 0x414c4300 /* Realtek */ 511 #define AC97_VENDOR_ALG 0x414c4700 /* Realtek */ 512 #define AC97_VENDOR_CMI 0x43d44900 /* Cmedia */ 513 #define AC97_VENDOR_CRY 0x43525900 /* Cirrus Logic */ 514 #define AC97_VENDOR_CXT 0x43585400 /* Conexant */ 515 #define AC97_VENDOR_EMC 0x454d4300 /* eMicro */ 516 #define AC97_VENDOR_EV 0x000f8300 /* Ectiva */ 517 #define AC97_VENDOR_ESS 0x45838300 /* ESS */ 518 #define AC97_VENDOR_HRS 0x48525300 /* Intersil */ 519 #define AC97_VENDOR_ICE 0x49434500 /* ICEnsemble */ 520 #define AC97_VENDOR_ITE 0x49544500 /* ITE */ 521 #define AC97_VENDOR_NSC 0x4e534300 /* National */ 522 #define AC97_VENDOR_PSC 0x50534300 /* Philips */ 523 #define AC97_VENDOR_SIL 0x53494c00 /* Silicon Labs */ 524 #define AC97_VENDOR_ST 0x83847600 /* SigmaTel */ 525 #define AC97_VENDOR_TRA 0x54524100 /* TriTech */ 526 #define AC97_VENDOR_TXN 0x54584e00 /* TI */ 527 #define AC97_VENDOR_VIA 0x56494100 /* VIA */ 528 #define AC97_VENDOR_WML 0x574d4c00 /* Wolfson */ 529 #define AC97_VENDOR_YMH 0x594d4800 /* Yamaha */ 530 531 /* 532 * Known Codec IDs. 533 */ 534 #define AC97_CODEC_AD1819B 0x41445303 535 #define AC97_CODEC_AD1881 0x41445340 536 #define AC97_CODEC_AD1881A 0x41445348 537 #define AC97_CODEC_AD1885 0x41445360 538 #define AC97_CODEC_AD1886 0x41445361 539 #define AC97_CODEC_AD1887 0x41445362 540 #define AC97_CODEC_AD1888 0x41445368 541 #define AC97_CODEC_AD1980 0x41445370 542 #define AC97_CODEC_AD1981A 0x41445371 543 #define AC97_CODEC_AD1981 0x41445372 544 #define AC97_CODEC_AD1981B 0x41445374 545 #define AC97_CODEC_AD1985 0x41445375 546 #define AC97_CODEC_AK4540 0x414b4d00 547 #define AC97_CODEC_ALC100 0x414c4326 548 #define AC97_CODEC_ALC200P 0x414c4710 549 #define AC97_CODEC_ALC202 0x414c4740 550 #define AC97_CODEC_ALC203 0x414c4770 551 #define AC97_CODEC_ALC250 0x414c4750 552 #define AC97_CODEC_ALC250_2 0x414c4752 553 #define AC97_CODEC_ALC650 0x414c4720 554 #define AC97_CODEC_ALC655 0x414c4760 555 #define AC97_CODEC_ALC658 0x414c4780 556 #define AC97_CODEC_ALC850 0x414c4790 557 #define AC97_CODEC_CMI9738 0x434d4941 558 #define AC97_CODEC_CMI9739 0x434d4961 559 #define AC97_CODEC_CMI9780 0x434d4969 560 #define AC97_CODEC_CMI9761 0x434d4978 561 #define AC97_CODEC_CMI9761_2 0x434d4982 562 #define AC97_CODEC_CMI9761_3 0x434d4983 563 #define AC97_CODEC_CS4202 0x43525970 564 #define AC97_CODEC_CS4205 0x43525950 565 #define AC97_CODEC_CS4294 0x43525920 566 #define AC97_CODEC_CS4297 0x43525900 567 #define AC97_CODEC_CS4297A 0x43525910 568 #define AC97_CODEC_CS4299 0x43525930 569 #define AC97_CODEC_CX20468 0x43585428 570 #define AC97_CODEC_CX20468_2 0x43585429 571 #define AC97_CODEC_CX20468_21 0x43585430 572 #define AC97_CODEC_EM28028 0x454d4328 573 #define AC97_CODEC_ES1921 0x45838308 574 #define AC97_CODEC_EV1938 0x000f8384 575 #define AC97_CODEC_ICE1232 0x49434511 576 #define AC97_CODEC_LM4550 0x4e534350 577 #define AC97_CODEC_STAC9700 0x83847600 578 #define AC97_CODEC_STAC9701 0x83847601 579 #define AC97_CODEC_STAC9701_2 0xc250c250 580 #define AC97_CODEC_STAC9704 0x83847604 581 #define AC97_CODEC_STAC9705 0x83847605 582 #define AC97_CODEC_STAC9708 0x83847608 583 #define AC97_CODEC_STAC9721 0x83847609 584 #define AC97_CODEC_STAC9744 0x83847644 585 #define AC97_CODEC_STAC9750 0x83847650 586 #define AC97_CODEC_STAC9752 0x83847652 587 #define AC97_CODEC_STAC9756 0x83847656 588 #define AC97_CODEC_STAC9758 0x83847658 589 #define AC97_CODEC_STAC9766 0x83847666 590 #define AC97_CODEC_TR28023 0x54524103 591 #define AC97_CODEC_TR28023_2 0x54524123 592 #define AC97_CODEC_TR28028 0x54524108 593 #define AC97_CODEC_TR28028_2 0x54524128 594 #define AC97_CODEC_VT1612A 0x56494161 595 #define AC97_CODEC_VT1617A 0x56494170 596 #define AC97_CODEC_VT1616 0x49434551 597 #define AC97_CODEC_VT1616A 0x49434552 598 #define AC97_CODEC_VT1618 0x56494182 599 #define AC97_CODEC_WM9701A 0x574d4c00 600 #define AC97_CODEC_WM9703 0x574d4c03 601 #define AC97_CODEC_WM9704 0x574d4c04 602 #define AC97_CODEC_YMF743 0x594d4800 603 #define AC97_CODEC_YMF753 0x594d4803 604 605 /* 606 * Functions for drivers to interact with the common ac97 module. 607 */ 608 typedef struct ac97 ac97_t; 609 typedef void (*ac97_wr_t)(void *, uint8_t, uint16_t); 610 typedef uint16_t (*ac97_rd_t)(void *, uint8_t); 611 typedef struct ac97_ctrl ac97_ctrl_t; 612 typedef boolean_t (*ac97_ctrl_walk_t)(ac97_ctrl_t *, void *); 613 614 /* 615 * Old style initialization. The driver simply calls ac97_alloc() 616 * followed by ac97_init(). These interfaces should not be used in 617 * new drivers. 618 */ 619 ac97_t *ac97_alloc(dev_info_t *, ac97_rd_t, ac97_wr_t, void *); 620 int ac97_init(ac97_t *, audio_dev_t *); 621 622 /* 623 * New style initialization. The driver will call ac97_allocate(), 624 * then it can call ac97_register_controls() to register controls. 625 * Or, if it doesn't want all controls registered, it can find 626 * controls with ac97_find_control(), and register them individually 627 * with ac97_register_control(). ac97_alloc() 628 * 629 * Note that adjusting the set of controls should only be performed 630 * while the driver is single threaded, during attach or detach 631 * processing. The AC'97 framework does not provide any locks 632 * surrounding its internal list of controls. Note however that 633 * changes to the controls made from within the framework (e.g. by 634 * someone accessing the control via the audio framework) are safe. 635 */ 636 ac97_t *ac97_allocate(audio_dev_t *, dev_info_t *, ac97_rd_t, ac97_wr_t, 637 void *); 638 void ac97_probe_controls(ac97_t *); 639 void ac97_register_controls(ac97_t *); 640 void ac97_unregister_controls(ac97_t *); 641 642 void ac97_walk_controls(ac97_t *, ac97_ctrl_walk_t, void *); 643 ac97_ctrl_t *ac97_control_find(ac97_t *, const char *); 644 void ac97_control_register(ac97_ctrl_t *); 645 void ac97_control_unregister(ac97_ctrl_t *); 646 void ac97_control_remove(ac97_ctrl_t *); 647 const char *ac97_control_name(ac97_ctrl_t *); 648 const audio_ctrl_desc_t *ac97_control_desc(ac97_ctrl_t *); 649 int ac97_control_get(ac97_ctrl_t *, uint64_t *); 650 int ac97_control_set(ac97_ctrl_t *, uint64_t); 651 652 /* 653 * Bits common to both new style and old style initialization. 654 */ 655 void ac97_free(ac97_t *); 656 void ac97_suspend(ac97_t *); 657 void ac97_resume(ac97_t *); 658 void ac97_reset(ac97_t *); 659 int ac97_num_channels(ac97_t *); 660 661 #endif /* _KERNEL */ 662 663 #ifdef __cplusplus 664 } 665 #endif 666 667 #endif /* _SYS_AC97_H */ 668