1 /* 2 * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 3 * Use is subject to license terms. 4 */ 5 6 /* 7 * Copyright (c) 2006 8 * Damien Bergamini <damien.bergamini@free.fr> 9 * 10 * Permission to use, copy, modify, and distribute this software for any 11 * purpose with or without fee is hereby granted, provided that the above 12 * copyright notice and this permission notice appear in all copies. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 15 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 16 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 17 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 18 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 19 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 20 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 21 */ 22 23 #pragma ident "%Z%%M% %I% %E% SMI" 24 25 /* 26 * Driver for Intel PRO/Wireless 3945ABG 802.11 network adapters. 27 */ 28 29 #include <sys/types.h> 30 #include <sys/byteorder.h> 31 #include <sys/conf.h> 32 #include <sys/cmn_err.h> 33 #include <sys/stat.h> 34 #include <sys/ddi.h> 35 #include <sys/sunddi.h> 36 #include <sys/strsubr.h> 37 #include <sys/ethernet.h> 38 #include <inet/common.h> 39 #include <inet/nd.h> 40 #include <inet/mi.h> 41 #include <sys/note.h> 42 #include <sys/stream.h> 43 #include <sys/strsun.h> 44 #include <sys/modctl.h> 45 #include <sys/devops.h> 46 #include <sys/dlpi.h> 47 #include <sys/mac.h> 48 #include <sys/mac_wifi.h> 49 #include <sys/net80211.h> 50 #include <sys/net80211_proto.h> 51 #include <sys/varargs.h> 52 #include <sys/policy.h> 53 #include <sys/pci.h> 54 55 #include "wpireg.h" 56 #include "wpivar.h" 57 #include <inet/wifi_ioctl.h> 58 59 #ifdef DEBUG 60 #define WPI_DEBUG_80211 (1 << 0) 61 #define WPI_DEBUG_CMD (1 << 1) 62 #define WPI_DEBUG_DMA (1 << 2) 63 #define WPI_DEBUG_EEPROM (1 << 3) 64 #define WPI_DEBUG_FW (1 << 4) 65 #define WPI_DEBUG_HW (1 << 5) 66 #define WPI_DEBUG_INTR (1 << 6) 67 #define WPI_DEBUG_MRR (1 << 7) 68 #define WPI_DEBUG_PIO (1 << 8) 69 #define WPI_DEBUG_RX (1 << 9) 70 #define WPI_DEBUG_SCAN (1 << 10) 71 #define WPI_DEBUG_TX (1 << 11) 72 #define WPI_DEBUG_RATECTL (1 << 12) 73 #define WPI_DEBUG_RADIO (1 << 13) 74 uint32_t wpi_dbg_flags = 0; 75 #define WPI_DBG(x) \ 76 wpi_dbg x 77 #else 78 #define WPI_DBG(x) 79 #endif 80 81 static void *wpi_soft_state_p = NULL; 82 static uint8_t wpi_fw_bin [] = { 83 #include "fw-wpi/ipw3945.ucode.hex" 84 }; 85 86 /* DMA attributes for a shared page */ 87 static ddi_dma_attr_t sh_dma_attr = { 88 DMA_ATTR_V0, /* version of this structure */ 89 0, /* lowest usable address */ 90 0xffffffffU, /* highest usable address */ 91 0xffffffffU, /* maximum DMAable byte count */ 92 0x1000, /* alignment in bytes */ 93 0x1000, /* burst sizes (any?) */ 94 1, /* minimum transfer */ 95 0xffffffffU, /* maximum transfer */ 96 0xffffffffU, /* maximum segment length */ 97 1, /* maximum number of segments */ 98 1, /* granularity */ 99 0, /* flags (reserved) */ 100 }; 101 102 /* DMA attributes for a ring descriptor */ 103 static ddi_dma_attr_t ring_desc_dma_attr = { 104 DMA_ATTR_V0, /* version of this structure */ 105 0, /* lowest usable address */ 106 0xffffffffU, /* highest usable address */ 107 0xffffffffU, /* maximum DMAable byte count */ 108 0x4000, /* alignment in bytes */ 109 0x100, /* burst sizes (any?) */ 110 1, /* minimum transfer */ 111 0xffffffffU, /* maximum transfer */ 112 0xffffffffU, /* maximum segment length */ 113 1, /* maximum number of segments */ 114 1, /* granularity */ 115 0, /* flags (reserved) */ 116 }; 117 118 119 /* DMA attributes for a tx cmd */ 120 static ddi_dma_attr_t tx_cmd_dma_attr = { 121 DMA_ATTR_V0, /* version of this structure */ 122 0, /* lowest usable address */ 123 0xffffffffU, /* highest usable address */ 124 0xffffffffU, /* maximum DMAable byte count */ 125 4, /* alignment in bytes */ 126 0x100, /* burst sizes (any?) */ 127 1, /* minimum transfer */ 128 0xffffffffU, /* maximum transfer */ 129 0xffffffffU, /* maximum segment length */ 130 1, /* maximum number of segments */ 131 1, /* granularity */ 132 0, /* flags (reserved) */ 133 }; 134 135 /* DMA attributes for a rx buffer */ 136 static ddi_dma_attr_t rx_buffer_dma_attr = { 137 DMA_ATTR_V0, /* version of this structure */ 138 0, /* lowest usable address */ 139 0xffffffffU, /* highest usable address */ 140 0xffffffffU, /* maximum DMAable byte count */ 141 1, /* alignment in bytes */ 142 0x100, /* burst sizes (any?) */ 143 1, /* minimum transfer */ 144 0xffffffffU, /* maximum transfer */ 145 0xffffffffU, /* maximum segment length */ 146 1, /* maximum number of segments */ 147 1, /* granularity */ 148 0, /* flags (reserved) */ 149 }; 150 151 /* 152 * DMA attributes for a tx buffer. 153 * the maximum number of segments is 4 for the hardware. 154 * now all the wifi drivers put the whole frame in a single 155 * descriptor, so we define the maximum number of segments 4, 156 * just the same as the rx_buffer. we consider leverage the HW 157 * ability in the future, that is why we don't define rx and tx 158 * buffer_dma_attr as the same. 159 */ 160 static ddi_dma_attr_t tx_buffer_dma_attr = { 161 DMA_ATTR_V0, /* version of this structure */ 162 0, /* lowest usable address */ 163 0xffffffffU, /* highest usable address */ 164 0xffffffffU, /* maximum DMAable byte count */ 165 1, /* alignment in bytes */ 166 0x100, /* burst sizes (any?) */ 167 1, /* minimum transfer */ 168 0xffffffffU, /* maximum transfer */ 169 0xffffffffU, /* maximum segment length */ 170 1, /* maximum number of segments */ 171 1, /* granularity */ 172 0, /* flags (reserved) */ 173 }; 174 175 /* DMA attributes for a load firmware */ 176 static ddi_dma_attr_t fw_buffer_dma_attr = { 177 DMA_ATTR_V0, /* version of this structure */ 178 0, /* lowest usable address */ 179 0xffffffffU, /* highest usable address */ 180 0x7fffffff, /* maximum DMAable byte count */ 181 4, /* alignment in bytes */ 182 0x100, /* burst sizes (any?) */ 183 1, /* minimum transfer */ 184 0xffffffffU, /* maximum transfer */ 185 0xffffffffU, /* maximum segment length */ 186 4, /* maximum number of segments */ 187 1, /* granularity */ 188 0, /* flags (reserved) */ 189 }; 190 191 /* regs access attributes */ 192 static ddi_device_acc_attr_t wpi_reg_accattr = { 193 DDI_DEVICE_ATTR_V0, 194 DDI_STRUCTURE_LE_ACC, 195 DDI_STRICTORDER_ACC, 196 DDI_DEFAULT_ACC 197 }; 198 199 /* DMA access attributes */ 200 static ddi_device_acc_attr_t wpi_dma_accattr = { 201 DDI_DEVICE_ATTR_V0, 202 DDI_NEVERSWAP_ACC, 203 DDI_STRICTORDER_ACC, 204 DDI_DEFAULT_ACC 205 }; 206 207 static int wpi_ring_init(wpi_sc_t *); 208 static void wpi_ring_free(wpi_sc_t *); 209 static int wpi_alloc_shared(wpi_sc_t *); 210 static void wpi_free_shared(wpi_sc_t *); 211 static int wpi_alloc_fw_dma(wpi_sc_t *); 212 static void wpi_free_fw_dma(wpi_sc_t *); 213 static int wpi_alloc_rx_ring(wpi_sc_t *); 214 static void wpi_reset_rx_ring(wpi_sc_t *); 215 static void wpi_free_rx_ring(wpi_sc_t *); 216 static int wpi_alloc_tx_ring(wpi_sc_t *, wpi_tx_ring_t *, int, int); 217 static void wpi_reset_tx_ring(wpi_sc_t *, wpi_tx_ring_t *); 218 static void wpi_free_tx_ring(wpi_sc_t *, wpi_tx_ring_t *); 219 220 static ieee80211_node_t *wpi_node_alloc(ieee80211com_t *); 221 static void wpi_node_free(ieee80211_node_t *); 222 static int wpi_newstate(ieee80211com_t *, enum ieee80211_state, int); 223 static void wpi_mem_lock(wpi_sc_t *); 224 static void wpi_mem_unlock(wpi_sc_t *); 225 static uint32_t wpi_mem_read(wpi_sc_t *, uint16_t); 226 static void wpi_mem_write(wpi_sc_t *, uint16_t, uint32_t); 227 static void wpi_mem_write_region_4(wpi_sc_t *, uint16_t, 228 const uint32_t *, int); 229 static uint16_t wpi_read_prom_word(wpi_sc_t *, uint32_t); 230 static int wpi_load_microcode(wpi_sc_t *); 231 static int wpi_load_firmware(wpi_sc_t *, uint32_t); 232 static void wpi_rx_intr(wpi_sc_t *, wpi_rx_desc_t *, 233 wpi_rx_data_t *); 234 static void wpi_tx_intr(wpi_sc_t *, wpi_rx_desc_t *, 235 wpi_rx_data_t *); 236 static void wpi_cmd_intr(wpi_sc_t *, wpi_rx_desc_t *); 237 static uint_t wpi_intr(caddr_t); 238 static uint_t wpi_notif_softintr(caddr_t); 239 static uint8_t wpi_plcp_signal(int); 240 static void wpi_read_eeprom(wpi_sc_t *); 241 static int wpi_cmd(wpi_sc_t *, int, const void *, int, int); 242 static int wpi_mrr_setup(wpi_sc_t *); 243 static void wpi_set_led(wpi_sc_t *, uint8_t, uint8_t, uint8_t); 244 static int wpi_auth(wpi_sc_t *); 245 static int wpi_scan(wpi_sc_t *); 246 static int wpi_config(wpi_sc_t *); 247 static void wpi_stop_master(wpi_sc_t *); 248 static int wpi_power_up(wpi_sc_t *); 249 static int wpi_reset(wpi_sc_t *); 250 static void wpi_hw_config(wpi_sc_t *); 251 static int wpi_init(wpi_sc_t *); 252 static void wpi_stop(wpi_sc_t *); 253 static void wpi_amrr_init(wpi_amrr_t *); 254 static void wpi_amrr_timeout(wpi_sc_t *); 255 static void wpi_amrr_ratectl(void *, ieee80211_node_t *); 256 257 static int wpi_attach(dev_info_t *dip, ddi_attach_cmd_t cmd); 258 static int wpi_detach(dev_info_t *dip, ddi_detach_cmd_t cmd); 259 260 /* 261 * GLD specific operations 262 */ 263 static int wpi_m_stat(void *arg, uint_t stat, uint64_t *val); 264 static int wpi_m_start(void *arg); 265 static void wpi_m_stop(void *arg); 266 static int wpi_m_unicst(void *arg, const uint8_t *macaddr); 267 static int wpi_m_multicst(void *arg, boolean_t add, const uint8_t *m); 268 static int wpi_m_promisc(void *arg, boolean_t on); 269 static mblk_t *wpi_m_tx(void *arg, mblk_t *mp); 270 static void wpi_m_ioctl(void *arg, queue_t *wq, mblk_t *mp); 271 272 static void wpi_destroy_locks(wpi_sc_t *sc); 273 static int wpi_send(ieee80211com_t *ic, mblk_t *mp, uint8_t type); 274 static void wpi_thread(wpi_sc_t *sc); 275 276 /* 277 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 278 */ 279 static const struct ieee80211_rateset wpi_rateset_11b = 280 { 4, { 2, 4, 11, 22 } }; 281 282 static const struct ieee80211_rateset wpi_rateset_11g = 283 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 284 285 static const uint8_t wpi_ridx_to_signal[] = { 286 /* OFDM: IEEE Std 802.11a-1999, pp. 14 Table 80 */ 287 /* R1-R4 (ral/ural is R4-R1) */ 288 0xd, 0xf, 0x5, 0x7, 0x9, 0xb, 0x1, 0x3, 289 /* CCK: device-dependent */ 290 10, 20, 55, 110 291 }; 292 293 /* 294 * For mfthread only 295 */ 296 extern pri_t minclsyspri; 297 298 /* 299 * Module Loading Data & Entry Points 300 */ 301 DDI_DEFINE_STREAM_OPS(wpi_devops, nulldev, nulldev, wpi_attach, 302 wpi_detach, nodev, NULL, D_MP, NULL); 303 304 static struct modldrv wpi_modldrv = { 305 &mod_driverops, 306 "Intel(R) PRO/Wireless 3945ABG driver", 307 &wpi_devops 308 }; 309 310 static struct modlinkage wpi_modlinkage = { 311 MODREV_1, 312 &wpi_modldrv, 313 NULL 314 }; 315 316 int 317 _init(void) 318 { 319 int status; 320 321 status = ddi_soft_state_init(&wpi_soft_state_p, 322 sizeof (wpi_sc_t), 1); 323 if (status != DDI_SUCCESS) 324 return (status); 325 326 mac_init_ops(&wpi_devops, "wpi"); 327 status = mod_install(&wpi_modlinkage); 328 if (status != DDI_SUCCESS) { 329 mac_fini_ops(&wpi_devops); 330 ddi_soft_state_fini(&wpi_soft_state_p); 331 } 332 333 return (status); 334 } 335 336 int 337 _fini(void) 338 { 339 int status; 340 341 status = mod_remove(&wpi_modlinkage); 342 if (status == DDI_SUCCESS) { 343 mac_fini_ops(&wpi_devops); 344 ddi_soft_state_fini(&wpi_soft_state_p); 345 } 346 347 return (status); 348 } 349 350 int 351 _info(struct modinfo *mip) 352 { 353 return (mod_info(&wpi_modlinkage, mip)); 354 } 355 356 /* 357 * Mac Call Back entries 358 */ 359 mac_callbacks_t wpi_m_callbacks = { 360 MC_IOCTL, 361 wpi_m_stat, 362 wpi_m_start, 363 wpi_m_stop, 364 wpi_m_promisc, 365 wpi_m_multicst, 366 wpi_m_unicst, 367 wpi_m_tx, 368 NULL, 369 wpi_m_ioctl 370 }; 371 372 #ifdef DEBUG 373 void 374 wpi_dbg(uint32_t flags, const char *fmt, ...) 375 { 376 va_list ap; 377 378 if (flags & wpi_dbg_flags) { 379 va_start(ap, fmt); 380 vcmn_err(CE_NOTE, fmt, ap); 381 va_end(ap); 382 } 383 } 384 #endif 385 /* 386 * device operations 387 */ 388 int 389 wpi_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) 390 { 391 wpi_sc_t *sc; 392 ddi_acc_handle_t cfg_handle; 393 caddr_t cfg_base; 394 ieee80211com_t *ic; 395 int instance, err, i; 396 char strbuf[32]; 397 wifi_data_t wd = { 0 }; 398 mac_register_t *macp; 399 400 if (cmd != DDI_ATTACH) { 401 err = DDI_FAILURE; 402 goto attach_fail1; 403 } 404 405 instance = ddi_get_instance(dip); 406 err = ddi_soft_state_zalloc(wpi_soft_state_p, instance); 407 if (err != DDI_SUCCESS) { 408 cmn_err(CE_WARN, 409 "wpi_attach(): failed to allocate soft state\n"); 410 goto attach_fail1; 411 } 412 sc = ddi_get_soft_state(wpi_soft_state_p, instance); 413 sc->sc_dip = dip; 414 415 err = ddi_regs_map_setup(dip, 0, &cfg_base, 0, 0, 416 &wpi_reg_accattr, &cfg_handle); 417 if (err != DDI_SUCCESS) { 418 cmn_err(CE_WARN, 419 "wpi_attach(): failed to map config spaces regs\n"); 420 goto attach_fail2; 421 } 422 sc->sc_rev = ddi_get8(cfg_handle, 423 (uint8_t *)(cfg_base + PCI_CONF_REVID)); 424 ddi_put8(cfg_handle, (uint8_t *)(cfg_base + 0x41), 0); 425 sc->sc_clsz = ddi_get16(cfg_handle, 426 (uint16_t *)(cfg_base + PCI_CONF_CACHE_LINESZ)); 427 ddi_regs_map_free(&cfg_handle); 428 if (!sc->sc_clsz) 429 sc->sc_clsz = 16; 430 sc->sc_clsz = (sc->sc_clsz << 2); 431 sc->sc_dmabuf_sz = roundup(0x1000 + sizeof (struct ieee80211_frame) + 432 IEEE80211_MTU + IEEE80211_CRC_LEN + 433 (IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN + 434 IEEE80211_WEP_CRCLEN), sc->sc_clsz); 435 /* 436 * Map operating registers 437 */ 438 err = ddi_regs_map_setup(dip, 1, &sc->sc_base, 439 0, 0, &wpi_reg_accattr, &sc->sc_handle); 440 if (err != DDI_SUCCESS) { 441 cmn_err(CE_WARN, 442 "wpi_attach(): failed to map device regs\n"); 443 goto attach_fail2; 444 } 445 446 /* 447 * Allocate shared page. 448 */ 449 err = wpi_alloc_shared(sc); 450 if (err != DDI_SUCCESS) { 451 cmn_err(CE_WARN, "failed to allocate shared page\n"); 452 goto attach_fail3; 453 } 454 455 /* 456 * Get the hw conf, including MAC address, then init all rings. 457 */ 458 wpi_read_eeprom(sc); 459 err = wpi_ring_init(sc); 460 if (err != DDI_SUCCESS) { 461 cmn_err(CE_WARN, "wpi_attach(): " 462 "failed to allocate and initialize ring\n"); 463 goto attach_fail4; 464 } 465 466 sc->sc_hdr = (const wpi_firmware_hdr_t *)wpi_fw_bin; 467 468 /* firmware image layout: |HDR|<--TEXT-->|<--DATA-->|<--BOOT-->| */ 469 sc->sc_text = (const char *)(sc->sc_hdr + 1); 470 sc->sc_data = sc->sc_text + LE_32(sc->sc_hdr->textsz); 471 sc->sc_boot = sc->sc_data + LE_32(sc->sc_hdr->datasz); 472 err = wpi_alloc_fw_dma(sc); 473 if (err != DDI_SUCCESS) { 474 cmn_err(CE_WARN, "wpi_attach(): " 475 "failed to allocate firmware dma\n"); 476 goto attach_fail5; 477 } 478 479 /* 480 * Initialize mutexs and condvars 481 */ 482 err = ddi_get_iblock_cookie(dip, 0, &sc->sc_iblk); 483 if (err != DDI_SUCCESS) { 484 cmn_err(CE_WARN, 485 "wpi_attach(): failed to do ddi_get_iblock_cookie()\n"); 486 goto attach_fail6; 487 } 488 mutex_init(&sc->sc_glock, NULL, MUTEX_DRIVER, sc->sc_iblk); 489 mutex_init(&sc->sc_tx_lock, NULL, MUTEX_DRIVER, sc->sc_iblk); 490 cv_init(&sc->sc_fw_cv, NULL, CV_DRIVER, NULL); 491 cv_init(&sc->sc_cmd_cv, NULL, CV_DRIVER, NULL); 492 cv_init(&sc->sc_tx_cv, "tx-ring", CV_DRIVER, NULL); 493 /* 494 * initialize the mfthread 495 */ 496 mutex_init(&sc->sc_mt_lock, NULL, MUTEX_DRIVER, 497 (void *) sc->sc_iblk); 498 cv_init(&sc->sc_mt_cv, NULL, CV_DRIVER, NULL); 499 sc->sc_mf_thread = NULL; 500 sc->sc_mf_thread_switch = 0; 501 /* 502 * Initialize the wifi part, which will be used by 503 * generic layer 504 */ 505 ic = &sc->sc_ic; 506 ic->ic_phytype = IEEE80211_T_OFDM; 507 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 508 ic->ic_state = IEEE80211_S_INIT; 509 ic->ic_maxrssi = 70; /* experimental number */ 510 /* 511 * use software WEP for the current version. 512 */ 513 ic->ic_caps = IEEE80211_C_SHPREAMBLE | IEEE80211_C_TXPMGT | 514 IEEE80211_C_PMGT; 515 516 /* set supported .11b and .11g rates */ 517 ic->ic_sup_rates[IEEE80211_MODE_11B] = wpi_rateset_11b; 518 ic->ic_sup_rates[IEEE80211_MODE_11G] = wpi_rateset_11g; 519 520 /* set supported .11b and .11g channels (1 through 14) */ 521 for (i = 1; i <= 14; i++) { 522 ic->ic_sup_channels[i].ich_freq = 523 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 524 ic->ic_sup_channels[i].ich_flags = 525 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 526 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 527 } 528 ic->ic_ibss_chan = &ic->ic_sup_channels[0]; 529 ic->ic_xmit = wpi_send; 530 /* 531 * init Wifi layer 532 */ 533 ieee80211_attach(ic); 534 535 /* 536 * Override 80211 default routines 537 */ 538 sc->sc_newstate = ic->ic_newstate; 539 ic->ic_newstate = wpi_newstate; 540 ic->ic_node_alloc = wpi_node_alloc; 541 ic->ic_node_free = wpi_node_free; 542 ieee80211_media_init(ic); 543 /* 544 * initialize default tx key 545 */ 546 ic->ic_def_txkey = 0; 547 548 err = ddi_add_softintr(dip, DDI_SOFTINT_LOW, 549 &sc->sc_notif_softint_id, &sc->sc_iblk, NULL, wpi_notif_softintr, 550 (caddr_t)sc); 551 if (err != DDI_SUCCESS) { 552 cmn_err(CE_WARN, 553 "wpi_attach(): failed to do ddi_add_softintr()\n"); 554 goto attach_fail7; 555 } 556 557 /* 558 * Add the interrupt handler 559 */ 560 err = ddi_add_intr(dip, 0, &sc->sc_iblk, NULL, 561 wpi_intr, (caddr_t)sc); 562 if (err != DDI_SUCCESS) { 563 cmn_err(CE_WARN, 564 "wpi_attach(): failed to do ddi_add_intr()\n"); 565 goto attach_fail8; 566 } 567 568 /* 569 * Initialize pointer to device specific functions 570 */ 571 wd.wd_secalloc = WIFI_SEC_NONE; 572 wd.wd_opmode = ic->ic_opmode; 573 IEEE80211_ADDR_COPY(wd.wd_bssid, ic->ic_macaddr); 574 575 macp = mac_alloc(MAC_VERSION); 576 if (err != DDI_SUCCESS) { 577 cmn_err(CE_WARN, 578 "wpi_attach(): failed to do mac_alloc()\n"); 579 goto attach_fail9; 580 } 581 582 macp->m_type_ident = MAC_PLUGIN_IDENT_WIFI; 583 macp->m_driver = sc; 584 macp->m_dip = dip; 585 macp->m_src_addr = ic->ic_macaddr; 586 macp->m_callbacks = &wpi_m_callbacks; 587 macp->m_min_sdu = 0; 588 macp->m_max_sdu = IEEE80211_MTU; 589 macp->m_pdata = &wd; 590 macp->m_pdata_size = sizeof (wd); 591 592 /* 593 * Register the macp to mac 594 */ 595 err = mac_register(macp, &ic->ic_mach); 596 mac_free(macp); 597 if (err != DDI_SUCCESS) { 598 cmn_err(CE_WARN, 599 "wpi_attach(): failed to do mac_register()\n"); 600 goto attach_fail9; 601 } 602 603 /* 604 * Create minor node of type DDI_NT_NET_WIFI 605 */ 606 (void) snprintf(strbuf, sizeof (strbuf), "wpi%d", instance); 607 err = ddi_create_minor_node(dip, strbuf, S_IFCHR, 608 instance + 1, DDI_NT_NET_WIFI, 0); 609 if (err != DDI_SUCCESS) 610 cmn_err(CE_WARN, 611 "wpi_attach(): failed to do ddi_create_minor_node()\n"); 612 613 /* 614 * Notify link is down now 615 */ 616 mac_link_update(ic->ic_mach, LINK_STATE_DOWN); 617 618 /* 619 * create the mf thread to handle the link status, 620 * recovery fatal error, etc. 621 */ 622 623 sc->sc_mf_thread_switch = 1; 624 if (sc->sc_mf_thread == NULL) 625 sc->sc_mf_thread = thread_create((caddr_t)NULL, 0, 626 wpi_thread, sc, 0, &p0, TS_RUN, minclsyspri); 627 628 sc->sc_flags |= WPI_F_ATTACHED; 629 630 return (DDI_SUCCESS); 631 attach_fail9: 632 ddi_remove_intr(dip, 0, sc->sc_iblk); 633 attach_fail8: 634 ddi_remove_softintr(sc->sc_notif_softint_id); 635 sc->sc_notif_softint_id = NULL; 636 attach_fail7: 637 ieee80211_detach(ic); 638 wpi_destroy_locks(sc); 639 attach_fail6: 640 wpi_free_fw_dma(sc); 641 attach_fail5: 642 wpi_ring_free(sc); 643 attach_fail4: 644 wpi_free_shared(sc); 645 attach_fail3: 646 ddi_regs_map_free(&sc->sc_handle); 647 attach_fail2: 648 ddi_soft_state_free(wpi_soft_state_p, instance); 649 attach_fail1: 650 return (err); 651 } 652 653 int 654 wpi_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) 655 { 656 wpi_sc_t *sc; 657 int err; 658 659 sc = ddi_get_soft_state(wpi_soft_state_p, ddi_get_instance(dip)); 660 ASSERT(sc != NULL); 661 662 if (cmd != DDI_DETACH) 663 return (DDI_FAILURE); 664 if (!(sc->sc_flags & WPI_F_ATTACHED)) 665 return (DDI_FAILURE); 666 667 /* 668 * Destroy the mf_thread 669 */ 670 mutex_enter(&sc->sc_mt_lock); 671 sc->sc_mf_thread_switch = 0; 672 while (sc->sc_mf_thread != NULL) { 673 if (cv_wait_sig(&sc->sc_mt_cv, &sc->sc_mt_lock) == 0) 674 break; 675 } 676 mutex_exit(&sc->sc_mt_lock); 677 678 wpi_stop(sc); 679 680 /* 681 * Unregiste from the MAC layer subsystem 682 */ 683 err = mac_unregister(sc->sc_ic.ic_mach); 684 if (err != DDI_SUCCESS) 685 return (err); 686 687 mutex_enter(&sc->sc_glock); 688 wpi_free_fw_dma(sc); 689 wpi_ring_free(sc); 690 wpi_free_shared(sc); 691 mutex_exit(&sc->sc_glock); 692 693 ddi_remove_intr(dip, 0, sc->sc_iblk); 694 ddi_remove_softintr(sc->sc_notif_softint_id); 695 sc->sc_notif_softint_id = NULL; 696 697 /* 698 * detach ieee80211 699 */ 700 ieee80211_detach(&sc->sc_ic); 701 702 wpi_destroy_locks(sc); 703 704 ddi_regs_map_free(&sc->sc_handle); 705 ddi_remove_minor_node(dip, NULL); 706 ddi_soft_state_free(wpi_soft_state_p, ddi_get_instance(dip)); 707 708 return (DDI_SUCCESS); 709 } 710 711 static void 712 wpi_destroy_locks(wpi_sc_t *sc) 713 { 714 cv_destroy(&sc->sc_mt_cv); 715 mutex_destroy(&sc->sc_mt_lock); 716 cv_destroy(&sc->sc_tx_cv); 717 cv_destroy(&sc->sc_cmd_cv); 718 cv_destroy(&sc->sc_fw_cv); 719 mutex_destroy(&sc->sc_tx_lock); 720 mutex_destroy(&sc->sc_glock); 721 } 722 723 /* 724 * Allocate an area of memory and a DMA handle for accessing it 725 */ 726 static int 727 wpi_alloc_dma_mem(wpi_sc_t *sc, size_t memsize, ddi_dma_attr_t *dma_attr_p, 728 ddi_device_acc_attr_t *acc_attr_p, uint_t dma_flags, wpi_dma_t *dma_p) 729 { 730 caddr_t vaddr; 731 int err; 732 733 /* 734 * Allocate handle 735 */ 736 err = ddi_dma_alloc_handle(sc->sc_dip, dma_attr_p, 737 DDI_DMA_SLEEP, NULL, &dma_p->dma_hdl); 738 if (err != DDI_SUCCESS) { 739 dma_p->dma_hdl = NULL; 740 return (DDI_FAILURE); 741 } 742 743 /* 744 * Allocate memory 745 */ 746 err = ddi_dma_mem_alloc(dma_p->dma_hdl, memsize, acc_attr_p, 747 dma_flags & (DDI_DMA_CONSISTENT | DDI_DMA_STREAMING), 748 DDI_DMA_SLEEP, NULL, &vaddr, &dma_p->alength, &dma_p->acc_hdl); 749 if (err != DDI_SUCCESS) { 750 ddi_dma_free_handle(&dma_p->dma_hdl); 751 dma_p->dma_hdl = NULL; 752 dma_p->acc_hdl = NULL; 753 return (DDI_FAILURE); 754 } 755 756 /* 757 * Bind the two together 758 */ 759 dma_p->mem_va = vaddr; 760 err = ddi_dma_addr_bind_handle(dma_p->dma_hdl, NULL, 761 vaddr, dma_p->alength, dma_flags, DDI_DMA_SLEEP, NULL, 762 &dma_p->cookie, &dma_p->ncookies); 763 if (err != DDI_DMA_MAPPED) { 764 ddi_dma_mem_free(&dma_p->acc_hdl); 765 ddi_dma_free_handle(&dma_p->dma_hdl); 766 dma_p->acc_hdl = NULL; 767 dma_p->dma_hdl = NULL; 768 return (DDI_FAILURE); 769 } 770 771 dma_p->nslots = ~0U; 772 dma_p->size = ~0U; 773 dma_p->token = ~0U; 774 dma_p->offset = 0; 775 return (DDI_SUCCESS); 776 } 777 778 /* 779 * Free one allocated area of DMAable memory 780 */ 781 static void 782 wpi_free_dma_mem(wpi_dma_t *dma_p) 783 { 784 if (dma_p->dma_hdl != NULL) { 785 if (dma_p->ncookies) { 786 (void) ddi_dma_unbind_handle(dma_p->dma_hdl); 787 dma_p->ncookies = 0; 788 } 789 ddi_dma_free_handle(&dma_p->dma_hdl); 790 dma_p->dma_hdl = NULL; 791 } 792 793 if (dma_p->acc_hdl != NULL) { 794 ddi_dma_mem_free(&dma_p->acc_hdl); 795 dma_p->acc_hdl = NULL; 796 } 797 } 798 799 /* 800 * Allocate an area of dma memory for firmware load. 801 * Idealy, this allocation should be a one time action, that is, 802 * the memory will be freed after the firmware is uploaded to the 803 * card. but since a recovery mechanism for the fatal firmware need 804 * reload the firmware, and re-allocate dma at run time may be failed, 805 * so we allocate it at attach and keep it in the whole lifecycle of 806 * the driver. 807 */ 808 static int 809 wpi_alloc_fw_dma(wpi_sc_t *sc) 810 { 811 int i, err = DDI_SUCCESS; 812 wpi_dma_t *dma_p; 813 814 err = wpi_alloc_dma_mem(sc, LE_32(sc->sc_hdr->textsz), 815 &fw_buffer_dma_attr, &wpi_dma_accattr, 816 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 817 &sc->sc_dma_fw_text); 818 dma_p = &sc->sc_dma_fw_text; 819 WPI_DBG((WPI_DEBUG_DMA, "ncookies:%d addr1:%x size1:%x\n", 820 dma_p->ncookies, dma_p->cookie.dmac_address, 821 dma_p->cookie.dmac_size)); 822 if (err != DDI_SUCCESS) { 823 cmn_err(CE_WARN, "wpi_alloc_fw_dma(): failed to alloc" 824 "text dma memory"); 825 goto fail; 826 } 827 for (i = 0; i < dma_p->ncookies; i++) { 828 sc->sc_fw_text_cookie[i] = dma_p->cookie; 829 ddi_dma_nextcookie(dma_p->dma_hdl, &dma_p->cookie); 830 } 831 err = wpi_alloc_dma_mem(sc, LE_32(sc->sc_hdr->datasz), 832 &fw_buffer_dma_attr, &wpi_dma_accattr, 833 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 834 &sc->sc_dma_fw_data); 835 dma_p = &sc->sc_dma_fw_data; 836 WPI_DBG((WPI_DEBUG_DMA, "ncookies:%d addr1:%x size1:%x\n", 837 dma_p->ncookies, dma_p->cookie.dmac_address, 838 dma_p->cookie.dmac_size)); 839 if (err != DDI_SUCCESS) { 840 cmn_err(CE_WARN, "wpi_alloc_fw_dma(): failed to alloc" 841 "data dma memory"); 842 goto fail; 843 } 844 for (i = 0; i < dma_p->ncookies; i++) { 845 sc->sc_fw_data_cookie[i] = dma_p->cookie; 846 ddi_dma_nextcookie(dma_p->dma_hdl, &dma_p->cookie); 847 } 848 fail: 849 return (err); 850 } 851 852 static void 853 wpi_free_fw_dma(wpi_sc_t *sc) 854 { 855 wpi_free_dma_mem(&sc->sc_dma_fw_text); 856 wpi_free_dma_mem(&sc->sc_dma_fw_data); 857 } 858 859 /* 860 * Allocate a shared page between host and NIC. 861 */ 862 static int 863 wpi_alloc_shared(wpi_sc_t *sc) 864 { 865 int err = DDI_SUCCESS; 866 867 /* must be aligned on a 4K-page boundary */ 868 err = wpi_alloc_dma_mem(sc, sizeof (wpi_shared_t), 869 &sh_dma_attr, &wpi_dma_accattr, 870 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 871 &sc->sc_dma_sh); 872 if (err != DDI_SUCCESS) 873 goto fail; 874 sc->sc_shared = (wpi_shared_t *)sc->sc_dma_sh.mem_va; 875 return (err); 876 877 fail: 878 wpi_free_shared(sc); 879 return (err); 880 } 881 882 static void 883 wpi_free_shared(wpi_sc_t *sc) 884 { 885 wpi_free_dma_mem(&sc->sc_dma_sh); 886 } 887 888 static int 889 wpi_alloc_rx_ring(wpi_sc_t *sc) 890 { 891 wpi_rx_ring_t *ring; 892 wpi_rx_data_t *data; 893 int i, err = DDI_SUCCESS; 894 895 ring = &sc->sc_rxq; 896 ring->cur = 0; 897 898 err = wpi_alloc_dma_mem(sc, WPI_RX_RING_COUNT * sizeof (uint32_t), 899 &ring_desc_dma_attr, &wpi_dma_accattr, 900 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 901 &ring->dma_desc); 902 if (err != DDI_SUCCESS) { 903 WPI_DBG((WPI_DEBUG_DMA, "dma alloc rx ring desc failed\n")); 904 goto fail; 905 } 906 ring->desc = (uint32_t *)ring->dma_desc.mem_va; 907 908 /* 909 * Allocate Rx buffers. 910 */ 911 for (i = 0; i < WPI_RX_RING_COUNT; i++) { 912 data = &ring->data[i]; 913 err = wpi_alloc_dma_mem(sc, sc->sc_dmabuf_sz, 914 &rx_buffer_dma_attr, &wpi_dma_accattr, 915 DDI_DMA_READ | DDI_DMA_STREAMING, 916 &data->dma_data); 917 if (err != DDI_SUCCESS) { 918 WPI_DBG((WPI_DEBUG_DMA, "dma alloc rx ring buf[%d] " 919 "failed\n", i)); 920 goto fail; 921 } 922 923 ring->desc[i] = LE_32(data->dma_data.cookie.dmac_address); 924 } 925 926 WPI_DMA_SYNC(ring->dma_desc, DDI_DMA_SYNC_FORDEV); 927 928 return (err); 929 930 fail: 931 wpi_free_rx_ring(sc); 932 return (err); 933 } 934 935 static void 936 wpi_reset_rx_ring(wpi_sc_t *sc) 937 { 938 int ntries; 939 940 wpi_mem_lock(sc); 941 942 WPI_WRITE(sc, WPI_RX_CONFIG, 0); 943 for (ntries = 0; ntries < 2000; ntries++) { 944 if (WPI_READ(sc, WPI_RX_STATUS) & WPI_RX_IDLE) 945 break; 946 DELAY(1000); 947 } 948 #ifdef DEBUG 949 if (ntries == 2000) 950 WPI_DBG((WPI_DEBUG_DMA, "timeout resetting Rx ring\n")); 951 #endif 952 wpi_mem_unlock(sc); 953 954 sc->sc_rxq.cur = 0; 955 } 956 957 static void 958 wpi_free_rx_ring(wpi_sc_t *sc) 959 { 960 int i; 961 962 for (i = 0; i < WPI_RX_RING_COUNT; i++) { 963 if (sc->sc_rxq.data[i].dma_data.dma_hdl) 964 WPI_DMA_SYNC(sc->sc_rxq.data[i].dma_data, 965 DDI_DMA_SYNC_FORCPU); 966 wpi_free_dma_mem(&sc->sc_rxq.data[i].dma_data); 967 } 968 969 if (sc->sc_rxq.dma_desc.dma_hdl) 970 WPI_DMA_SYNC(sc->sc_rxq.dma_desc, DDI_DMA_SYNC_FORDEV); 971 wpi_free_dma_mem(&sc->sc_rxq.dma_desc); 972 } 973 974 static int 975 wpi_alloc_tx_ring(wpi_sc_t *sc, wpi_tx_ring_t *ring, int count, int qid) 976 { 977 wpi_tx_data_t *data; 978 wpi_tx_desc_t *desc_h; 979 uint32_t paddr_desc_h; 980 wpi_tx_cmd_t *cmd_h; 981 uint32_t paddr_cmd_h; 982 int i, err = DDI_SUCCESS; 983 984 ring->qid = qid; 985 ring->count = count; 986 ring->queued = 0; 987 ring->cur = 0; 988 989 err = wpi_alloc_dma_mem(sc, count * sizeof (wpi_tx_desc_t), 990 &ring_desc_dma_attr, &wpi_dma_accattr, 991 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 992 &ring->dma_desc); 993 if (err != DDI_SUCCESS) { 994 WPI_DBG((WPI_DEBUG_DMA, "dma alloc tx ring desc[%d] failed\n", 995 qid)); 996 goto fail; 997 } 998 999 /* update shared page with ring's base address */ 1000 sc->sc_shared->txbase[qid] = ring->dma_desc.cookie.dmac_address; 1001 1002 desc_h = (wpi_tx_desc_t *)ring->dma_desc.mem_va; 1003 paddr_desc_h = ring->dma_desc.cookie.dmac_address; 1004 1005 err = wpi_alloc_dma_mem(sc, count * sizeof (wpi_tx_cmd_t), 1006 &tx_cmd_dma_attr, &wpi_dma_accattr, 1007 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 1008 &ring->dma_cmd); 1009 if (err != DDI_SUCCESS) { 1010 WPI_DBG((WPI_DEBUG_DMA, "dma alloc tx ring cmd[%d] failed\n", 1011 qid)); 1012 goto fail; 1013 } 1014 1015 cmd_h = (wpi_tx_cmd_t *)ring->dma_cmd.mem_va; 1016 paddr_cmd_h = ring->dma_cmd.cookie.dmac_address; 1017 1018 /* 1019 * Allocate Tx buffers. 1020 */ 1021 ring->data = kmem_zalloc(sizeof (wpi_tx_data_t) * count, KM_NOSLEEP); 1022 if (ring->data == NULL) { 1023 WPI_DBG((WPI_DEBUG_DMA, "could not allocate tx data slots\n")); 1024 goto fail; 1025 } 1026 1027 for (i = 0; i < count; i++) { 1028 data = &ring->data[i]; 1029 err = wpi_alloc_dma_mem(sc, sc->sc_dmabuf_sz, 1030 &tx_buffer_dma_attr, &wpi_dma_accattr, 1031 DDI_DMA_WRITE | DDI_DMA_STREAMING, 1032 &data->dma_data); 1033 if (err != DDI_SUCCESS) { 1034 WPI_DBG((WPI_DEBUG_DMA, "dma alloc tx ring buf[%d] " 1035 "failed\n", i)); 1036 goto fail; 1037 } 1038 1039 data->desc = desc_h + i; 1040 data->paddr_desc = paddr_desc_h + 1041 ((caddr_t)data->desc - (caddr_t)desc_h); 1042 data->cmd = cmd_h + i; 1043 data->paddr_cmd = paddr_cmd_h + 1044 ((caddr_t)data->cmd - (caddr_t)cmd_h); 1045 } 1046 1047 return (err); 1048 1049 fail: 1050 if (ring->data) 1051 kmem_free(ring->data, sizeof (wpi_tx_data_t) * count); 1052 wpi_free_tx_ring(sc, ring); 1053 return (err); 1054 } 1055 1056 static void 1057 wpi_reset_tx_ring(wpi_sc_t *sc, wpi_tx_ring_t *ring) 1058 { 1059 wpi_tx_data_t *data; 1060 int i, ntries; 1061 1062 wpi_mem_lock(sc); 1063 1064 WPI_WRITE(sc, WPI_TX_CONFIG(ring->qid), 0); 1065 for (ntries = 0; ntries < 100; ntries++) { 1066 if (WPI_READ(sc, WPI_TX_STATUS) & WPI_TX_IDLE(ring->qid)) 1067 break; 1068 DELAY(10); 1069 } 1070 #ifdef DEBUG 1071 if (ntries == 100 && wpi_dbg_flags > 0) { 1072 WPI_DBG((WPI_DEBUG_DMA, "timeout resetting Tx ring %d\n", 1073 ring->qid)); 1074 } 1075 #endif 1076 wpi_mem_unlock(sc); 1077 1078 for (i = 0; i < ring->count; i++) { 1079 data = &ring->data[i]; 1080 WPI_DMA_SYNC(data->dma_data, DDI_DMA_SYNC_FORDEV); 1081 } 1082 1083 ring->queued = 0; 1084 ring->cur = 0; 1085 } 1086 1087 /*ARGSUSED*/ 1088 static void 1089 wpi_free_tx_ring(wpi_sc_t *sc, wpi_tx_ring_t *ring) 1090 { 1091 int i; 1092 1093 if (ring->dma_desc.dma_hdl != NULL) 1094 WPI_DMA_SYNC(ring->dma_desc, DDI_DMA_SYNC_FORDEV); 1095 wpi_free_dma_mem(&ring->dma_desc); 1096 1097 if (ring->dma_cmd.dma_hdl != NULL) 1098 WPI_DMA_SYNC(ring->dma_cmd, DDI_DMA_SYNC_FORDEV); 1099 wpi_free_dma_mem(&ring->dma_cmd); 1100 1101 if (ring->data != NULL) { 1102 for (i = 0; i < ring->count; i++) { 1103 if (ring->data[i].dma_data.dma_hdl) 1104 WPI_DMA_SYNC(ring->data[i].dma_data, 1105 DDI_DMA_SYNC_FORDEV); 1106 wpi_free_dma_mem(&ring->data[i].dma_data); 1107 } 1108 kmem_free(ring->data, ring->count * sizeof (wpi_tx_data_t)); 1109 } 1110 } 1111 1112 static int 1113 wpi_ring_init(wpi_sc_t *sc) 1114 { 1115 int i, err = DDI_SUCCESS; 1116 1117 for (i = 0; i < 4; i++) { 1118 err = wpi_alloc_tx_ring(sc, &sc->sc_txq[i], WPI_TX_RING_COUNT, 1119 i); 1120 if (err != DDI_SUCCESS) 1121 goto fail; 1122 } 1123 err = wpi_alloc_tx_ring(sc, &sc->sc_cmdq, WPI_CMD_RING_COUNT, 4); 1124 if (err != DDI_SUCCESS) 1125 goto fail; 1126 err = wpi_alloc_tx_ring(sc, &sc->sc_svcq, WPI_SVC_RING_COUNT, 5); 1127 if (err != DDI_SUCCESS) 1128 goto fail; 1129 err = wpi_alloc_rx_ring(sc); 1130 if (err != DDI_SUCCESS) 1131 goto fail; 1132 return (err); 1133 1134 fail: 1135 return (err); 1136 } 1137 1138 static void 1139 wpi_ring_free(wpi_sc_t *sc) 1140 { 1141 int i = 4; 1142 1143 wpi_free_rx_ring(sc); 1144 wpi_free_tx_ring(sc, &sc->sc_svcq); 1145 wpi_free_tx_ring(sc, &sc->sc_cmdq); 1146 while (--i >= 0) { 1147 wpi_free_tx_ring(sc, &sc->sc_txq[i]); 1148 } 1149 } 1150 1151 /* ARGSUSED */ 1152 static ieee80211_node_t * 1153 wpi_node_alloc(ieee80211com_t *ic) 1154 { 1155 wpi_amrr_t *amrr; 1156 1157 amrr = kmem_zalloc(sizeof (wpi_amrr_t), KM_SLEEP); 1158 if (amrr != NULL) 1159 wpi_amrr_init(amrr); 1160 return (&amrr->in); 1161 } 1162 1163 static void 1164 wpi_node_free(ieee80211_node_t *in) 1165 { 1166 ieee80211com_t *ic = in->in_ic; 1167 1168 ic->ic_node_cleanup(in); 1169 kmem_free(in, sizeof (wpi_amrr_t)); 1170 } 1171 1172 /*ARGSUSED*/ 1173 static int 1174 wpi_newstate(ieee80211com_t *ic, enum ieee80211_state nstate, int arg) 1175 { 1176 wpi_sc_t *sc = (wpi_sc_t *)ic; 1177 ieee80211_node_t *in = ic->ic_bss; 1178 int i, err = WPI_SUCCESS; 1179 1180 mutex_enter(&sc->sc_glock); 1181 switch (nstate) { 1182 case IEEE80211_S_SCAN: 1183 /* ieee80211_node_table_reset(&ic->ic_scan); */ 1184 ic->ic_flags |= IEEE80211_F_SCAN | IEEE80211_F_ASCAN; 1185 /* make the link LED blink while we're scanning */ 1186 wpi_set_led(sc, WPI_LED_LINK, 20, 2); 1187 1188 if ((err = wpi_scan(sc)) != 0) { 1189 WPI_DBG((WPI_DEBUG_80211, "could not initiate scan\n")); 1190 ic->ic_flags &= ~(IEEE80211_F_SCAN | 1191 IEEE80211_F_ASCAN); 1192 mutex_exit(&sc->sc_glock); 1193 return (err); 1194 } 1195 ic->ic_state = nstate; 1196 sc->sc_clk = 0; 1197 1198 mutex_exit(&sc->sc_glock); 1199 return (WPI_SUCCESS); 1200 1201 case IEEE80211_S_AUTH: 1202 /* reset state to handle reassociations correctly */ 1203 sc->sc_config.state = 0; 1204 sc->sc_config.filter &= ~LE_32(WPI_FILTER_BSS); 1205 1206 if ((err = wpi_auth(sc)) != 0) { 1207 WPI_DBG((WPI_DEBUG_80211, 1208 "could not send authentication request\n")); 1209 mutex_exit(&sc->sc_glock); 1210 return (err); 1211 } 1212 break; 1213 1214 case IEEE80211_S_RUN: 1215 if (ic->ic_opmode == IEEE80211_M_MONITOR) { 1216 /* link LED blinks while monitoring */ 1217 wpi_set_led(sc, WPI_LED_LINK, 5, 5); 1218 break; 1219 } 1220 1221 if (ic->ic_opmode != IEEE80211_M_STA) { 1222 (void) wpi_auth(sc); 1223 /* need setup beacon here */ 1224 } 1225 WPI_DBG((WPI_DEBUG_80211, "wpi: associated.")); 1226 1227 /* update adapter's configuration */ 1228 sc->sc_config.state = LE_16(WPI_CONFIG_ASSOCIATED); 1229 /* short preamble/slot time are negotiated when associating */ 1230 sc->sc_config.flags &= ~LE_32(WPI_CONFIG_SHPREAMBLE | 1231 WPI_CONFIG_SHSLOT); 1232 if (ic->ic_flags & IEEE80211_F_SHSLOT) 1233 sc->sc_config.flags |= LE_32(WPI_CONFIG_SHSLOT); 1234 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE) 1235 sc->sc_config.flags |= LE_32(WPI_CONFIG_SHPREAMBLE); 1236 sc->sc_config.filter |= LE_32(WPI_FILTER_BSS); 1237 if (ic->ic_opmode != IEEE80211_M_STA) 1238 sc->sc_config.filter |= LE_32(WPI_FILTER_BEACON); 1239 1240 WPI_DBG((WPI_DEBUG_80211, "config chan %d flags %x\n", 1241 sc->sc_config.chan, sc->sc_config.flags)); 1242 err = wpi_cmd(sc, WPI_CMD_CONFIGURE, &sc->sc_config, 1243 sizeof (wpi_config_t), 1); 1244 if (err != WPI_SUCCESS) { 1245 WPI_DBG((WPI_DEBUG_80211, 1246 "could not update configuration\n")); 1247 mutex_exit(&sc->sc_glock); 1248 return (err); 1249 } 1250 1251 /* start automatic rate control */ 1252 mutex_enter(&sc->sc_mt_lock); 1253 if (ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) { 1254 sc->sc_flags |= WPI_F_RATE_AUTO_CTL; 1255 /* set rate to some reasonable initial value */ 1256 for (i = in->in_rates.ir_nrates - 1; 1257 i > 0 && IEEE80211_RATE(i) > 72; i--); 1258 in->in_txrate = i; 1259 } else { 1260 sc->sc_flags &= ~WPI_F_RATE_AUTO_CTL; 1261 } 1262 mutex_exit(&sc->sc_mt_lock); 1263 1264 /* link LED always on while associated */ 1265 wpi_set_led(sc, WPI_LED_LINK, 0, 1); 1266 break; 1267 1268 case IEEE80211_S_INIT: 1269 case IEEE80211_S_ASSOC: 1270 break; 1271 } 1272 1273 mutex_exit(&sc->sc_glock); 1274 return (sc->sc_newstate(ic, nstate, arg)); 1275 } 1276 1277 /* 1278 * Grab exclusive access to NIC memory. 1279 */ 1280 static void 1281 wpi_mem_lock(wpi_sc_t *sc) 1282 { 1283 uint32_t tmp; 1284 int ntries; 1285 1286 tmp = WPI_READ(sc, WPI_GPIO_CTL); 1287 WPI_WRITE(sc, WPI_GPIO_CTL, tmp | WPI_GPIO_MAC); 1288 1289 /* spin until we actually get the lock */ 1290 for (ntries = 0; ntries < 1000; ntries++) { 1291 if ((WPI_READ(sc, WPI_GPIO_CTL) & 1292 (WPI_GPIO_CLOCK | WPI_GPIO_SLEEP)) == WPI_GPIO_CLOCK) 1293 break; 1294 DELAY(10); 1295 } 1296 if (ntries == 1000) 1297 WPI_DBG((WPI_DEBUG_PIO, "could not lock memory\n")); 1298 } 1299 1300 /* 1301 * Release lock on NIC memory. 1302 */ 1303 static void 1304 wpi_mem_unlock(wpi_sc_t *sc) 1305 { 1306 uint32_t tmp = WPI_READ(sc, WPI_GPIO_CTL); 1307 WPI_WRITE(sc, WPI_GPIO_CTL, tmp & ~WPI_GPIO_MAC); 1308 } 1309 1310 static uint32_t 1311 wpi_mem_read(wpi_sc_t *sc, uint16_t addr) 1312 { 1313 WPI_WRITE(sc, WPI_READ_MEM_ADDR, WPI_MEM_4 | addr); 1314 return (WPI_READ(sc, WPI_READ_MEM_DATA)); 1315 } 1316 1317 static void 1318 wpi_mem_write(wpi_sc_t *sc, uint16_t addr, uint32_t data) 1319 { 1320 WPI_WRITE(sc, WPI_WRITE_MEM_ADDR, WPI_MEM_4 | addr); 1321 WPI_WRITE(sc, WPI_WRITE_MEM_DATA, data); 1322 } 1323 1324 static void 1325 wpi_mem_write_region_4(wpi_sc_t *sc, uint16_t addr, 1326 const uint32_t *data, int wlen) 1327 { 1328 for (; wlen > 0; wlen--, data++, addr += 4) 1329 wpi_mem_write(sc, addr, *data); 1330 } 1331 1332 /* 1333 * Read 16 bits from the EEPROM. We access EEPROM through the MAC instead of 1334 * using the traditional bit-bang method. 1335 */ 1336 static uint16_t 1337 wpi_read_prom_word(wpi_sc_t *sc, uint32_t addr) 1338 { 1339 uint32_t val; 1340 int ntries; 1341 1342 WPI_WRITE(sc, WPI_EEPROM_CTL, addr << 2); 1343 1344 wpi_mem_lock(sc); 1345 for (ntries = 0; ntries < 10; ntries++) { 1346 if ((val = WPI_READ(sc, WPI_EEPROM_CTL)) & WPI_EEPROM_READY) 1347 break; 1348 DELAY(10); 1349 } 1350 wpi_mem_unlock(sc); 1351 1352 if (ntries == 10) { 1353 WPI_DBG((WPI_DEBUG_PIO, "could not read EEPROM\n")); 1354 return (0xdead); 1355 } 1356 return (val >> 16); 1357 } 1358 1359 /* 1360 * The firmware boot code is small and is intended to be copied directly into 1361 * the NIC internal memory. 1362 */ 1363 static int 1364 wpi_load_microcode(wpi_sc_t *sc) 1365 { 1366 const char *ucode; 1367 int size; 1368 1369 ucode = sc->sc_boot; 1370 size = LE_32(sc->sc_hdr->bootsz); 1371 /* check that microcode size is a multiple of 4 */ 1372 if (size & 3) 1373 return (EINVAL); 1374 1375 size /= sizeof (uint32_t); 1376 1377 wpi_mem_lock(sc); 1378 1379 /* copy microcode image into NIC memory */ 1380 wpi_mem_write_region_4(sc, WPI_MEM_UCODE_BASE, (const uint32_t *)ucode, 1381 size); 1382 1383 wpi_mem_write(sc, WPI_MEM_UCODE_SRC, 0); 1384 wpi_mem_write(sc, WPI_MEM_UCODE_DST, WPI_FW_TEXT); 1385 wpi_mem_write(sc, WPI_MEM_UCODE_SIZE, size); 1386 1387 /* run microcode */ 1388 wpi_mem_write(sc, WPI_MEM_UCODE_CTL, WPI_UC_RUN); 1389 1390 wpi_mem_unlock(sc); 1391 1392 return (WPI_SUCCESS); 1393 } 1394 1395 /* 1396 * The firmware text and data segments are transferred to the NIC using DMA. 1397 * The driver just copies the firmware into DMA-safe memory and tells the NIC 1398 * where to find it. Once the NIC has copied the firmware into its internal 1399 * memory, we can free our local copy in the driver. 1400 */ 1401 static int 1402 wpi_load_firmware(wpi_sc_t *sc, uint32_t target) 1403 { 1404 const char *fw; 1405 int size; 1406 wpi_dma_t *dma_p; 1407 ddi_dma_cookie_t *cookie; 1408 wpi_tx_desc_t desc; 1409 int i, ntries, err = WPI_SUCCESS; 1410 1411 /* only text and data here */ 1412 if (target == WPI_FW_TEXT) { 1413 fw = sc->sc_text; 1414 size = LE_32(sc->sc_hdr->textsz); 1415 dma_p = &sc->sc_dma_fw_text; 1416 cookie = sc->sc_fw_text_cookie; 1417 } else { 1418 fw = sc->sc_data; 1419 size = LE_32(sc->sc_hdr->datasz); 1420 dma_p = &sc->sc_dma_fw_data; 1421 cookie = sc->sc_fw_data_cookie; 1422 } 1423 1424 /* copy firmware image to DMA-safe memory */ 1425 (void) memcpy(dma_p->mem_va, fw, size); 1426 1427 /* make sure the adapter will get up-to-date values */ 1428 (void) ddi_dma_sync(dma_p->dma_hdl, 0, size, DDI_DMA_SYNC_FORDEV); 1429 1430 (void) memset(&desc, 0, sizeof (desc)); 1431 desc.flags = LE_32(WPI_PAD32(size) << 28 | dma_p->ncookies << 24); 1432 for (i = 0; i < dma_p->ncookies; i++) { 1433 WPI_DBG((WPI_DEBUG_DMA, "cookie%d addr:%x size:%x\n", 1434 i, cookie[i].dmac_address, cookie[i].dmac_size)); 1435 desc.segs[i].addr = cookie[i].dmac_address; 1436 desc.segs[i].len = (uint32_t)cookie[i].dmac_size; 1437 } 1438 1439 wpi_mem_lock(sc); 1440 1441 /* tell adapter where to copy image in its internal memory */ 1442 WPI_WRITE(sc, WPI_FW_TARGET, target); 1443 1444 WPI_WRITE(sc, WPI_TX_CONFIG(6), 0); 1445 1446 /* copy firmware descriptor into NIC memory */ 1447 WPI_WRITE_REGION_4(sc, WPI_TX_DESC(6), (uint32_t *)&desc, 1448 sizeof desc / sizeof (uint32_t)); 1449 1450 WPI_WRITE(sc, WPI_TX_CREDIT(6), 0xfffff); 1451 WPI_WRITE(sc, WPI_TX_STATE(6), 0x4001); 1452 WPI_WRITE(sc, WPI_TX_CONFIG(6), 0x80000001); 1453 1454 /* wait while the adapter is busy copying the firmware */ 1455 for (ntries = 0; ntries < 100; ntries++) { 1456 if (WPI_READ(sc, WPI_TX_STATUS) & WPI_TX_IDLE(6)) 1457 break; 1458 DELAY(1000); 1459 } 1460 if (ntries == 100) { 1461 WPI_DBG((WPI_DEBUG_FW, "timeout transferring firmware\n")); 1462 err = ETIMEDOUT; 1463 } 1464 1465 WPI_WRITE(sc, WPI_TX_CREDIT(6), 0); 1466 1467 wpi_mem_unlock(sc); 1468 1469 return (err); 1470 } 1471 1472 /*ARGSUSED*/ 1473 static void 1474 wpi_rx_intr(wpi_sc_t *sc, wpi_rx_desc_t *desc, wpi_rx_data_t *data) 1475 { 1476 ieee80211com_t *ic = &sc->sc_ic; 1477 wpi_rx_ring_t *ring = &sc->sc_rxq; 1478 wpi_rx_stat_t *stat; 1479 wpi_rx_head_t *head; 1480 wpi_rx_tail_t *tail; 1481 ieee80211_node_t *in; 1482 struct ieee80211_frame *wh; 1483 mblk_t *mp; 1484 uint16_t len; 1485 1486 stat = (wpi_rx_stat_t *)(desc + 1); 1487 1488 if (stat->len > WPI_STAT_MAXLEN) { 1489 WPI_DBG((WPI_DEBUG_RX, "invalid rx statistic header\n")); 1490 return; 1491 } 1492 1493 head = (wpi_rx_head_t *)((caddr_t)(stat + 1) + stat->len); 1494 tail = (wpi_rx_tail_t *)((caddr_t)(head + 1) + LE_16(head->len)); 1495 1496 len = LE_16(head->len); 1497 1498 WPI_DBG((WPI_DEBUG_RX, "rx intr: idx=%d len=%d stat len=%d rssi=%d " 1499 "rate=%x chan=%d tstamp=%llu", ring->cur, LE_32(desc->len), 1500 len, (int8_t)stat->rssi, head->rate, head->chan, 1501 LE_64(tail->tstamp))); 1502 1503 if ((len < 20) || (len > sc->sc_dmabuf_sz)) { 1504 sc->sc_rx_err++; 1505 return; 1506 } 1507 1508 /* 1509 * Discard Rx frames with bad CRC early 1510 */ 1511 if ((LE_32(tail->flags) & WPI_RX_NOERROR) != WPI_RX_NOERROR) { 1512 WPI_DBG((WPI_DEBUG_RX, "rx tail flags error %x\n", 1513 LE_32(tail->flags))); 1514 sc->sc_rx_err++; 1515 return; 1516 } 1517 1518 /* update Rx descriptor */ 1519 /* ring->desc[ring->cur] = LE_32(data->dma_data.cookie.dmac_address); */ 1520 1521 #ifdef WPI_BPF 1522 #ifndef WPI_CURRENT 1523 if (sc->sc_drvbpf != NULL) { 1524 #else 1525 if (bpf_peers_present(sc->sc_drvbpf)) { 1526 #endif 1527 struct wpi_rx_radiotap_header *tap = &sc->sc_rxtap; 1528 1529 tap->wr_flags = 0; 1530 tap->wr_rate = head->rate; 1531 tap->wr_chan_freq = 1532 LE_16(ic->ic_channels[head->chan].ic_freq); 1533 tap->wr_chan_flags = 1534 LE_16(ic->ic_channels[head->chan].ic_flags); 1535 tap->wr_dbm_antsignal = (int8_t)(stat->rssi - WPI_RSSI_OFFSET); 1536 tap->wr_dbm_antnoise = (int8_t)LE_16(stat->noise); 1537 tap->wr_tsft = tail->tstamp; 1538 tap->wr_antenna = (LE_16(head->flags) >> 4) & 0xf; 1539 switch (head->rate) { 1540 /* CCK rates */ 1541 case 10: tap->wr_rate = 2; break; 1542 case 20: tap->wr_rate = 4; break; 1543 case 55: tap->wr_rate = 11; break; 1544 case 110: tap->wr_rate = 22; break; 1545 /* OFDM rates */ 1546 case 0xd: tap->wr_rate = 12; break; 1547 case 0xf: tap->wr_rate = 18; break; 1548 case 0x5: tap->wr_rate = 24; break; 1549 case 0x7: tap->wr_rate = 36; break; 1550 case 0x9: tap->wr_rate = 48; break; 1551 case 0xb: tap->wr_rate = 72; break; 1552 case 0x1: tap->wr_rate = 96; break; 1553 case 0x3: tap->wr_rate = 108; break; 1554 /* unknown rate: should not happen */ 1555 default: tap->wr_rate = 0; 1556 } 1557 if (LE_16(head->flags) & 0x4) 1558 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE; 1559 1560 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 1561 } 1562 #endif 1563 /* grab a reference to the source node */ 1564 wh = (struct ieee80211_frame *)(head + 1); 1565 1566 #ifdef DEBUG 1567 if (wpi_dbg_flags & WPI_DEBUG_RX) 1568 ieee80211_dump_pkt((uint8_t *)wh, len, 0, 0); 1569 #endif 1570 1571 in = ieee80211_find_rxnode(ic, wh); 1572 mp = allocb(len, BPRI_MED); 1573 if (mp) { 1574 (void) memcpy(mp->b_wptr, wh, len); 1575 mp->b_wptr += len; 1576 1577 /* send the frame to the 802.11 layer */ 1578 (void) ieee80211_input(ic, mp, in, stat->rssi, 0); 1579 } else { 1580 sc->sc_rx_nobuf++; 1581 WPI_DBG((WPI_DEBUG_RX, 1582 "wpi_rx_intr(): alloc rx buf failed\n")); 1583 } 1584 /* release node reference */ 1585 ieee80211_free_node(in); 1586 } 1587 1588 /*ARGSUSED*/ 1589 static void 1590 wpi_tx_intr(wpi_sc_t *sc, wpi_rx_desc_t *desc, wpi_rx_data_t *data) 1591 { 1592 ieee80211com_t *ic = &sc->sc_ic; 1593 wpi_tx_ring_t *ring = &sc->sc_txq[desc->qid & 0x3]; 1594 /* wpi_tx_data_t *txdata = &ring->data[desc->idx]; */ 1595 wpi_tx_stat_t *stat = (wpi_tx_stat_t *)(desc + 1); 1596 wpi_amrr_t *amrr = (wpi_amrr_t *)ic->ic_bss; 1597 1598 WPI_DBG((WPI_DEBUG_TX, "tx done: qid=%d idx=%d retries=%d nkill=%d " 1599 "rate=%x duration=%d status=%x\n", 1600 desc->qid, desc->idx, stat->ntries, stat->nkill, stat->rate, 1601 LE_32(stat->duration), LE_32(stat->status))); 1602 1603 amrr->txcnt++; 1604 WPI_DBG((WPI_DEBUG_RATECTL, "tx: %d cnt\n", amrr->txcnt)); 1605 if (stat->ntries > 0) { 1606 amrr->retrycnt++; 1607 sc->sc_tx_retries++; 1608 WPI_DBG((WPI_DEBUG_RATECTL, "tx: %d retries\n", 1609 amrr->retrycnt)); 1610 } 1611 1612 sc->sc_tx_timer = 0; 1613 1614 mutex_enter(&sc->sc_tx_lock); 1615 ring->queued--; 1616 if (ring->queued < 0) 1617 ring->queued = 0; 1618 if ((sc->sc_need_reschedule) && (ring->queued <= (ring->count << 3))) { 1619 sc->sc_need_reschedule = 0; 1620 mutex_exit(&sc->sc_tx_lock); 1621 mac_tx_update(ic->ic_mach); 1622 mutex_enter(&sc->sc_tx_lock); 1623 } 1624 mutex_exit(&sc->sc_tx_lock); 1625 } 1626 1627 static void 1628 wpi_cmd_intr(wpi_sc_t *sc, wpi_rx_desc_t *desc) 1629 { 1630 if ((desc->qid & 7) != 4) { 1631 return; /* not a command ack */ 1632 } 1633 mutex_enter(&sc->sc_glock); 1634 sc->sc_flags |= WPI_F_CMD_DONE; 1635 cv_signal(&sc->sc_cmd_cv); 1636 mutex_exit(&sc->sc_glock); 1637 } 1638 1639 static uint_t 1640 wpi_notif_softintr(caddr_t arg) 1641 { 1642 wpi_sc_t *sc = (wpi_sc_t *)arg; 1643 ieee80211com_t *ic = &sc->sc_ic; 1644 wpi_rx_desc_t *desc; 1645 wpi_rx_data_t *data; 1646 uint32_t hw; 1647 1648 mutex_enter(&sc->sc_glock); 1649 if (sc->sc_notif_softint_pending != 1) { 1650 mutex_exit(&sc->sc_glock); 1651 return (DDI_INTR_UNCLAIMED); 1652 } 1653 mutex_exit(&sc->sc_glock); 1654 1655 hw = LE_32(sc->sc_shared->next); 1656 1657 while (sc->sc_rxq.cur != hw) { 1658 data = &sc->sc_rxq.data[sc->sc_rxq.cur]; 1659 desc = (wpi_rx_desc_t *)data->dma_data.mem_va; 1660 1661 WPI_DBG((WPI_DEBUG_INTR, "rx notification hw = %d cur = %d " 1662 "qid=%x idx=%d flags=%x type=%d len=%d\n", 1663 hw, sc->sc_rxq.cur, desc->qid, desc->idx, desc->flags, 1664 desc->type, LE_32(desc->len))); 1665 1666 if (!(desc->qid & 0x80)) /* reply to a command */ 1667 wpi_cmd_intr(sc, desc); 1668 1669 switch (desc->type) { 1670 case WPI_RX_DONE: 1671 /* a 802.11 frame was received */ 1672 wpi_rx_intr(sc, desc, data); 1673 break; 1674 1675 case WPI_TX_DONE: 1676 /* a 802.11 frame has been transmitted */ 1677 wpi_tx_intr(sc, desc, data); 1678 break; 1679 1680 case WPI_UC_READY: 1681 { 1682 wpi_ucode_info_t *uc = 1683 (wpi_ucode_info_t *)(desc + 1); 1684 1685 /* the microcontroller is ready */ 1686 WPI_DBG((WPI_DEBUG_FW, 1687 "microcode alive notification version %x " 1688 "alive %x\n", LE_32(uc->version), 1689 LE_32(uc->valid))); 1690 1691 if (LE_32(uc->valid) != 1) { 1692 WPI_DBG((WPI_DEBUG_FW, 1693 "microcontroller initialization failed\n")); 1694 } 1695 break; 1696 } 1697 case WPI_STATE_CHANGED: 1698 { 1699 uint32_t *status = (uint32_t *)(desc + 1); 1700 1701 /* enabled/disabled notification */ 1702 WPI_DBG((WPI_DEBUG_RADIO, "state changed to %x\n", 1703 LE_32(*status))); 1704 1705 if (LE_32(*status) & 1) { 1706 /* the radio button has to be pushed */ 1707 cmn_err(CE_NOTE, 1708 "wpi: Radio transmitter is off\n"); 1709 } 1710 break; 1711 } 1712 case WPI_START_SCAN: 1713 { 1714 wpi_start_scan_t *scan = 1715 (wpi_start_scan_t *)(desc + 1); 1716 1717 WPI_DBG((WPI_DEBUG_SCAN, 1718 "scanning channel %d status %x\n", 1719 scan->chan, LE_32(scan->status))); 1720 1721 /* fix current channel */ 1722 ic->ic_curchan = &ic->ic_sup_channels[scan->chan]; 1723 break; 1724 } 1725 case WPI_STOP_SCAN: 1726 WPI_DBG((WPI_DEBUG_SCAN, "scan finished\n")); 1727 ieee80211_end_scan(ic); 1728 break; 1729 } 1730 1731 sc->sc_rxq.cur = (sc->sc_rxq.cur + 1) % WPI_RX_RING_COUNT; 1732 } 1733 1734 /* tell the firmware what we have processed */ 1735 hw = (hw == 0) ? WPI_RX_RING_COUNT - 1 : hw - 1; 1736 WPI_WRITE(sc, WPI_RX_WIDX, hw & (~7)); 1737 mutex_enter(&sc->sc_glock); 1738 sc->sc_notif_softint_pending = 0; 1739 mutex_exit(&sc->sc_glock); 1740 1741 return (DDI_INTR_CLAIMED); 1742 } 1743 1744 static uint_t 1745 wpi_intr(caddr_t arg) 1746 { 1747 wpi_sc_t *sc = (wpi_sc_t *)arg; 1748 uint32_t r; 1749 1750 mutex_enter(&sc->sc_glock); 1751 r = WPI_READ(sc, WPI_INTR); 1752 if (r == 0 || r == 0xffffffff) { 1753 mutex_exit(&sc->sc_glock); 1754 return (DDI_INTR_UNCLAIMED); 1755 } 1756 1757 WPI_DBG((WPI_DEBUG_INTR, "interrupt reg %x\n", r)); 1758 1759 /* disable interrupts */ 1760 WPI_WRITE(sc, WPI_MASK, 0); 1761 /* ack interrupts */ 1762 WPI_WRITE(sc, WPI_INTR, r); 1763 1764 if (sc->sc_notif_softint_id == NULL) { 1765 mutex_exit(&sc->sc_glock); 1766 return (DDI_INTR_CLAIMED); 1767 } 1768 1769 if (r & (WPI_SW_ERROR | WPI_HW_ERROR)) { 1770 WPI_DBG((WPI_DEBUG_FW, "fatal firmware error\n")); 1771 mutex_exit(&sc->sc_glock); 1772 wpi_stop(sc); 1773 sc->sc_ostate = sc->sc_ic.ic_state; 1774 ieee80211_new_state(&sc->sc_ic, IEEE80211_S_INIT, -1); 1775 sc->sc_flags |= WPI_F_HW_ERR_RECOVER; 1776 return (DDI_INTR_CLAIMED); 1777 } 1778 1779 if (r & WPI_RX_INTR) { 1780 sc->sc_notif_softint_pending = 1; 1781 ddi_trigger_softintr(sc->sc_notif_softint_id); 1782 } 1783 1784 if (r & WPI_ALIVE_INTR) { /* firmware initialized */ 1785 sc->sc_flags |= WPI_F_FW_INIT; 1786 cv_signal(&sc->sc_fw_cv); 1787 } 1788 1789 /* re-enable interrupts */ 1790 WPI_WRITE(sc, WPI_MASK, WPI_INTR_MASK); 1791 mutex_exit(&sc->sc_glock); 1792 1793 return (DDI_INTR_CLAIMED); 1794 } 1795 1796 static uint8_t 1797 wpi_plcp_signal(int rate) 1798 { 1799 switch (rate) { 1800 /* CCK rates (returned values are device-dependent) */ 1801 case 2: return (10); 1802 case 4: return (20); 1803 case 11: return (55); 1804 case 22: return (110); 1805 1806 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1807 /* R1-R4 (ral/ural is R4-R1) */ 1808 case 12: return (0xd); 1809 case 18: return (0xf); 1810 case 24: return (0x5); 1811 case 36: return (0x7); 1812 case 48: return (0x9); 1813 case 72: return (0xb); 1814 case 96: return (0x1); 1815 case 108: return (0x3); 1816 1817 /* unsupported rates (should not get there) */ 1818 default: return (0); 1819 } 1820 } 1821 1822 static mblk_t * 1823 wpi_m_tx(void *arg, mblk_t *mp) 1824 { 1825 wpi_sc_t *sc = (wpi_sc_t *)arg; 1826 ieee80211com_t *ic = &sc->sc_ic; 1827 mblk_t *next; 1828 1829 if (ic->ic_state != IEEE80211_S_RUN) { 1830 freemsgchain(mp); 1831 return (NULL); 1832 } 1833 1834 while (mp != NULL) { 1835 next = mp->b_next; 1836 mp->b_next = NULL; 1837 if (wpi_send(ic, mp, IEEE80211_FC0_TYPE_DATA) != 0) { 1838 mp->b_next = next; 1839 break; 1840 } 1841 mp = next; 1842 } 1843 return (mp); 1844 } 1845 1846 /* ARGSUSED */ 1847 static int 1848 wpi_send(ieee80211com_t *ic, mblk_t *mp, uint8_t type) 1849 { 1850 wpi_sc_t *sc = (wpi_sc_t *)ic; 1851 wpi_tx_ring_t *ring; 1852 wpi_tx_desc_t *desc; 1853 wpi_tx_data_t *data; 1854 wpi_tx_cmd_t *cmd; 1855 wpi_cmd_data_t *tx; 1856 ieee80211_node_t *in; 1857 struct ieee80211_frame *wh; 1858 struct ieee80211_key *k; 1859 mblk_t *m, *m0; 1860 int rate, hdrlen, len, mblen, off, err = WPI_SUCCESS; 1861 1862 ring = ((type & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_DATA) ? 1863 (&sc->sc_txq[0]) : (&sc->sc_txq[1]); 1864 data = &ring->data[ring->cur]; 1865 desc = data->desc; 1866 cmd = data->cmd; 1867 bzero(desc, sizeof (*desc)); 1868 bzero(cmd, sizeof (*cmd)); 1869 1870 mutex_enter(&sc->sc_tx_lock); 1871 if (ring->queued > ring->count - 64) { 1872 WPI_DBG((WPI_DEBUG_TX, "wpi_send(): no txbuf\n")); 1873 sc->sc_need_reschedule = 1; 1874 mutex_exit(&sc->sc_tx_lock); 1875 if ((type & IEEE80211_FC0_TYPE_MASK) != 1876 IEEE80211_FC0_TYPE_DATA) { 1877 freemsg(mp); 1878 } 1879 sc->sc_tx_nobuf++; 1880 err = WPI_FAIL; 1881 goto exit; 1882 } 1883 mutex_exit(&sc->sc_tx_lock); 1884 1885 hdrlen = sizeof (struct ieee80211_frame); 1886 1887 m = allocb(msgdsize(mp) + 32, BPRI_MED); 1888 if (m == NULL) { /* can not alloc buf, drop this package */ 1889 cmn_err(CE_WARN, 1890 "wpi_send(): failed to allocate msgbuf\n"); 1891 freemsg(mp); 1892 err = WPI_SUCCESS; 1893 goto exit; 1894 } 1895 for (off = 0, m0 = mp; m0 != NULL; m0 = m0->b_cont) { 1896 mblen = MBLKL(m0); 1897 (void) memcpy(m->b_rptr + off, m0->b_rptr, mblen); 1898 off += mblen; 1899 } 1900 m->b_wptr += off; 1901 freemsg(mp); 1902 1903 wh = (struct ieee80211_frame *)m->b_rptr; 1904 1905 in = ieee80211_find_txnode(ic, wh->i_addr1); 1906 if (in == NULL) { 1907 cmn_err(CE_WARN, "wpi_send(): failed to find tx node\n"); 1908 freemsg(m); 1909 sc->sc_tx_err++; 1910 err = WPI_SUCCESS; 1911 goto exit; 1912 } 1913 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1914 k = ieee80211_crypto_encap(ic, m); 1915 if (k == NULL) { 1916 freemsg(m); 1917 sc->sc_tx_err++; 1918 err = WPI_SUCCESS; 1919 goto exit; 1920 } 1921 1922 /* packet header may have moved, reset our local pointer */ 1923 wh = (struct ieee80211_frame *)m->b_rptr; 1924 } 1925 1926 len = msgdsize(m); 1927 1928 #ifdef DEBUG 1929 if (wpi_dbg_flags & WPI_DEBUG_TX) 1930 ieee80211_dump_pkt((uint8_t *)wh, hdrlen, 0, 0); 1931 #endif 1932 1933 /* pickup a rate */ 1934 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1935 IEEE80211_FC0_TYPE_MGT) { 1936 /* mgmt frames are sent at the lowest available bit-rate */ 1937 rate = in->in_rates.ir_rates[0]; 1938 } else { 1939 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) { 1940 rate = ic->ic_fixed_rate; 1941 } else 1942 rate = in->in_rates.ir_rates[in->in_txrate]; 1943 } 1944 rate &= IEEE80211_RATE_VAL; 1945 WPI_DBG((WPI_DEBUG_RATECTL, "tx rate[%d of %d] = %x", 1946 in->in_txrate, in->in_rates.ir_nrates, rate)); 1947 #ifdef WPI_BPF 1948 #ifndef WPI_CURRENT 1949 if (sc->sc_drvbpf != NULL) { 1950 #else 1951 if (bpf_peers_present(sc->sc_drvbpf)) { 1952 #endif 1953 struct wpi_tx_radiotap_header *tap = &sc->sc_txtap; 1954 1955 tap->wt_flags = 0; 1956 tap->wt_chan_freq = LE_16(ic->ic_curchan->ic_freq); 1957 tap->wt_chan_flags = LE_16(ic->ic_curchan->ic_flags); 1958 tap->wt_rate = rate; 1959 if (wh->i_fc[1] & IEEE80211_FC1_WEP) 1960 tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; 1961 1962 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1963 } 1964 #endif 1965 1966 cmd->code = WPI_CMD_TX_DATA; 1967 cmd->flags = 0; 1968 cmd->qid = ring->qid; 1969 cmd->idx = ring->cur; 1970 1971 tx = (wpi_cmd_data_t *)cmd->data; 1972 tx->flags = 0; 1973 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1974 tx->flags |= LE_32(WPI_TX_NEED_ACK); 1975 } else { 1976 tx->flags &= ~(LE_32(WPI_TX_NEED_ACK)); 1977 } 1978 1979 tx->flags |= (LE_32(WPI_TX_AUTO_SEQ)); 1980 tx->flags |= LE_32(WPI_TX_BT_DISABLE | WPI_TX_CALIBRATION); 1981 1982 /* retrieve destination node's id */ 1983 tx->id = IEEE80211_IS_MULTICAST(wh->i_addr1) ? WPI_ID_BROADCAST : 1984 WPI_ID_BSS; 1985 1986 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1987 IEEE80211_FC0_TYPE_MGT) { 1988 /* tell h/w to set timestamp in probe responses */ 1989 if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1990 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1991 tx->flags |= LE_32(WPI_TX_INSERT_TSTAMP); 1992 1993 if (((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1994 IEEE80211_FC0_SUBTYPE_ASSOC_REQ) || 1995 ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1996 IEEE80211_FC0_SUBTYPE_REASSOC_REQ)) 1997 tx->timeout = 3; 1998 else 1999 tx->timeout = 2; 2000 } else 2001 tx->timeout = 0; 2002 2003 tx->rate = wpi_plcp_signal(rate); 2004 2005 /* be very persistant at sending frames out */ 2006 tx->rts_ntries = 7; 2007 tx->data_ntries = 15; 2008 2009 tx->cck_mask = 0x0f; 2010 tx->ofdm_mask = 0xff; 2011 tx->lifetime = LE_32(0xffffffff); 2012 2013 tx->len = LE_16(len); 2014 2015 /* save and trim IEEE802.11 header */ 2016 (void) memcpy(tx + 1, m->b_rptr, hdrlen); 2017 m->b_rptr += hdrlen; 2018 (void) memcpy(data->dma_data.mem_va, m->b_rptr, len - hdrlen); 2019 2020 WPI_DBG((WPI_DEBUG_TX, "sending data: qid=%d idx=%d len=%d", ring->qid, 2021 ring->cur, len)); 2022 2023 /* first scatter/gather segment is used by the tx data command */ 2024 desc->flags = LE_32(WPI_PAD32(len) << 28 | (2) << 24); 2025 desc->segs[0].addr = LE_32(data->paddr_cmd); 2026 desc->segs[0].len = LE_32( 2027 roundup(4 + sizeof (wpi_cmd_data_t) + hdrlen, 4)); 2028 desc->segs[1].addr = LE_32(data->dma_data.cookie.dmac_address); 2029 desc->segs[1].len = LE_32(len - hdrlen); 2030 2031 WPI_DMA_SYNC(data->dma_data, DDI_DMA_SYNC_FORDEV); 2032 WPI_DMA_SYNC(ring->dma_desc, DDI_DMA_SYNC_FORDEV); 2033 2034 mutex_enter(&sc->sc_tx_lock); 2035 ring->queued++; 2036 mutex_exit(&sc->sc_tx_lock); 2037 2038 /* kick ring */ 2039 ring->cur = (ring->cur + 1) % WPI_TX_RING_COUNT; 2040 WPI_WRITE(sc, WPI_TX_WIDX, ring->qid << 8 | ring->cur); 2041 freemsg(m); 2042 /* release node reference */ 2043 ieee80211_free_node(in); 2044 2045 ic->ic_stats.is_tx_bytes += len; 2046 ic->ic_stats.is_tx_frags++; 2047 2048 if (sc->sc_tx_timer == 0) 2049 sc->sc_tx_timer = 5; 2050 exit: 2051 return (err); 2052 } 2053 2054 static void 2055 wpi_m_ioctl(void* arg, queue_t *wq, mblk_t *mp) 2056 { 2057 wpi_sc_t *sc = (wpi_sc_t *)arg; 2058 ieee80211com_t *ic = &sc->sc_ic; 2059 int err; 2060 2061 err = ieee80211_ioctl(ic, wq, mp); 2062 if (err == ENETRESET) { 2063 (void) ieee80211_new_state(ic, 2064 IEEE80211_S_SCAN, -1); 2065 } 2066 } 2067 2068 /*ARGSUSED*/ 2069 static int 2070 wpi_m_stat(void *arg, uint_t stat, uint64_t *val) 2071 { 2072 wpi_sc_t *sc = (wpi_sc_t *)arg; 2073 ieee80211com_t *ic = &sc->sc_ic; 2074 ieee80211_node_t *in = ic->ic_bss; 2075 struct ieee80211_rateset *rs = &in->in_rates; 2076 2077 mutex_enter(&sc->sc_glock); 2078 switch (stat) { 2079 case MAC_STAT_IFSPEED: 2080 *val = ((ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) ? 2081 (rs->ir_rates[in->in_txrate] & IEEE80211_RATE_VAL) 2082 : ic->ic_fixed_rate) * 5000000ull; 2083 break; 2084 case MAC_STAT_NOXMTBUF: 2085 *val = sc->sc_tx_nobuf; 2086 break; 2087 case MAC_STAT_NORCVBUF: 2088 *val = sc->sc_rx_nobuf; 2089 break; 2090 case MAC_STAT_IERRORS: 2091 *val = sc->sc_rx_err; 2092 break; 2093 case MAC_STAT_RBYTES: 2094 *val = ic->ic_stats.is_rx_bytes; 2095 break; 2096 case MAC_STAT_IPACKETS: 2097 *val = ic->ic_stats.is_rx_frags; 2098 break; 2099 case MAC_STAT_OBYTES: 2100 *val = ic->ic_stats.is_tx_bytes; 2101 break; 2102 case MAC_STAT_OPACKETS: 2103 *val = ic->ic_stats.is_tx_frags; 2104 break; 2105 case MAC_STAT_OERRORS: 2106 case WIFI_STAT_TX_FAILED: 2107 *val = sc->sc_tx_err; 2108 break; 2109 case WIFI_STAT_TX_RETRANS: 2110 *val = sc->sc_tx_retries; 2111 break; 2112 case WIFI_STAT_FCS_ERRORS: 2113 case WIFI_STAT_WEP_ERRORS: 2114 case WIFI_STAT_TX_FRAGS: 2115 case WIFI_STAT_MCAST_TX: 2116 case WIFI_STAT_RTS_SUCCESS: 2117 case WIFI_STAT_RTS_FAILURE: 2118 case WIFI_STAT_ACK_FAILURE: 2119 case WIFI_STAT_RX_FRAGS: 2120 case WIFI_STAT_MCAST_RX: 2121 case WIFI_STAT_RX_DUPS: 2122 mutex_exit(&sc->sc_glock); 2123 return (ieee80211_stat(ic, stat, val)); 2124 default: 2125 mutex_exit(&sc->sc_glock); 2126 return (ENOTSUP); 2127 } 2128 mutex_exit(&sc->sc_glock); 2129 2130 return (WPI_SUCCESS); 2131 2132 } 2133 2134 static int 2135 wpi_m_start(void *arg) 2136 { 2137 wpi_sc_t *sc = (wpi_sc_t *)arg; 2138 ieee80211com_t *ic = &sc->sc_ic; 2139 int err; 2140 2141 err = wpi_init(sc); 2142 if (err != WPI_SUCCESS) { 2143 wpi_stop(sc); 2144 DELAY(1000000); 2145 err = wpi_init(sc); 2146 } 2147 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2148 2149 return (err); 2150 } 2151 2152 static void 2153 wpi_m_stop(void *arg) 2154 { 2155 wpi_sc_t *sc = (wpi_sc_t *)arg; 2156 ieee80211com_t *ic = &sc->sc_ic; 2157 2158 wpi_stop(sc); 2159 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2160 mutex_enter(&sc->sc_mt_lock); 2161 sc->sc_flags &= ~WPI_F_HW_ERR_RECOVER; 2162 sc->sc_flags &= ~WPI_F_RATE_AUTO_CTL; 2163 mutex_exit(&sc->sc_mt_lock); 2164 } 2165 2166 /*ARGSUSED*/ 2167 static int 2168 wpi_m_unicst(void *arg, const uint8_t *macaddr) 2169 { 2170 wpi_sc_t *sc = (wpi_sc_t *)arg; 2171 ieee80211com_t *ic = &sc->sc_ic; 2172 int err; 2173 2174 if (!IEEE80211_ADDR_EQ(ic->ic_macaddr, macaddr)) { 2175 IEEE80211_ADDR_COPY(ic->ic_macaddr, macaddr); 2176 mutex_enter(&sc->sc_glock); 2177 err = wpi_config(sc); 2178 mutex_exit(&sc->sc_glock); 2179 if (err != WPI_SUCCESS) { 2180 cmn_err(CE_WARN, 2181 "wpi_m_unicst(): " 2182 "failed to configure device\n"); 2183 goto fail; 2184 } 2185 } 2186 return (WPI_SUCCESS); 2187 fail: 2188 return (err); 2189 } 2190 2191 /*ARGSUSED*/ 2192 static int 2193 wpi_m_multicst(void *arg, boolean_t add, const uint8_t *m) 2194 { 2195 return (WPI_SUCCESS); 2196 } 2197 2198 /*ARGSUSED*/ 2199 static int 2200 wpi_m_promisc(void *arg, boolean_t on) 2201 { 2202 return (WPI_SUCCESS); 2203 } 2204 2205 static void 2206 wpi_thread(wpi_sc_t *sc) 2207 { 2208 ieee80211com_t *ic = &sc->sc_ic; 2209 clock_t clk; 2210 int times = 0, err, n = 0, timeout = 0; 2211 2212 mutex_enter(&sc->sc_mt_lock); 2213 while (sc->sc_mf_thread_switch) { 2214 /* 2215 * recovery fatal error 2216 */ 2217 if (ic->ic_mach && 2218 (sc->sc_flags & WPI_F_HW_ERR_RECOVER)) { 2219 2220 WPI_DBG((WPI_DEBUG_FW, 2221 "wpi_thread(): " 2222 "try to recover fatal hw error: %d\n", times++)); 2223 2224 wpi_stop(sc); 2225 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2226 2227 mutex_exit(&sc->sc_mt_lock); 2228 delay(drv_usectohz(2000000)); 2229 mutex_enter(&sc->sc_mt_lock); 2230 err = wpi_init(sc); 2231 if (err != WPI_SUCCESS) { 2232 n++; 2233 if (n < 3) 2234 continue; 2235 } 2236 n = 0; 2237 sc->sc_flags &= ~WPI_F_HW_ERR_RECOVER; 2238 mutex_exit(&sc->sc_mt_lock); 2239 delay(drv_usectohz(2000000)); 2240 if (sc->sc_ostate != IEEE80211_S_INIT) 2241 ieee80211_begin_scan(ic, 0); 2242 mutex_enter(&sc->sc_mt_lock); 2243 } 2244 2245 /* 2246 * rate ctl 2247 */ 2248 if (ic->ic_mach && 2249 (sc->sc_flags & WPI_F_RATE_AUTO_CTL)) { 2250 clk = ddi_get_lbolt(); 2251 if (clk > sc->sc_clk + drv_usectohz(500000)) { 2252 wpi_amrr_timeout(sc); 2253 } 2254 } 2255 mutex_exit(&sc->sc_mt_lock); 2256 delay(drv_usectohz(100000)); 2257 mutex_enter(&sc->sc_mt_lock); 2258 if (sc->sc_tx_timer) { 2259 timeout++; 2260 if (timeout == 10) { 2261 sc->sc_tx_timer--; 2262 if (sc->sc_tx_timer == 0) { 2263 sc->sc_flags |= WPI_F_HW_ERR_RECOVER; 2264 sc->sc_ostate = IEEE80211_S_RUN; 2265 } 2266 timeout = 0; 2267 } 2268 } 2269 } 2270 sc->sc_mf_thread = NULL; 2271 cv_signal(&sc->sc_mt_cv); 2272 mutex_exit(&sc->sc_mt_lock); 2273 } 2274 2275 /* 2276 * Extract various information from EEPROM. 2277 */ 2278 static void 2279 wpi_read_eeprom(wpi_sc_t *sc) 2280 { 2281 ieee80211com_t *ic = &sc->sc_ic; 2282 uint16_t val; 2283 int i; 2284 2285 /* read MAC address */ 2286 val = wpi_read_prom_word(sc, WPI_EEPROM_MAC + 0); 2287 ic->ic_macaddr[0] = val & 0xff; 2288 ic->ic_macaddr[1] = val >> 8; 2289 val = wpi_read_prom_word(sc, WPI_EEPROM_MAC + 1); 2290 ic->ic_macaddr[2] = val & 0xff; 2291 ic->ic_macaddr[3] = val >> 8; 2292 val = wpi_read_prom_word(sc, WPI_EEPROM_MAC + 2); 2293 ic->ic_macaddr[4] = val & 0xff; 2294 ic->ic_macaddr[5] = val >> 8; 2295 2296 WPI_DBG((WPI_DEBUG_EEPROM, 2297 "mac:%2x:%2x:%2x:%2x:%2x:%2x\n", 2298 ic->ic_macaddr[0], ic->ic_macaddr[1], 2299 ic->ic_macaddr[2], ic->ic_macaddr[3], 2300 ic->ic_macaddr[4], ic->ic_macaddr[5])); 2301 /* read power settings for 2.4GHz channels */ 2302 for (i = 0; i < 14; i++) { 2303 sc->sc_pwr1[i] = wpi_read_prom_word(sc, WPI_EEPROM_PWR1 + i); 2304 sc->sc_pwr2[i] = wpi_read_prom_word(sc, WPI_EEPROM_PWR2 + i); 2305 WPI_DBG((WPI_DEBUG_EEPROM, 2306 "channel %d pwr1 0x%04x pwr2 0x%04x\n", i + 1, 2307 sc->sc_pwr1[i], sc->sc_pwr2[i])); 2308 } 2309 } 2310 2311 /* 2312 * Send a command to the firmware. 2313 */ 2314 static int 2315 wpi_cmd(wpi_sc_t *sc, int code, const void *buf, int size, int async) 2316 { 2317 wpi_tx_ring_t *ring = &sc->sc_cmdq; 2318 wpi_tx_desc_t *desc; 2319 wpi_tx_cmd_t *cmd; 2320 2321 ASSERT(size <= sizeof (cmd->data)); 2322 ASSERT(mutex_owned(&sc->sc_glock)); 2323 2324 WPI_DBG((WPI_DEBUG_CMD, "wpi_cmd() # code[%d]", code)); 2325 desc = ring->data[ring->cur].desc; 2326 cmd = ring->data[ring->cur].cmd; 2327 2328 cmd->code = (uint8_t)code; 2329 cmd->flags = 0; 2330 cmd->qid = ring->qid; 2331 cmd->idx = ring->cur; 2332 (void) memcpy(cmd->data, buf, size); 2333 2334 desc->flags = LE_32(WPI_PAD32(size) << 28 | 1 << 24); 2335 desc->segs[0].addr = ring->data[ring->cur].paddr_cmd; 2336 desc->segs[0].len = 4 + size; 2337 2338 /* kick cmd ring */ 2339 ring->cur = (ring->cur + 1) % WPI_CMD_RING_COUNT; 2340 WPI_WRITE(sc, WPI_TX_WIDX, ring->qid << 8 | ring->cur); 2341 2342 if (async) 2343 return (WPI_SUCCESS); 2344 else { 2345 clock_t clk; 2346 sc->sc_flags &= ~WPI_F_CMD_DONE; 2347 clk = ddi_get_lbolt() + drv_usectohz(2000000); 2348 while (!(sc->sc_flags & WPI_F_CMD_DONE)) { 2349 if (cv_timedwait(&sc->sc_cmd_cv, &sc->sc_glock, clk) 2350 < 0) 2351 break; 2352 } 2353 if (sc->sc_flags & WPI_F_CMD_DONE) 2354 return (WPI_SUCCESS); 2355 else 2356 return (WPI_FAIL); 2357 } 2358 } 2359 2360 /* 2361 * Configure h/w multi-rate retries. 2362 */ 2363 static int 2364 wpi_mrr_setup(wpi_sc_t *sc) 2365 { 2366 wpi_mrr_setup_t mrr; 2367 int i, err; 2368 2369 /* CCK rates (not used with 802.11a) */ 2370 for (i = WPI_CCK1; i <= WPI_CCK11; i++) { 2371 mrr.rates[i].flags = 0; 2372 mrr.rates[i].signal = wpi_ridx_to_signal[i]; 2373 /* fallback to the immediate lower CCK rate (if any) */ 2374 mrr.rates[i].next = (i == WPI_CCK1) ? WPI_CCK1 : i - 1; 2375 /* try one time at this rate before falling back to "next" */ 2376 mrr.rates[i].ntries = 1; 2377 } 2378 2379 /* OFDM rates (not used with 802.11b) */ 2380 for (i = WPI_OFDM6; i <= WPI_OFDM54; i++) { 2381 mrr.rates[i].flags = 0; 2382 mrr.rates[i].signal = wpi_ridx_to_signal[i]; 2383 /* fallback to the immediate lower OFDM rate (if any) */ 2384 mrr.rates[i].next = (i == WPI_OFDM6) ? WPI_OFDM6 : i - 1; 2385 /* try one time at this rate before falling back to "next" */ 2386 mrr.rates[i].ntries = 1; 2387 } 2388 2389 /* setup MRR for control frames */ 2390 mrr.which = LE_32(WPI_MRR_CTL); 2391 err = wpi_cmd(sc, WPI_CMD_MRR_SETUP, &mrr, sizeof (mrr), 1); 2392 if (err != WPI_SUCCESS) { 2393 WPI_DBG((WPI_DEBUG_MRR, 2394 "could not setup MRR for control frames\n")); 2395 return (err); 2396 } 2397 2398 /* setup MRR for data frames */ 2399 mrr.which = LE_32(WPI_MRR_DATA); 2400 err = wpi_cmd(sc, WPI_CMD_MRR_SETUP, &mrr, sizeof (mrr), 1); 2401 if (err != WPI_SUCCESS) { 2402 WPI_DBG((WPI_DEBUG_MRR, 2403 "could not setup MRR for data frames\n")); 2404 return (err); 2405 } 2406 2407 return (WPI_SUCCESS); 2408 } 2409 2410 static void 2411 wpi_set_led(wpi_sc_t *sc, uint8_t which, uint8_t off, uint8_t on) 2412 { 2413 wpi_cmd_led_t led; 2414 2415 led.which = which; 2416 led.unit = LE_32(100000); /* on/off in unit of 100ms */ 2417 led.off = off; 2418 led.on = on; 2419 2420 (void) wpi_cmd(sc, WPI_CMD_SET_LED, &led, sizeof (led), 1); 2421 } 2422 2423 static int 2424 wpi_auth(wpi_sc_t *sc) 2425 { 2426 ieee80211com_t *ic = &sc->sc_ic; 2427 ieee80211_node_t *in = ic->ic_bss; 2428 wpi_node_t node; 2429 int err; 2430 2431 /* update adapter's configuration */ 2432 IEEE80211_ADDR_COPY(sc->sc_config.bssid, in->in_bssid); 2433 sc->sc_config.chan = ieee80211_chan2ieee(ic, in->in_chan); 2434 if (ic->ic_curmode == IEEE80211_MODE_11B) { 2435 sc->sc_config.cck_mask = 0x03; 2436 sc->sc_config.ofdm_mask = 0; 2437 } else if ((in->in_chan != IEEE80211_CHAN_ANYC) && 2438 (IEEE80211_IS_CHAN_5GHZ(in->in_chan))) { 2439 sc->sc_config.cck_mask = 0; 2440 sc->sc_config.ofdm_mask = 0x15; 2441 } else { /* assume 802.11b/g */ 2442 sc->sc_config.cck_mask = 0x0f; 2443 sc->sc_config.ofdm_mask = 0x15; 2444 } 2445 2446 WPI_DBG((WPI_DEBUG_80211, "config chan %d flags %x cck %x ofdm %x" 2447 " bssid:%02x:%02x:%02x:%02x:%02x:%2x\n", 2448 sc->sc_config.chan, sc->sc_config.flags, 2449 sc->sc_config.cck_mask, sc->sc_config.ofdm_mask, 2450 sc->sc_config.bssid[0], sc->sc_config.bssid[1], 2451 sc->sc_config.bssid[2], sc->sc_config.bssid[3], 2452 sc->sc_config.bssid[4], sc->sc_config.bssid[5])); 2453 err = wpi_cmd(sc, WPI_CMD_CONFIGURE, &sc->sc_config, 2454 sizeof (wpi_config_t), 1); 2455 if (err != WPI_SUCCESS) { 2456 cmn_err(CE_WARN, "wpi_auth(): failed to configurate chan%d\n", 2457 sc->sc_config.chan); 2458 return (err); 2459 } 2460 2461 /* add default node */ 2462 (void) memset(&node, 0, sizeof (node)); 2463 IEEE80211_ADDR_COPY(node.bssid, in->in_bssid); 2464 node.id = WPI_ID_BSS; 2465 node.rate = wpi_plcp_signal(2); 2466 err = wpi_cmd(sc, WPI_CMD_ADD_NODE, &node, sizeof (node), 1); 2467 if (err != WPI_SUCCESS) { 2468 cmn_err(CE_WARN, "wpi_auth(): failed to add BSS node\n"); 2469 return (err); 2470 } 2471 2472 err = wpi_mrr_setup(sc); 2473 if (err != WPI_SUCCESS) { 2474 cmn_err(CE_WARN, "wpi_auth(): failed to setup MRR\n"); 2475 return (err); 2476 } 2477 2478 return (WPI_SUCCESS); 2479 } 2480 2481 /* 2482 * Send a scan request to the firmware. 2483 */ 2484 static int 2485 wpi_scan(wpi_sc_t *sc) 2486 { 2487 ieee80211com_t *ic = &sc->sc_ic; 2488 wpi_tx_ring_t *ring = &sc->sc_cmdq; 2489 wpi_tx_desc_t *desc; 2490 wpi_tx_data_t *data; 2491 wpi_tx_cmd_t *cmd; 2492 wpi_scan_hdr_t *hdr; 2493 wpi_scan_chan_t *chan; 2494 struct ieee80211_frame *wh; 2495 ieee80211_node_t *in = ic->ic_bss; 2496 struct ieee80211_rateset *rs; 2497 enum ieee80211_phymode mode; 2498 uint8_t *frm; 2499 int i, pktlen, nrates; 2500 2501 data = &ring->data[ring->cur]; 2502 desc = data->desc; 2503 cmd = (wpi_tx_cmd_t *)data->dma_data.mem_va; 2504 2505 cmd->code = WPI_CMD_SCAN; 2506 cmd->flags = 0; 2507 cmd->qid = ring->qid; 2508 cmd->idx = ring->cur; 2509 2510 hdr = (wpi_scan_hdr_t *)cmd->data; 2511 (void) memset(hdr, 0, sizeof (wpi_scan_hdr_t)); 2512 hdr->first = 1; 2513 hdr->nchan = 14; 2514 hdr->len = hdr->nchan * sizeof (wpi_scan_chan_t); 2515 hdr->quiet = LE_16(5); 2516 hdr->threshold = LE_16(1); 2517 hdr->filter = LE_32(5); 2518 hdr->rate = wpi_plcp_signal(2); 2519 hdr->id = WPI_ID_BROADCAST; 2520 hdr->mask = LE_32(0xffffffff); 2521 hdr->esslen = ic->ic_des_esslen; 2522 if (ic->ic_des_esslen) 2523 bcopy(ic->ic_des_essid, hdr->essid, ic->ic_des_esslen); 2524 else 2525 bzero(hdr->essid, sizeof (hdr->essid)); 2526 /* 2527 * Build a probe request frame. Most of the following code is a 2528 * copy & paste of what is done in net80211. Unfortunately, the 2529 * functions to add IEs are static and thus can't be reused here. 2530 */ 2531 wh = (struct ieee80211_frame *)(hdr + 1); 2532 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT | 2533 IEEE80211_FC0_SUBTYPE_PROBE_REQ; 2534 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS; 2535 (void) memset(wh->i_addr1, 0xff, 6); 2536 IEEE80211_ADDR_COPY(wh->i_addr2, ic->ic_macaddr); 2537 (void) memset(wh->i_addr3, 0xff, 6); 2538 *(uint16_t *)&wh->i_dur[0] = 0; /* filled by h/w */ 2539 *(uint16_t *)&wh->i_seq[0] = 0; /* filled by h/w */ 2540 2541 frm = (uint8_t *)(wh + 1); 2542 2543 /* add essid IE */ 2544 *frm++ = IEEE80211_ELEMID_SSID; 2545 *frm++ = in->in_esslen; 2546 (void) memcpy(frm, in->in_essid, in->in_esslen); 2547 frm += in->in_esslen; 2548 2549 mode = ieee80211_chan2mode(ic, ic->ic_curchan); 2550 rs = &ic->ic_sup_rates[mode]; 2551 2552 /* add supported rates IE */ 2553 *frm++ = IEEE80211_ELEMID_RATES; 2554 nrates = rs->ir_nrates; 2555 if (nrates > IEEE80211_RATE_SIZE) 2556 nrates = IEEE80211_RATE_SIZE; 2557 *frm++ = (uint8_t)nrates; 2558 (void) memcpy(frm, rs->ir_rates, nrates); 2559 frm += nrates; 2560 2561 /* add supported xrates IE */ 2562 if (rs->ir_nrates > IEEE80211_RATE_SIZE) { 2563 nrates = rs->ir_nrates - IEEE80211_RATE_SIZE; 2564 *frm++ = IEEE80211_ELEMID_XRATES; 2565 *frm++ = (uint8_t)nrates; 2566 (void) memcpy(frm, rs->ir_rates + IEEE80211_RATE_SIZE, nrates); 2567 frm += nrates; 2568 } 2569 2570 /* add optionnal IE (usually an RSN IE) */ 2571 if (ic->ic_opt_ie != NULL) { 2572 (void) memcpy(frm, ic->ic_opt_ie, ic->ic_opt_ie_len); 2573 frm += ic->ic_opt_ie_len; 2574 } 2575 2576 /* setup length of probe request */ 2577 hdr->pbrlen = LE_16(frm - (uint8_t *)wh); 2578 2579 /* align on a 4-byte boundary */ 2580 chan = (wpi_scan_chan_t *)frm; 2581 for (i = 1; i <= hdr->nchan; i++, chan++) { 2582 chan->flags = 3; 2583 chan->chan = (uint8_t)i; 2584 chan->magic = LE_16(0x62ab); 2585 chan->active = LE_16(20); 2586 chan->passive = LE_16(120); 2587 2588 frm += sizeof (wpi_scan_chan_t); 2589 } 2590 2591 pktlen = frm - (uint8_t *)cmd; 2592 2593 desc->flags = LE_32(WPI_PAD32(pktlen) << 28 | 1 << 24); 2594 desc->segs[0].addr = LE_32(data->dma_data.cookie.dmac_address); 2595 desc->segs[0].len = LE_32(pktlen); 2596 2597 WPI_DMA_SYNC(data->dma_data, DDI_DMA_SYNC_FORDEV); 2598 WPI_DMA_SYNC(ring->dma_desc, DDI_DMA_SYNC_FORDEV); 2599 2600 /* kick cmd ring */ 2601 ring->cur = (ring->cur + 1) % WPI_CMD_RING_COUNT; 2602 WPI_WRITE(sc, WPI_TX_WIDX, ring->qid << 8 | ring->cur); 2603 2604 return (WPI_SUCCESS); /* will be notified async. of failure/success */ 2605 } 2606 2607 static int 2608 wpi_config(wpi_sc_t *sc) 2609 { 2610 ieee80211com_t *ic = &sc->sc_ic; 2611 wpi_txpower_t txpower; 2612 wpi_power_t power; 2613 #ifdef WPI_BLUE_COEXISTENCE 2614 wpi_bluetooth_t bluetooth; 2615 #endif 2616 wpi_node_t node; 2617 int err; 2618 2619 /* Intel's binary only daemon is a joke.. */ 2620 2621 /* set Tx power for 2.4GHz channels (values read from EEPROM) */ 2622 (void) memset(&txpower, 0, sizeof (txpower)); 2623 (void) memcpy(txpower.pwr1, sc->sc_pwr1, 14 * sizeof (uint16_t)); 2624 (void) memcpy(txpower.pwr2, sc->sc_pwr2, 14 * sizeof (uint16_t)); 2625 err = wpi_cmd(sc, WPI_CMD_TXPOWER, &txpower, sizeof (txpower), 0); 2626 if (err != WPI_SUCCESS) { 2627 cmn_err(CE_WARN, "wpi_config(): failed to set txpower\n"); 2628 return (err); 2629 } 2630 2631 /* set power mode */ 2632 (void) memset(&power, 0, sizeof (power)); 2633 power.flags = LE_32(0x8); 2634 err = wpi_cmd(sc, WPI_CMD_SET_POWER_MODE, &power, sizeof (power), 0); 2635 if (err != WPI_SUCCESS) { 2636 cmn_err(CE_WARN, "wpi_config(): failed to set power mode\n"); 2637 return (err); 2638 } 2639 #ifdef WPI_BLUE_COEXISTENCE 2640 /* configure bluetooth coexistence */ 2641 (void) memset(&bluetooth, 0, sizeof (bluetooth)); 2642 bluetooth.flags = 3; 2643 bluetooth.lead = 0xaa; 2644 bluetooth.kill = 1; 2645 err = wpi_cmd(sc, WPI_CMD_BLUETOOTH, &bluetooth, 2646 sizeof (bluetooth), 0); 2647 if (err != WPI_SUCCESS) { 2648 cmn_err(CE_WARN, 2649 "wpi_config(): " 2650 "failed to configurate bluetooth coexistence\n"); 2651 return (err); 2652 } 2653 #endif 2654 /* configure adapter */ 2655 (void) memset(&sc->sc_config, 0, sizeof (wpi_config_t)); 2656 IEEE80211_ADDR_COPY(sc->sc_config.myaddr, ic->ic_macaddr); 2657 sc->sc_config.chan = ieee80211_chan2ieee(ic, ic->ic_curchan); 2658 sc->sc_config.flags = LE_32(WPI_CONFIG_TSF | WPI_CONFIG_AUTO | 2659 WPI_CONFIG_24GHZ); 2660 sc->sc_config.filter = 0; 2661 switch (ic->ic_opmode) { 2662 case IEEE80211_M_STA: 2663 sc->sc_config.mode = WPI_MODE_STA; 2664 sc->sc_config.filter |= LE_32(WPI_FILTER_MULTICAST | 2665 WPI_FILTER_NODECRYPT); 2666 break; 2667 case IEEE80211_M_IBSS: 2668 case IEEE80211_M_AHDEMO: 2669 sc->sc_config.mode = WPI_MODE_IBSS; 2670 break; 2671 case IEEE80211_M_HOSTAP: 2672 sc->sc_config.mode = WPI_MODE_HOSTAP; 2673 break; 2674 case IEEE80211_M_MONITOR: 2675 sc->sc_config.mode = WPI_MODE_MONITOR; 2676 sc->sc_config.filter |= LE_32(WPI_FILTER_MULTICAST | 2677 WPI_FILTER_CTL | WPI_FILTER_PROMISC); 2678 break; 2679 } 2680 sc->sc_config.cck_mask = 0x0f; /* not yet negotiated */ 2681 sc->sc_config.ofdm_mask = 0xff; /* not yet negotiated */ 2682 err = wpi_cmd(sc, WPI_CMD_CONFIGURE, &sc->sc_config, 2683 sizeof (wpi_config_t), 0); 2684 if (err != WPI_SUCCESS) { 2685 cmn_err(CE_WARN, "wpi_config(): " 2686 "failed to set configure command\n"); 2687 return (err); 2688 } 2689 2690 /* add broadcast node */ 2691 (void) memset(&node, 0, sizeof (node)); 2692 (void) memset(node.bssid, 0xff, 6); 2693 node.id = WPI_ID_BROADCAST; 2694 node.rate = wpi_plcp_signal(2); 2695 err = wpi_cmd(sc, WPI_CMD_ADD_NODE, &node, sizeof (node), 0); 2696 if (err != WPI_SUCCESS) { 2697 cmn_err(CE_WARN, "wpi_config(): " 2698 "failed to add broadcast node\n"); 2699 return (err); 2700 } 2701 2702 return (WPI_SUCCESS); 2703 } 2704 2705 static void 2706 wpi_stop_master(wpi_sc_t *sc) 2707 { 2708 uint32_t tmp; 2709 int ntries; 2710 2711 tmp = WPI_READ(sc, WPI_RESET); 2712 WPI_WRITE(sc, WPI_RESET, tmp | WPI_STOP_MASTER); 2713 2714 tmp = WPI_READ(sc, WPI_GPIO_CTL); 2715 if ((tmp & WPI_GPIO_PWR_STATUS) == WPI_GPIO_PWR_SLEEP) 2716 return; /* already asleep */ 2717 2718 for (ntries = 0; ntries < 2000; ntries++) { 2719 if (WPI_READ(sc, WPI_RESET) & WPI_MASTER_DISABLED) 2720 break; 2721 DELAY(1000); 2722 } 2723 if (ntries == 2000) 2724 WPI_DBG((WPI_DEBUG_HW, "timeout waiting for master\n")); 2725 } 2726 2727 static int 2728 wpi_power_up(wpi_sc_t *sc) 2729 { 2730 uint32_t tmp; 2731 int ntries; 2732 2733 wpi_mem_lock(sc); 2734 tmp = wpi_mem_read(sc, WPI_MEM_POWER); 2735 wpi_mem_write(sc, WPI_MEM_POWER, tmp & ~0x03000000); 2736 wpi_mem_unlock(sc); 2737 2738 for (ntries = 0; ntries < 5000; ntries++) { 2739 if (WPI_READ(sc, WPI_GPIO_STATUS) & WPI_POWERED) 2740 break; 2741 DELAY(10); 2742 } 2743 if (ntries == 5000) { 2744 cmn_err(CE_WARN, 2745 "wpi_power_up(): timeout waiting for NIC to power up\n"); 2746 return (ETIMEDOUT); 2747 } 2748 return (WPI_SUCCESS); 2749 } 2750 2751 static int 2752 wpi_reset(wpi_sc_t *sc) 2753 { 2754 uint32_t tmp; 2755 int ntries; 2756 2757 /* clear any pending interrupts */ 2758 WPI_WRITE(sc, WPI_INTR, 0xffffffff); 2759 2760 tmp = WPI_READ(sc, WPI_PLL_CTL); 2761 WPI_WRITE(sc, WPI_PLL_CTL, tmp | WPI_PLL_INIT); 2762 2763 tmp = WPI_READ(sc, WPI_CHICKEN); 2764 WPI_WRITE(sc, WPI_CHICKEN, tmp | WPI_CHICKEN_RXNOLOS); 2765 2766 tmp = WPI_READ(sc, WPI_GPIO_CTL); 2767 WPI_WRITE(sc, WPI_GPIO_CTL, tmp | WPI_GPIO_INIT); 2768 2769 /* wait for clock stabilization */ 2770 for (ntries = 0; ntries < 1000; ntries++) { 2771 if (WPI_READ(sc, WPI_GPIO_CTL) & WPI_GPIO_CLOCK) 2772 break; 2773 DELAY(10); 2774 } 2775 if (ntries == 1000) { 2776 cmn_err(CE_WARN, 2777 "wpi_reset(): timeout waiting for clock stabilization\n"); 2778 return (ETIMEDOUT); 2779 } 2780 2781 /* initialize EEPROM */ 2782 tmp = WPI_READ(sc, WPI_EEPROM_STATUS); 2783 if ((tmp & WPI_EEPROM_VERSION) == 0) { 2784 cmn_err(CE_WARN, "wpi_reset(): EEPROM not found\n"); 2785 return (EIO); 2786 } 2787 WPI_WRITE(sc, WPI_EEPROM_STATUS, tmp & ~WPI_EEPROM_LOCKED); 2788 2789 return (WPI_SUCCESS); 2790 } 2791 2792 static void 2793 wpi_hw_config(wpi_sc_t *sc) 2794 { 2795 uint16_t val; 2796 uint32_t hw; 2797 2798 /* voodoo from the Linux "driver".. */ 2799 hw = WPI_READ(sc, WPI_HWCONFIG); 2800 2801 if ((sc->sc_rev & 0xc0) == 0x40) 2802 hw |= WPI_HW_ALM_MB; 2803 else if (!(sc->sc_rev & 0x80)) 2804 hw |= WPI_HW_ALM_MM; 2805 2806 val = wpi_read_prom_word(sc, WPI_EEPROM_CAPABILITIES); 2807 if ((val & 0xff) == 0x80) 2808 hw |= WPI_HW_SKU_MRC; 2809 2810 val = wpi_read_prom_word(sc, WPI_EEPROM_REVISION); 2811 hw &= ~WPI_HW_REV_D; 2812 if ((val & 0xf0) == 0xd0) 2813 hw |= WPI_HW_REV_D; 2814 2815 val = wpi_read_prom_word(sc, WPI_EEPROM_TYPE); 2816 if ((val & 0xff) > 1) 2817 hw |= WPI_HW_TYPE_B; 2818 2819 WPI_DBG((WPI_DEBUG_HW, "setting h/w config %x\n", hw)); 2820 WPI_WRITE(sc, WPI_HWCONFIG, hw); 2821 } 2822 2823 static int 2824 wpi_init(wpi_sc_t *sc) 2825 { 2826 uint32_t tmp; 2827 int qid, ntries, err; 2828 clock_t clk; 2829 2830 mutex_enter(&sc->sc_glock); 2831 sc->sc_flags &= ~WPI_F_FW_INIT; 2832 2833 (void) wpi_reset(sc); 2834 2835 wpi_mem_lock(sc); 2836 wpi_mem_write(sc, WPI_MEM_CLOCK1, 0xa00); 2837 DELAY(20); 2838 tmp = wpi_mem_read(sc, WPI_MEM_PCIDEV); 2839 wpi_mem_write(sc, WPI_MEM_PCIDEV, tmp | 0x800); 2840 wpi_mem_unlock(sc); 2841 2842 (void) wpi_power_up(sc); 2843 wpi_hw_config(sc); 2844 2845 /* init Rx ring */ 2846 wpi_mem_lock(sc); 2847 WPI_WRITE(sc, WPI_RX_BASE, sc->sc_rxq.dma_desc.cookie.dmac_address); 2848 WPI_WRITE(sc, WPI_RX_RIDX_PTR, 2849 (uint32_t)(sc->sc_dma_sh.cookie.dmac_address + 2850 offsetof(wpi_shared_t, next))); 2851 WPI_WRITE(sc, WPI_RX_WIDX, (WPI_RX_RING_COUNT - 1) & (~7)); 2852 WPI_WRITE(sc, WPI_RX_CONFIG, 0xa9601010); 2853 wpi_mem_unlock(sc); 2854 2855 /* init Tx rings */ 2856 wpi_mem_lock(sc); 2857 wpi_mem_write(sc, WPI_MEM_MODE, 2); /* bypass mode */ 2858 wpi_mem_write(sc, WPI_MEM_RA, 1); /* enable RA0 */ 2859 wpi_mem_write(sc, WPI_MEM_TXCFG, 0x3f); /* enable all 6 Tx rings */ 2860 wpi_mem_write(sc, WPI_MEM_BYPASS1, 0x10000); 2861 wpi_mem_write(sc, WPI_MEM_BYPASS2, 0x30002); 2862 wpi_mem_write(sc, WPI_MEM_MAGIC4, 4); 2863 wpi_mem_write(sc, WPI_MEM_MAGIC5, 5); 2864 2865 WPI_WRITE(sc, WPI_TX_BASE_PTR, sc->sc_dma_sh.cookie.dmac_address); 2866 WPI_WRITE(sc, WPI_MSG_CONFIG, 0xffff05a5); 2867 2868 for (qid = 0; qid < 6; qid++) { 2869 WPI_WRITE(sc, WPI_TX_CTL(qid), 0); 2870 WPI_WRITE(sc, WPI_TX_BASE(qid), 0); 2871 WPI_WRITE(sc, WPI_TX_CONFIG(qid), 0x80200008); 2872 } 2873 wpi_mem_unlock(sc); 2874 2875 /* clear "radio off" and "disable command" bits (reversed logic) */ 2876 WPI_WRITE(sc, WPI_UCODE_CLR, WPI_RADIO_OFF); 2877 WPI_WRITE(sc, WPI_UCODE_CLR, WPI_DISABLE_CMD); 2878 2879 /* clear any pending interrupts */ 2880 WPI_WRITE(sc, WPI_INTR, 0xffffffff); 2881 2882 /* enable interrupts */ 2883 WPI_WRITE(sc, WPI_MASK, WPI_INTR_MASK); 2884 2885 /* load firmware boot code into NIC */ 2886 err = wpi_load_microcode(sc); 2887 if (err != WPI_SUCCESS) { 2888 cmn_err(CE_WARN, "wpi_init(): failed to load microcode\n"); 2889 goto fail1; 2890 } 2891 2892 /* load firmware .text segment into NIC */ 2893 err = wpi_load_firmware(sc, WPI_FW_TEXT); 2894 if (err != WPI_SUCCESS) { 2895 cmn_err(CE_WARN, "wpi_init(): " 2896 "failed to load firmware(text)\n"); 2897 goto fail1; 2898 } 2899 2900 /* load firmware .data segment into NIC */ 2901 err = wpi_load_firmware(sc, WPI_FW_DATA); 2902 if (err != WPI_SUCCESS) { 2903 cmn_err(CE_WARN, "wpi_init(): " 2904 "failed to load firmware(data)\n"); 2905 goto fail1; 2906 } 2907 2908 /* now press "execute" ;-) */ 2909 tmp = WPI_READ(sc, WPI_RESET); 2910 tmp &= ~(WPI_MASTER_DISABLED | WPI_STOP_MASTER | WPI_NEVO_RESET); 2911 WPI_WRITE(sc, WPI_RESET, tmp); 2912 2913 /* ..and wait at most one second for adapter to initialize */ 2914 clk = ddi_get_lbolt() + drv_usectohz(2000000); 2915 while (!(sc->sc_flags & WPI_F_FW_INIT)) { 2916 if (cv_timedwait(&sc->sc_fw_cv, &sc->sc_glock, clk) < 0) 2917 break; 2918 } 2919 if (!(sc->sc_flags & WPI_F_FW_INIT)) { 2920 cmn_err(CE_WARN, 2921 "wpi_init(): timeout waiting for firmware init\n"); 2922 goto fail1; 2923 } 2924 2925 /* wait for thermal sensors to calibrate */ 2926 for (ntries = 0; ntries < 1000; ntries++) { 2927 if (WPI_READ(sc, WPI_TEMPERATURE) != 0) 2928 break; 2929 DELAY(10); 2930 } 2931 2932 if (ntries == 1000) { 2933 WPI_DBG((WPI_DEBUG_HW, 2934 "wpi_init(): timeout waiting for thermal sensors " 2935 "calibration\n")); 2936 } 2937 2938 WPI_DBG((WPI_DEBUG_HW, "temperature %d\n", 2939 (int)WPI_READ(sc, WPI_TEMPERATURE))); 2940 2941 err = wpi_config(sc); 2942 if (err) { 2943 cmn_err(CE_WARN, "wpi_init(): failed to configure device\n"); 2944 goto fail1; 2945 } 2946 2947 mutex_exit(&sc->sc_glock); 2948 return (WPI_SUCCESS); 2949 2950 fail1: 2951 err = WPI_FAIL; 2952 mutex_exit(&sc->sc_glock); 2953 return (err); 2954 } 2955 2956 static void 2957 wpi_stop(wpi_sc_t *sc) 2958 { 2959 uint32_t tmp; 2960 int ac; 2961 2962 2963 mutex_enter(&sc->sc_glock); 2964 /* disable interrupts */ 2965 WPI_WRITE(sc, WPI_MASK, 0); 2966 WPI_WRITE(sc, WPI_INTR, WPI_INTR_MASK); 2967 WPI_WRITE(sc, WPI_INTR_STATUS, 0xff); 2968 WPI_WRITE(sc, WPI_INTR_STATUS, 0x00070000); 2969 2970 wpi_mem_lock(sc); 2971 wpi_mem_write(sc, WPI_MEM_MODE, 0); 2972 wpi_mem_unlock(sc); 2973 2974 /* reset all Tx rings */ 2975 for (ac = 0; ac < 4; ac++) 2976 wpi_reset_tx_ring(sc, &sc->sc_txq[ac]); 2977 wpi_reset_tx_ring(sc, &sc->sc_cmdq); 2978 wpi_reset_tx_ring(sc, &sc->sc_svcq); 2979 2980 /* reset Rx ring */ 2981 wpi_reset_rx_ring(sc); 2982 2983 wpi_mem_lock(sc); 2984 wpi_mem_write(sc, WPI_MEM_CLOCK2, 0x200); 2985 wpi_mem_unlock(sc); 2986 2987 DELAY(5); 2988 2989 wpi_stop_master(sc); 2990 2991 sc->sc_tx_timer = 0; 2992 tmp = WPI_READ(sc, WPI_RESET); 2993 WPI_WRITE(sc, WPI_RESET, tmp | WPI_SW_RESET); 2994 mutex_exit(&sc->sc_glock); 2995 } 2996 2997 /* 2998 * Naive implementation of the Adaptive Multi Rate Retry algorithm: 2999 * "IEEE 802.11 Rate Adaptation: A Practical Approach" 3000 * Mathieu Lacage, Hossein Manshaei, Thierry Turletti 3001 * INRIA Sophia - Projet Planete 3002 * http://www-sop.inria.fr/rapports/sophia/RR-5208.html 3003 */ 3004 #define is_success(amrr) \ 3005 ((amrr)->retrycnt < (amrr)->txcnt / 10) 3006 #define is_failure(amrr) \ 3007 ((amrr)->retrycnt > (amrr)->txcnt / 3) 3008 #define is_enough(amrr) \ 3009 ((amrr)->txcnt > 100) 3010 #define is_min_rate(in) \ 3011 ((in)->in_txrate == 0) 3012 #define is_max_rate(in) \ 3013 ((in)->in_txrate == (in)->in_rates.ir_nrates - 1) 3014 #define increase_rate(in) \ 3015 ((in)->in_txrate++) 3016 #define decrease_rate(in) \ 3017 ((in)->in_txrate--) 3018 #define reset_cnt(amrr) \ 3019 { (amrr)->txcnt = (amrr)->retrycnt = 0; } 3020 3021 #define WPI_AMRR_MIN_SUCCESS_THRESHOLD 1 3022 #define WPI_AMRR_MAX_SUCCESS_THRESHOLD 15 3023 3024 static void 3025 wpi_amrr_init(wpi_amrr_t *amrr) 3026 { 3027 amrr->success = 0; 3028 amrr->recovery = 0; 3029 amrr->txcnt = amrr->retrycnt = 0; 3030 amrr->success_threshold = WPI_AMRR_MIN_SUCCESS_THRESHOLD; 3031 } 3032 3033 static void 3034 wpi_amrr_timeout(wpi_sc_t *sc) 3035 { 3036 ieee80211com_t *ic = &sc->sc_ic; 3037 3038 WPI_DBG((WPI_DEBUG_RATECTL, "wpi_amrr_timeout() enter\n")); 3039 if (ic->ic_opmode == IEEE80211_M_STA) 3040 wpi_amrr_ratectl(NULL, ic->ic_bss); 3041 else 3042 ieee80211_iterate_nodes(&ic->ic_sta, wpi_amrr_ratectl, NULL); 3043 sc->sc_clk = ddi_get_lbolt(); 3044 } 3045 3046 /* ARGSUSED */ 3047 static void 3048 wpi_amrr_ratectl(void *arg, ieee80211_node_t *in) 3049 { 3050 wpi_amrr_t *amrr = (wpi_amrr_t *)in; 3051 int need_change = 0; 3052 3053 if (is_success(amrr) && is_enough(amrr)) { 3054 amrr->success++; 3055 if (amrr->success >= amrr->success_threshold && 3056 !is_max_rate(in)) { 3057 amrr->recovery = 1; 3058 amrr->success = 0; 3059 increase_rate(in); 3060 WPI_DBG((WPI_DEBUG_RATECTL, 3061 "AMRR increasing rate %d (txcnt=%d retrycnt=%d)\n", 3062 in->in_txrate, amrr->txcnt, amrr->retrycnt)); 3063 need_change = 1; 3064 } else { 3065 amrr->recovery = 0; 3066 } 3067 } else if (is_failure(amrr)) { 3068 amrr->success = 0; 3069 if (!is_min_rate(in)) { 3070 if (amrr->recovery) { 3071 amrr->success_threshold++; 3072 if (amrr->success_threshold > 3073 WPI_AMRR_MAX_SUCCESS_THRESHOLD) 3074 amrr->success_threshold = 3075 WPI_AMRR_MAX_SUCCESS_THRESHOLD; 3076 } else { 3077 amrr->success_threshold = 3078 WPI_AMRR_MIN_SUCCESS_THRESHOLD; 3079 } 3080 decrease_rate(in); 3081 WPI_DBG((WPI_DEBUG_RATECTL, 3082 "AMRR decreasing rate %d (txcnt=%d retrycnt=%d)\n", 3083 in->in_txrate, amrr->txcnt, amrr->retrycnt)); 3084 need_change = 1; 3085 } 3086 amrr->recovery = 0; /* paper is incorrect */ 3087 } 3088 3089 if (is_enough(amrr) || need_change) 3090 reset_cnt(amrr); 3091 } 3092