1*4ebb14b2Sfrits# 2*4ebb14b2Sfrits# CDDL HEADER START 3*4ebb14b2Sfrits# 4*4ebb14b2Sfrits# The contents of this file are subject to the terms of the 5*4ebb14b2Sfrits# Common Development and Distribution License (the "License"). 6*4ebb14b2Sfrits# You may not use this file except in compliance with the License. 7*4ebb14b2Sfrits# 8*4ebb14b2Sfrits# You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9*4ebb14b2Sfrits# or http://www.opensolaris.org/os/licensing. 10*4ebb14b2Sfrits# See the License for the specific language governing permissions 11*4ebb14b2Sfrits# and limitations under the License. 12*4ebb14b2Sfrits# 13*4ebb14b2Sfrits# When distributing Covered Code, include this CDDL HEADER in each 14*4ebb14b2Sfrits# file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15*4ebb14b2Sfrits# If applicable, add the following below this CDDL HEADER, with the 16*4ebb14b2Sfrits# fields enclosed by brackets "[]" replaced with your own identifying 17*4ebb14b2Sfrits# information: Portions Copyright [yyyy] [name of copyright owner] 18*4ebb14b2Sfrits# 19*4ebb14b2Sfrits# CDDL HEADER END 20*4ebb14b2Sfrits# 21*4ebb14b2Sfrits# 22*4ebb14b2Sfrits# Copyright 2006 Sun Microsystems, Inc. All rights reserved. 23*4ebb14b2Sfrits# Use is subject to license terms. 24*4ebb14b2Sfrits# 25*4ebb14b2Sfrits 26*4ebb14b2Sfrits#ident "%Z%%M% %I% %E% SMI" 27*4ebb14b2Sfrits 28*4ebb14b2Sfritsone hci1394_state_s 29*4ebb14b2Sfrits 30*4ebb14b2Sfrits### HAL interface entry points 31*4ebb14b2Sfritsroot hci1394_s1394if_shutdown 32*4ebb14b2Sfritsroot hci1394_s1394if_phy 33*4ebb14b2Sfritsroot hci1394_s1394if_read 34*4ebb14b2Sfritsroot hci1394_s1394if_read_response 35*4ebb14b2Sfritsroot hci1394_s1394if_write 36*4ebb14b2Sfritsroot hci1394_s1394if_write_response 37*4ebb14b2Sfritsroot hci1394_s1394if_response_complete 38*4ebb14b2Sfritsroot hci1394_s1394if_lock 39*4ebb14b2Sfritsroot hci1394_s1394if_lock_response 40*4ebb14b2Sfritsroot hci1394_alloc_isoch_dma 41*4ebb14b2Sfritsroot hci1394_free_isoch_dma 42*4ebb14b2Sfritsroot hci1394_start_isoch_dma 43*4ebb14b2Sfritsroot hci1394_stop_isoch_dma 44*4ebb14b2Sfritsroot hci1394_update_isoch_dma 45*4ebb14b2Sfritsroot hci1394_s1394if_update_config_rom 46*4ebb14b2Sfritsroot hci1394_s1394if_reset_bus 47*4ebb14b2Sfritsroot hci1394_s1394if_short_bus_reset 48*4ebb14b2Sfritsroot hci1394_s1394if_set_contender_bit 49*4ebb14b2Sfritsroot hci1394_s1394if_set_root_holdoff_bit 50*4ebb14b2Sfritsroot hci1394_s1394if_set_gap_count 51*4ebb14b2Sfritsroot hci1394_s1394if_csr_read 52*4ebb14b2Sfritsroot hci1394_s1394if_csr_write 53*4ebb14b2Sfritsroot hci1394_s1394if_csr_cswap32 54*4ebb14b2Sfritsroot hci1394_s1394if_phy_filter_set 55*4ebb14b2Sfritsroot hci1394_s1394if_phy_filter_clr 56*4ebb14b2Sfritsroot hci1394_s1394if_power_state_change 57*4ebb14b2Sfrits 58*4ebb14b2Sfrits### timeout callbacks 59*4ebb14b2Sfritsroot hci1394_async_pending_timeout 60*4ebb14b2Sfrits 61*4ebb14b2Sfrits### currently unused functions 62*4ebb14b2Sfritsroot hci1394_isoch_resume 63*4ebb14b2Sfritsroot hci1394_ixl_set_start 64*4ebb14b2Sfritsroot hci1394_ohci_arreq_stop 65*4ebb14b2Sfritsroot hci1394_ohci_arresp_stop 66*4ebb14b2Sfritsroot hci1394_ohci_link_disable 67*4ebb14b2Sfritsroot hci1394_ohci_phy_clr 68*4ebb14b2Sfrits 69*4ebb14b2Sfritsadd h1394_lock_request/recv_lock_req targets s1394_send_response 70*4ebb14b2Sfritsadd h1394_read_request/recv_read_req targets s1394_send_response 71*4ebb14b2Sfritsadd h1394_write_request/recv_write_req targets s1394_send_response 72*4ebb14b2Sfrits 73*4ebb14b2Sfritsadd s1394_hal_s::halinfo.hal_events.response_complete targets \ 74*4ebb14b2Sfrits hci1394_s1394if_response_complete 75*4ebb14b2Sfritsadd s1394_hal_s::halinfo.hal_events.set_contender_bit targets \ 76*4ebb14b2Sfrits hci1394_s1394if_set_contender_bit 77*4ebb14b2Sfrits 78*4ebb14b2Sfrits### hci1394 callbacks 79*4ebb14b2Sfritsadd hci1394_ixl_dma_sync/callback targets warlock_dummy 80*4ebb14b2Sfritsadd hci1394_iso_ctxt_s::isoch_dma_stopped targets warlock_dummy 81*4ebb14b2Sfrits 82*4ebb14b2Sfritsadd hci1394_tlist_s::tl_timer_info.tlt_callback targets \ 83*4ebb14b2Sfrits hci1394_async_pending_timeout 84*4ebb14b2Sfritsadd hci1394_q_s::q_info.qi_start targets hci1394_async_arreq_start \ 85*4ebb14b2Sfrits hci1394_async_arresp_start hci1394_async_atreq_start \ 86*4ebb14b2Sfrits hci1394_async_atresp_start 87*4ebb14b2Sfritsadd hci1394_q_s::q_info.qi_wake targets hci1394_async_arreq_wake \ 88*4ebb14b2Sfrits hci1394_async_arresp_wake hci1394_async_atreq_wake \ 89*4ebb14b2Sfrits hci1394_async_atresp_wake 90*4ebb14b2Sfrits 91*4ebb14b2Sfrits# CMP/FCP 92*4ebb14b2Sfritsadd s1394_cmp_notify_reg_change/cb target warlock_dummy 93*4ebb14b2Sfritsadd s1394_fcp_recv_write_request/cb target warlock_dummy 94*4ebb14b2Sfrits 95*4ebb14b2Sfritsadd h1394_read_request/recv_read_req target s1394_cmp_ompr_recv_read_request 96*4ebb14b2Sfritsadd h1394_lock_request/recv_lock_req target s1394_cmp_ompr_recv_lock_request 97*4ebb14b2Sfritsadd h1394_read_request/recv_read_req target s1394_cmp_impr_recv_read_request 98*4ebb14b2Sfritsadd h1394_lock_request/recv_lock_req target s1394_cmp_impr_recv_lock_request 99*4ebb14b2Sfritsadd h1394_write_request/recv_write_req target s1394_fcp_resp_recv_write_request 100*4ebb14b2Sfritsadd h1394_write_request/recv_write_req target s1394_fcp_cmd_recv_write_request 101*4ebb14b2Sfrits 102*4ebb14b2Sfritsadd bus_ops::bus_config targets warlock_dummy 103*4ebb14b2Sfritsadd bus_ops::bus_unconfig targets warlock_dummy 104