1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _SYS_NGE_H 28 #define _SYS_NGE_H 29 30 #pragma ident "%Z%%M% %I% %E% SMI" 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 37 #include <sys/types.h> 38 #include <sys/stream.h> 39 #include <sys/strsun.h> 40 #include <sys/strsubr.h> 41 #include <sys/stat.h> 42 #include <sys/pci.h> 43 #include <sys/note.h> 44 #include <sys/modctl.h> 45 #include <sys/kstat.h> 46 #include <sys/ethernet.h> 47 #include <sys/pattr.h> 48 #include <sys/errno.h> 49 #include <sys/dlpi.h> 50 #include <sys/devops.h> 51 #include <sys/debug.h> 52 #include <sys/conf.h> 53 #include <sys/callb.h> 54 55 #include <netinet/ip6.h> 56 57 #include <inet/common.h> 58 #include <inet/ip.h> 59 #include <netinet/udp.h> 60 #include <inet/mi.h> 61 #include <inet/nd.h> 62 63 #include <sys/ddi.h> 64 #include <sys/sunddi.h> 65 66 #include <sys/mac.h> 67 #include <sys/mac_ether.h> 68 69 /* 70 * Reconfiguring the network devices requires the net_config privilege 71 * in Solaris 10+. 72 */ 73 extern int secpolicy_net_config(const cred_t *, boolean_t); 74 75 #include <sys/netlb.h> 76 #include <sys/miiregs.h> 77 78 #include "nge_chip.h" 79 80 #define PIO_ADDR(ngep, offset) ((void *)((caddr_t)(ngep)->io_regs+(offset))) 81 /* 82 * Copy an ethernet address 83 */ 84 #define ethaddr_copy(src, dst) bcopy((src), (dst), ETHERADDRL) 85 #define ether_eq(a, b) (bcmp((caddr_t)(a), (caddr_t)(b), (ETHERADDRL)) == 0) 86 87 #define BIS(w, b) (((w) & (b)) ? B_TRUE : B_FALSE) 88 #define BIC(w, b) (((w) & (b)) ? B_FALSE : B_TRUE) 89 #define UPORDOWN(x) ((x) ? "up" : "down") 90 91 #define NGE_DRIVER_NAME "nge" 92 93 /* 94 * 'Progress' bit flags ... 95 */ 96 #define PROGRESS_CFG 0x0001 /* config space mapped */ 97 #define PROGRESS_REGS 0x0002 /* registers mapped */ 98 #define PROGRESS_BUFS 0x0004 /* registers mapped */ 99 #define PROGRESS_RESCHED 0x0008 /* resched softint registered */ 100 #define PROGRESS_FACTOTUM 0x0010 /* factotum softint registered */ 101 #define PROGRESS_SWINT 0x0020 /* s/w interrupt registered */ 102 #define PROGRESS_INTR 0x0040 /* h/w interrupt registered */ 103 /* and mutexen initialised */ 104 #define PROGRESS_HWINT 0x0080 105 #define PROGRESS_PHY 0x0100 /* PHY initialised */ 106 #define PROGRESS_NDD 0x0200 /* NDD parameters set up */ 107 #define PROGRESS_KSTATS 0x0400 /* kstats created */ 108 #define PROGRESS_READY 0x0800 /* ready for work */ 109 110 #define NGE_HW_ERR 0x00 111 #define NGE_HW_LINK 0x01 112 #define NGE_HW_BM 0x02 113 #define NGE_HW_RCHAN 0x03 114 #define NGE_HW_TCHAN 0x04 115 #define NGE_HW_ROM 0x05 116 #define NGE_SW_PROBLEM_ID 0x06 117 118 119 /* 120 * NOTES: 121 * 122 * #defines: 123 * 124 * NGE_PCI_CONFIG_RNUMBER and NGE_PCI_OPREGS_RNUMBER are the 125 * register-set numbers to use for the config space registers 126 * and the operating registers respectively. On an OBP-based 127 * machine, regset 0 refers to CONFIG space, and regset 1 will 128 * be the operating registers in MEMORY space. If an expansion 129 * ROM is fitted, it may appear as a further register set. 130 * 131 * NGE_DMA_MODE defines the mode (STREAMING/CONSISTENT) used 132 * for the data buffers. The descriptors are always set up 133 * in CONSISTENT mode. 134 * 135 * NGE_HEADROOM defines how much space we'll leave in allocated 136 * mblks before the first valid data byte. This should be chosen 137 * to be 2 modulo 4, so that once the ethernet header (14 bytes) 138 * has been stripped off, the packet data will be 4-byte aligned. 139 * The remaining space can be used by upstream modules to prepend 140 * any headers required. 141 */ 142 143 144 #define NGE_PCI_OPREGS_RNUMBER 1 145 #define NGE_DMA_MODE DDI_DMA_STREAMING 146 #define NGE_HEADROOM 6 147 #define ETHER_HEAD_LEN 14 148 #ifndef VTAG_SIZE 149 #define VTAG_SIZE 4 150 #endif 151 152 #define NGE_HALFTICK 268435456LL /* 2**28 ns! */ 153 #define NGE_CYCLIC_PERIOD (4*NGE_HALFTICK) /* ~0.5s */ 154 155 #define NGE_DEFAULT_MTU 1500 156 #define NGE_DEFAULT_SDU 1518 157 #define NGE_MTU_2500 2500 158 #define NGE_MTU_4500 4500 159 #define NGE_MAX_MTU 9000 160 #define NGE_MAX_SDU 9018 161 162 #define NGE_DESC_MIN 0x100 163 164 #define NGE_STD_BUFSZ 1792 165 #define NGE_JB2500_BUFSZ (3*1024) 166 #define NGE_JB4500_BUFSZ (5*1024) 167 #define NGE_JB9000_BUFSZ (9*1024) 168 169 #define NGE_SEND_SLOTS_DESC_1024 1024 170 #define NGE_SEND_SLOTS_DESC_3072 3072 171 #define NGE_SEND_JB2500_SLOTS_DESC 3072 172 #define NGE_SEND_JB4500_SLOTS_DESC 2048 173 #define NGE_SEND_JB9000_SLOTS_DESC 1024 174 #define NGE_SEND_LOWMEM_SLOTS_DESC 1024 175 #define NGE_SEND_SLOTS_BUF 3072 176 177 #define NGE_RECV_SLOTS_DESC_1024 1024 178 #define NGE_RECV_SLOTS_DESC_3072 3072 179 #define NGE_RECV_JB2500_SLOTS_DESC 3072 180 #define NGE_RECV_JB4500_SLOTS_DESC 2048 181 #define NGE_RECV_JB9000_SLOTS_DESC 1024 182 #define NGE_RECV_LOWMEM_SLOTS_DESC 1024 183 #define NGE_RECV_SLOTS_BUF 6144 184 185 #define NGE_SPLIT_32 32 186 #define NGE_SPLIT_96 96 187 #define NGE_SPLIT_256 256 188 189 #define NGE_RX_COPY_SIZE 512 190 #define NGE_TX_COPY_SIZE 512 191 #define NGE_MAP_FRAGS 3 192 #define NGE_MAX_COOKIES 3 193 #define NGE_MAX_DMA_HDR (4*1024) 194 195 /* Used by interrupt blank */ 196 #define NGE_TICKS_CNT 128 197 #define NGE_RX_PKT_CNT 8 198 199 /* 200 * NGE-specific ioctls ... 201 */ 202 #define NGE_IOC ((((('N' << 8) + 'G') << 8) + 'E') << 8) 203 204 /* 205 * PHY register read/write ioctls, used by cable test software 206 */ 207 #define NGE_MII_READ (NGE_IOC|1) 208 #define NGE_MII_WRITE (NGE_IOC|2) 209 210 /* 211 * SEEPROM read/write ioctls, for use by SEEPROM upgrade utility 212 * 213 * Note: SEEPROMs can only be accessed as 32-bit words, so <see_addr> 214 * must be a multiple of 4. Not all systems have a SEEPROM fitted! 215 */ 216 #define NGE_SEE_READ (NGE_IOC|3) 217 #define NGE_SEE_WRITE (NGE_IOC|4) 218 219 220 /* 221 * These diagnostic IOCTLS are enabled only in DEBUG drivers 222 */ 223 #define NGE_DIAG (NGE_IOC|5) /* currently a no-op */ 224 #define NGE_PEEK (NGE_IOC|6) 225 #define NGE_POKE (NGE_IOC|7) 226 #define NGE_PHY_RESET (NGE_IOC|8) 227 #define NGE_SOFT_RESET (NGE_IOC|9) 228 #define NGE_HARD_RESET (NGE_IOC|10) 229 230 231 enum NGE_HW_OP { 232 NGE_CLEAR = 0, 233 NGE_SET 234 }; 235 236 /* 237 * Required state according to GLD 238 */ 239 enum nge_mac_state { 240 NGE_MAC_UNKNOWN, 241 NGE_MAC_RESET, 242 NGE_MAC_STOPPED, 243 NGE_MAC_STARTED, 244 NGE_MAC_UNATTACH 245 }; 246 enum loop_type { 247 NGE_LOOP_NONE = 0, 248 NGE_LOOP_EXTERNAL_100, 249 NGE_LOOP_EXTERNAL_10, 250 NGE_LOOP_INTERNAL_PHY, 251 }; 252 253 /* 254 * (Internal) return values from send_msg subroutines 255 */ 256 enum send_status { 257 SEND_COPY_FAIL = -1, /* => GLD_NORESOURCES */ 258 SEND_MAP_FAIL, /* => GLD_NORESOURCES */ 259 SEND_COPY_SUCESS, /* OK, msg queued */ 260 SEND_MAP_SUCCESS /* OK, free msg */ 261 }; 262 263 264 /* 265 * NDD parameter indexes, divided into: 266 * 267 * read-only parameters describing the hardware's capabilities 268 * read-write parameters controlling the advertised capabilities 269 * read-only parameters describing the partner's capabilities 270 * read-only parameters describing the link state 271 */ 272 enum { 273 PARAM_AUTONEG_CAP, 274 PARAM_PAUSE_CAP, 275 PARAM_ASYM_PAUSE_CAP, 276 PARAM_1000FDX_CAP, 277 PARAM_1000HDX_CAP, 278 PARAM_100T4_CAP, 279 PARAM_100FDX_CAP, 280 PARAM_100HDX_CAP, 281 PARAM_10FDX_CAP, 282 PARAM_10HDX_CAP, 283 284 PARAM_ADV_AUTONEG_CAP, 285 PARAM_ADV_PAUSE_CAP, 286 PARAM_ADV_ASYM_PAUSE_CAP, 287 PARAM_ADV_1000FDX_CAP, 288 PARAM_ADV_1000HDX_CAP, 289 PARAM_ADV_100T4_CAP, 290 PARAM_ADV_100FDX_CAP, 291 PARAM_ADV_100HDX_CAP, 292 PARAM_ADV_10FDX_CAP, 293 PARAM_ADV_10HDX_CAP, 294 295 PARAM_LP_AUTONEG_CAP, 296 PARAM_LP_PAUSE_CAP, 297 PARAM_LP_ASYM_PAUSE_CAP, 298 PARAM_LP_1000FDX_CAP, 299 PARAM_LP_1000HDX_CAP, 300 PARAM_LP_100T4_CAP, 301 PARAM_LP_100FDX_CAP, 302 PARAM_LP_100HDX_CAP, 303 PARAM_LP_10FDX_CAP, 304 PARAM_LP_10HDX_CAP, 305 306 PARAM_LINK_STATUS, 307 PARAM_LINK_SPEED, 308 PARAM_LINK_DUPLEX, 309 310 PARAM_LINK_AUTONEG, 311 PARAM_LINK_RX_PAUSE, 312 PARAM_LINK_TX_PAUSE, 313 314 PARAM_LOOP_MODE, 315 PARAM_TXBCOPY_THRESHOLD, 316 PARAM_RXBCOPY_THRESHOLD, 317 PARAM_RECV_MAX_PACKET, 318 319 PARAM_COUNT 320 }; 321 322 323 /* 324 * (Internal) return values from ioctl subroutines 325 */ 326 enum ioc_reply { 327 IOC_INVAL = -1, /* bad, NAK with EINVAL */ 328 IOC_DONE, /* OK, reply sent */ 329 IOC_ACK, /* OK, just send ACK */ 330 IOC_REPLY, /* OK, just send reply */ 331 IOC_RESTART_ACK, /* OK, restart & ACK */ 332 IOC_RESTART_REPLY /* OK, restart & reply */ 333 }; 334 335 enum nge_pp_type { 336 NGE_PP_SPACE_CFG = 0, 337 NGE_PP_SPACE_REG, 338 NGE_PP_SPACE_NIC, 339 NGE_PP_SPACE_MII, 340 NGE_PP_SPACE_NGE, 341 NGE_PP_SPACE_TXDESC, 342 NGE_PP_SPACE_TXBUFF, 343 NGE_PP_SPACE_RXDESC, 344 NGE_PP_SPACE_RXBUFF, 345 NGE_PP_SPACE_STATISTICS, 346 NGE_PP_SPACE_SEEPROM, 347 NGE_PP_SPACE_FLASH 348 }; 349 350 /* 351 * Flag to kstat type 352 */ 353 enum nge_kstat_type { 354 NGE_KSTAT_RAW = 0, 355 NGE_KSTAT_STATS, 356 NGE_KSTAT_CHIPID, 357 NGE_KSTAT_DEBUG, 358 NGE_KSTAT_COUNT 359 }; 360 361 362 /* 363 * Actual state of the nvidia's chip 364 */ 365 enum nge_chip_state { 366 NGE_CHIP_FAULT = -2, /* fault, need reset */ 367 NGE_CHIP_ERROR, /* error, want reset */ 368 NGE_CHIP_INITIAL, /* Initial state only */ 369 NGE_CHIP_RESET, /* reset, need init */ 370 NGE_CHIP_STOPPED, /* Tx/Rx stopped */ 371 NGE_CHIP_RUNNING /* with interrupts */ 372 }; 373 374 enum nge_eeprom_size { 375 EEPROM_1K = 0, 376 EEPROM_2K, 377 EEPROM_4K, 378 EEPROM_8K, 379 EEPROM_16K, 380 EEPROM_32K, 381 EEPROM_64K 382 }; 383 384 enum nge_eeprom_access_wid { 385 ACCESS_8BIT = 0, 386 ACCESS_16BIT 387 }; 388 389 /* 390 * MDIO operation 391 */ 392 enum nge_mdio_operation { 393 NGE_MDIO_READ = 0, 394 NGE_MDIO_WRITE 395 }; 396 397 /* 398 * Speed selection 399 */ 400 enum nge_speed { 401 UNKOWN_SPEED = 0, 402 NGE_10M, 403 NGE_100M, 404 NGE_1000M 405 }; 406 407 /* 408 * Duplex selection 409 */ 410 enum nge_duplex { 411 UNKOWN_DUPLEX = 0, 412 NGE_HD, 413 NGE_FD 414 }; 415 416 typedef struct { 417 ether_addr_t addr; /* in canonical form */ 418 uint8_t spare; 419 uint8_t set; /* nonzero => valid */ 420 } nge_mac_addr_t; 421 422 struct nge; 423 424 /* 425 * Named Data (ND) Parameter Management Structure 426 */ 427 typedef struct { 428 int ndp_info; 429 int ndp_min; 430 int ndp_max; 431 int ndp_val; 432 char *ndp_name; 433 } nd_param_t; 434 435 436 #define CHIP_FLAG_COPPER 0x40 437 438 /* 439 * Collection of physical-layer functions to: 440 * (re)initialise the physical layer 441 * update it to match software settings 442 * check for link status change 443 */ 444 typedef struct { 445 void (*phys_restart)(struct nge *); 446 void (*phys_update)(struct nge *); 447 boolean_t (*phys_check)(struct nge *); 448 } phys_ops_t; 449 450 struct nge_see_rw { 451 uint32_t see_addr; /* Byte offset within SEEPROM */ 452 uint32_t see_data; /* Data read/data to write */ 453 }; 454 455 typedef struct { 456 uint64_t pp_acc_size; /* in bytes: 1,2,4,8 */ 457 uint64_t pp_acc_space; /* See #defines below */ 458 uint64_t pp_acc_offset; 459 uint64_t pp_acc_data; /* output for peek */ 460 /* input for poke */ 461 } nge_peekpoke_t; 462 463 typedef uintptr_t nge_regno_t; /* register # (offset) */ 464 465 typedef struct _mul_list { 466 struct _mul_list *next; 467 uint32_t ref_cnt; 468 ether_addr_t mul_addr; 469 }mul_item, *pmul_item; 470 471 /* 472 * Describes one chunk of allocated DMA-able memory 473 * 474 * In some cases, this is a single chunk as allocated from the system; 475 * but we also use this structure to represent slices carved off such 476 * a chunk. Even when we don't really need all the information, we 477 * use this structure as a convenient way of correlating the various 478 * ways of looking at a piece of memory (kernel VA, IO space DVMA, 479 * handle+offset, etc). 480 */ 481 typedef struct dma_area 482 { 483 484 caddr_t private; /* pointer to nge */ 485 frtn_t rx_recycle; /* recycle function */ 486 mblk_t *mp; 487 ddi_acc_handle_t acc_hdl; /* handle for memory */ 488 void *mem_va; /* CPU VA of memory */ 489 uint32_t nslots; /* number of slots */ 490 uint32_t size; /* size per slot */ 491 size_t alength; /* allocated size */ 492 /* >= product of above */ 493 ddi_dma_handle_t dma_hdl; /* DMA handle */ 494 offset_t offset; /* relative to handle */ 495 ddi_dma_cookie_t cookie; /* associated cookie */ 496 uint32_t ncookies; 497 uint32_t signature; /* buffer signature */ 498 /* for deciding to free */ 499 /* or to reuse buffers */ 500 boolean_t rx_delivered; /* hold by upper layer */ 501 struct dma_area *next; 502 } dma_area_t; 503 504 #define HOST_OWN 0x00000000 505 #define CONTROLER_OWN 0x00000001 506 #define NGE_END_PACKET 0x00000002 507 508 509 typedef struct nge_dmah_node 510 { 511 struct nge_dmah_node *next; 512 ddi_dma_handle_t hndl; 513 } nge_dmah_node_t; 514 515 typedef struct nge_dmah_list 516 { 517 nge_dmah_node_t *head; 518 nge_dmah_node_t *tail; 519 } nge_dmah_list_t; 520 521 /* 522 * Software version of the Recv Descriptor 523 * There's one of these for each recv buffer (up to 512 per ring) 524 */ 525 typedef struct sw_rx_sbd { 526 527 dma_area_t desc; /* (const) related h/w */ 528 /* descriptor area */ 529 dma_area_t *bufp; /* (const) related */ 530 /* buffer area */ 531 uint8_t flags; 532 } sw_rx_sbd_t; 533 534 /* 535 * Software version of the send Buffer Descriptor 536 * There's one of these for each send buffer (up to 512 per ring) 537 */ 538 typedef struct sw_tx_sbd { 539 540 dma_area_t desc; /* (const) related h/w */ 541 /* descriptor area */ 542 dma_area_t pbuf; /* (const) related */ 543 /* buffer area */ 544 void (*tx_recycle)(struct sw_tx_sbd *); 545 uint32_t flags; 546 mblk_t *mp; /* related mblk, if any */ 547 nge_dmah_list_t mp_hndl; 548 uint32_t frags; 549 uint32_t ncookies; /* dma cookie number */ 550 551 } sw_tx_sbd_t; 552 553 /* 554 * Software Receive Buffer (Producer) Ring Control Block 555 * There's one of these for each receiver producer ring (up to 3), 556 * but each holds buffers of a different size. 557 */ 558 typedef struct buff_ring { 559 560 uint64_t nslots; /* descriptor area */ 561 struct nge *ngep; /* (const) containing */ 562 /* driver soft state */ 563 /* initialise same */ 564 uint64_t rx_hold; 565 sw_rx_sbd_t *sw_rbds; /* software descriptors */ 566 sw_rx_sbd_t *free_rbds; /* free ring */ 567 dma_area_t *free_list; /* available buffer queue */ 568 dma_area_t *recycle_list; /* recycling buffer queue */ 569 kmutex_t recycle_lock[1]; 570 uint32_t buf_sign; 571 boolean_t rx_bcopy; 572 } buff_ring_t; 573 574 /* 575 * Software Receive (Return) Ring Control Block 576 * There's one of these for each receiver return ring (up to 16). 577 */ 578 typedef struct recv_ring { 579 /* 580 * The elements flagged (const) in the comments below are 581 * set up once during initialiation and thereafter unchanged. 582 */ 583 dma_area_t desc; /* (const) related h/w */ 584 /* descriptor area */ 585 struct nge *ngep; /* (const) containing */ 586 /* driver soft state */ 587 uint16_t prod_index; /* (const) ptr to h/w */ 588 /* "producer index" */ 589 mac_resource_handle_t handle; 590 } recv_ring_t; 591 592 593 594 /* 595 * Software Send Ring Control Block 596 * There's one of these for each of (up to) 1 send rings 597 */ 598 typedef struct send_ring { 599 /* 600 * The elements flagged (const) in the comments below are 601 * set up once during initialiation and thereafter unchanged. 602 */ 603 dma_area_t desc; /* (const) related h/w */ 604 /* descriptor area */ 605 dma_area_t buf[NGE_SEND_SLOTS_BUF]; 606 /* buffer area(s) */ 607 struct nge *ngep; /* (const) containing */ 608 /* driver soft state */ 609 610 uint64_t tx_hwmark; 611 uint64_t tx_lwmark; 612 613 /* 614 * The tx_lock must be held when updating 615 * the s/w producer index 616 * (tx_next) 617 */ 618 kmutex_t tx_lock[1]; /* serialize h/w update */ 619 uint64_t tx_next; /* next slot to use */ 620 uint64_t tx_flow; 621 622 /* 623 * These counters/indexes are manipulated in the transmit 624 * path using atomics rather than mutexes for speed 625 */ 626 uint64_t tx_free; /* # of slots available */ 627 628 /* 629 * index (tc_next). 630 */ 631 kmutex_t tc_lock[1]; 632 uint64_t tc_next; /* next slot to recycle */ 633 /* ("consumer index") */ 634 635 sw_tx_sbd_t *sw_sbds; /* software descriptors */ 636 637 kmutex_t dmah_lock; 638 nge_dmah_list_t dmah_free; 639 nge_dmah_node_t dmahndl[NGE_MAX_DMA_HDR]; 640 641 } send_ring_t; 642 643 644 typedef struct { 645 uint32_t businfo; /* from private reg */ 646 uint16_t command; /* saved during attach */ 647 648 uint16_t vendor; /* vendor-id */ 649 uint16_t device; /* device-id */ 650 uint16_t subven; /* subsystem-vendor-id */ 651 uint16_t subdev; /* subsystem-id */ 652 uint8_t class_code; 653 uint8_t revision; /* revision-id */ 654 uint8_t clsize; /* cache-line-size */ 655 uint8_t latency; /* latency-timer */ 656 uint8_t flags; 657 658 uint16_t phy_type; /* Fiber module type */ 659 uint64_t hw_mac_addr; /* from chip register */ 660 nge_mac_addr_t vendor_addr; /* transform of same */ 661 } chip_info_t; 662 663 664 typedef struct { 665 offset_t index; 666 char *name; 667 } nge_ksindex_t; 668 669 typedef struct { 670 uint64_t tso_err_mss; 671 uint64_t tso_dis; 672 uint64_t tso_err_nosum; 673 uint64_t tso_err_hov; 674 uint64_t tso_err_huf; 675 uint64_t tso_err_l2; 676 uint64_t tso_err_ip; 677 uint64_t tso_err_l4; 678 uint64_t tso_err_tcp; 679 uint64_t hsum_err_ip; 680 uint64_t hsum_err_l4; 681 }fe_statistics_t; 682 683 /* 684 * statistics parameters to tune the driver 685 */ 686 typedef struct { 687 uint64_t intr_count; 688 uint64_t intr_lval; 689 uint64_t recv_realloc; 690 uint64_t poll_time; 691 uint64_t recy_free; 692 uint64_t recv_count; 693 uint64_t xmit_count; 694 uint64_t obytes; 695 uint64_t rbytes; 696 uint64_t mp_alloc_err; 697 uint64_t dma_alloc_err; 698 uint64_t kmem_alloc_err; 699 uint64_t load_context; 700 uint64_t ip_hwsum_err; 701 uint64_t tcp_hwsum_err; 702 uint64_t rx_nobuffer; 703 uint64_t rx_err; 704 uint64_t tx_stop_err; 705 uint64_t tx_stall; 706 uint64_t tx_rsrv_fail; 707 uint64_t tx_resched; 708 fe_statistics_t fe_err; 709 }nge_sw_statistics_t; 710 711 typedef struct { 712 nge_hw_statistics_t hw_statistics; 713 nge_sw_statistics_t sw_statistics; 714 }nge_statistics_t; 715 716 struct nge_desc_attr { 717 718 size_t rxd_size; 719 size_t txd_size; 720 721 ddi_dma_attr_t *dma_attr; 722 ddi_dma_attr_t *tx_dma_attr; 723 724 void (*rxd_fill)(void *, const ddi_dma_cookie_t *, size_t); 725 uint32_t (*rxd_check)(const void *, size_t *); 726 727 void (*txd_fill)(void *, const ddi_dma_cookie_t *, size_t, 728 uint32_t, boolean_t); 729 730 uint32_t (*txd_check)(const void *, size_t *); 731 }; 732 733 typedef struct nge_desc_attr nge_desc_attr_t; 734 735 /* 736 * Structure used to hold the device-specific config parameters. 737 * The setting of such parameters may not consistent with the 738 * hardware feature of the device. It's used for software purpose. 739 */ 740 typedef struct nge_dev_spec_param { 741 boolean_t msi; /* specifies msi support */ 742 boolean_t msi_x; /* specifies msi_x support */ 743 boolean_t vlan; /* specifies vlan support */ 744 boolean_t tx_pause_frame; /* specifies tx pause frame support */ 745 boolean_t rx_pause_frame; /* specifies rx pause frame support */ 746 boolean_t jumbo; /* jumbo frame support */ 747 boolean_t tx_rx_64byte; /* set the max tx/rx prd fetch size */ 748 boolean_t rx_hw_checksum; /* specifies tx hw checksum feature */ 749 uint32_t tx_hw_checksum; /* specifies rx hw checksum feature */ 750 uint32_t desc_type; /* specifies descriptor type */ 751 uint32_t rx_desc_num; /* specifies rx descriptor number */ 752 uint32_t tx_desc_num; /* specifies tx descriptor number */ 753 uint32_t nge_split; /* specifies the split number */ 754 } nge_dev_spec_param_t; 755 756 typedef struct nge { 757 /* 758 * These fields are set by attach() and unchanged thereafter ... 759 */ 760 dev_info_t *devinfo; /* device instance */ 761 mac_handle_t mh; /* mac module handle */ 762 chip_info_t chipinfo; 763 ddi_acc_handle_t cfg_handle; /* DDI I/O handle */ 764 ddi_acc_handle_t io_handle; /* DDI I/O handle */ 765 void *io_regs; /* mapped registers */ 766 767 ddi_periodic_t periodic_id; /* periodical callback */ 768 uint32_t factotum_flag; 769 ddi_softint_handle_t factotum_hdl; /* factotum callback */ 770 ddi_softint_handle_t resched_hdl; /* reschedule callback */ 771 uint_t soft_pri; 772 773 ddi_intr_handle_t *htable; /* for array of interrupts */ 774 int intr_type; /* type of interrupt */ 775 int intr_actual_cnt; /* alloc intrs count */ 776 int intr_req_cnt; /* request intrs count */ 777 uint_t intr_pri; /* interrupt priority */ 778 int intr_cap; /* interrupt capabilities */ 779 780 uint32_t progress; /* attach tracking */ 781 uint32_t debug; /* flag to debug function */ 782 783 char ifname[8]; /* "nge0" ... "nge999" */ 784 785 786 enum nge_mac_state nge_mac_state; /* definitions above */ 787 enum nge_chip_state nge_chip_state; /* definitions above */ 788 boolean_t promisc; 789 boolean_t suspended; 790 791 int resched_needed; 792 uint32_t default_mtu; 793 uint32_t max_sdu; 794 uint32_t buf_size; 795 uint32_t rx_desc; 796 uint32_t tx_desc; 797 uint32_t rx_buf; 798 uint32_t nge_split; 799 uint32_t watchdog; 800 uint32_t lowmem_mode; 801 802 803 /* 804 * Runtime read-write data starts here ... 805 * 1 Receive Rings 806 * 1 Send Rings 807 * 808 * Note: they're not necessarily all used. 809 */ 810 struct buff_ring buff[1]; 811 struct recv_ring recv[1]; 812 struct send_ring send[1]; 813 814 815 kmutex_t genlock[1]; 816 krwlock_t rwlock[1]; 817 kmutex_t softlock[1]; 818 uint32_t intr_masks; 819 boolean_t poll; 820 boolean_t ch_intr_mode; 821 uint32_t recv_count; 822 uint32_t poll_time; 823 uint32_t sw_intr_intv; 824 nge_mac_addr_t cur_uni_addr; 825 uint32_t rx_datahwm; 826 uint32_t rx_prdlwm; 827 uint32_t rx_prdhwm; 828 uint32_t rx_def; 829 uint32_t desc_mode; 830 831 mul_item *pcur_mulist; 832 nge_mac_addr_t cur_mul_addr; 833 nge_mac_addr_t cur_mul_mask; 834 835 nge_desc_attr_t desc_attr; 836 837 /* 838 * Link state data (protected by genlock) 839 */ 840 int32_t link_state; /* See GLD #defines */ 841 uint32_t stall_cknum; /* Stall check number */ 842 843 uint32_t phy_xmii_addr; 844 uint32_t phy_id; 845 uint32_t phy_mode; 846 const phys_ops_t *physops; 847 uint16_t phy_gen_status; 848 849 uint32_t param_loop_mode; 850 851 /* 852 * NDD parameters (protected by genlock) 853 */ 854 caddr_t nd_data_p; 855 nd_param_t nd_params[PARAM_COUNT]; 856 857 kstat_t *nge_kstats[NGE_KSTAT_COUNT]; 858 nge_statistics_t statistics; 859 860 nge_dev_spec_param_t dev_spec_param; 861 862 } nge_t; 863 864 extern const nge_ksindex_t nge_statistics[]; 865 866 /* 867 * Shorthand for the NDD parameters 868 */ 869 #define param_adv_autoneg nd_params[PARAM_ADV_AUTONEG_CAP].ndp_val 870 #define param_adv_pause nd_params[PARAM_ADV_PAUSE_CAP].ndp_val 871 #define param_adv_asym_pause nd_params[PARAM_ADV_ASYM_PAUSE_CAP].ndp_val 872 #define param_adv_1000fdx nd_params[PARAM_ADV_1000FDX_CAP].ndp_val 873 #define param_adv_1000hdx nd_params[PARAM_ADV_1000HDX_CAP].ndp_val 874 #define param_adv_100fdx nd_params[PARAM_ADV_100FDX_CAP].ndp_val 875 #define param_adv_100hdx nd_params[PARAM_ADV_100HDX_CAP].ndp_val 876 #define param_adv_10fdx nd_params[PARAM_ADV_10FDX_CAP].ndp_val 877 #define param_adv_10hdx nd_params[PARAM_ADV_10HDX_CAP].ndp_val 878 879 #define param_lp_autoneg nd_params[PARAM_LP_AUTONEG_CAP].ndp_val 880 #define param_lp_pause nd_params[PARAM_LP_PAUSE_CAP].ndp_val 881 #define param_lp_asym_pause nd_params[PARAM_LP_ASYM_PAUSE_CAP].ndp_val 882 #define param_lp_1000fdx nd_params[PARAM_LP_1000FDX_CAP].ndp_val 883 #define param_lp_1000hdx nd_params[PARAM_LP_1000HDX_CAP].ndp_val 884 #define param_lp_100fdx nd_params[PARAM_LP_100FDX_CAP].ndp_val 885 #define param_lp_100hdx nd_params[PARAM_LP_100HDX_CAP].ndp_val 886 #define param_lp_10fdx nd_params[PARAM_LP_10FDX_CAP].ndp_val 887 #define param_lp_10hdx nd_params[PARAM_LP_10HDX_CAP].ndp_val 888 889 #define param_link_up nd_params[PARAM_LINK_STATUS].ndp_val 890 #define param_link_speed nd_params[PARAM_LINK_SPEED].ndp_val 891 #define param_link_duplex nd_params[PARAM_LINK_DUPLEX].ndp_val 892 893 #define param_link_autoneg nd_params[PARAM_LINK_AUTONEG].ndp_val 894 #define param_link_rx_pause nd_params[PARAM_LINK_RX_PAUSE].ndp_val 895 #define param_link_tx_pause nd_params[PARAM_LINK_TX_PAUSE].ndp_val 896 897 #define param_loop_mode nd_params[PARAM_LOOP_MODE].ndp_val 898 899 #define param_txbcopy_threshold nd_params[PARAM_TXBCOPY_THRESHOLD].ndp_val 900 #define param_rxbcopy_threshold nd_params[PARAM_RXBCOPY_THRESHOLD].ndp_val 901 #define param_recv_max_packet nd_params[PARAM_RECV_MAX_PACKET].ndp_val 902 903 /* 904 * Sync a DMA area described by a dma_area_t 905 */ 906 #define DMA_SYNC(area, flag) ((void) ddi_dma_sync((area).dma_hdl, \ 907 (area).offset, (area).alength, (flag))) 908 909 /* 910 * Find the (kernel virtual) address of block of memory 911 * described by a dma_area_t 912 */ 913 #define DMA_VPTR(area) ((area).mem_va) 914 915 /* 916 * Zero a block of memory described by a dma_area_t 917 */ 918 #define DMA_ZERO(area) bzero(DMA_VPTR(area), (area).alength) 919 920 /* 921 * Next/Prev value of a cyclic index 922 */ 923 #define NEXT(index, limit) ((index) + 1 < (limit) ? (index) + 1 : 0) 924 #define PREV(index, limit) (0 == (index) ? (limit - 1) : (index) - 1) 925 926 #define NEXT_INDEX(ndx, num, lim)\ 927 (((ndx) + (num) < (lim)) ? ((ndx) + (num)) : ((ndx) + (num) - (lim))) 928 929 930 /* 931 * Property lookups 932 */ 933 #define NGE_PROP_EXISTS(d, n) ddi_prop_exists(DDI_DEV_T_ANY, (d), \ 934 DDI_PROP_DONTPASS, (n)) 935 #define NGE_PROP_GET_INT(d, n) ddi_prop_get_int(DDI_DEV_T_ANY, (d), \ 936 DDI_PROP_DONTPASS, (n), -1) 937 938 939 /* 940 * Debugging ... 941 */ 942 #ifdef DEBUG 943 #define NGE_DEBUGGING 1 944 #else 945 #define NGE_DEBUGGING 0 946 #endif /* DEBUG */ 947 948 /* 949 * Bit flags in the 'debug' word ... 950 */ 951 #define NGE_DBG_STOP 0x00000001 /* early debug_enter() */ 952 #define NGE_DBG_TRACE 0x00000002 /* general flow tracing */ 953 954 #define NGE_DBG_MII 0x00000010 /* low-level MII access */ 955 #define NGE_DBG_CHIP 0x00000020 /* low(ish)-level code */ 956 957 #define NGE_DBG_RECV 0x00000100 /* receive-side code */ 958 #define NGE_DBG_SEND 0x00000200 /* packet-send code */ 959 960 #define NGE_DBG_INIT 0x00100000 /* initialisation */ 961 #define NGE_DBG_NEMO 0x00200000 /* MAC layer entry points */ 962 #define NGE_DBG_STATS 0x00400000 /* statistics */ 963 964 #define NGE_DBG_BADIOC 0x01000000 /* unknown ioctls */ 965 966 #define NGE_DBG_NDD 0x10000000 /* NDD operations */ 967 968 969 970 /* 971 * 'Do-if-debugging' macro. The parameter <command> should be one or more 972 * C statements (but without the *final* semicolon), which will either be 973 * compiled inline or completely ignored, depending on the NGE_DEBUGGING 974 * compile-time flag. 975 * 976 * You should get a compile-time error (at least on a DEBUG build) if 977 * your statement isn't actually a statement, rather than unexpected 978 * run-time behaviour caused by unintended matching of if-then-elses etc. 979 * 980 * Note that the NGE_DDB() macro itself can only be used as a statement, 981 * not an expression, and should always be followed by a semicolon. 982 */ 983 #if NGE_DEBUGGING 984 #define NGE_DDB(command) do { \ 985 { command; } \ 986 _NOTE(CONSTANTCONDITION) \ 987 } while (0) 988 #else /* NGE_DEBUGGING */ 989 #define NGE_DDB(command) 990 /* 991 * Old way of debugging. This is a poor way, as it leeaves empty 992 * statements that cause lint to croak. 993 * #define NGE_DDB(command) do { \ 994 * { _NOTE(EMPTY); } \ 995 * _NOTE(CONSTANTCONDITION) \ 996 * } while (0) 997 */ 998 #endif /* NGE_DEBUGGING */ 999 1000 /* 1001 * 'Internal' macros used to construct the TRACE/DEBUG macros below. 1002 * These provide the primitive conditional-call capability required. 1003 * Note: the parameter <args> is a parenthesised list of the actual 1004 * printf-style arguments to be passed to the debug function ... 1005 */ 1006 #define NGE_XDB(b, w, f, args) NGE_DDB(if ((b) & (w)) f args) 1007 #define NGE_GDB(b, args) NGE_XDB(b, nge_debug, (*nge_gdb()), args) 1008 #define NGE_LDB(b, args) NGE_XDB(b, ngep->debug, \ 1009 (*nge_db(ngep)), args) 1010 #define NGE_CDB(f, args) NGE_XDB(NGE_DBG, ngep->debug, f, args) 1011 1012 /* 1013 * Conditional-print macros. 1014 * 1015 * Define NGE_DBG to be the relevant member of the set of NGE_DBG_* values 1016 * above before using the NGE_GDEBUG() or NGE_DEBUG() macros. The 'G' 1017 * versions look at the Global debug flag word (nge_debug); the non-G 1018 * versions look in the per-instance data (ngep->debug) and so require a 1019 * variable called 'ngep' to be in scope (and initialised!) before use. 1020 * 1021 * You could redefine NGE_TRC too if you really need two different 1022 * flavours of debugging output in the same area of code, but I don't 1023 * really recommend it. 1024 * 1025 * Note: the parameter <args> is a parenthesised list of the actual 1026 * arguments to be passed to the debug function, usually a printf-style 1027 * format string and corresponding values to be formatted. 1028 */ 1029 1030 #define NGE_TRC NGE_DBG_TRACE 1031 1032 #define NGE_GTRACE(args) NGE_GDB(NGE_TRC, args) 1033 #define NGE_GDEBUG(args) NGE_GDB(NGE_DBG, args) 1034 #define NGE_TRACE(args) NGE_LDB(NGE_TRC, args) 1035 #define NGE_DEBUG(args) NGE_LDB(NGE_DBG, args) 1036 1037 /* 1038 * Debug-only action macros 1039 */ 1040 1041 1042 #define NGE_REPORT(args) NGE_DDB(nge_log args) 1043 1044 boolean_t nge_atomic_decrease(uint64_t *count_p, uint64_t n); 1045 void nge_atomic_increase(uint64_t *count_p, uint64_t n); 1046 1047 int nge_alloc_dma_mem(nge_t *ngep, size_t memsize, 1048 ddi_device_acc_attr_t *attr_p, uint_t dma_flags, dma_area_t *dma_p); 1049 void nge_free_dma_mem(dma_area_t *dma_p); 1050 int nge_restart(nge_t *ngep); 1051 void nge_wake_factotum(nge_t *ngep); 1052 1053 uint8_t nge_reg_get8(nge_t *ngep, nge_regno_t regno); 1054 void nge_reg_put8(nge_t *ngep, nge_regno_t regno, uint8_t data); 1055 uint16_t nge_reg_get16(nge_t *ngep, nge_regno_t regno); 1056 void nge_reg_put16(nge_t *ngep, nge_regno_t regno, uint16_t data); 1057 uint32_t nge_reg_get32(nge_t *ngep, nge_regno_t regno); 1058 void nge_reg_put32(nge_t *ngep, nge_regno_t regno, uint32_t data); 1059 uint_t nge_chip_factotum(caddr_t args1, caddr_t args2); 1060 void nge_chip_cfg_init(nge_t *ngep, chip_info_t *infop, boolean_t reset); 1061 void nge_init_dev_spec_param(nge_t *ngep); 1062 int nge_chip_stop(nge_t *ngep, boolean_t fault); 1063 void nge_restore_mac_addr(nge_t *ngep); 1064 int nge_chip_reset(nge_t *ngep); 1065 int nge_chip_start(nge_t *ngep); 1066 void nge_chip_sync(nge_t *ngep); 1067 1068 uint_t nge_chip_intr(caddr_t arg1, caddr_t arg2); 1069 enum ioc_reply nge_chip_ioctl(nge_t *ngep, mblk_t *mp, struct iocblk *iocp); 1070 1071 void nge_phys_init(nge_t *ngep); 1072 boolean_t nge_phy_reset(nge_t *ngep); 1073 uint16_t nge_mii_get16(nge_t *ngep, nge_regno_t regno); 1074 void nge_mii_put16(nge_t *ngep, nge_regno_t regno, uint16_t data); 1075 1076 void nge_recv_recycle(caddr_t arg); 1077 void nge_receive(nge_t *ngep); 1078 1079 uint_t nge_reschedule(caddr_t args1, caddr_t args2); 1080 mblk_t *nge_m_tx(void *arg, mblk_t *mp); 1081 1082 void nge_tx_recycle(nge_t *ngep, boolean_t is_intr); 1083 void nge_tx_recycle_all(nge_t *ngep); 1084 1085 enum ioc_reply nge_nd_ioctl(nge_t *ngep, queue_t *wq, 1086 mblk_t *mp, struct iocblk *iocp); 1087 int nge_nd_init(nge_t *ngep); 1088 void nge_nd_cleanup(nge_t *ngep); 1089 1090 1091 void nge_init_kstats(nge_t *ngep, int instance); 1092 void nge_fini_kstats(nge_t *ngep); 1093 int nge_m_stat(void *arg, uint_t stat, uint64_t *val); 1094 1095 uint32_t nge_atomic_shl32(uint32_t *sp, uint_t count); 1096 1097 void nge_log(nge_t *ngep, const char *fmt, ...); 1098 void nge_problem(nge_t *ngep, const char *fmt, ...); 1099 void nge_error(nge_t *ngep, const char *fmt, ...); 1100 void 1101 nge_report(nge_t *ngep, uint8_t error_id); 1102 1103 void (*nge_db(nge_t *ngep))(const char *fmt, ...); 1104 void (*nge_gdb(void))(const char *fmt, ...); 1105 extern uint32_t nge_debug; 1106 1107 /* 1108 * DESC MODE 2 1109 */ 1110 1111 extern void nge_sum_rxd_fill(void *, const ddi_dma_cookie_t *, size_t); 1112 extern uint32_t nge_sum_rxd_check(const void *, size_t *); 1113 1114 extern void nge_sum_txd_fill(void *, const ddi_dma_cookie_t *, 1115 size_t, uint32_t, boolean_t); 1116 extern uint32_t nge_sum_txd_check(const void *, size_t *); 1117 1118 /* 1119 * DESC MODE 3 1120 */ 1121 1122 extern void nge_hot_rxd_fill(void *, const ddi_dma_cookie_t *, size_t); 1123 extern uint32_t nge_hot_rxd_check(const void *, size_t *); 1124 1125 extern void nge_hot_txd_fill(void *, const ddi_dma_cookie_t *, 1126 size_t, uint32_t, boolean_t); 1127 extern uint32_t nge_hot_txd_check(const void *, size_t *); 1128 1129 #ifdef __cplusplus 1130 } 1131 #endif 1132 1133 #endif /* _SYS_NGE_H */ 1134