1 /* 2 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 3 * Use is subject to license terms. 4 */ 5 6 /* 7 * Copyright (c) 2004, 2005 8 * Damien Bergamini <damien.bergamini@free.fr>. All rights reserved. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice unmodified, this list of conditions, and the following 15 * disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33 #ifndef _SYS_IPW2200_IMPL_H 34 #define _SYS_IPW2200_IMPL_H 35 36 #pragma ident "%Z%%M% %I% %E% SMI" 37 38 #ifdef __cplusplus 39 extern "C" { 40 #endif 41 42 /* 43 * Intel Wireless PRO/2200 mini-pci adapter driver 44 * ipw2200_impl.h includes: 45 * . implementation of ipw2200 46 * . hardware operations and interface definations for ipw2200 47 * . firmware operations and interface definations for ipw2200 48 */ 49 #include <sys/ddi.h> 50 #include <sys/sunddi.h> 51 #include <sys/mac.h> 52 #include <sys/mac_wifi.h> 53 #include <sys/net80211.h> 54 55 /* 56 * Implementation of ipw2200 57 */ 58 #define IPW2200_PCI_CFG_RNUM (0) /* pci config space */ 59 #define IPW2200_PCI_CSR_RNUM (1) /* device CSR space */ 60 #define IPW2200_PCI_INTR_NUM (0) /* interrupt number */ 61 62 #define IPW2200_TX_RING_SIZE (64) 63 #define IPW2200_CMD_RING_SIZE (16) 64 #define IPW2200_RX_RING_SIZE (32) 65 66 struct dma_region { 67 ddi_dma_handle_t dr_hnd; 68 ddi_acc_handle_t dr_acc; 69 ddi_dma_cookie_t dr_cookie; 70 uint_t dr_ccnt; 71 uint32_t dr_pbase; 72 caddr_t dr_base; 73 size_t dr_size; 74 const char *dr_name; 75 }; 76 77 struct ipw2200_firmware { 78 uint8_t *boot_base; /* boot code */ 79 size_t boot_size; 80 uint8_t *uc_base; /* u-controller code */ 81 size_t uc_size; 82 uint8_t *fw_base; /* firmware code */ 83 size_t fw_size; 84 }; 85 86 /* 87 * besides the statistic counted by net80211, driver can also record 88 * statistic data while process 89 */ 90 struct ipw2200_stats { 91 uint32_t sc_rx_len_err; 92 uint32_t sc_tx_discard; 93 uint32_t sc_tx_alloc_fail; 94 uint32_t sc_tx_encap_fail; 95 uint32_t sc_tx_crypto_fail; 96 }; 97 98 /* 99 * per-instance soft-state structure 100 */ 101 struct ipw2200_softc { 102 struct ieee80211com sc_ic; 103 dev_info_t *sc_dip; 104 int (*sc_newstate)(struct ieee80211com *, 105 enum ieee80211_state, int); 106 void (*sc_node_free)(struct ieee80211com *); 107 int sc_authmode; 108 109 /* CSR */ 110 ddi_acc_handle_t sc_ioh; 111 caddr_t sc_regs; 112 /* mutex to protect interrupt handler */ 113 kmutex_t sc_ilock; 114 /* interrupt iblock cookie */ 115 ddi_iblock_cookie_t sc_iblk; 116 /* soft interrupt */ 117 ddi_softintr_t sc_link_softint; 118 /* link status */ 119 int32_t sc_linkstate; 120 /* flags */ 121 uint32_t sc_flags; 122 #define IPW2200_FLAG_FW_CACHED (1 << 0) 123 #define IPW2200_FLAG_FW_INITED (1 << 1) 124 #define IPW2200_FLAG_RUNNING (1 << 2) 125 #define IPW2200_FLAG_LINK_CHANGE (1 << 3) 126 #define IPW2200_FLAG_TX_SCHED (1 << 4) 127 #define IPW2200_FLAG_SCANNING (1 << 5) 128 #define IPW2200_FLAG_HW_ERR_RECOVER (1 << 6) 129 #define IPW2200_FLAG_ASSOCIATED (1 << 7) 130 #define IPW2200_FLAG_SUSPEND (1 << 8) 131 #define IPW2200_FLAG_HAS_RADIO_SWITCH (1 << 16) 132 /* firmware download */ 133 int sc_fw_ok; 134 kcondvar_t sc_fw_cond; 135 136 /* command desc ring */ 137 kmutex_t sc_cmd_lock; 138 kcondvar_t sc_cmd_cond; 139 uint32_t sc_cmd_cur; 140 uint32_t sc_cmd_free; 141 struct ipw2200_cmd_desc *sc_cmdsc; 142 143 /* command status */ 144 int sc_done[IPW2200_CMD_RING_SIZE]; 145 kcondvar_t sc_cmd_status_cond; 146 147 /* tx ring, bd->hdr&buf */ 148 kmutex_t sc_tx_lock; 149 uint32_t sc_tx_cur; 150 uint32_t sc_tx_free; 151 struct ipw2200_tx_desc *sc_txdsc; 152 uint8_t *sc_txbufs[IPW2200_TX_RING_SIZE]; 153 154 /* rx ring */ 155 uint32_t sc_rx_cur; 156 uint32_t sc_rx_free; 157 uint8_t *sc_rxbufs[IPW2200_RX_RING_SIZE]; 158 159 /* tx-desc & tx-buffer array */ 160 struct dma_region sc_dma_txdsc; 161 struct dma_region sc_dma_txbufs[IPW2200_TX_RING_SIZE]; 162 struct dma_region sc_dma_cmdsc; 163 /* rx-buffer array */ 164 struct dma_region sc_dma_rxbufs[IPW2200_RX_RING_SIZE]; 165 166 /* hw configuration values */ 167 uint8_t sc_macaddr[IEEE80211_ADDR_LEN]; 168 /* MAC address string */ 169 char sc_macstr[32]; 170 171 /* firmware */ 172 struct ipw2200_firmware sc_fw; 173 174 /* reschedule lock */ 175 kmutex_t sc_resched_lock; 176 177 /* pci information */ 178 uint16_t sc_vendor, sc_device, sc_subven, sc_subdev; 179 180 /* statistic counting by driver */ 181 struct ipw2200_stats sc_stats; 182 183 /* mfthread related, mfthread is used to handle asynchronous task */ 184 kthread_t *sc_mf_thread; 185 kmutex_t sc_mflock; 186 int sc_mfthread_switch; 187 kcondvar_t sc_mfthread_req; 188 kcondvar_t sc_mfthread_cv; 189 190 }; 191 192 /* 193 * RING_BACKWARD - move 'x' backward 's' steps in a 'b'- sized ring 194 * RING_FORWARD - move 'x' forward 's' steps in a 'b'- sized ring 195 * 196 * note that there must be 0 <= 'x' < 'b' && 0 <= 's' < 'b' 197 */ 198 #define RING_FLEN(x, y, b) ((((x) > (y)) ? ((b)+(y)-(x)) : ((y)-(x)))) 199 #define RING_FORWARD(x, s, b) (((x)+(s))%(b)) 200 #define RING_BACKWARD(x, s, b) RING_FORWARD((x), (b)-(s), (b)) 201 202 extern int ipw2200_init(struct ipw2200_softc *sc); 203 extern void ipw2200_wifi_ioctl(struct ipw2200_softc *, queue_t *, 204 mblk_t *, uint32_t); 205 extern int ipw2200_dma_region_alloc(struct ipw2200_softc *sc, 206 struct dma_region *dr, size_t size, uint_t dir, uint_t flags); 207 extern void ipw2200_dma_region_free(struct dma_region *dr); 208 extern int ipw2200_disable(struct ipw2200_softc *sc); 209 extern int ipw2200_start_scan(struct ipw2200_softc *sc); 210 211 /* 212 * get radio off/on status 213 */ 214 extern int ipw2200_radio_status(struct ipw2200_softc *sc); 215 216 /* 217 * Below structure and functions will be used for statistic, which will be 218 * displayed when the wificonfig running... 219 */ 220 struct statistic { 221 int index; 222 const char *desc; 223 }; 224 extern void ipw2200_get_statistics(struct ipw2200_softc *sc); 225 226 /* 227 * Hardware related definations and interfaces. 228 */ 229 #define IPW2200_CSR_INTR (0x0008) 230 #define IPW2200_CSR_INTR_MASK (0x000c) 231 #define IPW2200_CSR_INDIRECT_ADDR (0x0010) 232 #define IPW2200_CSR_INDIRECT_DATA (0x0014) 233 #define IPW2200_CSR_AUTOINC_ADDR (0x0018) 234 #define IPW2200_CSR_AUTOINC_DATA (0x001c) 235 #define IPW2200_CSR_RST (0x0020) 236 #define IPW2200_CSR_CTL (0x0024) 237 #define IPW2200_CSR_IO (0x0030) 238 #define IPW2200_CSR_CMD_BASE (0x0200) 239 #define IPW2200_CSR_CMD_SIZE (0x0204) 240 #define IPW2200_CSR_TX1_BASE (0x0208) 241 #define IPW2200_CSR_TX1_SIZE (0x020c) 242 #define IPW2200_CSR_TX2_BASE (0x0210) 243 #define IPW2200_CSR_TX2_SIZE (0x0214) 244 #define IPW2200_CSR_TX3_BASE (0x0218) 245 #define IPW2200_CSR_TX3_SIZE (0x021c) 246 #define IPW2200_CSR_TX4_BASE (0x0220) 247 #define IPW2200_CSR_TX4_SIZE (0x0224) 248 #define IPW2200_CSR_CMD_READ_INDEX (0x0280) 249 #define IPW2200_CSR_TX1_READ_INDEX (0x0284) 250 #define IPW2200_CSR_TX2_READ_INDEX (0x0288) 251 #define IPW2200_CSR_TX3_READ_INDEX (0x028c) 252 #define IPW2200_CSR_TX4_READ_INDEX (0x0290) 253 #define IPW2200_CSR_RX_READ_INDEX (0x02a0) 254 #define IPW2200_CSR_RX_BASE (0x0500) 255 #define IPW2200_CSR_TABLE0_SIZE (0x0700) 256 #define IPW2200_CSR_TABLE0_BASE (0x0704) 257 #define IPW2200_CSR_NODE_BASE (0x0c0c) 258 #define IPW2200_CSR_CMD_WRITE_INDEX (0x0f80) 259 #define IPW2200_CSR_TX1_WRITE_INDEX (0x0f84) 260 #define IPW2200_CSR_TX2_WRITE_INDEX (0x0f88) 261 #define IPW2200_CSR_TX3_WRITE_INDEX (0x0f8c) 262 #define IPW2200_CSR_TX4_WRITE_INDEX (0x0f90) 263 #define IPW2200_CSR_RX_WRITE_INDEX (0x0fa0) 264 #define IPW2200_CSR_READ_INT (0x0ff4) 265 266 #define IPW2200_CSR_CURRENTT_TX_RATE IPW2200_CSR_TABLE0_BASE 267 268 /* 269 * CSR flags: IPW2200_CSR_INTR 270 */ 271 #define IPW2200_INTR_RX_TRANSFER (0x00000002) 272 #define IPW2200_INTR_CMD_TRANSFER (0x00000800) 273 #define IPW2200_INTR_TX1_TRANSFER (0x00001000) 274 #define IPW2200_INTR_TX2_TRANSFER (0x00002000) 275 #define IPW2200_INTR_TX3_TRANSFER (0x00004000) 276 #define IPW2200_INTR_TX4_TRANSFER (0x00008000) 277 #define IPW2200_INTR_FW_INITED (0x01000000) 278 #define IPW2200_INTR_RADIO_OFF (0x04000000) 279 #define IPW2200_INTR_FATAL_ERROR (0x40000000) 280 #define IPW2200_INTR_PARITY_ERROR (0x80000000) 281 282 #define IPW2200_INTR_MASK_ALL (IPW2200_INTR_RX_TRANSFER | \ 283 IPW2200_INTR_CMD_TRANSFER | \ 284 IPW2200_INTR_TX1_TRANSFER | \ 285 IPW2200_INTR_TX2_TRANSFER | \ 286 IPW2200_INTR_TX3_TRANSFER | \ 287 IPW2200_INTR_TX4_TRANSFER | \ 288 IPW2200_INTR_FW_INITED | \ 289 IPW2200_INTR_RADIO_OFF | \ 290 IPW2200_INTR_FATAL_ERROR | \ 291 IPW2200_INTR_PARITY_ERROR) 292 293 #define IPW2200_INTR_MASK_ERR (IPW2200_INTR_FATAL_ERROR | \ 294 IPW2200_INTR_PARITY_ERROR) 295 296 /* 297 * CSR flags for register: IPW2200_CSR_RST, which is used to reset h/w 298 */ 299 #define IPW2200_RST_PRINCETON_RESET (0x00000001) 300 #define IPW2200_RST_STANDBY (0x00000004) 301 #define IPW2200_RST_LED_ACTIVITY (0x00000010) 302 #define IPW2200_RST_LED_ASSOCIATED (0x00000020) 303 #define IPW2200_RST_LED_OFDM (0x00000040) 304 #define IPW2200_RST_SW_RESET (0x00000080) 305 #define IPW2200_RST_MASTER_DISABLED (0x00000100) 306 #define IPW2200_RST_STOP_MASTER (0x00000200) 307 #define IPW2200_RST_GATE_ODMA (0x02000000) 308 #define IPW2200_RST_GATE_IDMA (0x04000000) 309 #define IPW2200_RST_GATE_ADMA (0x20000000) 310 311 /* 312 * CSR flags for register: IPW2200_CSR_CTL 313 */ 314 #define IPW2200_CTL_CLOCK_READY (0x00000001) 315 #define IPW2200_CTL_ALLOW_STANDBY (0x00000002) 316 #define IPW2200_CTL_INIT (0x00000004) 317 318 /* 319 * CSR flags for register: IPW2200_CSR_IO 320 */ 321 #define IPW2200_IO_RADIO_ENABLED (0x00010000) 322 323 /* 324 * CSR flags for register: IPW2200_CSR_READ_INT 325 */ 326 #define IPW2200_READ_INT_INIT_HOST (0x20000000) 327 328 /* table2 offsets */ 329 #define IPW2200_INFO_ADAPTER_MAC (40) 330 331 /* constants for command blocks */ 332 #define IPW2200_CB_DEFAULT_CTL (0x8cea0000) 333 #define IPW2200_CB_MAXDATALEN (8191) 334 335 /* supported rates */ 336 #define IPW2200_RATE_DS1 (10) 337 #define IPW2200_RATE_DS2 (20) 338 #define IPW2200_RATE_DS5 (55) 339 #define IPW2200_RATE_DS11 (110) 340 #define IPW2200_RATE_OFDM6 (13) 341 #define IPW2200_RATE_OFDM9 (15) 342 #define IPW2200_RATE_OFDM12 (5) 343 #define IPW2200_RATE_OFDM18 (7) 344 #define IPW2200_RATE_OFDM24 (9) 345 #define IPW2200_RATE_OFDM36 (11) 346 #define IPW2200_RATE_OFDM48 (1) 347 #define IPW2200_RATE_OFDM54 (3) 348 349 #pragma pack(1) 350 /* HW structures, packed */ 351 352 struct ipw2200_hdr { 353 uint8_t type; 354 #define IPW2200_HDR_TYPE_DATA (0) 355 #define IPW2200_HDR_TYPE_COMMAND (1) 356 #define IPW2200_HDR_TYPE_NOTIF (3) 357 #define IPW2200_HDR_TYPE_FRAME (9) 358 uint8_t seq; 359 uint8_t flags; 360 #define IPW2200_HDR_FLAG_IRQ (0x04) 361 uint8_t reserved; 362 }; 363 364 struct ipw2200_notif { 365 uint32_t reserved[2]; 366 uint8_t type; 367 #define IPW2200_NOTIF_TYPE_SUCCESS (0) 368 #define IPW2200_NOTIF_TYPE_UNSPECIFIED (1) 369 #define IPW2200_NOTIF_TYPE_ASSOCIATION (10) 370 #define IPW2200_NOTIF_TYPE_AUTHENTICATION (11) 371 #define IPW2200_NOTIF_TYPE_SCAN_CHANNEL (12) 372 #define IPW2200_NOTIF_TYPE_SCAN_COMPLETE (13) 373 #define IPW2200_NOTIF_TYPE_FRAG_LENGTH (14) 374 #define IPW2200_NOTIF_TYPE_LINK_QUALITY (15) 375 #define IPW2200_NOTIF_TYPE_BEACON (17) 376 #define IPW2200_NOTIF_TYPE_TGI_TX_KEY (18) 377 #define IPW2200_NOTIF_TYPE_CALIBRATION (20) 378 #define IPW2200_NOTIF_TYPE_NOISE (25) 379 uint8_t flags; 380 uint16_t len; 381 }; 382 383 /* 384 * structure for notification IPW2200_NOTIF_TYPE_AUTHENTICATION 385 */ 386 struct ipw2200_notif_authentication { 387 uint8_t state; 388 #define IPW2200_AUTH_FAIL (0) 389 #define IPW2200_AUTH_SENT_1 (1) 390 #define IPW2200_AUTH_RECV_2 (2) 391 #define IPW2200_AUTH_SEQ1_PASS (3) 392 #define IPW2200_AUTH_SEQ1_FAIL (4) 393 #define IPW2200_AUTH_SUCCESS (9) 394 }; 395 396 /* 397 * structure for notification IPW2200_NOTIF_TYPE_ASSOCIATION 398 */ 399 struct ipw2200_notif_association { 400 uint8_t state; 401 #define IPW2200_ASSOC_FAIL (0) 402 #define IPW2200_ASSOC_SUCCESS (12) 403 struct ieee80211_frame frame; 404 uint16_t capinfo; 405 uint16_t status; 406 uint16_t associd; 407 }; 408 409 /* 410 * structure for notification BACAON 411 */ 412 struct ipw2200_notif_beacon_state { 413 uint32_t state; 414 #define IPW2200_BEACON_MISS (1) 415 uint32_t number; 416 }; 417 418 /* 419 * structure for notification IPW2200_NOTIF_TYPE_SCAN_CHANNEL 420 */ 421 struct ipw2200_notif_scan_channel { 422 uint8_t nchan; 423 uint8_t reserved[47]; 424 }; 425 426 /* 427 * structure for notification IPW2200_NOTIF_TYPE_SCAN_COMPLETE 428 */ 429 struct ipw2200_notif_scan_complete { 430 uint8_t type; 431 uint8_t nchan; 432 uint8_t status; 433 uint8_t reserved; 434 }; 435 436 /* 437 * received frame header 438 */ 439 struct ipw2200_frame { 440 uint32_t reserved1[2]; 441 uint8_t chan; 442 uint8_t status; 443 uint8_t rate; 444 uint8_t rssi; /* receiver signal strength indicator */ 445 uint8_t agc; /* automatic gain control */ 446 uint8_t rssi_dbm; 447 uint16_t signal; 448 uint16_t noise; 449 uint8_t antenna; 450 uint8_t control; 451 uint8_t reserved3[2]; 452 uint16_t len; 453 }; 454 455 /* 456 * header for transmission 457 */ 458 struct ipw2200_tx_desc { 459 struct ipw2200_hdr hdr; 460 uint32_t reserved1; 461 uint8_t station; 462 uint8_t reserved2[3]; 463 uint8_t cmd; 464 #define IPW2200_DATA_CMD_TX (0x0b) 465 uint8_t seq; 466 uint16_t len; 467 uint8_t priority; 468 uint8_t flags; 469 #define IPW2200_DATA_FLAG_SHPREAMBLE (0x04) 470 #define IPW2200_DATA_FLAG_NO_WEP (0x20) 471 #define IPW2200_DATA_FLAG_NEED_ACK (0x80) 472 uint8_t xflags; 473 #define IPW2200_DATA_XFLAG_QOS (0x10) 474 uint8_t wep_txkey; 475 uint8_t wepkey[IEEE80211_KEYBUF_SIZE]; 476 uint8_t rate; 477 uint8_t antenna; 478 uint8_t reserved3[10]; 479 480 struct ieee80211_frame_addr4 wh; 481 uint8_t reserved4[2]; 482 uint32_t iv; 483 uint32_t eiv; 484 485 uint32_t nseg; 486 #define IPW2200_MAX_NSEG (6) 487 uint32_t seg_addr[IPW2200_MAX_NSEG]; 488 uint16_t seg_len[IPW2200_MAX_NSEG]; 489 }; 490 491 /* 492 * command 493 */ 494 struct ipw2200_cmd_desc { 495 struct ipw2200_hdr hdr; 496 uint8_t type; 497 #define IPW2200_CMD_ENABLE (2) 498 #define IPW2200_CMD_SET_CONFIG (6) 499 #define IPW2200_CMD_SET_ESSID (8) 500 #define IPW2200_CMD_SET_MAC_ADDRESS (11) 501 #define IPW2200_CMD_SET_RTS_THRESHOLD (15) 502 #define IPW2200_CMD_SET_FRAG_THRESHOLD (16) 503 #define IPW2200_CMD_SET_POWER_MODE (17) 504 #define IPW2200_CMD_SET_WEP_KEY (18) 505 #define IPW2200_CMD_SCAN (20) 506 #define IPW2200_CMD_ASSOCIATE (21) 507 #define IPW2200_CMD_SET_RATES (22) 508 #define IPW2200_CMD_ABORT_SCAN (23) 509 #define IPW2200_CMD_SET_WME_PARAMS (25) 510 #define IPW2200_CMD_SCAN_EXT (26) 511 #define IPW2200_CMD_SET_OPTIE (31) 512 #define IPW2200_CMD_DISABLE (33) 513 #define IPW2200_CMD_SET_IV (34) 514 #define IPW2200_CMD_SET_TX_POWER (35) 515 #define IPW2200_CMD_SET_SENSITIVITY (42) 516 #define IPW2200_CMD_SET_WMEIE (84) 517 uint8_t len; 518 uint16_t reserved; 519 uint8_t data[120]; 520 }; 521 522 /* 523 * node information (IBSS) 524 */ 525 struct ipw2200_ibssnode { 526 uint8_t bssid[IEEE80211_ADDR_LEN]; 527 uint8_t reserved[2]; 528 }; 529 530 /* 531 * constants for 'mode' fields 532 */ 533 #define IPW2200_MODE_11A (0) 534 #define IPW2200_MODE_11B (1) 535 #define IPW2200_MODE_11G (2) 536 537 /* 538 * macro for command IPW2200_CMD_SET_SENSITIVITY 539 */ 540 #define IPW2200_RSSIDBM2RAW(rssi)((rssi) - 112) 541 542 /* 543 * possible values for command IPW2200_CMD_SET_POWER_MODE 544 */ 545 #define IPW2200_POWER_MODE_CAM (0) 546 #define IPW2200_POWER_MODE_PSP (3) 547 #define IPW2200_POWER_MODE_MAX (5) 548 549 /* 550 * structure for command IPW2200_CMD_SET_RATES 551 */ 552 struct ipw2200_rateset { 553 uint8_t mode; 554 uint8_t nrates; 555 uint8_t type; 556 #define IPW2200_RATESET_TYPE_NEGOCIATED (0) 557 #define IPW2200_RATESET_TYPE_SUPPORTED (1) 558 uint8_t reserved; 559 uint8_t rates[12]; 560 }; 561 562 /* 563 * structure for command IPW2200_CMD_SET_TX_POWER 564 */ 565 struct ipw2200_txpower { 566 uint8_t nchan; 567 uint8_t mode; 568 struct { 569 uint8_t chan; 570 uint8_t power; 571 #define IPW2200_TXPOWER_MAX (20) 572 #define IPW2200_TXPOWER_RATIO (IEEE80211_TXPOWER_MAX / IPW2200_TXPOWER_MAX) 573 } chan[37]; 574 }; 575 576 /* 577 * structure for command IPW2200_CMD_ASSOCIATE 578 */ 579 struct ipw2200_associate { 580 uint8_t chan; 581 uint8_t auth; 582 #define IPW2200_AUTH_OPEN (0) 583 #define IPW2200_AUTH_SHARED (1) 584 #define IPW2200_AUTH_NONE (3) 585 uint8_t type; 586 #define IPW2200_HC_ASSOC (0) 587 #define IPW2200_HC_REASSOC (1) 588 #define IPW2200_HC_DISASSOC (2) 589 #define IPW2200_HC_IBSS_START (3) 590 #define IPW2200_HC_IBSS_RECONF (4) 591 #define IPW2200_HC_DISASSOC_QUIET (5) 592 uint8_t reserved1; 593 uint16_t policy; 594 #define IPW2200_POLICY_WME (1) 595 #define IPW2200_POLICY_WPA (2) 596 uint8_t plen; 597 uint8_t mode; 598 uint8_t bssid[IEEE80211_ADDR_LEN]; 599 uint8_t tstamp[8]; 600 601 uint16_t capinfo; 602 uint16_t lintval; 603 uint16_t intval; 604 uint8_t dst[IEEE80211_ADDR_LEN]; 605 uint32_t reserved3; 606 uint16_t reserved4; 607 }; 608 609 #define IPW2200_SCAN_CHANNELS (54) 610 611 /* 612 * structure for command IPW2200_CMD_SCAN 613 */ 614 struct ipw2200_scan { 615 uint8_t type; 616 #define IPW2200_SCAN_TYPE_PASSIVE_STOP (0) /* passive, stop on first beacon */ 617 #define IPW2200_SCAN_TYPE_PASSIVE (1) /* passive, full dwell on channel */ 618 #define IPW2200_SCAN_TYPE_DIRECTED (2) /* active, directed probe seq */ 619 #define IPW2200_SCAN_TYPE_BROADCAST (3) /* active, bcast probe seq */ 620 #define IPW2200_SCAN_TYPE_BDIRECTED (4) /* active, directed+bcast probe */ 621 #define IPW2200_SCAN_TYPES (5) 622 uint16_t dwelltime; 623 uint8_t channels[IPW2200_SCAN_CHANNELS]; 624 #define IPW2200_CHAN_5GHZ (0 << 6) 625 #define IPW2200_CHAN_2GHZ (1 << 6) 626 uint8_t reserved[3]; 627 }; 628 629 /* 630 * structure for command IPW2200_CMD_SCAN_EXT 631 */ 632 struct ipw2200_scan_ext { 633 uint32_t full_scan_index; 634 uint8_t channels[IPW2200_SCAN_CHANNELS]; 635 uint8_t scan_type[IPW2200_SCAN_CHANNELS/2]; 636 uint8_t reserved; 637 uint16_t dwell_time[IPW2200_SCAN_TYPES]; 638 }; 639 640 /* 641 * structure for command IPW2200_CMD_SET_CONFIGURATION 642 */ 643 struct ipw2200_configuration { 644 uint8_t bluetooth_coexistence; 645 uint8_t reserved1; 646 uint8_t answer_pbreq; 647 uint8_t allow_invalid_frames; 648 uint8_t multicast_enabled; 649 uint8_t drop_unicast_unencrypted; 650 uint8_t disable_unicast_decryption; 651 uint8_t drop_multicast_unencrypted; 652 uint8_t disable_multicast_decryption; 653 uint8_t antenna; 654 #define IPW2200_ANTENNA_AUTO (0) /* firmware selects best antenna */ 655 #define IPW2200_ANTENNA_A (1) /* use antenna A only */ 656 #define IPW2200_ANTENNA_B (3) /* use antenna B only */ 657 #define IPW2200_ANTENNA_SLOWDIV (2) /* slow diversity algorithm */ 658 uint8_t include_crc; 659 uint8_t use_protection; 660 uint8_t protection_ctsonly; 661 uint8_t enable_multicast_filtering; 662 uint8_t bluetooth_threshold; 663 uint8_t reserved4; 664 uint8_t allow_beacon_and_probe_resp; 665 uint8_t allow_mgt; 666 uint8_t noise_reported; 667 uint8_t reserved5; 668 }; 669 670 /* 671 * structure for command IPW2200_CMD_SET_WEP_KEY 672 */ 673 struct ipw2200_wep_key { 674 uint8_t cmd; 675 #define IPW2200_WEP_KEY_CMD_SETKEY (0x08) 676 uint8_t seq; 677 uint8_t idx; 678 uint8_t len; 679 uint8_t key[IEEE80211_KEYBUF_SIZE]; 680 }; 681 682 /* 683 * the following two structures are for future WME support 684 */ 685 struct ipw2200_wme_params { 686 uint16_t cwmin[WME_NUM_AC]; 687 uint16_t cwmax[WME_NUM_AC]; 688 uint8_t aifsn[WME_NUM_AC]; 689 uint8_t acm[WME_NUM_AC]; 690 uint16_t burst[WME_NUM_AC]; 691 }; 692 693 struct ipw2200_sensitivity { 694 uint16_t rssi; 695 #define IPW2200_RSSI_TO_DBM (112) 696 uint16_t reserved; 697 }; 698 699 #pragma pack() 700 701 /* 702 * ROM entries 703 */ 704 #define IPW2200_EEPROM_MAC (0x21) 705 #define IPW2200_EEPROM_NIC (0x25) /* nic type (lsb) */ 706 #define IPW2200_EEPROM_SKU (0x25) /* nic type (msb) */ 707 708 /* 709 * EVENT controls 710 */ 711 #define IPW2200_IMEM_EVENT_CTL (0x00300004) 712 /* 713 * EEPROM controls 714 */ 715 #define IPW2200_IMEM_EEPROM_CTL (0x00300040) 716 717 #define IPW2200_EEPROM_DELAY (1) /* minimum hold time(microsecond) */ 718 719 /* 720 * possible flags for register IWI_MEM_EVENT 721 */ 722 #define IPW2200_LED_ASSOC (1 << 5) 723 #define IPW2200_LED_MASK (0xd9fffffb) 724 725 /* 726 * control and status registers access macros 727 */ 728 extern uint8_t ipw2200_csr_get8(struct ipw2200_softc *sc, uint32_t off); 729 extern uint16_t ipw2200_csr_get16(struct ipw2200_softc *sc, uint32_t off); 730 extern uint32_t ipw2200_csr_get32(struct ipw2200_softc *sc, uint32_t off); 731 extern void ipw2200_csr_getbuf32(struct ipw2200_softc *sc, uint32_t off, 732 uint32_t *buf, size_t cnt); 733 extern void ipw2200_csr_put8(struct ipw2200_softc *sc, uint32_t off, 734 uint8_t val); 735 extern void ipw2200_csr_put16(struct ipw2200_softc *sc, uint32_t off, 736 uint16_t val); 737 extern void ipw2200_csr_put32(struct ipw2200_softc *sc, uint32_t off, 738 uint32_t val); 739 /* 740 * indirect memory space access macros 741 */ 742 extern uint8_t ipw2200_imem_get8(struct ipw2200_softc *sc, uint32_t addr); 743 extern uint16_t ipw2200_imem_get16(struct ipw2200_softc *sc, 744 uint32_t addr); 745 extern uint32_t ipw2200_imem_get32(struct ipw2200_softc *sc, 746 uint32_t addr); 747 extern void ipw2200_imem_put8(struct ipw2200_softc *sc, uint32_t addr, 748 uint8_t val); 749 extern void ipw2200_imem_put16(struct ipw2200_softc *sc, uint32_t addr, 750 uint16_t val); 751 extern void ipw2200_imem_put32(struct ipw2200_softc *sc, uint32_t addr, 752 uint32_t val); 753 /* 754 * EEPROM access macro 755 */ 756 extern void ipw2200_rom_control(struct ipw2200_softc *sc, uint32_t val); 757 extern uint16_t ipw2200_rom_get16(struct ipw2200_softc *sc, uint8_t addr); 758 759 /* 760 * Firmware related definations and interfaces. 761 */ 762 extern int ipw2200_cache_firmware(struct ipw2200_softc *sc); 763 extern int ipw2200_free_firmware(struct ipw2200_softc *sc); 764 extern int ipw2200_load_uc(struct ipw2200_softc *sc, uint8_t *buf, size_t size); 765 extern int ipw2200_load_fw(struct ipw2200_softc *sc, uint8_t *buf, size_t size); 766 767 #ifdef __cplusplus 768 } 769 #endif 770 771 #endif /* _SYS_IPW2200_IMPL_H */ 772