1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #pragma ident "%Z%%M% %I% %E% SMI" 27 28 #include <hxge_impl.h> 29 #include <inet/mi.h> 30 #include <sys/cmn_err.h> 31 32 #define RDC_NAME_FORMAT1 "RDC_" 33 #define TDC_NAME_FORMAT1 "TDC_" 34 #define CH_NAME_FORMAT "%d" 35 36 void 37 hxge_init_statsp(p_hxge_t hxgep) 38 { 39 size_t stats_size; 40 41 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_init_statsp")); 42 43 stats_size = sizeof (hxge_stats_t); 44 hxgep->statsp = KMEM_ZALLOC(stats_size, KM_SLEEP); 45 hxgep->statsp->stats_size = stats_size; 46 47 HXGE_DEBUG_MSG((hxgep, KST_CTL, " <== hxge_init_statsp")); 48 } 49 50 typedef struct { 51 uint8_t index; 52 uint8_t type; 53 char *name; 54 } hxge_kstat_index_t; 55 56 typedef enum { 57 RDC_STAT_PACKETS = 0, 58 RDC_STAT_BYTES, 59 RDC_STAT_ERRORS, 60 RDC_STAT_JUMBO_PKTS, 61 RDC_STAT_RCR_UNKNOWN_ERR, 62 RDC_STAT_RCR_SHA_PAR_ERR, 63 RDC_STAT_RBR_PRE_PAR_ERR, 64 RDC_STAT_RBR_PRE_EMTY, 65 RDC_STAT_RCR_SHADOW_FULL, 66 RDC_STAT_RBR_TMOUT, 67 RDC_STAT_PEU_RESP_ERR, 68 RDC_STAT_CTRL_FIFO_ECC_ERR, 69 RDC_STAT_DATA_FIFO_ECC_ERR, 70 RDC_STAT_RCRFULL, 71 RDC_STAT_RBR_EMPTY, 72 RDC_STAT_RBR_FULL, 73 RDC_STAT_RCRTO, 74 RDC_STAT_RCRTHRES, 75 RDC_STAT_END 76 } hxge_rdc_stat_index_t; 77 78 hxge_kstat_index_t hxge_rdc_stats[] = { 79 {RDC_STAT_PACKETS, KSTAT_DATA_UINT64, "rdc_packets"}, 80 {RDC_STAT_BYTES, KSTAT_DATA_UINT64, "rdc_bytes"}, 81 {RDC_STAT_JUMBO_PKTS, KSTAT_DATA_ULONG, "rdc_jumbo_pkts"}, 82 {RDC_STAT_RCR_UNKNOWN_ERR, KSTAT_DATA_ULONG, "rdc_rcr_unknown_err"}, 83 {RDC_STAT_ERRORS, KSTAT_DATA_ULONG, "rdc_errors"}, 84 {RDC_STAT_RCR_SHA_PAR_ERR, KSTAT_DATA_ULONG, "rdc_rcr_sha_par_err"}, 85 {RDC_STAT_RBR_PRE_PAR_ERR, KSTAT_DATA_ULONG, "rdc_rbr_pre_par_err"}, 86 {RDC_STAT_RBR_PRE_EMTY, KSTAT_DATA_ULONG, "rdc_rbr_pre_empty"}, 87 {RDC_STAT_RCR_SHADOW_FULL, KSTAT_DATA_ULONG, "rdc_rcr_shadow_full"}, 88 {RDC_STAT_RBR_TMOUT, KSTAT_DATA_ULONG, "rdc_rbr_tmout"}, 89 {RDC_STAT_PEU_RESP_ERR, KSTAT_DATA_ULONG, "peu_resp_err"}, 90 {RDC_STAT_CTRL_FIFO_ECC_ERR, KSTAT_DATA_ULONG, "ctrl_fifo_ecc_err"}, 91 {RDC_STAT_DATA_FIFO_ECC_ERR, KSTAT_DATA_ULONG, "data_fifo_ecc_err"}, 92 {RDC_STAT_RCRFULL, KSTAT_DATA_ULONG, "rdc_rcrfull"}, 93 {RDC_STAT_RBR_EMPTY, KSTAT_DATA_ULONG, "rdc_rbr_empty"}, 94 {RDC_STAT_RBR_FULL, KSTAT_DATA_ULONG, "rdc_rbrfull"}, 95 {RDC_STAT_RCRTO, KSTAT_DATA_ULONG, "rdc_rcrto"}, 96 {RDC_STAT_RCRTHRES, KSTAT_DATA_ULONG, "rdc_rcrthres"}, 97 {RDC_STAT_END, NULL, NULL} 98 }; 99 100 typedef enum { 101 RDC_SYS_STAT_CTRL_FIFO_SEC = 0, 102 RDC_SYS_STAT_CTRL_FIFO_DED, 103 RDC_SYS_STAT_DATA_FIFO_SEC, 104 RDC_SYS_STAT_DATA_FIFO_DED, 105 RDC_SYS_STAT_END 106 } hxge_rdc_sys_stat_idx_t; 107 108 hxge_kstat_index_t hxge_rdc_sys_stats[] = { 109 {RDC_SYS_STAT_CTRL_FIFO_SEC, KSTAT_DATA_UINT64, "rdc_ctrl_fifo_sec"}, 110 {RDC_SYS_STAT_CTRL_FIFO_DED, KSTAT_DATA_UINT64, "rdc_ctrl_fifo_ded"}, 111 {RDC_SYS_STAT_DATA_FIFO_SEC, KSTAT_DATA_UINT64, "rdc_data_fifo_sec"}, 112 {RDC_SYS_STAT_DATA_FIFO_DED, KSTAT_DATA_UINT64, "tdc_data_fifo_ded"}, 113 {RDC_SYS_STAT_END, NULL, NULL} 114 }; 115 116 typedef enum { 117 TDC_STAT_PACKETS = 0, 118 TDC_STAT_BYTES, 119 TDC_STAT_BYTES_WITH_PAD, 120 TDC_STAT_ERRORS, 121 TDC_STAT_TX_INITS, 122 TDC_STAT_TX_NO_BUF, 123 TDC_STAT_PEU_RESP_ERR, 124 TDC_STAT_PKT_SIZE_ERR, 125 TDC_STAT_TX_RNG_OFLOW, 126 TDC_STAT_PKT_SIZE_HDR_ERR, 127 TDC_STAT_RUNT_PKT_DROP_ERR, 128 TDC_STAT_PREF_PAR_ERR, 129 TDC_STAT_TDR_PREF_CPL_TO, 130 TDC_STAT_PKT_CPL_TO, 131 TDC_STAT_INVALID_SOP, 132 TDC_STAT_UNEXPECTED_SOP, 133 TDC_STAT_COUNT_HDR_SIZE_ERR, 134 TDC_STAT_COUNT_RUNT, 135 TDC_STAT_COUNT_ABORT, 136 TDC_STAT_TX_STARTS, 137 TDC_STAT_TX_NO_DESC, 138 TDC_STAT_TX_DMA_BIND_FAIL, 139 TDC_STAT_TX_HDR_PKTS, 140 TDC_STAT_TX_DDI_PKTS, 141 TDC_STAT_TX_JUMBO_PKTS, 142 TDC_STAT_TX_MAX_PEND, 143 TDC_STAT_TX_MARKS, 144 TDC_STAT_END 145 } hxge_tdc_stats_index_t; 146 147 hxge_kstat_index_t hxge_tdc_stats[] = { 148 {TDC_STAT_PACKETS, KSTAT_DATA_UINT64, "tdc_packets"}, 149 {TDC_STAT_BYTES, KSTAT_DATA_UINT64, "tdc_bytes"}, 150 {TDC_STAT_BYTES_WITH_PAD, KSTAT_DATA_UINT64, "tdc_bytes_with_pad"}, 151 {TDC_STAT_ERRORS, KSTAT_DATA_UINT64, "tdc_errors"}, 152 {TDC_STAT_TX_INITS, KSTAT_DATA_ULONG, "tdc_tx_inits"}, 153 {TDC_STAT_TX_NO_BUF, KSTAT_DATA_ULONG, "tdc_tx_no_buf"}, 154 155 {TDC_STAT_PEU_RESP_ERR, KSTAT_DATA_ULONG, "tdc_peu_resp_err"}, 156 {TDC_STAT_PKT_SIZE_ERR, KSTAT_DATA_ULONG, "tdc_pkt_size_err"}, 157 {TDC_STAT_TX_RNG_OFLOW, KSTAT_DATA_ULONG, "tdc_tx_rng_oflow"}, 158 {TDC_STAT_PKT_SIZE_HDR_ERR, KSTAT_DATA_ULONG, "tdc_pkt_size_hdr_err"}, 159 {TDC_STAT_RUNT_PKT_DROP_ERR, KSTAT_DATA_ULONG, "tdc_runt_pkt_drop_err"}, 160 {TDC_STAT_PREF_PAR_ERR, KSTAT_DATA_ULONG, "tdc_pref_par_err"}, 161 {TDC_STAT_TDR_PREF_CPL_TO, KSTAT_DATA_ULONG, "tdc_tdr_pref_cpl_to"}, 162 {TDC_STAT_PKT_CPL_TO, KSTAT_DATA_ULONG, "tdc_pkt_cpl_to"}, 163 {TDC_STAT_INVALID_SOP, KSTAT_DATA_ULONG, "tdc_invalid_sop"}, 164 {TDC_STAT_UNEXPECTED_SOP, KSTAT_DATA_ULONG, "tdc_unexpected_sop"}, 165 166 {TDC_STAT_COUNT_HDR_SIZE_ERR, KSTAT_DATA_ULONG, 167 "tdc_count_hdr_size_err"}, 168 {TDC_STAT_COUNT_RUNT, KSTAT_DATA_ULONG, "tdc_count_runt"}, 169 {TDC_STAT_COUNT_ABORT, KSTAT_DATA_ULONG, "tdc_count_abort"}, 170 171 {TDC_STAT_TX_STARTS, KSTAT_DATA_ULONG, "tdc_tx_starts"}, 172 {TDC_STAT_TX_NO_DESC, KSTAT_DATA_ULONG, "tdc_tx_no_desc"}, 173 {TDC_STAT_TX_DMA_BIND_FAIL, KSTAT_DATA_ULONG, "tdc_tx_dma_bind_fail"}, 174 {TDC_STAT_TX_HDR_PKTS, KSTAT_DATA_ULONG, "tdc_tx_hdr_pkts"}, 175 {TDC_STAT_TX_DDI_PKTS, KSTAT_DATA_ULONG, "tdc_tx_ddi_pkts"}, 176 {TDC_STAT_TX_JUMBO_PKTS, KSTAT_DATA_ULONG, "tdc_tx_jumbo_pkts"}, 177 {TDC_STAT_TX_MAX_PEND, KSTAT_DATA_ULONG, "tdc_tx_max_pend"}, 178 {TDC_STAT_TX_MARKS, KSTAT_DATA_ULONG, "tdc_tx_marks"}, 179 {TDC_STAT_END, NULL, NULL} 180 }; 181 182 typedef enum { 183 REORD_TBL_PAR_ERR = 0, 184 REORD_BUF_DED_ERR, 185 REORD_BUF_SEC_ERR, 186 TDC_SYS_STAT_END 187 } hxge_tdc_sys_stat_idx_t; 188 189 hxge_kstat_index_t hxge_tdc_sys_stats[] = { 190 {REORD_TBL_PAR_ERR, KSTAT_DATA_UINT64, "reord_tbl_par_err"}, 191 {REORD_BUF_DED_ERR, KSTAT_DATA_UINT64, "reord_buf_ded_err"}, 192 {REORD_BUF_SEC_ERR, KSTAT_DATA_UINT64, "reord_buf_sec_err"}, 193 {TDC_SYS_STAT_END, NULL, NULL} 194 }; 195 196 typedef enum { 197 VMAC_STAT_TX_FRAME_CNT, /* vmac_tx_frame_cnt_t */ 198 VMAC_STAT_TX_BYTE_CNT, /* vmac_tx_byte_cnt_t */ 199 200 VMAC_STAT_RX_FRAME_CNT, /* vmac_rx_frame_cnt_t */ 201 VMAC_STAT_RX_BYTE_CNT, /* vmac_rx_byte_cnt_t */ 202 VMAC_STAT_RX_DROP_FRAME_CNT, /* vmac_rx_drop_fr_cnt_t */ 203 VMAC_STAT_RX_DROP_BYTE_CNT, /* vmac_rx_drop_byte_cnt_t */ 204 VMAC_STAT_RX_CRC_CNT, /* vmac_rx_crc_cnt_t */ 205 VMAC_STAT_RX_PAUSE_CNT, /* vmac_rx_pause_cnt_t */ 206 VMAC_STAT_RX_BCAST_FR_CNT, /* vmac_rx_bcast_fr_cnt_t */ 207 VMAC_STAT_RX_MCAST_FR_CNT, /* vmac_rx_mcast_fr_cnt_t */ 208 VMAC_STAT_END 209 } hxge_vmac_stat_index_t; 210 211 hxge_kstat_index_t hxge_vmac_stats[] = { 212 {VMAC_STAT_TX_FRAME_CNT, KSTAT_DATA_ULONG, "vmac_tx_frame_cnt"}, 213 {VMAC_STAT_TX_BYTE_CNT, KSTAT_DATA_ULONG, "vmac_tx_byte_cnt"}, 214 215 {VMAC_STAT_RX_FRAME_CNT, KSTAT_DATA_ULONG, "vmac_rx_frame_cnt"}, 216 {VMAC_STAT_RX_BYTE_CNT, KSTAT_DATA_ULONG, "vmac_rx_byte_cnt"}, 217 {VMAC_STAT_RX_DROP_FRAME_CNT, KSTAT_DATA_ULONG, 218 "vmac_rx_drop_frame_cnt"}, 219 {VMAC_STAT_RX_DROP_BYTE_CNT, KSTAT_DATA_ULONG, "vmac_rx_drop_byte_cnt"}, 220 {VMAC_STAT_RX_CRC_CNT, KSTAT_DATA_ULONG, "vmac_rx_crc_cnt"}, 221 {VMAC_STAT_RX_PAUSE_CNT, KSTAT_DATA_ULONG, "vmac_rx_pause_cnt"}, 222 {VMAC_STAT_RX_BCAST_FR_CNT, KSTAT_DATA_ULONG, "vmac_rx_bcast_fr_cnt"}, 223 {VMAC_STAT_RX_MCAST_FR_CNT, KSTAT_DATA_ULONG, "vmac_rx_mcast_fr_cnt"}, 224 {VMAC_STAT_END, NULL, NULL} 225 }; 226 227 typedef enum { 228 PFC_STAT_PKT_DROP, 229 PFC_STAT_TCAM_PARITY_ERR, 230 PFC_STAT_VLAN_PARITY_ERR, 231 PFC_STAT_BAD_CS_COUNT, 232 PFC_STAT_DROP_COUNT, 233 PFC_STAT_TCP_CTRL_DROP, 234 PFC_STAT_L2_ADDR_DROP, 235 PFC_STAT_CLASS_CODE_DROP, 236 PFC_STAT_TCAM_DROP, 237 PFC_STAT_VLAN_DROP, 238 PFC_STAT_END 239 } hxge_pfc_stat_index_t; 240 241 hxge_kstat_index_t hxge_pfc_stats[] = { 242 {PFC_STAT_PKT_DROP, KSTAT_DATA_ULONG, "pfc_pkt_drop"}, 243 {PFC_STAT_TCAM_PARITY_ERR, KSTAT_DATA_ULONG, "pfc_tcam_parity_err"}, 244 {PFC_STAT_VLAN_PARITY_ERR, KSTAT_DATA_ULONG, "pfc_vlan_parity_err"}, 245 {PFC_STAT_BAD_CS_COUNT, KSTAT_DATA_ULONG, "pfc_bad_cs_count"}, 246 {PFC_STAT_DROP_COUNT, KSTAT_DATA_ULONG, "pfc_drop_count"}, 247 {PFC_STAT_TCP_CTRL_DROP, KSTAT_DATA_ULONG, " pfc_pkt_drop_tcp_ctrl"}, 248 {PFC_STAT_L2_ADDR_DROP, KSTAT_DATA_ULONG, " pfc_pkt_drop_l2_addr"}, 249 {PFC_STAT_CLASS_CODE_DROP, KSTAT_DATA_ULONG, 250 " pfc_pkt_drop_class_code"}, 251 {PFC_STAT_TCAM_DROP, KSTAT_DATA_ULONG, " pfc_pkt_drop_tcam"}, 252 {PFC_STAT_VLAN_DROP, KSTAT_DATA_ULONG, " pfc_pkt_drop_vlan"}, 253 {PFC_STAT_END, NULL, NULL} 254 }; 255 256 typedef enum { 257 MMAC_MAX_ADDR, 258 MMAC_AVAIL_ADDR, 259 MMAC_ADDR_POOL1, 260 MMAC_ADDR_POOL2, 261 MMAC_ADDR_POOL3, 262 MMAC_ADDR_POOL4, 263 MMAC_ADDR_POOL5, 264 MMAC_ADDR_POOL6, 265 MMAC_ADDR_POOL7, 266 MMAC_ADDR_POOL8, 267 MMAC_ADDR_POOL9, 268 MMAC_ADDR_POOL10, 269 MMAC_ADDR_POOL11, 270 MMAC_ADDR_POOL12, 271 MMAC_ADDR_POOL13, 272 MMAC_ADDR_POOL14, 273 MMAC_ADDR_POOL15, 274 MMAC_ADDR_POOL16, 275 MMAC_STATS_END 276 } hxge_mmac_stat_index_t; 277 278 hxge_kstat_index_t hxge_mmac_stats[] = { 279 {MMAC_MAX_ADDR, KSTAT_DATA_UINT64, "max_mmac_addr"}, 280 {MMAC_AVAIL_ADDR, KSTAT_DATA_UINT64, "avail_mmac_addr"}, 281 {MMAC_ADDR_POOL1, KSTAT_DATA_UINT64, "mmac_addr_1"}, 282 {MMAC_ADDR_POOL2, KSTAT_DATA_UINT64, "mmac_addr_2"}, 283 {MMAC_ADDR_POOL3, KSTAT_DATA_UINT64, "mmac_addr_3"}, 284 {MMAC_ADDR_POOL4, KSTAT_DATA_UINT64, "mmac_addr_4"}, 285 {MMAC_ADDR_POOL5, KSTAT_DATA_UINT64, "mmac_addr_5"}, 286 {MMAC_ADDR_POOL6, KSTAT_DATA_UINT64, "mmac_addr_6"}, 287 {MMAC_ADDR_POOL7, KSTAT_DATA_UINT64, "mmac_addr_7"}, 288 {MMAC_ADDR_POOL8, KSTAT_DATA_UINT64, "mmac_addr_8"}, 289 {MMAC_ADDR_POOL9, KSTAT_DATA_UINT64, "mmac_addr_9"}, 290 {MMAC_ADDR_POOL10, KSTAT_DATA_UINT64, "mmac_addr_10"}, 291 {MMAC_ADDR_POOL11, KSTAT_DATA_UINT64, "mmac_addr_11"}, 292 {MMAC_ADDR_POOL12, KSTAT_DATA_UINT64, "mmac_addr_12"}, 293 {MMAC_ADDR_POOL13, KSTAT_DATA_UINT64, "mmac_addr_13"}, 294 {MMAC_ADDR_POOL14, KSTAT_DATA_UINT64, "mmac_addr_14"}, 295 {MMAC_ADDR_POOL15, KSTAT_DATA_UINT64, "mmac_addr_15"}, 296 {MMAC_ADDR_POOL16, KSTAT_DATA_UINT64, "mmac_addr_16"}, 297 {MMAC_STATS_END, NULL, NULL}, 298 }; 299 300 typedef enum { 301 SPC_ACC_ERR = 0, 302 TDC_PIOACC_ERR, 303 RDC_PIOACC_ERR, 304 PFC_PIOACC_ERR, 305 VMAC_PIOACC_ERR, 306 CPL_HDRQ_PARERR, 307 CPL_DATAQ_PARERR, 308 RETRYRAM_XDLH_PARERR, 309 RETRYSOTRAM_XDLH_PARERR, 310 P_HDRQ_PARERR, 311 P_DATAQ_PARERR, 312 NP_HDRQ_PARERR, 313 NP_DATAQ_PARERR, 314 EIC_MSIX_PARERR, 315 HCR_PARERR, 316 PEU_SYS_STAT_END 317 } hxge_peu_sys_stat_idx_t; 318 319 hxge_kstat_index_t hxge_peu_sys_stats[] = { 320 {SPC_ACC_ERR, KSTAT_DATA_UINT64, "spc_acc_err"}, 321 {TDC_PIOACC_ERR, KSTAT_DATA_UINT64, "tdc_pioacc_err"}, 322 {RDC_PIOACC_ERR, KSTAT_DATA_UINT64, "rdc_pioacc_err"}, 323 {PFC_PIOACC_ERR, KSTAT_DATA_UINT64, "pfc_pioacc_err"}, 324 {VMAC_PIOACC_ERR, KSTAT_DATA_UINT64, "vmac_pioacc_err"}, 325 {CPL_HDRQ_PARERR, KSTAT_DATA_UINT64, "cpl_hdrq_parerr"}, 326 {CPL_DATAQ_PARERR, KSTAT_DATA_UINT64, "cpl_dataq_parerr"}, 327 {RETRYRAM_XDLH_PARERR, KSTAT_DATA_UINT64, "retryram_xdlh_parerr"}, 328 {RETRYSOTRAM_XDLH_PARERR, KSTAT_DATA_UINT64, "retrysotram_xdlh_parerr"}, 329 {P_HDRQ_PARERR, KSTAT_DATA_UINT64, "p_hdrq_parerr"}, 330 {P_DATAQ_PARERR, KSTAT_DATA_UINT64, "p_dataq_parerr"}, 331 {NP_HDRQ_PARERR, KSTAT_DATA_UINT64, "np_hdrq_parerr"}, 332 {NP_DATAQ_PARERR, KSTAT_DATA_UINT64, "np_dataq_parerr"}, 333 {EIC_MSIX_PARERR, KSTAT_DATA_UINT64, "eic_msix_parerr"}, 334 {HCR_PARERR, KSTAT_DATA_UINT64, "hcr_parerr"}, 335 {TDC_SYS_STAT_END, NULL, NULL} 336 }; 337 338 /* ARGSUSED */ 339 int 340 hxge_tdc_stat_update(kstat_t *ksp, int rw) 341 { 342 p_hxge_t hxgep; 343 p_hxge_tdc_kstat_t tdc_kstatsp; 344 p_hxge_tx_ring_stats_t statsp; 345 int channel; 346 char *ch_name, *end; 347 348 hxgep = (p_hxge_t)ksp->ks_private; 349 if (hxgep == NULL) 350 return (-1); 351 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_rxstat_update")); 352 353 ch_name = ksp->ks_name; 354 ch_name += strlen(TDC_NAME_FORMAT1); 355 channel = mi_strtol(ch_name, &end, 10); 356 357 tdc_kstatsp = (p_hxge_tdc_kstat_t)ksp->ks_data; 358 statsp = (p_hxge_tx_ring_stats_t)&hxgep->statsp->tdc_stats[channel]; 359 360 HXGE_DEBUG_MSG((hxgep, KST_CTL, 361 "hxge_tdc_stat_update data $%p statsp $%p channel %d", 362 ksp->ks_data, statsp, channel)); 363 364 tdc_kstatsp->opackets.value.ull = statsp->opackets; 365 tdc_kstatsp->obytes.value.ull = statsp->obytes; 366 tdc_kstatsp->obytes_with_pad.value.ull = statsp->obytes_with_pad; 367 tdc_kstatsp->oerrors.value.ull = statsp->oerrors; 368 tdc_kstatsp->tx_hdr_pkts.value.ull = statsp->tx_hdr_pkts; 369 tdc_kstatsp->tx_ddi_pkts.value.ull = statsp->tx_ddi_pkts; 370 tdc_kstatsp->tx_jumbo_pkts.value.ull = statsp->tx_jumbo_pkts; 371 tdc_kstatsp->tx_max_pend.value.ull = statsp->tx_max_pend; 372 tdc_kstatsp->peu_resp_err.value.ul = statsp->peu_resp_err; 373 tdc_kstatsp->pkt_size_err.value.ul = statsp->pkt_size_err; 374 tdc_kstatsp->tx_rng_oflow.value.ul = statsp->tx_rng_oflow; 375 tdc_kstatsp->pkt_size_hdr_err.value.ul = statsp->pkt_size_hdr_err; 376 tdc_kstatsp->runt_pkt_drop_err.value.ul = statsp->runt_pkt_drop_err; 377 tdc_kstatsp->pref_par_err.value.ul = statsp->pref_par_err; 378 tdc_kstatsp->tdr_pref_cpl_to.value.ul = statsp->tdr_pref_cpl_to; 379 tdc_kstatsp->pkt_cpl_to.value.ul = statsp->pkt_cpl_to; 380 tdc_kstatsp->invalid_sop.value.ul = statsp->invalid_sop; 381 tdc_kstatsp->unexpected_sop.value.ul = statsp->unexpected_sop; 382 tdc_kstatsp->tx_starts.value.ul = statsp->tx_starts; 383 tdc_kstatsp->tx_no_desc.value.ul = statsp->tx_no_desc; 384 tdc_kstatsp->tx_dma_bind_fail.value.ul = statsp->tx_dma_bind_fail; 385 386 tdc_kstatsp->count_hdr_size_err.value.ul = 387 statsp->count_hdr_size_err; 388 tdc_kstatsp->count_runt.value.ul = statsp->count_runt; 389 tdc_kstatsp->count_abort.value.ul = statsp->count_abort; 390 tdc_kstatsp->tx_marks.value.ul = statsp->tx_marks; 391 392 HXGE_DEBUG_MSG((hxgep, KST_CTL, " <== hxge_tdc_stat_update")); 393 return (0); 394 } 395 396 /* ARGSUSED */ 397 int 398 hxge_tdc_sys_stat_update(kstat_t *ksp, int rw) 399 { 400 p_hxge_t hxgep; 401 p_hxge_tdc_sys_kstat_t tdc_sys_kstatsp; 402 p_hxge_tdc_sys_stats_t statsp; 403 404 hxgep = (p_hxge_t)ksp->ks_private; 405 if (hxgep == NULL) 406 return (-1); 407 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_tdc_sys_stat_update")); 408 409 tdc_sys_kstatsp = (p_hxge_tdc_sys_kstat_t)ksp->ks_data; 410 statsp = (p_hxge_tdc_sys_stats_t)&hxgep->statsp->tdc_sys_stats; 411 412 HXGE_DEBUG_MSG((hxgep, KST_CTL, "hxge_tdc_sys_stat_update %llx", 413 ksp->ks_data)); 414 415 tdc_sys_kstatsp->reord_tbl_par_err.value.ul = 416 statsp->reord_tbl_par_err; 417 tdc_sys_kstatsp->reord_buf_ded_err.value.ul = 418 statsp->reord_buf_ded_err; 419 tdc_sys_kstatsp->reord_buf_sec_err.value.ul = 420 statsp->reord_buf_sec_err; 421 422 HXGE_DEBUG_MSG((hxgep, KST_CTL, " <== hxge_tdc_sys_stat_update")); 423 return (0); 424 } 425 426 /* ARGSUSED */ 427 int 428 hxge_rdc_stat_update(kstat_t *ksp, int rw) 429 { 430 p_hxge_t hxgep; 431 p_hxge_rdc_kstat_t rdc_kstatsp; 432 p_hxge_rx_ring_stats_t statsp; 433 int channel; 434 char *ch_name, *end; 435 436 hxgep = (p_hxge_t)ksp->ks_private; 437 if (hxgep == NULL) 438 return (-1); 439 440 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_rdc_stat_update")); 441 442 ch_name = ksp->ks_name; 443 ch_name += strlen(RDC_NAME_FORMAT1); 444 channel = mi_strtol(ch_name, &end, 10); 445 446 rdc_kstatsp = (p_hxge_rdc_kstat_t)ksp->ks_data; 447 statsp = (p_hxge_rx_ring_stats_t)&hxgep->statsp->rdc_stats[channel]; 448 449 HXGE_DEBUG_MSG((hxgep, KST_CTL, 450 "hxge_rdc_stat_update $%p statsp $%p channel %d", 451 ksp->ks_data, statsp, channel)); 452 453 rdc_kstatsp->ipackets.value.ull = statsp->ipackets; 454 rdc_kstatsp->rbytes.value.ull = statsp->ibytes; 455 rdc_kstatsp->jumbo_pkts.value.ul = statsp->jumbo_pkts; 456 rdc_kstatsp->rcr_unknown_err.value.ul = statsp->rcr_unknown_err; 457 rdc_kstatsp->errors.value.ul = statsp->ierrors; 458 rdc_kstatsp->rcr_sha_par_err.value.ul = statsp->rcr_sha_par; 459 rdc_kstatsp->rbr_pre_par_err.value.ul = statsp->rbr_pre_par; 460 rdc_kstatsp->rbr_pre_emty.value.ul = statsp->rbr_pre_empty; 461 rdc_kstatsp->rcr_shadow_full.value.ul = statsp->rcr_shadow_full; 462 rdc_kstatsp->rbr_tmout.value.ul = statsp->rbr_tmout; 463 rdc_kstatsp->peu_resp_err.value.ul = statsp->peu_resp_err; 464 rdc_kstatsp->ctrl_fifo_ecc_err.value.ul = statsp->ctrl_fifo_ecc_err; 465 rdc_kstatsp->data_fifo_ecc_err.value.ul = statsp->data_fifo_ecc_err; 466 rdc_kstatsp->rcrfull.value.ul = statsp->rcrfull; 467 rdc_kstatsp->rbr_empty.value.ul = statsp->rbr_empty; 468 rdc_kstatsp->rbrfull.value.ul = statsp->rbrfull; 469 rdc_kstatsp->rcr_to.value.ul = statsp->rcr_to; 470 rdc_kstatsp->rcr_thresh.value.ul = statsp->rcr_thres; 471 472 HXGE_DEBUG_MSG((hxgep, KST_CTL, " <== hxge_rdc_stat_update")); 473 return (0); 474 } 475 476 /* ARGSUSED */ 477 int 478 hxge_rdc_sys_stat_update(kstat_t *ksp, int rw) 479 { 480 p_hxge_t hxgep; 481 p_hxge_rdc_sys_kstat_t rdc_sys_kstatsp; 482 p_hxge_rdc_sys_stats_t statsp; 483 484 hxgep = (p_hxge_t)ksp->ks_private; 485 if (hxgep == NULL) 486 return (-1); 487 488 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_rdc_sys_stat_update")); 489 490 rdc_sys_kstatsp = (p_hxge_rdc_sys_kstat_t)ksp->ks_data; 491 statsp = (p_hxge_rdc_sys_stats_t)&hxgep->statsp->rdc_sys_stats; 492 493 HXGE_DEBUG_MSG((hxgep, KST_CTL, "hxge_rdc_sys_stat_update %llx", 494 ksp->ks_data)); 495 496 rdc_sys_kstatsp->ctrl_fifo_sec.value.ul = statsp->ctrl_fifo_sec; 497 rdc_sys_kstatsp->ctrl_fifo_ded.value.ul = statsp->ctrl_fifo_ded; 498 rdc_sys_kstatsp->data_fifo_sec.value.ul = statsp->data_fifo_sec; 499 rdc_sys_kstatsp->data_fifo_ded.value.ul = statsp->data_fifo_ded; 500 501 HXGE_DEBUG_MSG((hxgep, KST_CTL, " <== hxge_rdc_sys_stat_update")); 502 return (0); 503 } 504 505 /* ARGSUSED */ 506 int 507 hxge_vmac_stat_update(kstat_t *ksp, int rw) 508 { 509 p_hxge_t hxgep; 510 p_hxge_vmac_kstat_t vmac_kstatsp; 511 p_hxge_vmac_stats_t statsp; 512 513 hxgep = (p_hxge_t)ksp->ks_private; 514 if (hxgep == NULL) 515 return (-1); 516 517 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_vmac_stat_update")); 518 519 hxge_save_cntrs(hxgep); 520 521 vmac_kstatsp = (p_hxge_vmac_kstat_t)ksp->ks_data; 522 statsp = (p_hxge_vmac_stats_t)&hxgep->statsp->vmac_stats; 523 524 vmac_kstatsp->tx_frame_cnt.value.ul = statsp->tx_frame_cnt; 525 vmac_kstatsp->tx_byte_cnt.value.ul = statsp->tx_byte_cnt; 526 527 vmac_kstatsp->rx_frame_cnt.value.ul = statsp->rx_frame_cnt; 528 vmac_kstatsp->rx_byte_cnt.value.ul = statsp->rx_byte_cnt; 529 vmac_kstatsp->rx_drop_frame_cnt.value.ul = statsp->rx_drop_frame_cnt; 530 vmac_kstatsp->rx_drop_byte_cnt.value.ul = statsp->rx_drop_byte_cnt; 531 vmac_kstatsp->rx_crc_cnt.value.ul = statsp->rx_crc_cnt; 532 vmac_kstatsp->rx_pause_cnt.value.ul = statsp->rx_pause_cnt; 533 vmac_kstatsp->rx_bcast_fr_cnt.value.ul = statsp->rx_bcast_fr_cnt; 534 vmac_kstatsp->rx_mcast_fr_cnt.value.ul = statsp->rx_mcast_fr_cnt; 535 536 HXGE_DEBUG_MSG((hxgep, KST_CTL, "<== hxge_vmac_stat_update")); 537 return (0); 538 } 539 540 /* ARGSUSED */ 541 int 542 hxge_pfc_stat_update(kstat_t *ksp, int rw) 543 { 544 p_hxge_t hxgep; 545 p_hxge_pfc_kstat_t kstatsp; 546 p_hxge_pfc_stats_t statsp; 547 548 hxgep = (p_hxge_t)ksp->ks_private; 549 if (hxgep == NULL) 550 return (-1); 551 552 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_pfc_stat_update")); 553 554 kstatsp = (p_hxge_pfc_kstat_t)ksp->ks_data; 555 statsp = (p_hxge_pfc_stats_t)&hxgep->statsp->pfc_stats; 556 557 kstatsp->pfc_pkt_drop.value.ul = statsp->pkt_drop; 558 kstatsp->pfc_tcam_parity_err.value.ul = statsp->tcam_parity_err; 559 kstatsp->pfc_vlan_parity_err.value.ul = statsp->vlan_parity_err; 560 kstatsp->pfc_bad_cs_count.value.ul = statsp->bad_cs_count; 561 kstatsp->pfc_drop_count.value.ul = statsp->drop_count; 562 kstatsp->pfc_tcp_ctrl_drop.value.ul = statsp->errlog.tcp_ctrl_drop; 563 kstatsp->pfc_l2_addr_drop.value.ul = statsp->errlog.l2_addr_drop; 564 kstatsp->pfc_class_code_drop.value.ul = statsp->errlog.class_code_drop; 565 kstatsp->pfc_tcam_drop.value.ul = statsp->errlog.tcam_drop; 566 kstatsp->pfc_vlan_drop.value.ul = statsp->errlog.vlan_drop; 567 568 HXGE_DEBUG_MSG((hxgep, KST_CTL, "<== hxge_pfc_stat_update")); 569 return (0); 570 } 571 572 static uint64_t 573 hxge_mac_octet_to_u64(struct ether_addr addr) 574 { 575 int i; 576 uint64_t addr64 = 0; 577 578 for (i = ETHERADDRL - 1; i >= 0; i--) { 579 addr64 <<= 8; 580 addr64 |= addr.ether_addr_octet[i]; 581 } 582 return (addr64); 583 } 584 585 /* ARGSUSED */ 586 int 587 hxge_mmac_stat_update(kstat_t *ksp, int rw) 588 { 589 p_hxge_t hxgep; 590 p_hxge_mmac_kstat_t mmac_kstatsp; 591 p_hxge_mmac_stats_t statsp; 592 593 hxgep = (p_hxge_t)ksp->ks_private; 594 if (hxgep == NULL) 595 return (-1); 596 597 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_mmac_stat_update")); 598 599 mmac_kstatsp = (p_hxge_mmac_kstat_t)ksp->ks_data; 600 statsp = (p_hxge_mmac_stats_t)&hxgep->statsp->mmac_stats; 601 602 mmac_kstatsp->mmac_max_addr_cnt.value.ul = statsp->mmac_max_cnt; 603 mmac_kstatsp->mmac_avail_addr_cnt.value.ul = statsp->mmac_avail_cnt; 604 mmac_kstatsp->mmac_addr1.value.ul = 605 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[0]); 606 mmac_kstatsp->mmac_addr2.value.ul = 607 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[1]); 608 mmac_kstatsp->mmac_addr3.value.ul = 609 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[2]); 610 mmac_kstatsp->mmac_addr4.value.ul = 611 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[3]); 612 mmac_kstatsp->mmac_addr5.value.ul = 613 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[4]); 614 mmac_kstatsp->mmac_addr6.value.ul = 615 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[5]); 616 mmac_kstatsp->mmac_addr7.value.ul = 617 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[6]); 618 mmac_kstatsp->mmac_addr8.value.ul = 619 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[7]); 620 mmac_kstatsp->mmac_addr9.value.ul = 621 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[8]); 622 mmac_kstatsp->mmac_addr10.value.ul = 623 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[9]); 624 mmac_kstatsp->mmac_addr11.value.ul = 625 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[10]); 626 mmac_kstatsp->mmac_addr12.value.ul = 627 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[11]); 628 mmac_kstatsp->mmac_addr13.value.ul = 629 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[12]); 630 mmac_kstatsp->mmac_addr14.value.ul = 631 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[13]); 632 mmac_kstatsp->mmac_addr15.value.ul = 633 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[14]); 634 mmac_kstatsp->mmac_addr16.value.ul = 635 hxge_mac_octet_to_u64(statsp->mmac_avail_pool[15]); 636 637 HXGE_DEBUG_MSG((hxgep, KST_CTL, "<== hxge_mmac_stat_update")); 638 return (0); 639 } 640 641 /* ARGSUSED */ 642 int 643 hxge_peu_sys_stat_update(kstat_t *ksp, int rw) 644 { 645 p_hxge_t hxgep; 646 p_hxge_peu_sys_kstat_t peu_kstatsp; 647 p_hxge_peu_sys_stats_t statsp; 648 649 hxgep = (p_hxge_t)ksp->ks_private; 650 if (hxgep == NULL) 651 return (-1); 652 653 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_peu_sys_stat_update")); 654 655 peu_kstatsp = (p_hxge_peu_sys_kstat_t)ksp->ks_data; 656 statsp = (p_hxge_peu_sys_stats_t)&hxgep->statsp->peu_sys_stats; 657 658 peu_kstatsp->spc_acc_err.value.ul = statsp->spc_acc_err; 659 peu_kstatsp->tdc_pioacc_err.value.ul = statsp->tdc_pioacc_err; 660 peu_kstatsp->rdc_pioacc_err.value.ul = statsp->rdc_pioacc_err; 661 peu_kstatsp->pfc_pioacc_err.value.ul = statsp->pfc_pioacc_err; 662 peu_kstatsp->vmac_pioacc_err.value.ul = statsp->vmac_pioacc_err; 663 peu_kstatsp->cpl_hdrq_parerr.value.ul = statsp->cpl_hdrq_parerr; 664 peu_kstatsp->cpl_dataq_parerr.value.ul = statsp->cpl_dataq_parerr; 665 peu_kstatsp->retryram_xdlh_parerr.value.ul = 666 statsp->retryram_xdlh_parerr; 667 peu_kstatsp->retrysotram_xdlh_parerr.value.ul = 668 statsp->retrysotram_xdlh_parerr; 669 peu_kstatsp->p_hdrq_parerr.value.ul = statsp->p_hdrq_parerr; 670 peu_kstatsp->p_dataq_parerr.value.ul = statsp->p_dataq_parerr; 671 peu_kstatsp->np_hdrq_parerr.value.ul = statsp->np_hdrq_parerr; 672 peu_kstatsp->np_dataq_parerr.value.ul = statsp->np_dataq_parerr; 673 peu_kstatsp->eic_msix_parerr.value.ul = statsp->eic_msix_parerr; 674 peu_kstatsp->hcr_parerr.value.ul = statsp->hcr_parerr; 675 676 HXGE_DEBUG_MSG((hxgep, KST_CTL, "<== hxge_peu_sys_stat_update")); 677 return (0); 678 } 679 680 static kstat_t * 681 hxge_setup_local_kstat(p_hxge_t hxgep, int instance, char *name, 682 const hxge_kstat_index_t *ksip, size_t count, 683 int (*update) (kstat_t *, int)) 684 { 685 kstat_t *ksp; 686 kstat_named_t *knp; 687 int i; 688 689 ksp = kstat_create(HXGE_DRIVER_NAME, instance, name, "net", 690 KSTAT_TYPE_NAMED, count, 0); 691 if (ksp == NULL) 692 return (NULL); 693 694 ksp->ks_private = (void *) hxgep; 695 ksp->ks_update = update; 696 knp = ksp->ks_data; 697 698 for (i = 0; ksip[i].name != NULL; i++) { 699 kstat_named_init(&knp[i], ksip[i].name, ksip[i].type); 700 } 701 702 kstat_install(ksp); 703 704 return (ksp); 705 } 706 707 void 708 hxge_setup_kstats(p_hxge_t hxgep) 709 { 710 struct kstat *ksp; 711 p_hxge_port_kstat_t hxgekp; 712 size_t hxge_kstat_sz; 713 char stat_name[64]; 714 char mmac_name[64]; 715 int i; 716 717 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_setup_kstats")); 718 719 /* Setup RDC statistics */ 720 for (i = 0; i < hxgep->nrdc; i++) { 721 (void) sprintf(stat_name, "%s"CH_NAME_FORMAT, 722 RDC_NAME_FORMAT1, i); 723 hxgep->statsp->rdc_ksp[i] = hxge_setup_local_kstat(hxgep, 724 hxgep->instance, stat_name, &hxge_rdc_stats[0], 725 RDC_STAT_END, hxge_rdc_stat_update); 726 if (hxgep->statsp->rdc_ksp[i] == NULL) 727 cmn_err(CE_WARN, 728 "kstat_create failed for rdc channel %d", i); 729 } 730 731 /* Setup RDC System statistics */ 732 hxgep->statsp->rdc_sys_ksp = hxge_setup_local_kstat(hxgep, 733 hxgep->instance, "RDC_system", &hxge_rdc_sys_stats[0], 734 RDC_SYS_STAT_END, hxge_rdc_sys_stat_update); 735 if (hxgep->statsp->rdc_sys_ksp == NULL) 736 cmn_err(CE_WARN, "kstat_create failed for rdc_sys_ksp"); 737 738 /* Setup TDC statistics */ 739 for (i = 0; i < hxgep->ntdc; i++) { 740 (void) sprintf(stat_name, "%s"CH_NAME_FORMAT, 741 TDC_NAME_FORMAT1, i); 742 hxgep->statsp->tdc_ksp[i] = hxge_setup_local_kstat(hxgep, 743 hxgep->instance, stat_name, &hxge_tdc_stats[0], 744 TDC_STAT_END, hxge_tdc_stat_update); 745 if (hxgep->statsp->tdc_ksp[i] == NULL) 746 cmn_err(CE_WARN, 747 "kstat_create failed for tdc channel %d", i); 748 } 749 750 /* Setup TDC System statistics */ 751 hxgep->statsp->tdc_sys_ksp = hxge_setup_local_kstat(hxgep, 752 hxgep->instance, "TDC_system", &hxge_tdc_sys_stats[0], 753 RDC_SYS_STAT_END, hxge_tdc_sys_stat_update); 754 if (hxgep->statsp->tdc_sys_ksp == NULL) 755 cmn_err(CE_WARN, "kstat_create failed for tdc_sys_ksp"); 756 757 /* Setup PFC statistics */ 758 hxgep->statsp->pfc_ksp = hxge_setup_local_kstat(hxgep, 759 hxgep->instance, "PFC", &hxge_pfc_stats[0], 760 PFC_STAT_END, hxge_pfc_stat_update); 761 if (hxgep->statsp->pfc_ksp == NULL) 762 cmn_err(CE_WARN, "kstat_create failed for pfc"); 763 764 /* Setup VMAC statistics */ 765 hxgep->statsp->vmac_ksp = hxge_setup_local_kstat(hxgep, 766 hxgep->instance, "VMAC", &hxge_vmac_stats[0], 767 VMAC_STAT_END, hxge_vmac_stat_update); 768 if (hxgep->statsp->vmac_ksp == NULL) 769 cmn_err(CE_WARN, "kstat_create failed for vmac"); 770 771 /* Setup MMAC statistics */ 772 (void) sprintf(mmac_name, "MMAC Stats%d", hxgep->instance); 773 hxgep->statsp->mmac_ksp = hxge_setup_local_kstat(hxgep, 774 hxgep->instance, "MMAC", 775 &hxge_mmac_stats[0], MMAC_STATS_END, hxge_mmac_stat_update); 776 if (hxgep->statsp->mmac_ksp == NULL) 777 cmn_err(CE_WARN, "kstat_create failed for mmac"); 778 779 /* Setup PEU System statistics */ 780 hxgep->statsp->peu_sys_ksp = hxge_setup_local_kstat(hxgep, 781 hxgep->instance, "PEU", &hxge_peu_sys_stats[0], 782 PEU_SYS_STAT_END, hxge_peu_sys_stat_update); 783 if (hxgep->statsp->peu_sys_ksp == NULL) 784 cmn_err(CE_WARN, "kstat_create failed for peu sys"); 785 786 /* Port stats */ 787 hxge_kstat_sz = sizeof (hxge_port_kstat_t); 788 789 if ((ksp = kstat_create(HXGE_DRIVER_NAME, hxgep->instance, 790 "Port", "net", KSTAT_TYPE_NAMED, 791 hxge_kstat_sz / sizeof (kstat_named_t), 0)) == NULL) { 792 cmn_err(CE_WARN, "kstat_create failed for port stat"); 793 return; 794 } 795 796 hxgekp = (p_hxge_port_kstat_t)ksp->ks_data; 797 798 kstat_named_init(&hxgekp->cap_10gfdx, "cap_10gfdx", KSTAT_DATA_ULONG); 799 800 /* 801 * Link partner capabilities. 802 */ 803 kstat_named_init(&hxgekp->lp_cap_10gfdx, "lp_cap_10gfdx", 804 KSTAT_DATA_ULONG); 805 806 /* 807 * Shared link setup. 808 */ 809 kstat_named_init(&hxgekp->link_speed, "link_speed", KSTAT_DATA_ULONG); 810 kstat_named_init(&hxgekp->link_duplex, "link_duplex", KSTAT_DATA_CHAR); 811 kstat_named_init(&hxgekp->link_up, "link_up", KSTAT_DATA_ULONG); 812 813 /* 814 * Loopback statistics. 815 */ 816 kstat_named_init(&hxgekp->lb_mode, "lb_mode", KSTAT_DATA_ULONG); 817 818 /* General MAC statistics */ 819 820 kstat_named_init(&hxgekp->ifspeed, "ifspeed", KSTAT_DATA_UINT64); 821 kstat_named_init(&hxgekp->promisc, "promisc", KSTAT_DATA_CHAR); 822 823 ksp->ks_update = hxge_port_kstat_update; 824 ksp->ks_private = (void *) hxgep; 825 kstat_install(ksp); 826 hxgep->statsp->port_ksp = ksp; 827 HXGE_DEBUG_MSG((hxgep, KST_CTL, "<== hxge_setup_kstats")); 828 } 829 830 void 831 hxge_destroy_kstats(p_hxge_t hxgep) 832 { 833 int channel; 834 p_hxge_dma_pt_cfg_t p_dma_cfgp; 835 p_hxge_hw_pt_cfg_t p_cfgp; 836 837 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_destroy_kstats")); 838 if (hxgep->statsp == NULL) 839 return; 840 841 if (hxgep->statsp->ksp) 842 kstat_delete(hxgep->statsp->ksp); 843 844 p_dma_cfgp = (p_hxge_dma_pt_cfg_t)&hxgep->pt_config; 845 p_cfgp = (p_hxge_hw_pt_cfg_t)&p_dma_cfgp->hw_config; 846 847 for (channel = 0; channel < p_cfgp->max_rdcs; channel++) { 848 if (hxgep->statsp->rdc_ksp[channel]) { 849 kstat_delete(hxgep->statsp->rdc_ksp[channel]); 850 } 851 } 852 853 for (channel = 0; channel < p_cfgp->max_tdcs; channel++) { 854 if (hxgep->statsp->tdc_ksp[channel]) { 855 kstat_delete(hxgep->statsp->tdc_ksp[channel]); 856 } 857 } 858 859 if (hxgep->statsp->rdc_sys_ksp) 860 kstat_delete(hxgep->statsp->rdc_sys_ksp); 861 862 if (hxgep->statsp->tdc_sys_ksp) 863 kstat_delete(hxgep->statsp->tdc_sys_ksp); 864 865 if (hxgep->statsp->peu_sys_ksp) 866 kstat_delete(hxgep->statsp->peu_sys_ksp); 867 868 if (hxgep->statsp->mmac_ksp) 869 kstat_delete(hxgep->statsp->mmac_ksp); 870 871 if (hxgep->statsp->pfc_ksp) 872 kstat_delete(hxgep->statsp->pfc_ksp); 873 874 if (hxgep->statsp->vmac_ksp) 875 kstat_delete(hxgep->statsp->vmac_ksp); 876 877 if (hxgep->statsp->port_ksp) 878 kstat_delete(hxgep->statsp->port_ksp); 879 880 if (hxgep->statsp) 881 KMEM_FREE(hxgep->statsp, hxgep->statsp->stats_size); 882 883 HXGE_DEBUG_MSG((hxgep, KST_CTL, "<== hxge_destroy_kstats")); 884 } 885 886 /* ARGSUSED */ 887 int 888 hxge_port_kstat_update(kstat_t *ksp, int rw) 889 { 890 p_hxge_t hxgep; 891 p_hxge_stats_t statsp; 892 p_hxge_port_kstat_t hxgekp; 893 p_hxge_port_stats_t psp; 894 895 hxgep = (p_hxge_t)ksp->ks_private; 896 if (hxgep == NULL) 897 return (-1); 898 899 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_port_kstat_update")); 900 statsp = (p_hxge_stats_t)hxgep->statsp; 901 hxgekp = (p_hxge_port_kstat_t)ksp->ks_data; 902 psp = &statsp->port_stats; 903 904 if (hxgep->filter.all_phys_cnt) 905 (void) strcpy(hxgekp->promisc.value.c, "phys"); 906 else if (hxgep->filter.all_multicast_cnt) 907 (void) strcpy(hxgekp->promisc.value.c, "multi"); 908 else 909 (void) strcpy(hxgekp->promisc.value.c, "off"); 910 hxgekp->ifspeed.value.ul = statsp->mac_stats.link_speed * 1000000ULL; 911 912 /* 913 * transceiver state informations. 914 */ 915 hxgekp->cap_10gfdx.value.ul = statsp->mac_stats.cap_10gfdx; 916 917 /* 918 * Link partner capabilities. 919 */ 920 hxgekp->lp_cap_10gfdx.value.ul = statsp->mac_stats.lp_cap_10gfdx; 921 922 /* 923 * Physical link statistics. 924 */ 925 hxgekp->link_speed.value.ul = statsp->mac_stats.link_speed; 926 if (statsp->mac_stats.link_duplex == 2) 927 (void) strcpy(hxgekp->link_duplex.value.c, "full"); 928 else 929 (void) strcpy(hxgekp->link_duplex.value.c, "unknown"); 930 hxgekp->link_up.value.ul = statsp->mac_stats.link_up; 931 932 /* 933 * Loopback statistics. 934 */ 935 hxgekp->lb_mode.value.ul = psp->lb_mode; 936 937 HXGE_DEBUG_MSG((hxgep, KST_CTL, "<== hxge_port_kstat_update")); 938 return (0); 939 } 940 941 int 942 hxge_m_stat(void *arg, uint_t stat, uint64_t *value) 943 { 944 p_hxge_t hxgep = (p_hxge_t)arg; 945 p_hxge_stats_t statsp; 946 hxge_tx_ring_stats_t *tx_stats; 947 uint64_t val = 0; 948 int channel; 949 950 HXGE_DEBUG_MSG((hxgep, KST_CTL, "==> hxge_m_stat")); 951 statsp = (p_hxge_stats_t)hxgep->statsp; 952 953 switch (stat) { 954 case MAC_STAT_IFSPEED: 955 val = statsp->mac_stats.link_speed * 1000000ull; 956 break; 957 958 case MAC_STAT_MULTIRCV: 959 val = 0; 960 break; 961 962 case MAC_STAT_BRDCSTRCV: 963 val = 0; 964 break; 965 966 case MAC_STAT_MULTIXMT: 967 val = 0; 968 break; 969 970 case MAC_STAT_BRDCSTXMT: 971 val = 0; 972 break; 973 974 case MAC_STAT_NORCVBUF: 975 val = 0; 976 break; 977 978 case MAC_STAT_IERRORS: 979 case ETHER_STAT_MACRCV_ERRORS: 980 val = 0; 981 for (channel = 0; channel < hxgep->nrdc; channel++) { 982 val += statsp->rdc_stats[channel].ierrors; 983 } 984 break; 985 986 case MAC_STAT_NOXMTBUF: 987 val = 0; 988 break; 989 990 case MAC_STAT_OERRORS: 991 for (channel = 0; channel < hxgep->ntdc; channel++) { 992 val += statsp->tdc_stats[channel].oerrors; 993 } 994 break; 995 996 case MAC_STAT_COLLISIONS: 997 val = 0; 998 break; 999 1000 case MAC_STAT_RBYTES: 1001 for (channel = 0; channel < hxgep->nrdc; channel++) { 1002 val += statsp->rdc_stats[channel].ibytes; 1003 } 1004 break; 1005 1006 case MAC_STAT_IPACKETS: 1007 for (channel = 0; channel < hxgep->nrdc; channel++) { 1008 val += statsp->rdc_stats[channel].ipackets; 1009 } 1010 break; 1011 1012 case MAC_STAT_OBYTES: 1013 for (channel = 0; channel < hxgep->ntdc; channel++) { 1014 val += statsp->tdc_stats[channel].obytes; 1015 } 1016 break; 1017 1018 case MAC_STAT_OPACKETS: 1019 for (channel = 0; channel < hxgep->ntdc; channel++) { 1020 val += statsp->tdc_stats[channel].opackets; 1021 } 1022 break; 1023 1024 case MAC_STAT_UNKNOWNS: 1025 val = 0; 1026 break; 1027 1028 case MAC_STAT_UNDERFLOWS: 1029 val = 0; 1030 break; 1031 1032 case MAC_STAT_OVERFLOWS: 1033 val = 0; 1034 break; 1035 1036 case MAC_STAT_LINK_STATE: 1037 val = statsp->mac_stats.link_duplex; 1038 break; 1039 case MAC_STAT_LINK_UP: 1040 val = statsp->mac_stats.link_up; 1041 break; 1042 case MAC_STAT_PROMISC: 1043 val = statsp->mac_stats.promisc; 1044 break; 1045 case ETHER_STAT_SQE_ERRORS: 1046 val = 0; 1047 break; 1048 1049 case ETHER_STAT_ALIGN_ERRORS: 1050 /* 1051 * No similar error in Hydra receive channels 1052 */ 1053 val = 0; 1054 break; 1055 1056 case ETHER_STAT_FCS_ERRORS: 1057 /* 1058 * No similar error in Hydra receive channels 1059 */ 1060 val = 0; 1061 break; 1062 1063 case ETHER_STAT_FIRST_COLLISIONS: 1064 val = 0; 1065 break; 1066 1067 case ETHER_STAT_MULTI_COLLISIONS: 1068 val = 0; 1069 break; 1070 1071 case ETHER_STAT_TX_LATE_COLLISIONS: 1072 val = 0; 1073 break; 1074 1075 case ETHER_STAT_EX_COLLISIONS: 1076 val = 0; 1077 break; 1078 1079 case ETHER_STAT_DEFER_XMTS: 1080 val = 0; 1081 break; 1082 1083 case ETHER_STAT_MACXMT_ERRORS: 1084 /* 1085 * A count of frames for which transmission on a 1086 * particular interface fails due to an internal 1087 * MAC sublayer transmit error 1088 */ 1089 for (channel = 0; channel < hxgep->ntdc; channel++) { 1090 tx_stats = &statsp->tdc_stats[channel]; 1091 val += tx_stats->pkt_size_hdr_err + 1092 tx_stats->pkt_size_err + 1093 tx_stats->tx_rng_oflow + 1094 tx_stats->peu_resp_err + 1095 tx_stats->runt_pkt_drop_err + 1096 tx_stats->pref_par_err + 1097 tx_stats->tdr_pref_cpl_to + 1098 tx_stats->pkt_cpl_to + 1099 tx_stats->invalid_sop + 1100 tx_stats->unexpected_sop; 1101 } 1102 break; 1103 1104 case ETHER_STAT_CARRIER_ERRORS: 1105 /* 1106 * The number of times that the carrier sense 1107 * condition was lost or never asserted when 1108 * attempting to transmit a frame on a particular interface 1109 */ 1110 for (channel = 0; channel < hxgep->ntdc; channel++) { 1111 tx_stats = &statsp->tdc_stats[channel]; 1112 val += tx_stats->tdr_pref_cpl_to + tx_stats->pkt_cpl_to; 1113 } 1114 break; 1115 1116 case ETHER_STAT_TOOLONG_ERRORS: 1117 /* 1118 * A count of frames received on a particular 1119 * interface that exceed the maximum permitted frame size 1120 */ 1121 for (channel = 0; channel < hxgep->ntdc; channel++) { 1122 tx_stats = &statsp->tdc_stats[channel]; 1123 val += tx_stats->pkt_size_err; 1124 } 1125 break; 1126 1127 case ETHER_STAT_XCVR_ADDR: 1128 val = 0; 1129 break; 1130 case ETHER_STAT_XCVR_ID: 1131 val = 0; 1132 break; 1133 1134 case ETHER_STAT_XCVR_INUSE: 1135 val = 0; 1136 break; 1137 1138 case ETHER_STAT_CAP_1000FDX: 1139 val = 0; 1140 break; 1141 1142 case ETHER_STAT_CAP_1000HDX: 1143 val = 0; 1144 break; 1145 1146 case ETHER_STAT_CAP_100FDX: 1147 val = 0; 1148 break; 1149 1150 case ETHER_STAT_CAP_100HDX: 1151 val = 0; 1152 break; 1153 1154 case ETHER_STAT_CAP_10FDX: 1155 val = 0; 1156 break; 1157 1158 case ETHER_STAT_CAP_10HDX: 1159 val = 0; 1160 break; 1161 1162 case ETHER_STAT_CAP_ASMPAUSE: 1163 val = 0; 1164 break; 1165 1166 case ETHER_STAT_CAP_PAUSE: 1167 val = 0; 1168 break; 1169 1170 case ETHER_STAT_CAP_AUTONEG: 1171 val = 0; 1172 break; 1173 1174 case ETHER_STAT_ADV_CAP_1000FDX: 1175 val = 0; 1176 break; 1177 1178 case ETHER_STAT_ADV_CAP_1000HDX: 1179 val = 0; 1180 break; 1181 1182 case ETHER_STAT_ADV_CAP_100FDX: 1183 val = 0; 1184 break; 1185 1186 case ETHER_STAT_ADV_CAP_100HDX: 1187 val = 0; 1188 break; 1189 1190 case ETHER_STAT_ADV_CAP_10FDX: 1191 val = 0; 1192 break; 1193 1194 case ETHER_STAT_ADV_CAP_10HDX: 1195 val = 0; 1196 break; 1197 1198 case ETHER_STAT_ADV_CAP_ASMPAUSE: 1199 val = 0; 1200 break; 1201 1202 case ETHER_STAT_ADV_CAP_PAUSE: 1203 val = 0; 1204 break; 1205 1206 case ETHER_STAT_ADV_CAP_AUTONEG: 1207 val = 0; 1208 break; 1209 1210 case ETHER_STAT_LP_CAP_1000FDX: 1211 val = 0; 1212 break; 1213 1214 case ETHER_STAT_LP_CAP_1000HDX: 1215 val = 0; 1216 break; 1217 1218 case ETHER_STAT_LP_CAP_100FDX: 1219 val = 0; 1220 break; 1221 1222 case ETHER_STAT_LP_CAP_100HDX: 1223 val = 0; 1224 break; 1225 1226 case ETHER_STAT_LP_CAP_10FDX: 1227 val = 0; 1228 break; 1229 1230 case ETHER_STAT_LP_CAP_10HDX: 1231 val = 0; 1232 break; 1233 1234 case ETHER_STAT_LP_CAP_ASMPAUSE: 1235 val = 0; 1236 break; 1237 1238 case ETHER_STAT_LP_CAP_PAUSE: 1239 val = 0; 1240 break; 1241 1242 case ETHER_STAT_LP_CAP_AUTONEG: 1243 val = 0; 1244 break; 1245 1246 case ETHER_STAT_LINK_ASMPAUSE: 1247 val = 0; 1248 break; 1249 1250 case ETHER_STAT_LINK_PAUSE: 1251 val = 0; 1252 break; 1253 1254 case ETHER_STAT_LINK_AUTONEG: 1255 val = 0; 1256 break; 1257 1258 case ETHER_STAT_LINK_DUPLEX: 1259 val = statsp->mac_stats.link_duplex; 1260 break; 1261 1262 case ETHER_STAT_TOOSHORT_ERRORS: 1263 val = 0; 1264 break; 1265 1266 case ETHER_STAT_CAP_REMFAULT: 1267 val = 0; 1268 break; 1269 1270 case ETHER_STAT_ADV_REMFAULT: 1271 val = 0; 1272 break; 1273 1274 case ETHER_STAT_LP_REMFAULT: 1275 val = 0; 1276 break; 1277 1278 case ETHER_STAT_JABBER_ERRORS: 1279 val = 0; 1280 break; 1281 1282 case ETHER_STAT_CAP_100T4: 1283 val = 0; 1284 break; 1285 1286 case ETHER_STAT_ADV_CAP_100T4: 1287 val = 0; 1288 break; 1289 1290 case ETHER_STAT_LP_CAP_100T4: 1291 val = 0; 1292 break; 1293 1294 default: 1295 /* 1296 * Shouldn't reach here... 1297 */ 1298 cmn_err(CE_WARN, 1299 "hxge_m_stat: unrecognized parameter value = 0x%x", stat); 1300 1301 return (ENOTSUP); 1302 } 1303 *value = val; 1304 return (0); 1305 } 1306