xref: /titanic_44/usr/src/uts/common/io/e1000g/e1000g_rx.c (revision 410c4fb9ef2c1b77143344000d65f79d388900d8)
1 /*
2  * This file is provided under a CDDLv1 license.  When using or
3  * redistributing this file, you may do so under this license.
4  * In redistributing this file this license must be included
5  * and no other modification of this header file is permitted.
6  *
7  * CDDL LICENSE SUMMARY
8  *
9  * Copyright(c) 1999 - 2008 Intel Corporation. All rights reserved.
10  *
11  * The contents of this file are subject to the terms of Version
12  * 1.0 of the Common Development and Distribution License (the "License").
13  *
14  * You should have received a copy of the License with this software.
15  * You can obtain a copy of the License at
16  *	http://www.opensolaris.org/os/licensing.
17  * See the License for the specific language governing permissions
18  * and limitations under the License.
19  */
20 
21 /*
22  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms of the CDDLv1.
24  */
25 
26 #pragma ident	"%Z%%M%	%I%	%E% SMI"
27 
28 /*
29  * **********************************************************************
30  *									*
31  * Module Name:								*
32  *   e1000g_rx.c							*
33  *									*
34  * Abstract:								*
35  *   This file contains some routines that take care of Receive		*
36  *   interrupt and also for the received packets it sends up to		*
37  *   upper layer.							*
38  *   It tries to do a zero copy if free buffers are available in	*
39  *   the pool.								*
40  *									*
41  * **********************************************************************
42  */
43 
44 #include "e1000g_sw.h"
45 #include "e1000g_debug.h"
46 
47 static p_rx_sw_packet_t e1000g_get_buf(e1000g_rx_ring_t *rx_ring);
48 #pragma	inline(e1000g_get_buf)
49 static void e1000g_priv_devi_list_clean();
50 
51 /*
52  * e1000g_rxfree_func - the call-back function to reclaim rx buffer
53  *
54  * This function is called when an mp is freed by the user thru
55  * freeb call (Only for mp constructed through desballoc call)
56  * It returns back the freed buffer to the freelist
57  */
58 void
59 e1000g_rxfree_func(p_rx_sw_packet_t packet)
60 {
61 	struct e1000g *Adapter;
62 	e1000g_rx_ring_t *rx_ring;
63 
64 	rx_ring = (e1000g_rx_ring_t *)packet->rx_ring;
65 	Adapter = rx_ring->adapter;
66 
67 	/*
68 	 * Here the rx recycling processes different rx packets in different
69 	 * threads, so we protect it with RW_READER to ensure it won't block
70 	 * other rx recycling threads.
71 	 */
72 	rw_enter(&e1000g_rx_detach_lock, RW_READER);
73 
74 	if (packet->flag == E1000G_RX_SW_FREE) {
75 		rw_exit(&e1000g_rx_detach_lock);
76 		return;
77 	}
78 
79 	if (packet->flag == E1000G_RX_SW_STOP) {
80 		packet->flag = E1000G_RX_SW_FREE;
81 		rw_exit(&e1000g_rx_detach_lock);
82 
83 		rw_enter(&e1000g_rx_detach_lock, RW_WRITER);
84 		rx_ring->pending_count--;
85 		e1000g_mblks_pending--;
86 
87 		if (rx_ring->pending_count == 0) {
88 			while (rx_ring->pending_list != NULL) {
89 				packet = rx_ring->pending_list;
90 				rx_ring->pending_list =
91 				    rx_ring->pending_list->next;
92 
93 				ASSERT(packet->mp == NULL);
94 				e1000g_free_rx_sw_packet(packet);
95 			}
96 		}
97 
98 		/*
99 		 * If e1000g_force_detach is enabled, we need to clean up
100 		 * the idle priv_dip entries in the private dip list while
101 		 * e1000g_mblks_pending is zero.
102 		 */
103 		if (e1000g_force_detach && (e1000g_mblks_pending == 0))
104 			e1000g_priv_devi_list_clean();
105 		rw_exit(&e1000g_rx_detach_lock);
106 		return;
107 	}
108 
109 	if (packet->flag == E1000G_RX_SW_DETACH) {
110 		packet->flag = E1000G_RX_SW_FREE;
111 		rw_exit(&e1000g_rx_detach_lock);
112 
113 		ASSERT(packet->mp == NULL);
114 		e1000g_free_rx_sw_packet(packet);
115 
116 		/*
117 		 * Here the e1000g_mblks_pending may be modified by different
118 		 * rx recycling threads simultaneously, so we need to protect
119 		 * it with RW_WRITER.
120 		 */
121 		rw_enter(&e1000g_rx_detach_lock, RW_WRITER);
122 		e1000g_mblks_pending--;
123 
124 		/*
125 		 * If e1000g_force_detach is enabled, we need to clean up
126 		 * the idle priv_dip entries in the private dip list while
127 		 * e1000g_mblks_pending is zero.
128 		 */
129 		if (e1000g_force_detach && (e1000g_mblks_pending == 0))
130 			e1000g_priv_devi_list_clean();
131 		rw_exit(&e1000g_rx_detach_lock);
132 		return;
133 	}
134 
135 	packet->flag = E1000G_RX_SW_FREE;
136 
137 	if (packet->mp == NULL) {
138 		/*
139 		 * Allocate a mblk that binds to the data buffer
140 		 */
141 		packet->mp = desballoc((unsigned char *)
142 		    packet->rx_buf->address - E1000G_IPALIGNROOM,
143 		    packet->rx_buf->size + E1000G_IPALIGNROOM,
144 		    BPRI_MED, &packet->free_rtn);
145 
146 		if (packet->mp != NULL) {
147 			packet->mp->b_rptr += E1000G_IPALIGNROOM;
148 			packet->mp->b_wptr += E1000G_IPALIGNROOM;
149 		} else {
150 			E1000G_STAT(rx_ring->stat_esballoc_fail);
151 		}
152 	}
153 
154 	mutex_enter(&rx_ring->freelist_lock);
155 	QUEUE_PUSH_TAIL(&rx_ring->free_list, &packet->Link);
156 	rx_ring->avail_freepkt++;
157 	mutex_exit(&rx_ring->freelist_lock);
158 
159 	rw_exit(&e1000g_rx_detach_lock);
160 }
161 
162 /*
163  * e1000g_priv_devi_list_clean - clean up e1000g_private_devi_list
164  *
165  * We will walk the e1000g_private_devi_list to free the entry marked
166  * with the E1000G_PRIV_DEVI_DETACH flag.
167  */
168 static void
169 e1000g_priv_devi_list_clean()
170 {
171 	private_devi_list_t *devi_node, *devi_del;
172 
173 	if (e1000g_private_devi_list == NULL)
174 		return;
175 
176 	devi_node = e1000g_private_devi_list;
177 	while ((devi_node != NULL) &&
178 	    (devi_node->flag == E1000G_PRIV_DEVI_DETACH)) {
179 		e1000g_private_devi_list = devi_node->next;
180 		kmem_free(devi_node->priv_dip,
181 		    sizeof (struct dev_info));
182 		kmem_free(devi_node,
183 		    sizeof (private_devi_list_t));
184 		devi_node = e1000g_private_devi_list;
185 	}
186 	if (e1000g_private_devi_list == NULL)
187 		return;
188 	while (devi_node->next != NULL) {
189 		if (devi_node->next->flag == E1000G_PRIV_DEVI_DETACH) {
190 			devi_del = devi_node->next;
191 			devi_node->next = devi_del->next;
192 			kmem_free(devi_del->priv_dip,
193 			    sizeof (struct dev_info));
194 			kmem_free(devi_del,
195 			    sizeof (private_devi_list_t));
196 		} else {
197 			devi_node = devi_node->next;
198 		}
199 	}
200 }
201 
202 /*
203  * e1000g_rx_setup - setup rx data structures
204  *
205  * This routine initializes all of the receive related
206  * structures. This includes the receive descriptors, the
207  * actual receive buffers, and the rx_sw_packet software
208  * structures.
209  */
210 void
211 e1000g_rx_setup(struct e1000g *Adapter)
212 {
213 	struct e1000_hw *hw;
214 	p_rx_sw_packet_t packet;
215 	struct e1000_rx_desc *descriptor;
216 	uint32_t buf_low;
217 	uint32_t buf_high;
218 	uint32_t reg_val;
219 	int i;
220 	int size;
221 	e1000g_rx_ring_t *rx_ring;
222 
223 	hw = &Adapter->shared;
224 	rx_ring = Adapter->rx_ring;
225 
226 	/*
227 	 * zero out all of the receive buffer descriptor memory
228 	 * assures any previous data or status is erased
229 	 */
230 	bzero(rx_ring->rbd_area,
231 	    sizeof (struct e1000_rx_desc) * Adapter->rx_desc_num);
232 
233 	if (!Adapter->rx_buffer_setup) {
234 		/* Init the list of "Receive Buffer" */
235 		QUEUE_INIT_LIST(&rx_ring->recv_list);
236 
237 		/* Init the list of "Free Receive Buffer" */
238 		QUEUE_INIT_LIST(&rx_ring->free_list);
239 
240 		/*
241 		 * Setup Receive list and the Free list. Note that
242 		 * the both were allocated in one packet area.
243 		 */
244 		packet = rx_ring->packet_area;
245 		descriptor = rx_ring->rbd_first;
246 
247 		for (i = 0; i < Adapter->rx_desc_num;
248 		    i++, packet = packet->next, descriptor++) {
249 			ASSERT(packet != NULL);
250 			ASSERT(descriptor != NULL);
251 			descriptor->buffer_addr =
252 			    packet->rx_buf->dma_address;
253 
254 			/* Add this rx_sw_packet to the receive list */
255 			QUEUE_PUSH_TAIL(&rx_ring->recv_list,
256 			    &packet->Link);
257 		}
258 
259 		for (i = 0; i < Adapter->rx_freelist_num;
260 		    i++, packet = packet->next) {
261 			ASSERT(packet != NULL);
262 			/* Add this rx_sw_packet to the free list */
263 			QUEUE_PUSH_TAIL(&rx_ring->free_list,
264 			    &packet->Link);
265 		}
266 		rx_ring->avail_freepkt = Adapter->rx_freelist_num;
267 
268 		Adapter->rx_buffer_setup = B_TRUE;
269 	} else {
270 		/* Setup the initial pointer to the first rx descriptor */
271 		packet = (p_rx_sw_packet_t)
272 		    QUEUE_GET_HEAD(&rx_ring->recv_list);
273 		descriptor = rx_ring->rbd_first;
274 
275 		for (i = 0; i < Adapter->rx_desc_num; i++) {
276 			ASSERT(packet != NULL);
277 			ASSERT(descriptor != NULL);
278 			descriptor->buffer_addr =
279 			    packet->rx_buf->dma_address;
280 
281 			/* Get next rx_sw_packet */
282 			packet = (p_rx_sw_packet_t)
283 			    QUEUE_GET_NEXT(&rx_ring->recv_list, &packet->Link);
284 			descriptor++;
285 		}
286 	}
287 
288 	E1000_WRITE_REG(&Adapter->shared, E1000_RDTR, Adapter->rx_intr_delay);
289 	E1000G_DEBUGLOG_1(Adapter, E1000G_INFO_LEVEL,
290 	    "E1000_RDTR: 0x%x\n", Adapter->rx_intr_delay);
291 	if (hw->mac.type >= e1000_82540) {
292 		E1000_WRITE_REG(&Adapter->shared, E1000_RADV,
293 		    Adapter->rx_intr_abs_delay);
294 		E1000G_DEBUGLOG_1(Adapter, E1000G_INFO_LEVEL,
295 		    "E1000_RADV: 0x%x\n", Adapter->rx_intr_abs_delay);
296 	}
297 
298 	/*
299 	 * Setup our descriptor pointers
300 	 */
301 	rx_ring->rbd_next = rx_ring->rbd_first;
302 
303 	size = Adapter->rx_desc_num * sizeof (struct e1000_rx_desc);
304 	E1000_WRITE_REG(hw, E1000_RDLEN, size);
305 	size = E1000_READ_REG(hw, E1000_RDLEN);
306 
307 	/* To get lower order bits */
308 	buf_low = (uint32_t)rx_ring->rbd_dma_addr;
309 	/* To get the higher order bits */
310 	buf_high = (uint32_t)(rx_ring->rbd_dma_addr >> 32);
311 
312 	E1000_WRITE_REG(hw, E1000_RDBAH, buf_high);
313 	E1000_WRITE_REG(hw, E1000_RDBAL, buf_low);
314 
315 	/*
316 	 * Setup our HW Rx Head & Tail descriptor pointers
317 	 */
318 	E1000_WRITE_REG(hw, E1000_RDT,
319 	    (uint32_t)(rx_ring->rbd_last - rx_ring->rbd_first));
320 	E1000_WRITE_REG(hw, E1000_RDH, 0);
321 
322 	/*
323 	 * Setup the Receive Control Register (RCTL), and ENABLE the
324 	 * receiver. The initial configuration is to: Enable the receiver,
325 	 * accept broadcasts, discard bad packets (and long packets),
326 	 * disable VLAN filter checking, set the receive descriptor
327 	 * minimum threshold size to 1/2, and the receive buffer size to
328 	 * 2k.
329 	 */
330 	reg_val = E1000_RCTL_EN |	/* Enable Receive Unit */
331 	    E1000_RCTL_BAM |		/* Accept Broadcast Packets */
332 	    E1000_RCTL_LPE |		/* Large Packet Enable bit */
333 	    (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT) |
334 	    E1000_RCTL_RDMTS_HALF |
335 	    E1000_RCTL_LBM_NO;		/* Loopback Mode = none */
336 
337 	if (Adapter->strip_crc)
338 		reg_val |= E1000_RCTL_SECRC;	/* Strip Ethernet CRC */
339 
340 	if ((hw->mac.max_frame_size > FRAME_SIZE_UPTO_2K) &&
341 	    (hw->mac.max_frame_size <= FRAME_SIZE_UPTO_4K))
342 		reg_val |= E1000_RCTL_SZ_4096 | E1000_RCTL_BSEX;
343 	else if ((hw->mac.max_frame_size > FRAME_SIZE_UPTO_4K) &&
344 	    (hw->mac.max_frame_size <= FRAME_SIZE_UPTO_8K))
345 		reg_val |= E1000_RCTL_SZ_8192 | E1000_RCTL_BSEX;
346 	else if ((hw->mac.max_frame_size > FRAME_SIZE_UPTO_8K) &&
347 	    (hw->mac.max_frame_size <= FRAME_SIZE_UPTO_16K))
348 		reg_val |= E1000_RCTL_SZ_16384 | E1000_RCTL_BSEX;
349 	else
350 		reg_val |= E1000_RCTL_SZ_2048;
351 
352 	if (e1000_tbi_sbp_enabled_82543(hw))
353 		reg_val |= E1000_RCTL_SBP;
354 
355 	/*
356 	 * Enable early receives on supported devices, only takes effect when
357 	 * packet size is equal or larger than the specified value (in 8 byte
358 	 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
359 	 */
360 	if ((hw->mac.type == e1000_82573) || (hw->mac.type == e1000_ich9lan))
361 		E1000_WRITE_REG(hw, E1000_ERT, E1000_ERT_2048);
362 
363 	E1000_WRITE_REG(hw, E1000_RCTL, reg_val);
364 
365 	reg_val =
366 	    E1000_RXCSUM_TUOFL |	/* TCP/UDP checksum offload Enable */
367 	    E1000_RXCSUM_IPOFL;		/* IP checksum offload Enable */
368 
369 	E1000_WRITE_REG(hw, E1000_RXCSUM, reg_val);
370 }
371 
372 /*
373  * e1000g_get_buf - get an rx sw packet from the free_list
374  */
375 static p_rx_sw_packet_t
376 e1000g_get_buf(e1000g_rx_ring_t *rx_ring)
377 {
378 	struct e1000g *Adapter;
379 	p_rx_sw_packet_t packet;
380 
381 	Adapter = rx_ring->adapter;
382 
383 	mutex_enter(&rx_ring->freelist_lock);
384 	packet = (p_rx_sw_packet_t)
385 	    QUEUE_POP_HEAD(&rx_ring->free_list);
386 	if (packet != NULL)
387 		rx_ring->avail_freepkt--;
388 	mutex_exit(&rx_ring->freelist_lock);
389 
390 	return (packet);
391 }
392 
393 /*
394  * e1000g_receive - main receive routine
395  *
396  * This routine will process packets received in an interrupt
397  */
398 mblk_t *
399 e1000g_receive(struct e1000g *Adapter)
400 {
401 	struct e1000_hw *hw;
402 	mblk_t *nmp;
403 	mblk_t *ret_mp;
404 	mblk_t *ret_nmp;
405 	struct e1000_rx_desc *current_desc;
406 	struct e1000_rx_desc *last_desc;
407 	p_rx_sw_packet_t packet;
408 	p_rx_sw_packet_t newpkt;
409 	USHORT length;
410 	uint32_t pkt_count;
411 	uint32_t desc_count;
412 	boolean_t accept_frame;
413 	boolean_t end_of_packet;
414 	boolean_t need_copy;
415 	e1000g_rx_ring_t *rx_ring;
416 	dma_buffer_t *rx_buf;
417 	uint16_t cksumflags;
418 
419 	ret_mp = NULL;
420 	ret_nmp = NULL;
421 	pkt_count = 0;
422 	desc_count = 0;
423 	cksumflags = 0;
424 
425 	hw = &Adapter->shared;
426 	rx_ring = Adapter->rx_ring;
427 
428 	/* Sync the Rx descriptor DMA buffers */
429 	(void) ddi_dma_sync(rx_ring->rbd_dma_handle,
430 	    0, 0, DDI_DMA_SYNC_FORKERNEL);
431 
432 	if (e1000g_check_dma_handle(rx_ring->rbd_dma_handle) != DDI_FM_OK) {
433 		ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED);
434 		Adapter->chip_state = E1000G_ERROR;
435 	}
436 
437 	current_desc = rx_ring->rbd_next;
438 	if (!(current_desc->status & E1000_RXD_STAT_DD)) {
439 		/*
440 		 * don't send anything up. just clear the RFD
441 		 */
442 		E1000G_DEBUG_STAT(rx_ring->stat_none);
443 		return (ret_mp);
444 	}
445 
446 	/*
447 	 * Loop through the receive descriptors starting at the last known
448 	 * descriptor owned by the hardware that begins a packet.
449 	 */
450 	while ((current_desc->status & E1000_RXD_STAT_DD) &&
451 	    (pkt_count < Adapter->rx_limit_onintr)) {
452 
453 		desc_count++;
454 		/*
455 		 * Now this can happen in Jumbo frame situation.
456 		 */
457 		if (current_desc->status & E1000_RXD_STAT_EOP) {
458 			/* packet has EOP set */
459 			end_of_packet = B_TRUE;
460 		} else {
461 			/*
462 			 * If this received buffer does not have the
463 			 * End-Of-Packet bit set, the received packet
464 			 * will consume multiple buffers. We won't send this
465 			 * packet upstack till we get all the related buffers.
466 			 */
467 			end_of_packet = B_FALSE;
468 		}
469 
470 		/*
471 		 * Get a pointer to the actual receive buffer
472 		 * The mp->b_rptr is mapped to The CurrentDescriptor
473 		 * Buffer Address.
474 		 */
475 		packet =
476 		    (p_rx_sw_packet_t)QUEUE_GET_HEAD(&rx_ring->recv_list);
477 		ASSERT(packet != NULL);
478 
479 		rx_buf = packet->rx_buf;
480 
481 		length = current_desc->length;
482 
483 #ifdef __sparc
484 		if (packet->dma_type == USE_DVMA)
485 			dvma_sync(rx_buf->dma_handle, 0,
486 			    DDI_DMA_SYNC_FORKERNEL);
487 		else
488 			(void) ddi_dma_sync(rx_buf->dma_handle,
489 			    E1000G_IPALIGNROOM, length,
490 			    DDI_DMA_SYNC_FORKERNEL);
491 #else
492 		(void) ddi_dma_sync(rx_buf->dma_handle,
493 		    E1000G_IPALIGNROOM, length,
494 		    DDI_DMA_SYNC_FORKERNEL);
495 #endif
496 
497 		if (e1000g_check_dma_handle(
498 		    rx_buf->dma_handle) != DDI_FM_OK) {
499 			ddi_fm_service_impact(Adapter->dip,
500 			    DDI_SERVICE_DEGRADED);
501 			Adapter->chip_state = E1000G_ERROR;
502 		}
503 
504 		accept_frame = (current_desc->errors == 0) ||
505 		    ((current_desc->errors &
506 		    (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) != 0);
507 
508 		if (hw->mac.type == e1000_82543) {
509 			unsigned char last_byte;
510 
511 			last_byte =
512 			    *((unsigned char *)rx_buf->address + length - 1);
513 
514 			if (TBI_ACCEPT(hw,
515 			    current_desc->status, current_desc->errors,
516 			    current_desc->length, last_byte)) {
517 
518 				e1000_tbi_adjust_stats(Adapter,
519 				    length, hw->mac.addr);
520 
521 				length--;
522 				accept_frame = B_TRUE;
523 			} else if (e1000_tbi_sbp_enabled_82543(hw) &&
524 			    (current_desc->errors == E1000_RXD_ERR_CE)) {
525 				accept_frame = B_TRUE;
526 			}
527 		}
528 
529 		/*
530 		 * Indicate the packet to the NOS if it was good.
531 		 * Normally, hardware will discard bad packets for us.
532 		 * Check for the packet to be a valid Ethernet packet
533 		 */
534 		if (!accept_frame) {
535 			/*
536 			 * error in incoming packet, either the packet is not a
537 			 * ethernet size packet, or the packet has an error. In
538 			 * either case, the packet will simply be discarded.
539 			 */
540 			E1000G_DEBUGLOG_0(Adapter, E1000G_INFO_LEVEL,
541 			    "Process Receive Interrupts: Error in Packet\n");
542 
543 			E1000G_STAT(rx_ring->stat_error);
544 			/*
545 			 * Returning here as we are done here. There is
546 			 * no point in waiting for while loop to elapse
547 			 * and the things which were done. More efficient
548 			 * and less error prone...
549 			 */
550 			goto rx_drop;
551 		}
552 
553 		/*
554 		 * If the Ethernet CRC is not stripped by the hardware,
555 		 * we need to strip it before sending it up to the stack.
556 		 */
557 		if (end_of_packet && !Adapter->strip_crc) {
558 			if (length > ETHERFCSL) {
559 				length -= ETHERFCSL;
560 			} else {
561 				/*
562 				 * If the fragment is smaller than the CRC,
563 				 * drop this fragment, do the processing of
564 				 * the end of the packet.
565 				 */
566 				ASSERT(rx_ring->rx_mblk_tail != NULL);
567 				rx_ring->rx_mblk_tail->b_wptr -=
568 				    ETHERFCSL - length;
569 				rx_ring->rx_mblk_len -=
570 				    ETHERFCSL - length;
571 
572 				QUEUE_POP_HEAD(&rx_ring->recv_list);
573 
574 				goto rx_end_of_packet;
575 			}
576 		}
577 
578 		need_copy = B_TRUE;
579 
580 		if (length <= Adapter->rx_bcopy_thresh)
581 			goto rx_copy;
582 
583 		/*
584 		 * Get the pre-constructed mblk that was associated
585 		 * to the receive data buffer.
586 		 */
587 		if (packet->mp == NULL) {
588 			packet->mp = desballoc((unsigned char *)
589 			    rx_buf->address - E1000G_IPALIGNROOM,
590 			    length + E1000G_IPALIGNROOM,
591 			    BPRI_MED, &packet->free_rtn);
592 
593 			if (packet->mp != NULL) {
594 				packet->mp->b_rptr += E1000G_IPALIGNROOM;
595 				packet->mp->b_wptr += E1000G_IPALIGNROOM;
596 			} else {
597 				E1000G_STAT(rx_ring->stat_esballoc_fail);
598 			}
599 		}
600 
601 		if (packet->mp != NULL) {
602 			/*
603 			 * We have two sets of buffer pool. One associated with
604 			 * the Rxdescriptors and other a freelist buffer pool.
605 			 * Each time we get a good packet, Try to get a buffer
606 			 * from the freelist pool using e1000g_get_buf. If we
607 			 * get free buffer, then replace the descriptor buffer
608 			 * address with the free buffer we just got, and pass
609 			 * the pre-constructed mblk upstack. (note no copying)
610 			 *
611 			 * If we failed to get a free buffer, then try to
612 			 * allocate a new buffer(mp) and copy the recv buffer
613 			 * content to our newly allocated buffer(mp). Don't
614 			 * disturb the desriptor buffer address. (note copying)
615 			 */
616 			newpkt = e1000g_get_buf(rx_ring);
617 
618 			if (newpkt != NULL) {
619 				/*
620 				 * Get the mblk associated to the data,
621 				 * and strip it off the sw packet.
622 				 */
623 				nmp = packet->mp;
624 				packet->mp = NULL;
625 				packet->flag = E1000G_RX_SW_SENDUP;
626 
627 				/*
628 				 * Now replace old buffer with the new
629 				 * one we got from free list
630 				 * Both the RxSwPacket as well as the
631 				 * Receive Buffer Descriptor will now
632 				 * point to this new packet.
633 				 */
634 				packet = newpkt;
635 
636 				current_desc->buffer_addr =
637 				    newpkt->rx_buf->dma_address;
638 
639 				need_copy = B_FALSE;
640 			} else {
641 				E1000G_DEBUG_STAT(rx_ring->stat_no_freepkt);
642 			}
643 		}
644 
645 rx_copy:
646 		if (need_copy) {
647 			/*
648 			 * No buffers available on free list,
649 			 * bcopy the data from the buffer and
650 			 * keep the original buffer. Dont want to
651 			 * do this.. Yack but no other way
652 			 */
653 			if ((nmp = allocb(length + E1000G_IPALIGNROOM,
654 			    BPRI_MED)) == NULL) {
655 				/*
656 				 * The system has no buffers available
657 				 * to send up the incoming packet, hence
658 				 * the packet will have to be processed
659 				 * when there're more buffers available.
660 				 */
661 				E1000G_STAT(rx_ring->stat_allocb_fail);
662 				goto rx_drop;
663 			}
664 			nmp->b_rptr += E1000G_IPALIGNROOM;
665 			nmp->b_wptr += E1000G_IPALIGNROOM;
666 			/*
667 			 * The free list did not have any buffers
668 			 * available, so, the received packet will
669 			 * have to be copied into a mp and the original
670 			 * buffer will have to be retained for future
671 			 * packet reception.
672 			 */
673 			bcopy(rx_buf->address, nmp->b_wptr, length);
674 		}
675 
676 		/*
677 		 * The rx_sw_packet MUST be popped off the
678 		 * RxSwPacketList before either a putnext or freemsg
679 		 * is done on the mp that has now been created by the
680 		 * desballoc. If not, it is possible that the free
681 		 * routine will get called from the interrupt context
682 		 * and try to put this packet on the free list
683 		 */
684 		(p_rx_sw_packet_t)QUEUE_POP_HEAD(&rx_ring->recv_list);
685 
686 		ASSERT(nmp != NULL);
687 		nmp->b_wptr += length;
688 
689 		if (rx_ring->rx_mblk == NULL) {
690 			/*
691 			 *  TCP/UDP checksum offload and
692 			 *  IP checksum offload
693 			 */
694 			if (!(current_desc->status & E1000_RXD_STAT_IXSM)) {
695 				/*
696 				 * Check TCP/UDP checksum
697 				 */
698 				if ((current_desc->status &
699 				    E1000_RXD_STAT_TCPCS) &&
700 				    !(current_desc->errors &
701 				    E1000_RXD_ERR_TCPE))
702 					cksumflags |= HCK_FULLCKSUM |
703 					    HCK_FULLCKSUM_OK;
704 				/*
705 				 * Check IP Checksum
706 				 */
707 				if ((current_desc->status &
708 				    E1000_RXD_STAT_IPCS) &&
709 				    !(current_desc->errors &
710 				    E1000_RXD_ERR_IPE))
711 					cksumflags |= HCK_IPV4_HDRCKSUM;
712 			}
713 		}
714 
715 		/*
716 		 * We need to maintain our packet chain in the global
717 		 * Adapter structure, for the Rx processing can end
718 		 * with a fragment that has no EOP set.
719 		 */
720 		if (rx_ring->rx_mblk == NULL) {
721 			/* Get the head of the message chain */
722 			rx_ring->rx_mblk = nmp;
723 			rx_ring->rx_mblk_tail = nmp;
724 			rx_ring->rx_mblk_len = length;
725 		} else {	/* Not the first packet */
726 			/* Continue adding buffers */
727 			rx_ring->rx_mblk_tail->b_cont = nmp;
728 			rx_ring->rx_mblk_tail = nmp;
729 			rx_ring->rx_mblk_len += length;
730 		}
731 		ASSERT(rx_ring->rx_mblk != NULL);
732 		ASSERT(rx_ring->rx_mblk_tail != NULL);
733 		ASSERT(rx_ring->rx_mblk_tail->b_cont == NULL);
734 
735 		/*
736 		 * Now this MP is ready to travel upwards but some more
737 		 * fragments are coming.
738 		 * We will send packet upwards as soon as we get EOP
739 		 * set on the packet.
740 		 */
741 		if (!end_of_packet) {
742 			/*
743 			 * continue to get the next descriptor,
744 			 * Tail would be advanced at the end
745 			 */
746 			goto rx_next_desc;
747 		}
748 
749 rx_end_of_packet:
750 		/*
751 		 * Found packet with EOP
752 		 * Process the last fragment.
753 		 */
754 		if (cksumflags != 0) {
755 			(void) hcksum_assoc(rx_ring->rx_mblk,
756 			    NULL, NULL, 0, 0, 0, 0, cksumflags, 0);
757 			cksumflags = 0;
758 		}
759 
760 		/*
761 		 * Count packets that span multi-descriptors
762 		 */
763 		E1000G_DEBUG_STAT_COND(rx_ring->stat_multi_desc,
764 		    (rx_ring->rx_mblk->b_cont != NULL));
765 
766 		/*
767 		 * Append to list to send upstream
768 		 */
769 		if (ret_mp == NULL) {
770 			ret_mp = ret_nmp = rx_ring->rx_mblk;
771 		} else {
772 			ret_nmp->b_next = rx_ring->rx_mblk;
773 			ret_nmp = rx_ring->rx_mblk;
774 		}
775 		ret_nmp->b_next = NULL;
776 
777 		rx_ring->rx_mblk = NULL;
778 		rx_ring->rx_mblk_tail = NULL;
779 		rx_ring->rx_mblk_len = 0;
780 
781 		pkt_count++;
782 
783 rx_next_desc:
784 		/*
785 		 * Zero out the receive descriptors status
786 		 */
787 		current_desc->status = 0;
788 
789 		if (current_desc == rx_ring->rbd_last)
790 			rx_ring->rbd_next = rx_ring->rbd_first;
791 		else
792 			rx_ring->rbd_next++;
793 
794 		last_desc = current_desc;
795 		current_desc = rx_ring->rbd_next;
796 
797 		/*
798 		 * Put the buffer that we just indicated back
799 		 * at the end of our list
800 		 */
801 		QUEUE_PUSH_TAIL(&rx_ring->recv_list,
802 		    &packet->Link);
803 	}	/* while loop */
804 
805 	/* Sync the Rx descriptor DMA buffers */
806 	(void) ddi_dma_sync(rx_ring->rbd_dma_handle,
807 	    0, 0, DDI_DMA_SYNC_FORDEV);
808 
809 	/*
810 	 * Advance the E1000's Receive Queue #0 "Tail Pointer".
811 	 */
812 	E1000_WRITE_REG(hw, E1000_RDT,
813 	    (uint32_t)(last_desc - rx_ring->rbd_first));
814 
815 	if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) {
816 		ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED);
817 		Adapter->chip_state = E1000G_ERROR;
818 	}
819 
820 	Adapter->rx_pkt_cnt = pkt_count;
821 
822 	return (ret_mp);
823 
824 rx_drop:
825 	/*
826 	 * Zero out the receive descriptors status
827 	 */
828 	current_desc->status = 0;
829 
830 	/* Sync the Rx descriptor DMA buffers */
831 	(void) ddi_dma_sync(rx_ring->rbd_dma_handle,
832 	    0, 0, DDI_DMA_SYNC_FORDEV);
833 
834 	if (current_desc == rx_ring->rbd_last)
835 		rx_ring->rbd_next = rx_ring->rbd_first;
836 	else
837 		rx_ring->rbd_next++;
838 
839 	last_desc = current_desc;
840 
841 	(p_rx_sw_packet_t)QUEUE_POP_HEAD(&rx_ring->recv_list);
842 
843 	QUEUE_PUSH_TAIL(&rx_ring->recv_list, &packet->Link);
844 	/*
845 	 * Reclaim all old buffers already allocated during
846 	 * Jumbo receives.....for incomplete reception
847 	 */
848 	if (rx_ring->rx_mblk != NULL) {
849 		freemsg(rx_ring->rx_mblk);
850 		rx_ring->rx_mblk = NULL;
851 		rx_ring->rx_mblk_tail = NULL;
852 		rx_ring->rx_mblk_len = 0;
853 	}
854 	/*
855 	 * Advance the E1000's Receive Queue #0 "Tail Pointer".
856 	 */
857 	E1000_WRITE_REG(hw, E1000_RDT,
858 	    (uint32_t)(last_desc - rx_ring->rbd_first));
859 
860 	if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) {
861 		ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_DEGRADED);
862 		Adapter->chip_state = E1000G_ERROR;
863 	}
864 
865 	return (ret_mp);
866 }
867