1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 /* 27 * CPU Device driver. The driver is not DDI-compliant. 28 * 29 * The driver supports following features: 30 * - Power management. 31 */ 32 33 #include <sys/types.h> 34 #include <sys/param.h> 35 #include <sys/errno.h> 36 #include <sys/modctl.h> 37 #include <sys/kmem.h> 38 #include <sys/conf.h> 39 #include <sys/cmn_err.h> 40 #include <sys/stat.h> 41 #include <sys/debug.h> 42 #include <sys/systm.h> 43 #include <sys/ddi.h> 44 #include <sys/sunddi.h> 45 #include <sys/sdt.h> 46 47 #include <sys/machsystm.h> 48 #include <sys/x_call.h> 49 #include <sys/cpudrv_mach.h> 50 #include <sys/msacct.h> 51 52 /* 53 * CPU power management 54 * 55 * The supported power saving model is to slow down the CPU (on SPARC by 56 * dividing the CPU clock and on x86 by dropping down a P-state). 57 * Periodically we determine the amount of time the CPU is running 58 * idle thread and threads in user mode during the last quantum. If the idle 59 * thread was running less than its low water mark for current speed for 60 * number of consecutive sampling periods, or number of running threads in 61 * user mode are above its high water mark, we arrange to go to the higher 62 * speed. If the idle thread was running more than its high water mark without 63 * dropping a number of consecutive times below the mark, and number of threads 64 * running in user mode are below its low water mark, we arrange to go to the 65 * next lower speed. While going down, we go through all the speeds. While 66 * going up we go to the maximum speed to minimize impact on the user, but have 67 * provisions in the driver to go to other speeds. 68 * 69 * The driver does not have knowledge of a particular implementation of this 70 * scheme and will work with all CPUs supporting this model. On SPARC, the 71 * driver determines supported speeds by looking at 'clock-divisors' property 72 * created by OBP. On x86, the driver retrieves the supported speeds from 73 * ACPI. 74 */ 75 76 /* 77 * Configuration function prototypes and data structures 78 */ 79 static int cpudrv_attach(dev_info_t *dip, ddi_attach_cmd_t cmd); 80 static int cpudrv_detach(dev_info_t *dip, ddi_detach_cmd_t cmd); 81 static int cpudrv_power(dev_info_t *dip, int comp, int level); 82 83 struct dev_ops cpudrv_ops = { 84 DEVO_REV, /* rev */ 85 0, /* refcnt */ 86 nodev, /* getinfo */ 87 nulldev, /* identify */ 88 nulldev, /* probe */ 89 cpudrv_attach, /* attach */ 90 cpudrv_detach, /* detach */ 91 nodev, /* reset */ 92 (struct cb_ops *)NULL, /* cb_ops */ 93 (struct bus_ops *)NULL, /* bus_ops */ 94 cpudrv_power /* power */ 95 }; 96 97 static struct modldrv modldrv = { 98 &mod_driverops, /* modops */ 99 "CPU Driver", /* linkinfo */ 100 &cpudrv_ops, /* dev_ops */ 101 }; 102 103 static struct modlinkage modlinkage = { 104 MODREV_1, /* rev */ 105 &modldrv, /* linkage */ 106 NULL 107 }; 108 109 /* 110 * Function prototypes 111 */ 112 static int cpudrv_pm_init_power(cpudrv_devstate_t *cpudsp); 113 static void cpudrv_pm_free(cpudrv_devstate_t *cpudsp); 114 static int cpudrv_pm_comp_create(cpudrv_devstate_t *cpudsp); 115 static void cpudrv_pm_monitor_disp(void *arg); 116 static void cpudrv_pm_monitor(void *arg); 117 118 /* 119 * Driver global variables 120 */ 121 uint_t cpudrv_debug = 0; 122 void *cpudrv_state; 123 static uint_t cpudrv_pm_idle_hwm = CPUDRV_PM_IDLE_HWM; 124 static uint_t cpudrv_pm_idle_lwm = CPUDRV_PM_IDLE_LWM; 125 static uint_t cpudrv_pm_idle_buf_zone = CPUDRV_PM_IDLE_BUF_ZONE; 126 static uint_t cpudrv_pm_idle_bhwm_cnt_max = CPUDRV_PM_IDLE_BHWM_CNT_MAX; 127 static uint_t cpudrv_pm_idle_blwm_cnt_max = CPUDRV_PM_IDLE_BLWM_CNT_MAX; 128 static uint_t cpudrv_pm_user_hwm = CPUDRV_PM_USER_HWM; 129 130 /* 131 * cpudrv_direct_pm allows user applications to directly control the 132 * power state transitions (direct pm) without following the normal 133 * direct pm protocol. This is needed because the normal protocol 134 * requires that a device only be lowered when it is idle, and be 135 * brought up when it request to do so by calling pm_raise_power(). 136 * Ignoring this protocol is harmless for CPU (other than speed). 137 * Moreover it might be the case that CPU is never idle or wants 138 * to be at higher speed because of the addition CPU cycles required 139 * to run the user application. 140 * 141 * The driver will still report idle/busy status to the framework. Although 142 * framework will ignore this information for direct pm devices and not 143 * try to bring them down when idle, user applications can still use this 144 * information if they wants. 145 * 146 * In the future, provide an ioctl to control setting of this mode. In 147 * that case, this variable should move to the state structure and 148 * be protected by the lock in the state structure. 149 */ 150 int cpudrv_direct_pm = 0; 151 152 /* 153 * Arranges for the handler function to be called at the interval suitable 154 * for current speed. 155 */ 156 #define CPUDRV_PM_MONITOR_INIT(cpudsp) { \ 157 if (CPUDRV_PM_POWER_ENABLED(cpudsp)) { \ 158 ASSERT(mutex_owned(&(cpudsp)->lock)); \ 159 (cpudsp)->cpudrv_pm.timeout_id = \ 160 timeout(cpudrv_pm_monitor_disp, \ 161 (cpudsp), (((cpudsp)->cpudrv_pm.cur_spd == NULL) ? \ 162 CPUDRV_PM_QUANT_CNT_OTHR : \ 163 (cpudsp)->cpudrv_pm.cur_spd->quant_cnt)); \ 164 } \ 165 } 166 167 /* 168 * Arranges for the handler function not to be called back. 169 */ 170 #define CPUDRV_PM_MONITOR_FINI(cpudsp) { \ 171 timeout_id_t tmp_tid; \ 172 ASSERT(mutex_owned(&(cpudsp)->lock)); \ 173 tmp_tid = (cpudsp)->cpudrv_pm.timeout_id; \ 174 (cpudsp)->cpudrv_pm.timeout_id = 0; \ 175 mutex_exit(&(cpudsp)->lock); \ 176 if (tmp_tid != 0) { \ 177 (void) untimeout(tmp_tid); \ 178 mutex_enter(&(cpudsp)->cpudrv_pm.timeout_lock); \ 179 while ((cpudsp)->cpudrv_pm.timeout_count != 0) \ 180 cv_wait(&(cpudsp)->cpudrv_pm.timeout_cv, \ 181 &(cpudsp)->cpudrv_pm.timeout_lock); \ 182 mutex_exit(&(cpudsp)->cpudrv_pm.timeout_lock); \ 183 } \ 184 mutex_enter(&(cpudsp)->lock); \ 185 } 186 187 int 188 _init(void) 189 { 190 int error; 191 192 DPRINTF(D_INIT, (" _init: function called\n")); 193 if ((error = ddi_soft_state_init(&cpudrv_state, 194 sizeof (cpudrv_devstate_t), 0)) != 0) { 195 return (error); 196 } 197 198 if ((error = mod_install(&modlinkage)) != 0) { 199 ddi_soft_state_fini(&cpudrv_state); 200 } 201 202 /* 203 * Callbacks used by the PPM driver. 204 */ 205 CPUDRV_PM_SET_PPM_CALLBACKS(); 206 return (error); 207 } 208 209 int 210 _fini(void) 211 { 212 int error; 213 214 DPRINTF(D_FINI, (" _fini: function called\n")); 215 if ((error = mod_remove(&modlinkage)) == 0) { 216 ddi_soft_state_fini(&cpudrv_state); 217 } 218 219 return (error); 220 } 221 222 int 223 _info(struct modinfo *modinfop) 224 { 225 return (mod_info(&modlinkage, modinfop)); 226 } 227 228 /* 229 * Driver attach(9e) entry point. 230 */ 231 static int 232 cpudrv_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) 233 { 234 int instance; 235 cpudrv_devstate_t *cpudsp; 236 extern pri_t maxclsyspri; 237 238 instance = ddi_get_instance(dip); 239 240 switch (cmd) { 241 case DDI_ATTACH: 242 DPRINTF(D_ATTACH, ("cpudrv_attach: instance %d: " 243 "DDI_ATTACH called\n", instance)); 244 if (CPUDRV_PM_DISABLED()) 245 return (DDI_FAILURE); 246 if (ddi_soft_state_zalloc(cpudrv_state, instance) != 247 DDI_SUCCESS) { 248 cmn_err(CE_WARN, "cpudrv_attach: instance %d: " 249 "can't allocate state", instance); 250 CPUDRV_PM_DISABLE(); 251 return (DDI_FAILURE); 252 } 253 if ((cpudsp = ddi_get_soft_state(cpudrv_state, instance)) == 254 NULL) { 255 cmn_err(CE_WARN, "cpudrv_attach: instance %d: " 256 "can't get state", instance); 257 ddi_soft_state_free(cpudrv_state, instance); 258 CPUDRV_PM_DISABLE(); 259 return (DDI_FAILURE); 260 } 261 cpudsp->dip = dip; 262 263 /* 264 * Find CPU number for this dev_info node. 265 */ 266 if (!cpudrv_pm_get_cpu_id(dip, &(cpudsp->cpu_id))) { 267 cmn_err(CE_WARN, "cpudrv_attach: instance %d: " 268 "can't convert dip to cpu_id", instance); 269 ddi_soft_state_free(cpudrv_state, instance); 270 CPUDRV_PM_DISABLE(); 271 return (DDI_FAILURE); 272 } 273 if (!cpudrv_mach_pm_init(cpudsp)) { 274 ddi_soft_state_free(cpudrv_state, instance); 275 CPUDRV_PM_DISABLE(); 276 return (DDI_FAILURE); 277 } 278 mutex_init(&cpudsp->lock, NULL, MUTEX_DRIVER, NULL); 279 if (CPUDRV_PM_POWER_ENABLED(cpudsp)) { 280 if (cpudrv_pm_init_power(cpudsp) != DDI_SUCCESS) { 281 CPUDRV_PM_DISABLE(); 282 cpudrv_pm_free(cpudsp); 283 ddi_soft_state_free(cpudrv_state, instance); 284 return (DDI_FAILURE); 285 } 286 if (cpudrv_pm_comp_create(cpudsp) != DDI_SUCCESS) { 287 CPUDRV_PM_DISABLE(); 288 cpudrv_pm_free(cpudsp); 289 ddi_soft_state_free(cpudrv_state, instance); 290 return (DDI_FAILURE); 291 } 292 if (ddi_prop_update_string(DDI_DEV_T_NONE, 293 dip, "pm-class", "CPU") != DDI_PROP_SUCCESS) { 294 CPUDRV_PM_DISABLE(); 295 cpudrv_pm_free(cpudsp); 296 ddi_soft_state_free(cpudrv_state, instance); 297 return (DDI_FAILURE); 298 } 299 300 /* 301 * Taskq is used to dispatch routine to monitor CPU 302 * activities. 303 */ 304 cpudsp->cpudrv_pm.tq = taskq_create_instance( 305 "cpudrv_pm_monitor", 306 ddi_get_instance(dip), CPUDRV_PM_TASKQ_THREADS, 307 (maxclsyspri - 1), CPUDRV_PM_TASKQ_MIN, 308 CPUDRV_PM_TASKQ_MAX, 309 TASKQ_PREPOPULATE|TASKQ_CPR_SAFE); 310 311 mutex_init(&cpudsp->cpudrv_pm.timeout_lock, NULL, 312 MUTEX_DRIVER, NULL); 313 cv_init(&cpudsp->cpudrv_pm.timeout_cv, NULL, 314 CV_DEFAULT, NULL); 315 316 /* 317 * Driver needs to assume that CPU is running at 318 * unknown speed at DDI_ATTACH and switch it to the 319 * needed speed. We assume that initial needed speed 320 * is full speed for us. 321 */ 322 /* 323 * We need to take the lock because cpudrv_pm_monitor() 324 * will start running in parallel with attach(). 325 */ 326 mutex_enter(&cpudsp->lock); 327 cpudsp->cpudrv_pm.cur_spd = NULL; 328 cpudsp->cpudrv_pm.targ_spd = 329 cpudsp->cpudrv_pm.head_spd; 330 cpudsp->cpudrv_pm.pm_started = B_FALSE; 331 /* 332 * We don't call pm_raise_power() directly from attach 333 * because driver attach for a slave CPU node can 334 * happen before the CPU is even initialized. We just 335 * start the monitoring system which understands 336 * unknown speed and moves CPU to targ_spd when it 337 * have been initialized. 338 */ 339 CPUDRV_PM_MONITOR_INIT(cpudsp); 340 mutex_exit(&cpudsp->lock); 341 342 } 343 344 CPUDRV_PM_INSTALL_MAX_CHANGE_HANDLER(cpudsp, dip); 345 346 ddi_report_dev(dip); 347 return (DDI_SUCCESS); 348 349 case DDI_RESUME: 350 DPRINTF(D_ATTACH, ("cpudrv_attach: instance %d: " 351 "DDI_RESUME called\n", instance)); 352 353 cpudsp = ddi_get_soft_state(cpudrv_state, instance); 354 ASSERT(cpudsp != NULL); 355 356 /* 357 * Nothing to do for resume, if not doing active PM. 358 */ 359 if (!CPUDRV_PM_POWER_ENABLED(cpudsp)) 360 return (DDI_SUCCESS); 361 362 mutex_enter(&cpudsp->lock); 363 /* 364 * Driver needs to assume that CPU is running at unknown speed 365 * at DDI_RESUME and switch it to the needed speed. We assume 366 * that the needed speed is full speed for us. 367 */ 368 cpudsp->cpudrv_pm.cur_spd = NULL; 369 cpudsp->cpudrv_pm.targ_spd = cpudsp->cpudrv_pm.head_spd; 370 CPUDRV_PM_MONITOR_INIT(cpudsp); 371 mutex_exit(&cpudsp->lock); 372 CPUDRV_PM_REDEFINE_TOPSPEED(dip); 373 return (DDI_SUCCESS); 374 375 default: 376 return (DDI_FAILURE); 377 } 378 } 379 380 /* 381 * Driver detach(9e) entry point. 382 */ 383 static int 384 cpudrv_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) 385 { 386 int instance; 387 cpudrv_devstate_t *cpudsp; 388 cpudrv_pm_t *cpupm; 389 390 instance = ddi_get_instance(dip); 391 392 switch (cmd) { 393 case DDI_DETACH: 394 DPRINTF(D_DETACH, ("cpudrv_detach: instance %d: " 395 "DDI_DETACH called\n", instance)); 396 /* 397 * If the only thing supported by the driver is power 398 * management, we can in future enhance the driver and 399 * framework that loads it to unload the driver when 400 * user has disabled CPU power management. 401 */ 402 return (DDI_FAILURE); 403 404 case DDI_SUSPEND: 405 DPRINTF(D_DETACH, ("cpudrv_detach: instance %d: " 406 "DDI_SUSPEND called\n", instance)); 407 408 cpudsp = ddi_get_soft_state(cpudrv_state, instance); 409 ASSERT(cpudsp != NULL); 410 411 /* 412 * Nothing to do for suspend, if not doing active PM. 413 */ 414 if (!CPUDRV_PM_POWER_ENABLED(cpudsp)) 415 return (DDI_SUCCESS); 416 417 /* 418 * During a checkpoint-resume sequence, framework will 419 * stop interrupts to quiesce kernel activity. This will 420 * leave our monitoring system ineffective. Handle this 421 * by stopping our monitoring system and bringing CPU 422 * to full speed. In case we are in special direct pm 423 * mode, we leave the CPU at whatever speed it is. This 424 * is harmless other than speed. 425 */ 426 mutex_enter(&cpudsp->lock); 427 cpupm = &(cpudsp->cpudrv_pm); 428 429 DPRINTF(D_DETACH, ("cpudrv_detach: instance %d: DDI_SUSPEND - " 430 "cur_spd %d, head_spd %d\n", instance, 431 cpupm->cur_spd->pm_level, cpupm->head_spd->pm_level)); 432 433 CPUDRV_PM_MONITOR_FINI(cpudsp); 434 435 if (!cpudrv_direct_pm && (cpupm->cur_spd != cpupm->head_spd)) { 436 if (cpupm->pm_busycnt < 1) { 437 if ((pm_busy_component(dip, CPUDRV_PM_COMP_NUM) 438 == DDI_SUCCESS)) { 439 cpupm->pm_busycnt++; 440 } else { 441 CPUDRV_PM_MONITOR_INIT(cpudsp); 442 mutex_exit(&cpudsp->lock); 443 cmn_err(CE_WARN, "cpudrv_detach: " 444 "instance %d: can't busy CPU " 445 "component", instance); 446 return (DDI_FAILURE); 447 } 448 } 449 mutex_exit(&cpudsp->lock); 450 if (pm_raise_power(dip, CPUDRV_PM_COMP_NUM, 451 cpupm->head_spd->pm_level) != DDI_SUCCESS) { 452 mutex_enter(&cpudsp->lock); 453 CPUDRV_PM_MONITOR_INIT(cpudsp); 454 mutex_exit(&cpudsp->lock); 455 cmn_err(CE_WARN, "cpudrv_detach: instance %d: " 456 "can't raise CPU power level", instance); 457 return (DDI_FAILURE); 458 } else { 459 return (DDI_SUCCESS); 460 } 461 } else { 462 mutex_exit(&cpudsp->lock); 463 return (DDI_SUCCESS); 464 } 465 466 default: 467 return (DDI_FAILURE); 468 } 469 } 470 471 /* 472 * Driver power(9e) entry point. 473 * 474 * Driver's notion of current power is set *only* in power(9e) entry point 475 * after actual power change operation has been successfully completed. 476 */ 477 /* ARGSUSED */ 478 static int 479 cpudrv_power(dev_info_t *dip, int comp, int level) 480 { 481 int instance; 482 cpudrv_devstate_t *cpudsp; 483 cpudrv_pm_t *cpupm; 484 cpudrv_pm_spd_t *new_spd; 485 boolean_t is_ready; 486 int ret; 487 488 instance = ddi_get_instance(dip); 489 490 DPRINTF(D_POWER, ("cpudrv_power: instance %d: level %d\n", 491 instance, level)); 492 if ((cpudsp = ddi_get_soft_state(cpudrv_state, instance)) == NULL) { 493 cmn_err(CE_WARN, "cpudrv_power: instance %d: can't get state", 494 instance); 495 return (DDI_FAILURE); 496 } 497 498 mutex_enter(&cpudsp->lock); 499 cpupm = &(cpudsp->cpudrv_pm); 500 501 /* 502 * In normal operation, we fail if we are busy and request is 503 * to lower the power level. We let this go through if the driver 504 * is in special direct pm mode. On x86, we also let this through 505 * if the change is due to a request to govern the max speed. 506 */ 507 if (!cpudrv_direct_pm && (cpupm->pm_busycnt >= 1) && 508 !cpudrv_pm_is_governor_thread(cpupm)) { 509 if ((cpupm->cur_spd != NULL) && 510 (level < cpupm->cur_spd->pm_level)) { 511 mutex_exit(&cpudsp->lock); 512 return (DDI_FAILURE); 513 } 514 } 515 516 for (new_spd = cpupm->head_spd; new_spd; new_spd = new_spd->down_spd) { 517 if (new_spd->pm_level == level) 518 break; 519 } 520 if (!new_spd) { 521 CPUDRV_PM_RESET_GOVERNOR_THREAD(cpupm); 522 mutex_exit(&cpudsp->lock); 523 cmn_err(CE_WARN, "cpudrv_power: instance %d: " 524 "can't locate new CPU speed", instance); 525 return (DDI_FAILURE); 526 } 527 528 /* 529 * We currently refuse to power manage if the CPU is not ready to 530 * take cross calls (cross calls fail silently if CPU is not ready 531 * for it). 532 * 533 * Additionally, for x86 platforms we cannot power manage 534 * any one instance, until all instances have been initialized. 535 * That's because we don't know what the CPU domains look like 536 * until all instances have been initialized. 537 */ 538 is_ready = CPUDRV_PM_XCALL_IS_READY(cpudsp->cpu_id); 539 if (!is_ready) { 540 DPRINTF(D_POWER, ("cpudrv_power: instance %d: " 541 "CPU not ready for x-calls\n", instance)); 542 } else if (!(is_ready = cpudrv_pm_power_ready())) { 543 DPRINTF(D_POWER, ("cpudrv_power: instance %d: " 544 "waiting for all CPUs to be power manageable\n", instance)); 545 } 546 if (!is_ready) { 547 CPUDRV_PM_RESET_GOVERNOR_THREAD(cpupm); 548 mutex_exit(&cpudsp->lock); 549 return (DDI_FAILURE); 550 } 551 552 /* 553 * Execute CPU specific routine on the requested CPU to change its 554 * speed to normal-speed/divisor. 555 */ 556 if ((ret = cpudrv_pm_change_speed(cpudsp, new_spd)) != DDI_SUCCESS) { 557 cmn_err(CE_WARN, "cpudrv_power: cpudrv_pm_change_speed() " 558 "return = %d", ret); 559 mutex_exit(&cpudsp->lock); 560 return (DDI_FAILURE); 561 } 562 563 /* 564 * DTrace probe point for CPU speed change transition 565 */ 566 DTRACE_PROBE3(cpu__change__speed, cpudrv_devstate_t *, cpudsp, 567 cpudrv_pm_t *, cpupm, cpudrv_pm_spd_t *, new_spd); 568 569 /* 570 * Reset idle threshold time for the new power level. 571 */ 572 if ((cpupm->cur_spd != NULL) && (level < cpupm->cur_spd->pm_level)) { 573 if (pm_idle_component(dip, CPUDRV_PM_COMP_NUM) == 574 DDI_SUCCESS) { 575 if (cpupm->pm_busycnt >= 1) 576 cpupm->pm_busycnt--; 577 } else 578 cmn_err(CE_WARN, "cpudrv_power: instance %d: can't " 579 "idle CPU component", ddi_get_instance(dip)); 580 } 581 /* 582 * Reset various parameters because we are now running at new speed. 583 */ 584 cpupm->lastquan_mstate[CMS_IDLE] = 0; 585 cpupm->lastquan_mstate[CMS_SYSTEM] = 0; 586 cpupm->lastquan_mstate[CMS_USER] = 0; 587 cpupm->lastquan_lbolt = 0; 588 cpupm->cur_spd = new_spd; 589 CPUDRV_PM_RESET_GOVERNOR_THREAD(cpupm); 590 mutex_exit(&cpudsp->lock); 591 592 return (DDI_SUCCESS); 593 } 594 595 /* 596 * Initialize the field that will be used for reporting 597 * the supported_frequencies_Hz cpu_info kstat. 598 */ 599 static void 600 set_supp_freqs(cpu_t *cp, cpudrv_pm_t *cpupm) 601 { 602 char *supp_freqs; 603 char *sfptr; 604 uint64_t *speeds; 605 cpudrv_pm_spd_t *spd; 606 int i; 607 #define UINT64_MAX_STRING (sizeof ("18446744073709551615")) 608 609 speeds = kmem_zalloc(cpupm->num_spd * sizeof (uint64_t), KM_SLEEP); 610 for (i = cpupm->num_spd - 1, spd = cpupm->head_spd; spd; 611 i--, spd = spd->down_spd) { 612 speeds[i] = 613 CPUDRV_PM_SPEED_HZ(cp->cpu_type_info.pi_clock, spd->speed); 614 } 615 616 supp_freqs = kmem_zalloc((UINT64_MAX_STRING * cpupm->num_spd), 617 KM_SLEEP); 618 sfptr = supp_freqs; 619 for (i = 0; i < cpupm->num_spd; i++) { 620 if (i == cpupm->num_spd - 1) { 621 (void) sprintf(sfptr, "%"PRIu64, speeds[i]); 622 } else { 623 (void) sprintf(sfptr, "%"PRIu64":", speeds[i]); 624 sfptr = supp_freqs + strlen(supp_freqs); 625 } 626 } 627 cpu_set_supp_freqs(cp, supp_freqs); 628 kmem_free(supp_freqs, (UINT64_MAX_STRING * cpupm->num_spd)); 629 kmem_free(speeds, cpupm->num_spd * sizeof (uint64_t)); 630 } 631 632 /* 633 * Initialize power management data. 634 */ 635 static int 636 cpudrv_pm_init_power(cpudrv_devstate_t *cpudsp) 637 { 638 cpudrv_pm_t *cpupm = &(cpudsp->cpudrv_pm); 639 cpudrv_pm_spd_t *cur_spd; 640 cpudrv_pm_spd_t *prev_spd = NULL; 641 int *speeds; 642 uint_t nspeeds; 643 int idle_cnt_percent; 644 int user_cnt_percent; 645 int i; 646 647 CPUDRV_PM_GET_SPEEDS(cpudsp, speeds, nspeeds); 648 if (nspeeds < 2) { 649 /* Need at least two speeds to power manage */ 650 CPUDRV_PM_FREE_SPEEDS(speeds, nspeeds); 651 return (DDI_FAILURE); 652 } 653 cpupm->num_spd = nspeeds; 654 655 /* 656 * Calculate the watermarks and other parameters based on the 657 * supplied speeds. 658 * 659 * One of the basic assumption is that for X amount of CPU work, 660 * if CPU is slowed down by a factor of N, the time it takes to 661 * do the same work will be N * X. 662 * 663 * The driver declares that a CPU is idle and ready for slowed down, 664 * if amount of idle thread is more than the current speed idle_hwm 665 * without dropping below idle_hwm a number of consecutive sampling 666 * intervals and number of running threads in user mode are below 667 * user_lwm. We want to set the current user_lwm such that if we 668 * just switched to the next slower speed with no change in real work 669 * load, the amount of user threads at the slower speed will be such 670 * that it falls below the slower speed's user_hwm. If we didn't do 671 * that then we will just come back to the higher speed as soon as we 672 * go down even with no change in work load. 673 * The user_hwm is a fixed precentage and not calculated dynamically. 674 * 675 * We bring the CPU up if idle thread at current speed is less than 676 * the current speed idle_lwm for a number of consecutive sampling 677 * intervals or user threads are above the user_hwm for the current 678 * speed. 679 */ 680 for (i = 0; i < nspeeds; i++) { 681 cur_spd = kmem_zalloc(sizeof (cpudrv_pm_spd_t), KM_SLEEP); 682 cur_spd->speed = speeds[i]; 683 if (i == 0) { /* normal speed */ 684 cpupm->head_spd = cur_spd; 685 cur_spd->quant_cnt = CPUDRV_PM_QUANT_CNT_NORMAL; 686 cur_spd->idle_hwm = 687 (cpudrv_pm_idle_hwm * cur_spd->quant_cnt) / 100; 688 /* can't speed anymore */ 689 cur_spd->idle_lwm = 0; 690 cur_spd->user_hwm = UINT_MAX; 691 } else { 692 cur_spd->quant_cnt = CPUDRV_PM_QUANT_CNT_OTHR; 693 ASSERT(prev_spd != NULL); 694 prev_spd->down_spd = cur_spd; 695 cur_spd->up_spd = cpupm->head_spd; 696 697 /* 698 * Let's assume CPU is considered idle at full speed 699 * when it is spending I% of time in running the idle 700 * thread. At full speed, CPU will be busy (100 - I) % 701 * of times. This % of busyness increases by factor of 702 * N as CPU slows down. CPU that is idle I% of times 703 * in full speed, it is idle (100 - ((100 - I) * N)) % 704 * of times in N speed. The idle_lwm is a fixed 705 * percentage. A large value of N may result in 706 * idle_hwm to go below idle_lwm. We need to make sure 707 * that there is at least a buffer zone seperation 708 * between the idle_lwm and idle_hwm values. 709 */ 710 idle_cnt_percent = CPUDRV_PM_IDLE_CNT_PERCENT( 711 cpudrv_pm_idle_hwm, speeds, i); 712 idle_cnt_percent = max(idle_cnt_percent, 713 (cpudrv_pm_idle_lwm + cpudrv_pm_idle_buf_zone)); 714 cur_spd->idle_hwm = 715 (idle_cnt_percent * cur_spd->quant_cnt) / 100; 716 cur_spd->idle_lwm = 717 (cpudrv_pm_idle_lwm * cur_spd->quant_cnt) / 100; 718 719 /* 720 * The lwm for user threads are determined such that 721 * if CPU slows down, the load of work in the 722 * new speed would still keep the CPU at or below the 723 * user_hwm in the new speed. This is to prevent 724 * the quick jump back up to higher speed. 725 */ 726 cur_spd->user_hwm = (cpudrv_pm_user_hwm * 727 cur_spd->quant_cnt) / 100; 728 user_cnt_percent = CPUDRV_PM_USER_CNT_PERCENT( 729 cpudrv_pm_user_hwm, speeds, i); 730 prev_spd->user_lwm = 731 (user_cnt_percent * prev_spd->quant_cnt) / 100; 732 } 733 prev_spd = cur_spd; 734 } 735 /* Slowest speed. Can't slow down anymore */ 736 cur_spd->idle_hwm = UINT_MAX; 737 cur_spd->user_lwm = -1; 738 #ifdef DEBUG 739 DPRINTF(D_PM_INIT, ("cpudrv_pm_init: instance %d: head_spd spd %d, " 740 "num_spd %d\n", ddi_get_instance(cpudsp->dip), 741 cpupm->head_spd->speed, cpupm->num_spd)); 742 for (cur_spd = cpupm->head_spd; cur_spd; cur_spd = cur_spd->down_spd) { 743 DPRINTF(D_PM_INIT, ("cpudrv_pm_init: instance %d: speed %d, " 744 "down_spd spd %d, idle_hwm %d, user_lwm %d, " 745 "up_spd spd %d, idle_lwm %d, user_hwm %d, " 746 "quant_cnt %d\n", ddi_get_instance(cpudsp->dip), 747 cur_spd->speed, 748 (cur_spd->down_spd ? cur_spd->down_spd->speed : 0), 749 cur_spd->idle_hwm, cur_spd->user_lwm, 750 (cur_spd->up_spd ? cur_spd->up_spd->speed : 0), 751 cur_spd->idle_lwm, cur_spd->user_hwm, 752 cur_spd->quant_cnt)); 753 } 754 #endif /* DEBUG */ 755 CPUDRV_PM_FREE_SPEEDS(speeds, nspeeds); 756 return (DDI_SUCCESS); 757 } 758 759 /* 760 * Free CPU power management data. 761 */ 762 static void 763 cpudrv_pm_free(cpudrv_devstate_t *cpudsp) 764 { 765 cpudrv_pm_t *cpupm = &(cpudsp->cpudrv_pm); 766 cpudrv_pm_spd_t *cur_spd, *next_spd; 767 768 cur_spd = cpupm->head_spd; 769 while (cur_spd) { 770 next_spd = cur_spd->down_spd; 771 kmem_free(cur_spd, sizeof (cpudrv_pm_spd_t)); 772 cur_spd = next_spd; 773 } 774 bzero(cpupm, sizeof (cpudrv_pm_t)); 775 cpudrv_mach_pm_free(cpudsp); 776 } 777 778 /* 779 * Create pm-components property. 780 */ 781 static int 782 cpudrv_pm_comp_create(cpudrv_devstate_t *cpudsp) 783 { 784 cpudrv_pm_t *cpupm = &(cpudsp->cpudrv_pm); 785 cpudrv_pm_spd_t *cur_spd; 786 char **pmc; 787 int size; 788 char name[] = "NAME=CPU Speed"; 789 int i, j; 790 uint_t comp_spd; 791 int result = DDI_FAILURE; 792 793 pmc = kmem_zalloc((cpupm->num_spd + 1) * sizeof (char *), KM_SLEEP); 794 size = CPUDRV_PM_COMP_SIZE(); 795 if (cpupm->num_spd > CPUDRV_PM_COMP_MAX_VAL) { 796 cmn_err(CE_WARN, "cpudrv_pm_comp_create: instance %d: " 797 "number of speeds exceeded limits", 798 ddi_get_instance(cpudsp->dip)); 799 kmem_free(pmc, (cpupm->num_spd + 1) * sizeof (char *)); 800 return (result); 801 } 802 803 for (i = cpupm->num_spd, cur_spd = cpupm->head_spd; i > 0; 804 i--, cur_spd = cur_spd->down_spd) { 805 cur_spd->pm_level = i; 806 pmc[i] = kmem_zalloc((size * sizeof (char)), KM_SLEEP); 807 comp_spd = CPUDRV_PM_COMP_SPEED(cpupm, cur_spd); 808 if (comp_spd > CPUDRV_PM_COMP_MAX_VAL) { 809 cmn_err(CE_WARN, "cpudrv_pm_comp_create: " 810 "instance %d: speed exceeded limits", 811 ddi_get_instance(cpudsp->dip)); 812 for (j = cpupm->num_spd; j >= i; j--) { 813 kmem_free(pmc[j], size * sizeof (char)); 814 } 815 kmem_free(pmc, (cpupm->num_spd + 1) * 816 sizeof (char *)); 817 return (result); 818 } 819 CPUDRV_PM_COMP_SPRINT(pmc[i], cpupm, cur_spd, comp_spd) 820 DPRINTF(D_PM_COMP_CREATE, ("cpudrv_pm_comp_create: " 821 "instance %d: pm-components power level %d string '%s'\n", 822 ddi_get_instance(cpudsp->dip), i, pmc[i])); 823 } 824 pmc[0] = kmem_zalloc(sizeof (name), KM_SLEEP); 825 (void) strcat(pmc[0], name); 826 DPRINTF(D_PM_COMP_CREATE, ("cpudrv_pm_comp_create: instance %d: " 827 "pm-components component name '%s'\n", 828 ddi_get_instance(cpudsp->dip), pmc[0])); 829 830 if (ddi_prop_update_string_array(DDI_DEV_T_NONE, cpudsp->dip, 831 "pm-components", pmc, cpupm->num_spd + 1) == DDI_PROP_SUCCESS) { 832 result = DDI_SUCCESS; 833 } else { 834 cmn_err(CE_WARN, "cpudrv_pm_comp_create: instance %d: " 835 "can't create pm-components property", 836 ddi_get_instance(cpudsp->dip)); 837 } 838 839 for (i = cpupm->num_spd; i > 0; i--) { 840 kmem_free(pmc[i], size * sizeof (char)); 841 } 842 kmem_free(pmc[0], sizeof (name)); 843 kmem_free(pmc, (cpupm->num_spd + 1) * sizeof (char *)); 844 return (result); 845 } 846 847 /* 848 * Mark a component idle. 849 */ 850 #define CPUDRV_PM_MONITOR_PM_IDLE_COMP(dip, cpupm) { \ 851 if ((cpupm)->pm_busycnt >= 1) { \ 852 if (pm_idle_component((dip), CPUDRV_PM_COMP_NUM) == \ 853 DDI_SUCCESS) { \ 854 DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: " \ 855 "instance %d: pm_idle_component called\n", \ 856 ddi_get_instance((dip)))); \ 857 (cpupm)->pm_busycnt--; \ 858 } else { \ 859 cmn_err(CE_WARN, "cpudrv_pm_monitor: instance %d: " \ 860 "can't idle CPU component", \ 861 ddi_get_instance((dip))); \ 862 } \ 863 } \ 864 } 865 866 /* 867 * Marks a component busy in both PM framework and driver state structure. 868 */ 869 #define CPUDRV_PM_MONITOR_PM_BUSY_COMP(dip, cpupm) { \ 870 if ((cpupm)->pm_busycnt < 1) { \ 871 if (pm_busy_component((dip), CPUDRV_PM_COMP_NUM) == \ 872 DDI_SUCCESS) { \ 873 DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: " \ 874 "instance %d: pm_busy_component called\n", \ 875 ddi_get_instance((dip)))); \ 876 (cpupm)->pm_busycnt++; \ 877 } else { \ 878 cmn_err(CE_WARN, "cpudrv_pm_monitor: instance %d: " \ 879 "can't busy CPU component", \ 880 ddi_get_instance((dip))); \ 881 } \ 882 } \ 883 } 884 885 /* 886 * Marks a component busy and calls pm_raise_power(). 887 */ 888 #define CPUDRV_PM_MONITOR_PM_BUSY_AND_RAISE(dip, cpudsp, cpupm, new_level) { \ 889 /* \ 890 * Mark driver and PM framework busy first so framework doesn't try \ 891 * to bring CPU to lower speed when we need to be at higher speed. \ 892 */ \ 893 CPUDRV_PM_MONITOR_PM_BUSY_COMP((dip), (cpupm)); \ 894 mutex_exit(&(cpudsp)->lock); \ 895 DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: instance %d: " \ 896 "pm_raise_power called to %d\n", ddi_get_instance((dip)), \ 897 (new_level))); \ 898 if (pm_raise_power((dip), CPUDRV_PM_COMP_NUM, (new_level)) != \ 899 DDI_SUCCESS) { \ 900 cmn_err(CE_WARN, "cpudrv_pm_monitor: instance %d: can't " \ 901 "raise CPU power level", ddi_get_instance((dip))); \ 902 } \ 903 mutex_enter(&(cpudsp)->lock); \ 904 } 905 906 /* 907 * In order to monitor a CPU, we need to hold cpu_lock to access CPU 908 * statistics. Holding cpu_lock is not allowed from a callout routine. 909 * We dispatch a taskq to do that job. 910 */ 911 static void 912 cpudrv_pm_monitor_disp(void *arg) 913 { 914 cpudrv_devstate_t *cpudsp = (cpudrv_devstate_t *)arg; 915 916 /* 917 * We are here because the last task has scheduled a timeout. 918 * The queue should be empty at this time. 919 */ 920 mutex_enter(&cpudsp->cpudrv_pm.timeout_lock); 921 if (!taskq_dispatch(cpudsp->cpudrv_pm.tq, cpudrv_pm_monitor, arg, 922 TQ_NOSLEEP)) { 923 mutex_exit(&cpudsp->cpudrv_pm.timeout_lock); 924 DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor_disp: failed to " 925 "dispatch the cpudrv_pm_monitor taskq\n")); 926 mutex_enter(&cpudsp->lock); 927 CPUDRV_PM_MONITOR_INIT(cpudsp); 928 mutex_exit(&cpudsp->lock); 929 return; 930 } 931 cpudsp->cpudrv_pm.timeout_count++; 932 mutex_exit(&cpudsp->cpudrv_pm.timeout_lock); 933 } 934 935 /* 936 * Monitors each CPU for the amount of time idle thread was running in the 937 * last quantum and arranges for the CPU to go to the lower or higher speed. 938 * Called at the time interval appropriate for the current speed. The 939 * time interval for normal speed is CPUDRV_PM_QUANT_CNT_NORMAL. The time 940 * interval for other speeds (including unknown speed) is 941 * CPUDRV_PM_QUANT_CNT_OTHR. 942 */ 943 static void 944 cpudrv_pm_monitor(void *arg) 945 { 946 cpudrv_devstate_t *cpudsp = (cpudrv_devstate_t *)arg; 947 cpudrv_pm_t *cpupm; 948 cpudrv_pm_spd_t *cur_spd, *new_spd; 949 cpu_t *cp; 950 dev_info_t *dip; 951 uint_t idle_cnt, user_cnt, system_cnt; 952 clock_t lbolt_cnt; 953 hrtime_t msnsecs[NCMSTATES]; 954 boolean_t is_ready; 955 956 #define GET_CPU_MSTATE_CNT(state, cnt) \ 957 msnsecs[state] = NSEC_TO_TICK(msnsecs[state]); \ 958 if (cpupm->lastquan_mstate[state] > msnsecs[state]) \ 959 msnsecs[state] = cpupm->lastquan_mstate[state]; \ 960 cnt = msnsecs[state] - cpupm->lastquan_mstate[state]; \ 961 cpupm->lastquan_mstate[state] = msnsecs[state] 962 963 mutex_enter(&cpudsp->lock); 964 cpupm = &(cpudsp->cpudrv_pm); 965 if (cpupm->timeout_id == 0) { 966 mutex_exit(&cpudsp->lock); 967 goto do_return; 968 } 969 cur_spd = cpupm->cur_spd; 970 dip = cpudsp->dip; 971 972 /* 973 * We assume that a CPU is initialized and has a valid cpu_t 974 * structure, if it is ready for cross calls. If this changes, 975 * additional checks might be needed. 976 * 977 * Additionally, for x86 platforms we cannot power manage 978 * any one instance, until all instances have been initialized. 979 * That's because we don't know what the CPU domains look like 980 * until all instances have been initialized. 981 */ 982 is_ready = CPUDRV_PM_XCALL_IS_READY(cpudsp->cpu_id); 983 if (!is_ready) { 984 DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: instance %d: " 985 "CPU not ready for x-calls\n", ddi_get_instance(dip))); 986 } else if (!(is_ready = cpudrv_pm_power_ready())) { 987 DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: instance %d: " 988 "waiting for all CPUs to be power manageable\n", 989 ddi_get_instance(dip))); 990 } 991 if (!is_ready) { 992 /* 993 * Make sure that we are busy so that framework doesn't 994 * try to bring us down in this situation. 995 */ 996 CPUDRV_PM_MONITOR_PM_BUSY_COMP(dip, cpupm); 997 CPUDRV_PM_MONITOR_INIT(cpudsp); 998 mutex_exit(&cpudsp->lock); 999 goto do_return; 1000 } 1001 1002 /* 1003 * Make sure that we are still not at unknown power level. 1004 */ 1005 if (cur_spd == NULL) { 1006 DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: instance %d: " 1007 "cur_spd is unknown\n", ddi_get_instance(dip))); 1008 CPUDRV_PM_MONITOR_PM_BUSY_AND_RAISE(dip, cpudsp, cpupm, 1009 cpupm->targ_spd->pm_level); 1010 /* 1011 * We just changed the speed. Wait till at least next 1012 * call to this routine before proceeding ahead. 1013 */ 1014 CPUDRV_PM_MONITOR_INIT(cpudsp); 1015 mutex_exit(&cpudsp->lock); 1016 goto do_return; 1017 } 1018 1019 mutex_enter(&cpu_lock); 1020 if ((cp = cpu_get(cpudsp->cpu_id)) == NULL) { 1021 mutex_exit(&cpu_lock); 1022 CPUDRV_PM_MONITOR_INIT(cpudsp); 1023 mutex_exit(&cpudsp->lock); 1024 cmn_err(CE_WARN, "cpudrv_pm_monitor: instance %d: can't get " 1025 "cpu_t", ddi_get_instance(dip)); 1026 goto do_return; 1027 } 1028 1029 if (!cpupm->pm_started) { 1030 cpupm->pm_started = B_TRUE; 1031 set_supp_freqs(cp, cpupm); 1032 } 1033 1034 get_cpu_mstate(cp, msnsecs); 1035 GET_CPU_MSTATE_CNT(CMS_IDLE, idle_cnt); 1036 GET_CPU_MSTATE_CNT(CMS_USER, user_cnt); 1037 GET_CPU_MSTATE_CNT(CMS_SYSTEM, system_cnt); 1038 1039 /* 1040 * We can't do anything when we have just switched to a state 1041 * because there is no valid timestamp. 1042 */ 1043 if (cpupm->lastquan_lbolt == 0) { 1044 cpupm->lastquan_lbolt = lbolt; 1045 mutex_exit(&cpu_lock); 1046 CPUDRV_PM_MONITOR_INIT(cpudsp); 1047 mutex_exit(&cpudsp->lock); 1048 goto do_return; 1049 } 1050 1051 /* 1052 * Various watermarks are based on this routine being called back 1053 * exactly at the requested period. This is not guaranteed 1054 * because this routine is called from a taskq that is dispatched 1055 * from a timeout routine. Handle this by finding out how many 1056 * ticks have elapsed since the last call (lbolt_cnt) and adjusting 1057 * the idle_cnt based on the delay added to the requested period 1058 * by timeout and taskq. 1059 */ 1060 lbolt_cnt = lbolt - cpupm->lastquan_lbolt; 1061 cpupm->lastquan_lbolt = lbolt; 1062 mutex_exit(&cpu_lock); 1063 /* 1064 * Time taken between recording the current counts and 1065 * arranging the next call of this routine is an error in our 1066 * calculation. We minimize the error by calling 1067 * CPUDRV_PM_MONITOR_INIT() here instead of end of this routine. 1068 */ 1069 CPUDRV_PM_MONITOR_INIT(cpudsp); 1070 DPRINTF(D_PM_MONITOR_VERBOSE, ("cpudrv_pm_monitor: instance %d: " 1071 "idle count %d, user count %d, system count %d, pm_level %d, " 1072 "pm_busycnt %d\n", ddi_get_instance(dip), idle_cnt, user_cnt, 1073 system_cnt, cur_spd->pm_level, cpupm->pm_busycnt)); 1074 1075 #ifdef DEBUG 1076 /* 1077 * Notify that timeout and taskq has caused delays and we need to 1078 * scale our parameters accordingly. 1079 * 1080 * To get accurate result, don't turn on other DPRINTFs with 1081 * the following DPRINTF. PROM calls generated by other 1082 * DPRINTFs changes the timing. 1083 */ 1084 if (lbolt_cnt > cur_spd->quant_cnt) { 1085 DPRINTF(D_PM_MONITOR_DELAY, ("cpudrv_pm_monitor: instance %d: " 1086 "lbolt count %ld > quantum_count %u\n", 1087 ddi_get_instance(dip), lbolt_cnt, cur_spd->quant_cnt)); 1088 } 1089 #endif /* DEBUG */ 1090 1091 /* 1092 * Adjust counts based on the delay added by timeout and taskq. 1093 */ 1094 idle_cnt = (idle_cnt * cur_spd->quant_cnt) / lbolt_cnt; 1095 user_cnt = (user_cnt * cur_spd->quant_cnt) / lbolt_cnt; 1096 if ((user_cnt > cur_spd->user_hwm) || (idle_cnt < cur_spd->idle_lwm && 1097 cur_spd->idle_blwm_cnt >= cpudrv_pm_idle_blwm_cnt_max)) { 1098 cur_spd->idle_blwm_cnt = 0; 1099 cur_spd->idle_bhwm_cnt = 0; 1100 /* 1101 * In normal situation, arrange to go to next higher speed. 1102 * If we are running in special direct pm mode, we just stay 1103 * at the current speed. 1104 */ 1105 if (cur_spd == cur_spd->up_spd || cpudrv_direct_pm) { 1106 CPUDRV_PM_MONITOR_PM_BUSY_COMP(dip, cpupm); 1107 } else { 1108 new_spd = cur_spd->up_spd; 1109 CPUDRV_PM_MONITOR_PM_BUSY_AND_RAISE(dip, cpudsp, cpupm, 1110 new_spd->pm_level); 1111 } 1112 } else if ((user_cnt <= cur_spd->user_lwm) && 1113 (idle_cnt >= cur_spd->idle_hwm) || !CPU_ACTIVE(cp)) { 1114 cur_spd->idle_blwm_cnt = 0; 1115 cur_spd->idle_bhwm_cnt = 0; 1116 /* 1117 * Arrange to go to next lower speed by informing our idle 1118 * status to the power management framework. 1119 */ 1120 CPUDRV_PM_MONITOR_PM_IDLE_COMP(dip, cpupm); 1121 } else { 1122 /* 1123 * If we are between the idle water marks and have not 1124 * been here enough consecutive times to be considered 1125 * busy, just increment the count and return. 1126 */ 1127 if ((idle_cnt < cur_spd->idle_hwm) && 1128 (idle_cnt >= cur_spd->idle_lwm) && 1129 (cur_spd->idle_bhwm_cnt < cpudrv_pm_idle_bhwm_cnt_max)) { 1130 cur_spd->idle_blwm_cnt = 0; 1131 cur_spd->idle_bhwm_cnt++; 1132 mutex_exit(&cpudsp->lock); 1133 goto do_return; 1134 } 1135 if (idle_cnt < cur_spd->idle_lwm) { 1136 cur_spd->idle_blwm_cnt++; 1137 cur_spd->idle_bhwm_cnt = 0; 1138 } 1139 /* 1140 * Arranges to stay at the current speed. 1141 */ 1142 CPUDRV_PM_MONITOR_PM_BUSY_COMP(dip, cpupm); 1143 } 1144 mutex_exit(&cpudsp->lock); 1145 do_return: 1146 mutex_enter(&cpupm->timeout_lock); 1147 ASSERT(cpupm->timeout_count > 0); 1148 cpupm->timeout_count--; 1149 cv_signal(&cpupm->timeout_cv); 1150 mutex_exit(&cpupm->timeout_lock); 1151 } 1152