xref: /titanic_44/usr/src/uts/common/io/cpudrv.c (revision 7f606acec863be28b51fb0f694ca86b41ca76e6d)
15cff7825Smh27603 /*
25cff7825Smh27603  * CDDL HEADER START
35cff7825Smh27603  *
45cff7825Smh27603  * The contents of this file are subject to the terms of the
55cff7825Smh27603  * Common Development and Distribution License (the "License").
65cff7825Smh27603  * You may not use this file except in compliance with the License.
75cff7825Smh27603  *
85cff7825Smh27603  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
95cff7825Smh27603  * or http://www.opensolaris.org/os/licensing.
105cff7825Smh27603  * See the License for the specific language governing permissions
115cff7825Smh27603  * and limitations under the License.
125cff7825Smh27603  *
135cff7825Smh27603  * When distributing Covered Code, include this CDDL HEADER in each
145cff7825Smh27603  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
155cff7825Smh27603  * If applicable, add the following below this CDDL HEADER, with the
165cff7825Smh27603  * fields enclosed by brackets "[]" replaced with your own identifying
175cff7825Smh27603  * information: Portions Copyright [yyyy] [name of copyright owner]
185cff7825Smh27603  *
195cff7825Smh27603  * CDDL HEADER END
205cff7825Smh27603  */
215cff7825Smh27603 /*
22c210ded4Sesaxe  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
235cff7825Smh27603  * Use is subject to license terms.
245cff7825Smh27603  */
255cff7825Smh27603 
265cff7825Smh27603 /*
275cff7825Smh27603  * CPU Device driver. The driver is not DDI-compliant.
285cff7825Smh27603  *
295cff7825Smh27603  * The driver supports following features:
305cff7825Smh27603  *	- Power management.
315cff7825Smh27603  */
325cff7825Smh27603 
335cff7825Smh27603 #include <sys/types.h>
345cff7825Smh27603 #include <sys/param.h>
355cff7825Smh27603 #include <sys/errno.h>
365cff7825Smh27603 #include <sys/modctl.h>
375cff7825Smh27603 #include <sys/kmem.h>
385cff7825Smh27603 #include <sys/conf.h>
395cff7825Smh27603 #include <sys/cmn_err.h>
405cff7825Smh27603 #include <sys/stat.h>
415cff7825Smh27603 #include <sys/debug.h>
425cff7825Smh27603 #include <sys/systm.h>
435cff7825Smh27603 #include <sys/ddi.h>
445cff7825Smh27603 #include <sys/sunddi.h>
45c210ded4Sesaxe #include <sys/sdt.h>
465cff7825Smh27603 
475cff7825Smh27603 #include <sys/machsystm.h>
485cff7825Smh27603 #include <sys/x_call.h>
49*7f606aceSMark Haywood #include <sys/cpudrv_mach.h>
505cff7825Smh27603 #include <sys/msacct.h>
515cff7825Smh27603 
525cff7825Smh27603 /*
535cff7825Smh27603  * CPU power management
545cff7825Smh27603  *
555cff7825Smh27603  * The supported power saving model is to slow down the CPU (on SPARC by
565cff7825Smh27603  * dividing the CPU clock and on x86 by dropping down a P-state).
575cff7825Smh27603  * Periodically we determine the amount of time the CPU is running
585cff7825Smh27603  * idle thread and threads in user mode during the last quantum.  If the idle
595cff7825Smh27603  * thread was running less than its low water mark for current speed for
605cff7825Smh27603  * number of consecutive sampling periods, or number of running threads in
615cff7825Smh27603  * user mode are above its high water mark, we arrange to go to the higher
625cff7825Smh27603  * speed.  If the idle thread was running more than its high water mark without
635cff7825Smh27603  * dropping a number of consecutive times below the mark, and number of threads
645cff7825Smh27603  * running in user mode are below its low water mark, we arrange to go to the
655cff7825Smh27603  * next lower speed.  While going down, we go through all the speeds.  While
665cff7825Smh27603  * going up we go to the maximum speed to minimize impact on the user, but have
675cff7825Smh27603  * provisions in the driver to go to other speeds.
685cff7825Smh27603  *
695cff7825Smh27603  * The driver does not have knowledge of a particular implementation of this
705cff7825Smh27603  * scheme and will work with all CPUs supporting this model. On SPARC, the
715cff7825Smh27603  * driver determines supported speeds by looking at 'clock-divisors' property
725cff7825Smh27603  * created by OBP. On x86, the driver retrieves the supported speeds from
735cff7825Smh27603  * ACPI.
745cff7825Smh27603  */
755cff7825Smh27603 
765cff7825Smh27603 /*
775cff7825Smh27603  * Configuration function prototypes and data structures
785cff7825Smh27603  */
795cff7825Smh27603 static int cpudrv_attach(dev_info_t *dip, ddi_attach_cmd_t cmd);
805cff7825Smh27603 static int cpudrv_detach(dev_info_t *dip, ddi_detach_cmd_t cmd);
815cff7825Smh27603 static int cpudrv_power(dev_info_t *dip, int comp, int level);
825cff7825Smh27603 
835cff7825Smh27603 struct dev_ops cpudrv_ops = {
845cff7825Smh27603 	DEVO_REV,		/* rev */
855cff7825Smh27603 	0,			/* refcnt */
865cff7825Smh27603 	nodev,			/* getinfo */
875cff7825Smh27603 	nulldev,		/* identify */
885cff7825Smh27603 	nulldev,		/* probe */
895cff7825Smh27603 	cpudrv_attach,		/* attach */
905cff7825Smh27603 	cpudrv_detach,		/* detach */
915cff7825Smh27603 	nodev,			/* reset */
925cff7825Smh27603 	(struct cb_ops *)NULL,	/* cb_ops */
935cff7825Smh27603 	(struct bus_ops *)NULL,	/* bus_ops */
945cff7825Smh27603 	cpudrv_power		/* power */
955cff7825Smh27603 };
965cff7825Smh27603 
975cff7825Smh27603 static struct modldrv modldrv = {
985cff7825Smh27603 	&mod_driverops,			/* modops */
99*7f606aceSMark Haywood 	"CPU Driver",			/* linkinfo */
1005cff7825Smh27603 	&cpudrv_ops,			/* dev_ops */
1015cff7825Smh27603 };
1025cff7825Smh27603 
1035cff7825Smh27603 static struct modlinkage modlinkage = {
1045cff7825Smh27603 	MODREV_1,		/* rev */
1055cff7825Smh27603 	&modldrv,		/* linkage */
1065cff7825Smh27603 	NULL
1075cff7825Smh27603 };
1085cff7825Smh27603 
1095cff7825Smh27603 /*
1105cff7825Smh27603  * Function prototypes
1115cff7825Smh27603  */
112*7f606aceSMark Haywood static int cpudrv_pm_init_power(cpudrv_devstate_t *cpudsp);
1135cff7825Smh27603 static void cpudrv_pm_free(cpudrv_devstate_t *cpudsp);
1145cff7825Smh27603 static int cpudrv_pm_comp_create(cpudrv_devstate_t *cpudsp);
1155cff7825Smh27603 static void cpudrv_pm_monitor_disp(void *arg);
1165cff7825Smh27603 static void cpudrv_pm_monitor(void *arg);
1175cff7825Smh27603 
1185cff7825Smh27603 /*
1195cff7825Smh27603  * Driver global variables
1205cff7825Smh27603  */
1215cff7825Smh27603 uint_t cpudrv_debug = 0;
1225cff7825Smh27603 void *cpudrv_state;
1235cff7825Smh27603 static uint_t cpudrv_pm_idle_hwm = CPUDRV_PM_IDLE_HWM;
1245cff7825Smh27603 static uint_t cpudrv_pm_idle_lwm = CPUDRV_PM_IDLE_LWM;
1255cff7825Smh27603 static uint_t cpudrv_pm_idle_buf_zone = CPUDRV_PM_IDLE_BUF_ZONE;
1265cff7825Smh27603 static uint_t cpudrv_pm_idle_bhwm_cnt_max = CPUDRV_PM_IDLE_BHWM_CNT_MAX;
1275cff7825Smh27603 static uint_t cpudrv_pm_idle_blwm_cnt_max = CPUDRV_PM_IDLE_BLWM_CNT_MAX;
1285cff7825Smh27603 static uint_t cpudrv_pm_user_hwm = CPUDRV_PM_USER_HWM;
1295cff7825Smh27603 
1305cff7825Smh27603 /*
1315cff7825Smh27603  * cpudrv_direct_pm allows user applications to directly control the
1325cff7825Smh27603  * power state transitions (direct pm) without following the normal
1335cff7825Smh27603  * direct pm protocol. This is needed because the normal protocol
1345cff7825Smh27603  * requires that a device only be lowered when it is idle, and be
1355cff7825Smh27603  * brought up when it request to do so by calling pm_raise_power().
1365cff7825Smh27603  * Ignoring this protocol is harmless for CPU (other than speed).
1375cff7825Smh27603  * Moreover it might be the case that CPU is never idle or wants
1385cff7825Smh27603  * to be at higher speed because of the addition CPU cycles required
1395cff7825Smh27603  * to run the user application.
1405cff7825Smh27603  *
1415cff7825Smh27603  * The driver will still report idle/busy status to the framework. Although
1425cff7825Smh27603  * framework will ignore this information for direct pm devices and not
1435cff7825Smh27603  * try to bring them down when idle, user applications can still use this
1445cff7825Smh27603  * information if they wants.
1455cff7825Smh27603  *
1465cff7825Smh27603  * In the future, provide an ioctl to control setting of this mode. In
1475cff7825Smh27603  * that case, this variable should move to the state structure and
1485cff7825Smh27603  * be protected by the lock in the state structure.
1495cff7825Smh27603  */
1505cff7825Smh27603 int cpudrv_direct_pm = 0;
1515cff7825Smh27603 
1525cff7825Smh27603 /*
1535cff7825Smh27603  * Arranges for the handler function to be called at the interval suitable
1545cff7825Smh27603  * for current speed.
1555cff7825Smh27603  */
1565cff7825Smh27603 #define	CPUDRV_PM_MONITOR_INIT(cpudsp) { \
157*7f606aceSMark Haywood 	if (CPUDRV_PM_POWER_ENABLED(cpudsp)) { \
1585cff7825Smh27603 		ASSERT(mutex_owned(&(cpudsp)->lock)); \
159*7f606aceSMark Haywood 		(cpudsp)->cpudrv_pm.timeout_id = \
160*7f606aceSMark Haywood 		    timeout(cpudrv_pm_monitor_disp, \
1615cff7825Smh27603 		    (cpudsp), (((cpudsp)->cpudrv_pm.cur_spd == NULL) ? \
1625cff7825Smh27603 		    CPUDRV_PM_QUANT_CNT_OTHR : \
1635cff7825Smh27603 		    (cpudsp)->cpudrv_pm.cur_spd->quant_cnt)); \
164*7f606aceSMark Haywood 	} \
1655cff7825Smh27603 }
1665cff7825Smh27603 
1675cff7825Smh27603 /*
1685cff7825Smh27603  * Arranges for the handler function not to be called back.
1695cff7825Smh27603  */
1705cff7825Smh27603 #define	CPUDRV_PM_MONITOR_FINI(cpudsp) { \
1715cff7825Smh27603 	timeout_id_t tmp_tid; \
1725cff7825Smh27603 	ASSERT(mutex_owned(&(cpudsp)->lock)); \
1735cff7825Smh27603 	tmp_tid = (cpudsp)->cpudrv_pm.timeout_id; \
1745cff7825Smh27603 	(cpudsp)->cpudrv_pm.timeout_id = 0; \
1755cff7825Smh27603 	mutex_exit(&(cpudsp)->lock); \
176*7f606aceSMark Haywood 	if (tmp_tid != 0) { \
1775cff7825Smh27603 		(void) untimeout(tmp_tid); \
1785cff7825Smh27603 		mutex_enter(&(cpudsp)->cpudrv_pm.timeout_lock); \
1795cff7825Smh27603 		while ((cpudsp)->cpudrv_pm.timeout_count != 0) \
1805cff7825Smh27603 			cv_wait(&(cpudsp)->cpudrv_pm.timeout_cv, \
1815cff7825Smh27603 			    &(cpudsp)->cpudrv_pm.timeout_lock); \
1825cff7825Smh27603 		mutex_exit(&(cpudsp)->cpudrv_pm.timeout_lock); \
183*7f606aceSMark Haywood 	} \
1845cff7825Smh27603 	mutex_enter(&(cpudsp)->lock); \
1855cff7825Smh27603 }
1865cff7825Smh27603 
1875cff7825Smh27603 int
1885cff7825Smh27603 _init(void)
1895cff7825Smh27603 {
1905cff7825Smh27603 	int	error;
1915cff7825Smh27603 
1925cff7825Smh27603 	DPRINTF(D_INIT, (" _init: function called\n"));
1935cff7825Smh27603 	if ((error = ddi_soft_state_init(&cpudrv_state,
1945cff7825Smh27603 	    sizeof (cpudrv_devstate_t), 0)) != 0) {
1955cff7825Smh27603 		return (error);
1965cff7825Smh27603 	}
1975cff7825Smh27603 
1985cff7825Smh27603 	if ((error = mod_install(&modlinkage)) != 0)  {
1995cff7825Smh27603 		ddi_soft_state_fini(&cpudrv_state);
2005cff7825Smh27603 	}
2015cff7825Smh27603 
2025cff7825Smh27603 	/*
2035cff7825Smh27603 	 * Callbacks used by the PPM driver.
2045cff7825Smh27603 	 */
2055cff7825Smh27603 	CPUDRV_PM_SET_PPM_CALLBACKS();
2065cff7825Smh27603 	return (error);
2075cff7825Smh27603 }
2085cff7825Smh27603 
2095cff7825Smh27603 int
2105cff7825Smh27603 _fini(void)
2115cff7825Smh27603 {
2125cff7825Smh27603 	int	error;
2135cff7825Smh27603 
2145cff7825Smh27603 	DPRINTF(D_FINI, (" _fini: function called\n"));
2155cff7825Smh27603 	if ((error = mod_remove(&modlinkage)) == 0) {
2165cff7825Smh27603 		ddi_soft_state_fini(&cpudrv_state);
2175cff7825Smh27603 	}
2185cff7825Smh27603 
2195cff7825Smh27603 	return (error);
2205cff7825Smh27603 }
2215cff7825Smh27603 
2225cff7825Smh27603 int
2235cff7825Smh27603 _info(struct modinfo *modinfop)
2245cff7825Smh27603 {
2255cff7825Smh27603 	return (mod_info(&modlinkage, modinfop));
2265cff7825Smh27603 }
2275cff7825Smh27603 
2285cff7825Smh27603 /*
2295cff7825Smh27603  * Driver attach(9e) entry point.
2305cff7825Smh27603  */
2315cff7825Smh27603 static int
2325cff7825Smh27603 cpudrv_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
2335cff7825Smh27603 {
2345cff7825Smh27603 	int			instance;
2355cff7825Smh27603 	cpudrv_devstate_t	*cpudsp;
2365cff7825Smh27603 	extern pri_t		maxclsyspri;
2375cff7825Smh27603 
2385cff7825Smh27603 	instance = ddi_get_instance(dip);
2395cff7825Smh27603 
2405cff7825Smh27603 	switch (cmd) {
2415cff7825Smh27603 	case DDI_ATTACH:
2425cff7825Smh27603 		DPRINTF(D_ATTACH, ("cpudrv_attach: instance %d: "
2435cff7825Smh27603 		    "DDI_ATTACH called\n", instance));
244*7f606aceSMark Haywood 		if (CPUDRV_PM_DISABLED())
245*7f606aceSMark Haywood 			return (DDI_FAILURE);
2465cff7825Smh27603 		if (ddi_soft_state_zalloc(cpudrv_state, instance) !=
2475cff7825Smh27603 		    DDI_SUCCESS) {
2485cff7825Smh27603 			cmn_err(CE_WARN, "cpudrv_attach: instance %d: "
2495cff7825Smh27603 			    "can't allocate state", instance);
2505cff7825Smh27603 			CPUDRV_PM_DISABLE();
2515cff7825Smh27603 			return (DDI_FAILURE);
2525cff7825Smh27603 		}
2535cff7825Smh27603 		if ((cpudsp = ddi_get_soft_state(cpudrv_state, instance)) ==
2545cff7825Smh27603 		    NULL) {
2555cff7825Smh27603 			cmn_err(CE_WARN, "cpudrv_attach: instance %d: "
2565cff7825Smh27603 			    "can't get state", instance);
2575cff7825Smh27603 			ddi_soft_state_free(cpudrv_state, instance);
2585cff7825Smh27603 			CPUDRV_PM_DISABLE();
2595cff7825Smh27603 			return (DDI_FAILURE);
2605cff7825Smh27603 		}
2615cff7825Smh27603 		cpudsp->dip = dip;
2625cff7825Smh27603 
2635cff7825Smh27603 		/*
2645cff7825Smh27603 		 * Find CPU number for this dev_info node.
2655cff7825Smh27603 		 */
2665cff7825Smh27603 		if (!cpudrv_pm_get_cpu_id(dip, &(cpudsp->cpu_id))) {
2675cff7825Smh27603 			cmn_err(CE_WARN, "cpudrv_attach: instance %d: "
2685cff7825Smh27603 			    "can't convert dip to cpu_id", instance);
2695cff7825Smh27603 			ddi_soft_state_free(cpudrv_state, instance);
2705cff7825Smh27603 			CPUDRV_PM_DISABLE();
2715cff7825Smh27603 			return (DDI_FAILURE);
2725cff7825Smh27603 		}
273*7f606aceSMark Haywood 		if (!cpudrv_mach_pm_init(cpudsp)) {
2745cff7825Smh27603 			ddi_soft_state_free(cpudrv_state, instance);
2755cff7825Smh27603 			CPUDRV_PM_DISABLE();
2765cff7825Smh27603 			return (DDI_FAILURE);
2775cff7825Smh27603 		}
278*7f606aceSMark Haywood 		mutex_init(&cpudsp->lock, NULL, MUTEX_DRIVER, NULL);
279*7f606aceSMark Haywood 		if (CPUDRV_PM_POWER_ENABLED(cpudsp)) {
280*7f606aceSMark Haywood 			if (cpudrv_pm_init_power(cpudsp) != DDI_SUCCESS) {
2815cff7825Smh27603 				CPUDRV_PM_DISABLE();
2825cff7825Smh27603 				cpudrv_pm_free(cpudsp);
283*7f606aceSMark Haywood 				ddi_soft_state_free(cpudrv_state, instance);
284*7f606aceSMark Haywood 				return (DDI_FAILURE);
285*7f606aceSMark Haywood 			}
286*7f606aceSMark Haywood 			if (cpudrv_pm_comp_create(cpudsp) != DDI_SUCCESS) {
287*7f606aceSMark Haywood 				CPUDRV_PM_DISABLE();
288*7f606aceSMark Haywood 				cpudrv_pm_free(cpudsp);
289*7f606aceSMark Haywood 				ddi_soft_state_free(cpudrv_state, instance);
2905cff7825Smh27603 				return (DDI_FAILURE);
2915cff7825Smh27603 			}
2925cff7825Smh27603 			if (ddi_prop_update_string(DDI_DEV_T_NONE,
2935cff7825Smh27603 			    dip, "pm-class", "CPU") != DDI_PROP_SUCCESS) {
2945cff7825Smh27603 				CPUDRV_PM_DISABLE();
2955cff7825Smh27603 				cpudrv_pm_free(cpudsp);
296*7f606aceSMark Haywood 				ddi_soft_state_free(cpudrv_state, instance);
2975cff7825Smh27603 				return (DDI_FAILURE);
2985cff7825Smh27603 			}
2995cff7825Smh27603 
3005cff7825Smh27603 			/*
301*7f606aceSMark Haywood 			 * Taskq is used to dispatch routine to monitor CPU
302*7f606aceSMark Haywood 			 * activities.
3035cff7825Smh27603 			 */
3045cff7825Smh27603 			cpudsp->cpudrv_pm.tq = taskq_create_instance(
3055cff7825Smh27603 			    "cpudrv_pm_monitor",
3065cff7825Smh27603 			    ddi_get_instance(dip), CPUDRV_PM_TASKQ_THREADS,
3075cff7825Smh27603 			    (maxclsyspri - 1), CPUDRV_PM_TASKQ_MIN,
308*7f606aceSMark Haywood 			    CPUDRV_PM_TASKQ_MAX,
309*7f606aceSMark Haywood 			    TASKQ_PREPOPULATE|TASKQ_CPR_SAFE);
3105cff7825Smh27603 
311*7f606aceSMark Haywood 			mutex_init(&cpudsp->cpudrv_pm.timeout_lock, NULL,
312*7f606aceSMark Haywood 			    MUTEX_DRIVER, NULL);
313*7f606aceSMark Haywood 			cv_init(&cpudsp->cpudrv_pm.timeout_cv, NULL,
314*7f606aceSMark Haywood 			    CV_DEFAULT, NULL);
3155cff7825Smh27603 
3165cff7825Smh27603 			/*
317*7f606aceSMark Haywood 			 * Driver needs to assume that CPU is running at
318*7f606aceSMark Haywood 			 * unknown speed at DDI_ATTACH and switch it to the
319*7f606aceSMark Haywood 			 * needed speed. We assume that initial needed speed
320*7f606aceSMark Haywood 			 * is full speed for us.
3215cff7825Smh27603 			 */
3225cff7825Smh27603 			/*
3235cff7825Smh27603 			 * We need to take the lock because cpudrv_pm_monitor()
3245cff7825Smh27603 			 * will start running in parallel with attach().
3255cff7825Smh27603 			 */
3265cff7825Smh27603 			mutex_enter(&cpudsp->lock);
3275cff7825Smh27603 			cpudsp->cpudrv_pm.cur_spd = NULL;
328*7f606aceSMark Haywood 			cpudsp->cpudrv_pm.targ_spd =
329*7f606aceSMark Haywood 			    cpudsp->cpudrv_pm.head_spd;
33068afbec1Smh27603 			cpudsp->cpudrv_pm.pm_started = B_FALSE;
3315cff7825Smh27603 			/*
332*7f606aceSMark Haywood 			 * We don't call pm_raise_power() directly from attach
333*7f606aceSMark Haywood 			 * because driver attach for a slave CPU node can
334*7f606aceSMark Haywood 			 * happen before the CPU is even initialized. We just
335*7f606aceSMark Haywood 			 * start the monitoring system which understands
336*7f606aceSMark Haywood 			 * unknown speed and moves CPU to targ_spd when it
337*7f606aceSMark Haywood 			 * have been initialized.
3385cff7825Smh27603 			 */
3395cff7825Smh27603 			CPUDRV_PM_MONITOR_INIT(cpudsp);
3405cff7825Smh27603 			mutex_exit(&cpudsp->lock);
3415cff7825Smh27603 
342*7f606aceSMark Haywood 		}
343*7f606aceSMark Haywood 
344*7f606aceSMark Haywood 		CPUDRV_PM_INSTALL_MAX_CHANGE_HANDLER(cpudsp, dip);
3455cff7825Smh27603 
3465cff7825Smh27603 		ddi_report_dev(dip);
3475cff7825Smh27603 		return (DDI_SUCCESS);
3485cff7825Smh27603 
3495cff7825Smh27603 	case DDI_RESUME:
3505cff7825Smh27603 		DPRINTF(D_ATTACH, ("cpudrv_attach: instance %d: "
3515cff7825Smh27603 		    "DDI_RESUME called\n", instance));
352*7f606aceSMark Haywood 
353*7f606aceSMark Haywood 		cpudsp = ddi_get_soft_state(cpudrv_state, instance);
354*7f606aceSMark Haywood 		ASSERT(cpudsp != NULL);
355*7f606aceSMark Haywood 
356*7f606aceSMark Haywood 		/*
357*7f606aceSMark Haywood 		 * Nothing to do for resume, if not doing active PM.
358*7f606aceSMark Haywood 		 */
359*7f606aceSMark Haywood 		if (!CPUDRV_PM_POWER_ENABLED(cpudsp))
360*7f606aceSMark Haywood 			return (DDI_SUCCESS);
361*7f606aceSMark Haywood 
3625cff7825Smh27603 		mutex_enter(&cpudsp->lock);
3635cff7825Smh27603 		/*
3645cff7825Smh27603 		 * Driver needs to assume that CPU is running at unknown speed
3655cff7825Smh27603 		 * at DDI_RESUME and switch it to the needed speed. We assume
3665cff7825Smh27603 		 * that the needed speed is full speed for us.
3675cff7825Smh27603 		 */
3685cff7825Smh27603 		cpudsp->cpudrv_pm.cur_spd = NULL;
3695cff7825Smh27603 		cpudsp->cpudrv_pm.targ_spd = cpudsp->cpudrv_pm.head_spd;
3705cff7825Smh27603 		CPUDRV_PM_MONITOR_INIT(cpudsp);
3715cff7825Smh27603 		mutex_exit(&cpudsp->lock);
3725cff7825Smh27603 		CPUDRV_PM_REDEFINE_TOPSPEED(dip);
3735cff7825Smh27603 		return (DDI_SUCCESS);
3745cff7825Smh27603 
3755cff7825Smh27603 	default:
3765cff7825Smh27603 		return (DDI_FAILURE);
3775cff7825Smh27603 	}
3785cff7825Smh27603 }
3795cff7825Smh27603 
3805cff7825Smh27603 /*
3815cff7825Smh27603  * Driver detach(9e) entry point.
3825cff7825Smh27603  */
3835cff7825Smh27603 static int
3845cff7825Smh27603 cpudrv_detach(dev_info_t *dip, ddi_detach_cmd_t cmd)
3855cff7825Smh27603 {
3865cff7825Smh27603 	int			instance;
3875cff7825Smh27603 	cpudrv_devstate_t	*cpudsp;
3885cff7825Smh27603 	cpudrv_pm_t		*cpupm;
3895cff7825Smh27603 
3905cff7825Smh27603 	instance = ddi_get_instance(dip);
3915cff7825Smh27603 
3925cff7825Smh27603 	switch (cmd) {
3935cff7825Smh27603 	case DDI_DETACH:
3945cff7825Smh27603 		DPRINTF(D_DETACH, ("cpudrv_detach: instance %d: "
3955cff7825Smh27603 		    "DDI_DETACH called\n", instance));
3965cff7825Smh27603 		/*
3975cff7825Smh27603 		 * If the only thing supported by the driver is power
3985cff7825Smh27603 		 * management, we can in future enhance the driver and
3995cff7825Smh27603 		 * framework that loads it to unload the driver when
4005cff7825Smh27603 		 * user has disabled CPU power management.
4015cff7825Smh27603 		 */
4025cff7825Smh27603 		return (DDI_FAILURE);
4035cff7825Smh27603 
4045cff7825Smh27603 	case DDI_SUSPEND:
4055cff7825Smh27603 		DPRINTF(D_DETACH, ("cpudrv_detach: instance %d: "
4065cff7825Smh27603 		    "DDI_SUSPEND called\n", instance));
407*7f606aceSMark Haywood 
408*7f606aceSMark Haywood 		cpudsp = ddi_get_soft_state(cpudrv_state, instance);
409*7f606aceSMark Haywood 		ASSERT(cpudsp != NULL);
410*7f606aceSMark Haywood 
411*7f606aceSMark Haywood 		/*
412*7f606aceSMark Haywood 		 * Nothing to do for suspend, if not doing active PM.
413*7f606aceSMark Haywood 		 */
414*7f606aceSMark Haywood 		if (!CPUDRV_PM_POWER_ENABLED(cpudsp))
415*7f606aceSMark Haywood 			return (DDI_SUCCESS);
416*7f606aceSMark Haywood 
4175cff7825Smh27603 		/*
4185cff7825Smh27603 		 * During a checkpoint-resume sequence, framework will
4195cff7825Smh27603 		 * stop interrupts to quiesce kernel activity. This will
4205cff7825Smh27603 		 * leave our monitoring system ineffective. Handle this
4215cff7825Smh27603 		 * by stopping our monitoring system and bringing CPU
4225cff7825Smh27603 		 * to full speed. In case we are in special direct pm
4235cff7825Smh27603 		 * mode, we leave the CPU at whatever speed it is. This
4245cff7825Smh27603 		 * is harmless other than speed.
4255cff7825Smh27603 		 */
4265cff7825Smh27603 		mutex_enter(&cpudsp->lock);
4275cff7825Smh27603 		cpupm = &(cpudsp->cpudrv_pm);
4285cff7825Smh27603 
4295cff7825Smh27603 		DPRINTF(D_DETACH, ("cpudrv_detach: instance %d: DDI_SUSPEND - "
4305cff7825Smh27603 		    "cur_spd %d, head_spd %d\n", instance,
4315cff7825Smh27603 		    cpupm->cur_spd->pm_level, cpupm->head_spd->pm_level));
4325cff7825Smh27603 
4335cff7825Smh27603 		CPUDRV_PM_MONITOR_FINI(cpudsp);
4345cff7825Smh27603 
4355cff7825Smh27603 		if (!cpudrv_direct_pm && (cpupm->cur_spd != cpupm->head_spd)) {
4365cff7825Smh27603 			if (cpupm->pm_busycnt < 1) {
4375cff7825Smh27603 				if ((pm_busy_component(dip, CPUDRV_PM_COMP_NUM)
4385cff7825Smh27603 				    == DDI_SUCCESS)) {
4395cff7825Smh27603 					cpupm->pm_busycnt++;
4405cff7825Smh27603 				} else {
4415cff7825Smh27603 					CPUDRV_PM_MONITOR_INIT(cpudsp);
4425cff7825Smh27603 					mutex_exit(&cpudsp->lock);
4435cff7825Smh27603 					cmn_err(CE_WARN, "cpudrv_detach: "
4445cff7825Smh27603 					    "instance %d: can't busy CPU "
4455cff7825Smh27603 					    "component", instance);
4465cff7825Smh27603 					return (DDI_FAILURE);
4475cff7825Smh27603 				}
4485cff7825Smh27603 			}
4495cff7825Smh27603 			mutex_exit(&cpudsp->lock);
4505cff7825Smh27603 			if (pm_raise_power(dip, CPUDRV_PM_COMP_NUM,
4515cff7825Smh27603 			    cpupm->head_spd->pm_level) != DDI_SUCCESS) {
4525cff7825Smh27603 				mutex_enter(&cpudsp->lock);
4535cff7825Smh27603 				CPUDRV_PM_MONITOR_INIT(cpudsp);
4545cff7825Smh27603 				mutex_exit(&cpudsp->lock);
4555cff7825Smh27603 				cmn_err(CE_WARN, "cpudrv_detach: instance %d: "
4565cff7825Smh27603 				    "can't raise CPU power level", instance);
4575cff7825Smh27603 				return (DDI_FAILURE);
4585cff7825Smh27603 			} else {
4595cff7825Smh27603 				return (DDI_SUCCESS);
4605cff7825Smh27603 			}
4615cff7825Smh27603 		} else {
4625cff7825Smh27603 			mutex_exit(&cpudsp->lock);
4635cff7825Smh27603 			return (DDI_SUCCESS);
4645cff7825Smh27603 		}
4655cff7825Smh27603 
4665cff7825Smh27603 	default:
4675cff7825Smh27603 		return (DDI_FAILURE);
4685cff7825Smh27603 	}
4695cff7825Smh27603 }
4705cff7825Smh27603 
4715cff7825Smh27603 /*
4725cff7825Smh27603  * Driver power(9e) entry point.
4735cff7825Smh27603  *
4745cff7825Smh27603  * Driver's notion of current power is set *only* in power(9e) entry point
4755cff7825Smh27603  * after actual power change operation has been successfully completed.
4765cff7825Smh27603  */
4775cff7825Smh27603 /* ARGSUSED */
4785cff7825Smh27603 static int
4795cff7825Smh27603 cpudrv_power(dev_info_t *dip, int comp, int level)
4805cff7825Smh27603 {
4815cff7825Smh27603 	int			instance;
4825cff7825Smh27603 	cpudrv_devstate_t	*cpudsp;
4835cff7825Smh27603 	cpudrv_pm_t 		*cpupm;
4845cff7825Smh27603 	cpudrv_pm_spd_t		*new_spd;
4855cff7825Smh27603 	boolean_t		is_ready;
4865cff7825Smh27603 	int			ret;
4875cff7825Smh27603 
4885cff7825Smh27603 	instance = ddi_get_instance(dip);
4895cff7825Smh27603 
4905cff7825Smh27603 	DPRINTF(D_POWER, ("cpudrv_power: instance %d: level %d\n",
4915cff7825Smh27603 	    instance, level));
4925cff7825Smh27603 	if ((cpudsp = ddi_get_soft_state(cpudrv_state, instance)) == NULL) {
4935cff7825Smh27603 		cmn_err(CE_WARN, "cpudrv_power: instance %d: can't get state",
4945cff7825Smh27603 		    instance);
4955cff7825Smh27603 		return (DDI_FAILURE);
4965cff7825Smh27603 	}
4975cff7825Smh27603 
4985cff7825Smh27603 	mutex_enter(&cpudsp->lock);
4995cff7825Smh27603 	cpupm = &(cpudsp->cpudrv_pm);
5005cff7825Smh27603 
5015cff7825Smh27603 	/*
5025cff7825Smh27603 	 * In normal operation, we fail if we are busy and request is
5035cff7825Smh27603 	 * to lower the power level. We let this go through if the driver
5045cff7825Smh27603 	 * is in special direct pm mode. On x86, we also let this through
505*7f606aceSMark Haywood 	 * if the change is due to a request to govern the max speed.
5065cff7825Smh27603 	 */
5075cff7825Smh27603 	if (!cpudrv_direct_pm && (cpupm->pm_busycnt >= 1) &&
508*7f606aceSMark Haywood 	    !cpudrv_pm_is_governor_thread(cpupm)) {
5095cff7825Smh27603 		if ((cpupm->cur_spd != NULL) &&
5105cff7825Smh27603 		    (level < cpupm->cur_spd->pm_level)) {
5115cff7825Smh27603 			mutex_exit(&cpudsp->lock);
5125cff7825Smh27603 			return (DDI_FAILURE);
5135cff7825Smh27603 		}
5145cff7825Smh27603 	}
5155cff7825Smh27603 
5165cff7825Smh27603 	for (new_spd = cpupm->head_spd; new_spd; new_spd = new_spd->down_spd) {
5175cff7825Smh27603 		if (new_spd->pm_level == level)
5185cff7825Smh27603 			break;
5195cff7825Smh27603 	}
5205cff7825Smh27603 	if (!new_spd) {
521*7f606aceSMark Haywood 		CPUDRV_PM_RESET_GOVERNOR_THREAD(cpupm);
5225cff7825Smh27603 		mutex_exit(&cpudsp->lock);
5235cff7825Smh27603 		cmn_err(CE_WARN, "cpudrv_power: instance %d: "
5245cff7825Smh27603 		    "can't locate new CPU speed", instance);
5255cff7825Smh27603 		return (DDI_FAILURE);
5265cff7825Smh27603 	}
5275cff7825Smh27603 
5285cff7825Smh27603 	/*
5295cff7825Smh27603 	 * We currently refuse to power manage if the CPU is not ready to
5305cff7825Smh27603 	 * take cross calls (cross calls fail silently if CPU is not ready
5315cff7825Smh27603 	 * for it).
5325cff7825Smh27603 	 *
5335cff7825Smh27603 	 * Additionally, for x86 platforms we cannot power manage
5345cff7825Smh27603 	 * any one instance, until all instances have been initialized.
5355cff7825Smh27603 	 * That's because we don't know what the CPU domains look like
5365cff7825Smh27603 	 * until all instances have been initialized.
5375cff7825Smh27603 	 */
5385cff7825Smh27603 	is_ready = CPUDRV_PM_XCALL_IS_READY(cpudsp->cpu_id);
5395cff7825Smh27603 	if (!is_ready) {
5405cff7825Smh27603 		DPRINTF(D_POWER, ("cpudrv_power: instance %d: "
5415cff7825Smh27603 		    "CPU not ready for x-calls\n", instance));
542*7f606aceSMark Haywood 	} else if (!(is_ready = cpudrv_pm_power_ready())) {
5435cff7825Smh27603 		DPRINTF(D_POWER, ("cpudrv_power: instance %d: "
544*7f606aceSMark Haywood 		    "waiting for all CPUs to be power manageable\n", instance));
5455cff7825Smh27603 	}
5465cff7825Smh27603 	if (!is_ready) {
547*7f606aceSMark Haywood 		CPUDRV_PM_RESET_GOVERNOR_THREAD(cpupm);
5485cff7825Smh27603 		mutex_exit(&cpudsp->lock);
5495cff7825Smh27603 		return (DDI_FAILURE);
5505cff7825Smh27603 	}
5515cff7825Smh27603 
5525cff7825Smh27603 	/*
5535cff7825Smh27603 	 * Execute CPU specific routine on the requested CPU to change its
5545cff7825Smh27603 	 * speed to normal-speed/divisor.
5555cff7825Smh27603 	 */
5565cff7825Smh27603 	if ((ret = cpudrv_pm_change_speed(cpudsp, new_spd)) != DDI_SUCCESS) {
5575cff7825Smh27603 		cmn_err(CE_WARN, "cpudrv_power: cpudrv_pm_change_speed() "
5585cff7825Smh27603 		    "return = %d", ret);
5595cff7825Smh27603 		mutex_exit(&cpudsp->lock);
5605cff7825Smh27603 		return (DDI_FAILURE);
5615cff7825Smh27603 	}
5625cff7825Smh27603 
5635cff7825Smh27603 	/*
564c210ded4Sesaxe 	 * DTrace probe point for CPU speed change transition
565c210ded4Sesaxe 	 */
566c210ded4Sesaxe 	DTRACE_PROBE3(cpu__change__speed, cpudrv_devstate_t *, cpudsp,
567c210ded4Sesaxe 	    cpudrv_pm_t *, cpupm, cpudrv_pm_spd_t *, new_spd);
568c210ded4Sesaxe 
569c210ded4Sesaxe 	/*
5705cff7825Smh27603 	 * Reset idle threshold time for the new power level.
5715cff7825Smh27603 	 */
5725cff7825Smh27603 	if ((cpupm->cur_spd != NULL) && (level < cpupm->cur_spd->pm_level)) {
5735cff7825Smh27603 		if (pm_idle_component(dip, CPUDRV_PM_COMP_NUM) ==
5745cff7825Smh27603 		    DDI_SUCCESS) {
5755cff7825Smh27603 			if (cpupm->pm_busycnt >= 1)
5765cff7825Smh27603 				cpupm->pm_busycnt--;
5775cff7825Smh27603 		} else
5785cff7825Smh27603 			cmn_err(CE_WARN, "cpudrv_power: instance %d: can't "
5795cff7825Smh27603 			    "idle CPU component", ddi_get_instance(dip));
5805cff7825Smh27603 	}
5815cff7825Smh27603 	/*
5825cff7825Smh27603 	 * Reset various parameters because we are now running at new speed.
5835cff7825Smh27603 	 */
5845cff7825Smh27603 	cpupm->lastquan_mstate[CMS_IDLE] = 0;
5855cff7825Smh27603 	cpupm->lastquan_mstate[CMS_SYSTEM] = 0;
5865cff7825Smh27603 	cpupm->lastquan_mstate[CMS_USER] = 0;
5875cff7825Smh27603 	cpupm->lastquan_lbolt = 0;
5885cff7825Smh27603 	cpupm->cur_spd = new_spd;
589*7f606aceSMark Haywood 	CPUDRV_PM_RESET_GOVERNOR_THREAD(cpupm);
5905cff7825Smh27603 	mutex_exit(&cpudsp->lock);
5915cff7825Smh27603 
5925cff7825Smh27603 	return (DDI_SUCCESS);
5935cff7825Smh27603 }
5945cff7825Smh27603 
5955cff7825Smh27603 /*
5965cff7825Smh27603  * Initialize the field that will be used for reporting
5975cff7825Smh27603  * the supported_frequencies_Hz cpu_info kstat.
5985cff7825Smh27603  */
5995cff7825Smh27603 static void
6005cff7825Smh27603 set_supp_freqs(cpu_t *cp, cpudrv_pm_t *cpupm)
6015cff7825Smh27603 {
6025cff7825Smh27603 	char		*supp_freqs;
6035cff7825Smh27603 	char		*sfptr;
6045cff7825Smh27603 	uint64_t	*speeds;
6055cff7825Smh27603 	cpudrv_pm_spd_t	*spd;
6065cff7825Smh27603 	int		i;
6075cff7825Smh27603 #define	UINT64_MAX_STRING (sizeof ("18446744073709551615"))
6085cff7825Smh27603 
6095cff7825Smh27603 	speeds = kmem_zalloc(cpupm->num_spd * sizeof (uint64_t), KM_SLEEP);
6105cff7825Smh27603 	for (i = cpupm->num_spd - 1, spd = cpupm->head_spd; spd;
6115cff7825Smh27603 	    i--, spd = spd->down_spd) {
6125cff7825Smh27603 		speeds[i] =
6135cff7825Smh27603 		    CPUDRV_PM_SPEED_HZ(cp->cpu_type_info.pi_clock, spd->speed);
6145cff7825Smh27603 	}
6155cff7825Smh27603 
6165cff7825Smh27603 	supp_freqs = kmem_zalloc((UINT64_MAX_STRING * cpupm->num_spd),
6175cff7825Smh27603 	    KM_SLEEP);
6185cff7825Smh27603 	sfptr = supp_freqs;
6195cff7825Smh27603 	for (i = 0; i < cpupm->num_spd; i++) {
6205cff7825Smh27603 		if (i == cpupm->num_spd - 1) {
6215cff7825Smh27603 			(void) sprintf(sfptr, "%"PRIu64, speeds[i]);
6225cff7825Smh27603 		} else {
6235cff7825Smh27603 			(void) sprintf(sfptr, "%"PRIu64":", speeds[i]);
6245cff7825Smh27603 			sfptr = supp_freqs + strlen(supp_freqs);
6255cff7825Smh27603 		}
6265cff7825Smh27603 	}
62768afbec1Smh27603 	cpu_set_supp_freqs(cp, supp_freqs);
62868afbec1Smh27603 	kmem_free(supp_freqs, (UINT64_MAX_STRING * cpupm->num_spd));
6295cff7825Smh27603 	kmem_free(speeds, cpupm->num_spd * sizeof (uint64_t));
6305cff7825Smh27603 }
6315cff7825Smh27603 
6325cff7825Smh27603 /*
6335cff7825Smh27603  * Initialize power management data.
6345cff7825Smh27603  */
6355cff7825Smh27603 static int
636*7f606aceSMark Haywood cpudrv_pm_init_power(cpudrv_devstate_t *cpudsp)
6375cff7825Smh27603 {
6385cff7825Smh27603 	cpudrv_pm_t 	*cpupm = &(cpudsp->cpudrv_pm);
6395cff7825Smh27603 	cpudrv_pm_spd_t	*cur_spd;
6405cff7825Smh27603 	cpudrv_pm_spd_t	*prev_spd = NULL;
6415cff7825Smh27603 	int		*speeds;
6425cff7825Smh27603 	uint_t		nspeeds;
6435cff7825Smh27603 	int		idle_cnt_percent;
6445cff7825Smh27603 	int		user_cnt_percent;
6455cff7825Smh27603 	int		i;
6465cff7825Smh27603 
6475cff7825Smh27603 	CPUDRV_PM_GET_SPEEDS(cpudsp, speeds, nspeeds);
6485cff7825Smh27603 	if (nspeeds < 2) {
6495cff7825Smh27603 		/* Need at least two speeds to power manage */
6505cff7825Smh27603 		CPUDRV_PM_FREE_SPEEDS(speeds, nspeeds);
6515cff7825Smh27603 		return (DDI_FAILURE);
6525cff7825Smh27603 	}
6535cff7825Smh27603 	cpupm->num_spd = nspeeds;
6545cff7825Smh27603 
6555cff7825Smh27603 	/*
6565cff7825Smh27603 	 * Calculate the watermarks and other parameters based on the
6575cff7825Smh27603 	 * supplied speeds.
6585cff7825Smh27603 	 *
6595cff7825Smh27603 	 * One of the basic assumption is that for X amount of CPU work,
6605cff7825Smh27603 	 * if CPU is slowed down by a factor of N, the time it takes to
6615cff7825Smh27603 	 * do the same work will be N * X.
6625cff7825Smh27603 	 *
6635cff7825Smh27603 	 * The driver declares that a CPU is idle and ready for slowed down,
6645cff7825Smh27603 	 * if amount of idle thread is more than the current speed idle_hwm
6655cff7825Smh27603 	 * without dropping below idle_hwm a number of consecutive sampling
6665cff7825Smh27603 	 * intervals and number of running threads in user mode are below
6675cff7825Smh27603 	 * user_lwm.  We want to set the current user_lwm such that if we
6685cff7825Smh27603 	 * just switched to the next slower speed with no change in real work
6695cff7825Smh27603 	 * load, the amount of user threads at the slower speed will be such
6705cff7825Smh27603 	 * that it falls below the slower speed's user_hwm.  If we didn't do
6715cff7825Smh27603 	 * that then we will just come back to the higher speed as soon as we
6725cff7825Smh27603 	 * go down even with no change in work load.
6735cff7825Smh27603 	 * The user_hwm is a fixed precentage and not calculated dynamically.
6745cff7825Smh27603 	 *
6755cff7825Smh27603 	 * We bring the CPU up if idle thread at current speed is less than
6765cff7825Smh27603 	 * the current speed idle_lwm for a number of consecutive sampling
6775cff7825Smh27603 	 * intervals or user threads are above the user_hwm for the current
6785cff7825Smh27603 	 * speed.
6795cff7825Smh27603 	 */
6805cff7825Smh27603 	for (i = 0; i < nspeeds; i++) {
6815cff7825Smh27603 		cur_spd = kmem_zalloc(sizeof (cpudrv_pm_spd_t), KM_SLEEP);
6825cff7825Smh27603 		cur_spd->speed = speeds[i];
6835cff7825Smh27603 		if (i == 0) {	/* normal speed */
6845cff7825Smh27603 			cpupm->head_spd = cur_spd;
6855cff7825Smh27603 			cur_spd->quant_cnt = CPUDRV_PM_QUANT_CNT_NORMAL;
6865cff7825Smh27603 			cur_spd->idle_hwm =
6875cff7825Smh27603 			    (cpudrv_pm_idle_hwm * cur_spd->quant_cnt) / 100;
6885cff7825Smh27603 			/* can't speed anymore */
6895cff7825Smh27603 			cur_spd->idle_lwm = 0;
6905cff7825Smh27603 			cur_spd->user_hwm = UINT_MAX;
6915cff7825Smh27603 		} else {
6925cff7825Smh27603 			cur_spd->quant_cnt = CPUDRV_PM_QUANT_CNT_OTHR;
6935cff7825Smh27603 			ASSERT(prev_spd != NULL);
6945cff7825Smh27603 			prev_spd->down_spd = cur_spd;
6955cff7825Smh27603 			cur_spd->up_spd = cpupm->head_spd;
6965cff7825Smh27603 
6975cff7825Smh27603 			/*
6985cff7825Smh27603 			 * Let's assume CPU is considered idle at full speed
6995cff7825Smh27603 			 * when it is spending I% of time in running the idle
7005cff7825Smh27603 			 * thread.  At full speed, CPU will be busy (100 - I) %
7015cff7825Smh27603 			 * of times.  This % of busyness increases by factor of
7025cff7825Smh27603 			 * N as CPU slows down.  CPU that is idle I% of times
7035cff7825Smh27603 			 * in full speed, it is idle (100 - ((100 - I) * N)) %
7045cff7825Smh27603 			 * of times in N speed.  The idle_lwm is a fixed
7055cff7825Smh27603 			 * percentage.  A large value of N may result in
7065cff7825Smh27603 			 * idle_hwm to go below idle_lwm.  We need to make sure
7075cff7825Smh27603 			 * that there is at least a buffer zone seperation
7085cff7825Smh27603 			 * between the idle_lwm and idle_hwm values.
7095cff7825Smh27603 			 */
7105cff7825Smh27603 			idle_cnt_percent = CPUDRV_PM_IDLE_CNT_PERCENT(
7115cff7825Smh27603 			    cpudrv_pm_idle_hwm, speeds, i);
7125cff7825Smh27603 			idle_cnt_percent = max(idle_cnt_percent,
7135cff7825Smh27603 			    (cpudrv_pm_idle_lwm + cpudrv_pm_idle_buf_zone));
7145cff7825Smh27603 			cur_spd->idle_hwm =
7155cff7825Smh27603 			    (idle_cnt_percent * cur_spd->quant_cnt) / 100;
7165cff7825Smh27603 			cur_spd->idle_lwm =
7175cff7825Smh27603 			    (cpudrv_pm_idle_lwm * cur_spd->quant_cnt) / 100;
7185cff7825Smh27603 
7195cff7825Smh27603 			/*
7205cff7825Smh27603 			 * The lwm for user threads are determined such that
7215cff7825Smh27603 			 * if CPU slows down, the load of work in the
7225cff7825Smh27603 			 * new speed would still keep the CPU at or below the
7235cff7825Smh27603 			 * user_hwm in the new speed.  This is to prevent
7245cff7825Smh27603 			 * the quick jump back up to higher speed.
7255cff7825Smh27603 			 */
7265cff7825Smh27603 			cur_spd->user_hwm = (cpudrv_pm_user_hwm *
7275cff7825Smh27603 			    cur_spd->quant_cnt) / 100;
7285cff7825Smh27603 			user_cnt_percent = CPUDRV_PM_USER_CNT_PERCENT(
7295cff7825Smh27603 			    cpudrv_pm_user_hwm, speeds, i);
7305cff7825Smh27603 			prev_spd->user_lwm =
7315cff7825Smh27603 			    (user_cnt_percent * prev_spd->quant_cnt) / 100;
7325cff7825Smh27603 		}
7335cff7825Smh27603 		prev_spd = cur_spd;
7345cff7825Smh27603 	}
7355cff7825Smh27603 	/* Slowest speed. Can't slow down anymore */
7365cff7825Smh27603 	cur_spd->idle_hwm = UINT_MAX;
7375cff7825Smh27603 	cur_spd->user_lwm = -1;
7385cff7825Smh27603 #ifdef	DEBUG
7395cff7825Smh27603 	DPRINTF(D_PM_INIT, ("cpudrv_pm_init: instance %d: head_spd spd %d, "
7405cff7825Smh27603 	    "num_spd %d\n", ddi_get_instance(cpudsp->dip),
7415cff7825Smh27603 	    cpupm->head_spd->speed, cpupm->num_spd));
7425cff7825Smh27603 	for (cur_spd = cpupm->head_spd; cur_spd; cur_spd = cur_spd->down_spd) {
7435cff7825Smh27603 		DPRINTF(D_PM_INIT, ("cpudrv_pm_init: instance %d: speed %d, "
7445cff7825Smh27603 		    "down_spd spd %d, idle_hwm %d, user_lwm %d, "
7455cff7825Smh27603 		    "up_spd spd %d, idle_lwm %d, user_hwm %d, "
7465cff7825Smh27603 		    "quant_cnt %d\n", ddi_get_instance(cpudsp->dip),
7475cff7825Smh27603 		    cur_spd->speed,
7485cff7825Smh27603 		    (cur_spd->down_spd ? cur_spd->down_spd->speed : 0),
7495cff7825Smh27603 		    cur_spd->idle_hwm, cur_spd->user_lwm,
7505cff7825Smh27603 		    (cur_spd->up_spd ? cur_spd->up_spd->speed : 0),
7515cff7825Smh27603 		    cur_spd->idle_lwm, cur_spd->user_hwm,
7525cff7825Smh27603 		    cur_spd->quant_cnt));
7535cff7825Smh27603 	}
7545cff7825Smh27603 #endif	/* DEBUG */
7555cff7825Smh27603 	CPUDRV_PM_FREE_SPEEDS(speeds, nspeeds);
7565cff7825Smh27603 	return (DDI_SUCCESS);
7575cff7825Smh27603 }
7585cff7825Smh27603 
7595cff7825Smh27603 /*
7605cff7825Smh27603  * Free CPU power management data.
7615cff7825Smh27603  */
7625cff7825Smh27603 static void
7635cff7825Smh27603 cpudrv_pm_free(cpudrv_devstate_t *cpudsp)
7645cff7825Smh27603 {
7655cff7825Smh27603 	cpudrv_pm_t 	*cpupm = &(cpudsp->cpudrv_pm);
7665cff7825Smh27603 	cpudrv_pm_spd_t	*cur_spd, *next_spd;
7675cff7825Smh27603 
7685cff7825Smh27603 	cur_spd = cpupm->head_spd;
7695cff7825Smh27603 	while (cur_spd) {
7705cff7825Smh27603 		next_spd = cur_spd->down_spd;
7715cff7825Smh27603 		kmem_free(cur_spd, sizeof (cpudrv_pm_spd_t));
7725cff7825Smh27603 		cur_spd = next_spd;
7735cff7825Smh27603 	}
7745cff7825Smh27603 	bzero(cpupm, sizeof (cpudrv_pm_t));
775*7f606aceSMark Haywood 	cpudrv_mach_pm_free(cpudsp);
7765cff7825Smh27603 }
7775cff7825Smh27603 
7785cff7825Smh27603 /*
7795cff7825Smh27603  * Create pm-components property.
7805cff7825Smh27603  */
7815cff7825Smh27603 static int
7825cff7825Smh27603 cpudrv_pm_comp_create(cpudrv_devstate_t *cpudsp)
7835cff7825Smh27603 {
7845cff7825Smh27603 	cpudrv_pm_t 	*cpupm = &(cpudsp->cpudrv_pm);
7855cff7825Smh27603 	cpudrv_pm_spd_t	*cur_spd;
7865cff7825Smh27603 	char		**pmc;
7875cff7825Smh27603 	int		size;
7885cff7825Smh27603 	char		name[] = "NAME=CPU Speed";
7895cff7825Smh27603 	int		i, j;
7905cff7825Smh27603 	uint_t		comp_spd;
7915cff7825Smh27603 	int		result = DDI_FAILURE;
7925cff7825Smh27603 
7935cff7825Smh27603 	pmc = kmem_zalloc((cpupm->num_spd + 1) * sizeof (char *), KM_SLEEP);
7945cff7825Smh27603 	size = CPUDRV_PM_COMP_SIZE();
7955cff7825Smh27603 	if (cpupm->num_spd > CPUDRV_PM_COMP_MAX_VAL) {
7965cff7825Smh27603 		cmn_err(CE_WARN, "cpudrv_pm_comp_create: instance %d: "
7975cff7825Smh27603 		    "number of speeds exceeded limits",
7985cff7825Smh27603 		    ddi_get_instance(cpudsp->dip));
7995cff7825Smh27603 		kmem_free(pmc, (cpupm->num_spd + 1) * sizeof (char *));
8005cff7825Smh27603 		return (result);
8015cff7825Smh27603 	}
8025cff7825Smh27603 
8035cff7825Smh27603 	for (i = cpupm->num_spd, cur_spd = cpupm->head_spd; i > 0;
8045cff7825Smh27603 	    i--, cur_spd = cur_spd->down_spd) {
8055cff7825Smh27603 		cur_spd->pm_level = i;
8065cff7825Smh27603 		pmc[i] = kmem_zalloc((size * sizeof (char)), KM_SLEEP);
8075cff7825Smh27603 		comp_spd = CPUDRV_PM_COMP_SPEED(cpupm, cur_spd);
8085cff7825Smh27603 		if (comp_spd > CPUDRV_PM_COMP_MAX_VAL) {
8095cff7825Smh27603 			cmn_err(CE_WARN, "cpudrv_pm_comp_create: "
8105cff7825Smh27603 			    "instance %d: speed exceeded limits",
8115cff7825Smh27603 			    ddi_get_instance(cpudsp->dip));
8125cff7825Smh27603 			for (j = cpupm->num_spd; j >= i; j--) {
8135cff7825Smh27603 				kmem_free(pmc[j], size * sizeof (char));
8145cff7825Smh27603 			}
8155cff7825Smh27603 			kmem_free(pmc, (cpupm->num_spd + 1) *
8165cff7825Smh27603 			    sizeof (char *));
8175cff7825Smh27603 			return (result);
8185cff7825Smh27603 		}
8195cff7825Smh27603 		CPUDRV_PM_COMP_SPRINT(pmc[i], cpupm, cur_spd, comp_spd)
8205cff7825Smh27603 		DPRINTF(D_PM_COMP_CREATE, ("cpudrv_pm_comp_create: "
8215cff7825Smh27603 		    "instance %d: pm-components power level %d string '%s'\n",
8225cff7825Smh27603 		    ddi_get_instance(cpudsp->dip), i, pmc[i]));
8235cff7825Smh27603 	}
8245cff7825Smh27603 	pmc[0] = kmem_zalloc(sizeof (name), KM_SLEEP);
8255cff7825Smh27603 	(void) strcat(pmc[0], name);
8265cff7825Smh27603 	DPRINTF(D_PM_COMP_CREATE, ("cpudrv_pm_comp_create: instance %d: "
8275cff7825Smh27603 	    "pm-components component name '%s'\n",
8285cff7825Smh27603 	    ddi_get_instance(cpudsp->dip), pmc[0]));
8295cff7825Smh27603 
8305cff7825Smh27603 	if (ddi_prop_update_string_array(DDI_DEV_T_NONE, cpudsp->dip,
8315cff7825Smh27603 	    "pm-components", pmc, cpupm->num_spd + 1) == DDI_PROP_SUCCESS) {
8325cff7825Smh27603 		result = DDI_SUCCESS;
8335cff7825Smh27603 	} else {
8345cff7825Smh27603 		cmn_err(CE_WARN, "cpudrv_pm_comp_create: instance %d: "
8355cff7825Smh27603 		    "can't create pm-components property",
8365cff7825Smh27603 		    ddi_get_instance(cpudsp->dip));
8375cff7825Smh27603 	}
8385cff7825Smh27603 
8395cff7825Smh27603 	for (i = cpupm->num_spd; i > 0; i--) {
8405cff7825Smh27603 		kmem_free(pmc[i], size * sizeof (char));
8415cff7825Smh27603 	}
8425cff7825Smh27603 	kmem_free(pmc[0], sizeof (name));
8435cff7825Smh27603 	kmem_free(pmc, (cpupm->num_spd + 1) * sizeof (char *));
8445cff7825Smh27603 	return (result);
8455cff7825Smh27603 }
8465cff7825Smh27603 
8475cff7825Smh27603 /*
8485cff7825Smh27603  * Mark a component idle.
8495cff7825Smh27603  */
8505cff7825Smh27603 #define	CPUDRV_PM_MONITOR_PM_IDLE_COMP(dip, cpupm) { \
8515cff7825Smh27603 	if ((cpupm)->pm_busycnt >= 1) { \
8525cff7825Smh27603 		if (pm_idle_component((dip), CPUDRV_PM_COMP_NUM) == \
8535cff7825Smh27603 		    DDI_SUCCESS) { \
8545cff7825Smh27603 			DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: " \
8555cff7825Smh27603 			    "instance %d: pm_idle_component called\n", \
8565cff7825Smh27603 			    ddi_get_instance((dip)))); \
8575cff7825Smh27603 			(cpupm)->pm_busycnt--; \
8585cff7825Smh27603 		} else { \
8595cff7825Smh27603 			cmn_err(CE_WARN, "cpudrv_pm_monitor: instance %d: " \
8605cff7825Smh27603 			    "can't idle CPU component", \
8615cff7825Smh27603 			    ddi_get_instance((dip))); \
8625cff7825Smh27603 		} \
8635cff7825Smh27603 	} \
8645cff7825Smh27603 }
8655cff7825Smh27603 
8665cff7825Smh27603 /*
8675cff7825Smh27603  * Marks a component busy in both PM framework and driver state structure.
8685cff7825Smh27603  */
8695cff7825Smh27603 #define	CPUDRV_PM_MONITOR_PM_BUSY_COMP(dip, cpupm) { \
8705cff7825Smh27603 	if ((cpupm)->pm_busycnt < 1) { \
8715cff7825Smh27603 		if (pm_busy_component((dip), CPUDRV_PM_COMP_NUM) == \
8725cff7825Smh27603 		    DDI_SUCCESS) { \
8735cff7825Smh27603 			DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: " \
8745cff7825Smh27603 			    "instance %d: pm_busy_component called\n", \
8755cff7825Smh27603 			    ddi_get_instance((dip)))); \
8765cff7825Smh27603 			(cpupm)->pm_busycnt++; \
8775cff7825Smh27603 		} else { \
8785cff7825Smh27603 			cmn_err(CE_WARN, "cpudrv_pm_monitor: instance %d: " \
8795cff7825Smh27603 			    "can't busy CPU component", \
8805cff7825Smh27603 			    ddi_get_instance((dip))); \
8815cff7825Smh27603 		} \
8825cff7825Smh27603 	} \
8835cff7825Smh27603 }
8845cff7825Smh27603 
8855cff7825Smh27603 /*
8865cff7825Smh27603  * Marks a component busy and calls pm_raise_power().
8875cff7825Smh27603  */
8885cff7825Smh27603 #define	CPUDRV_PM_MONITOR_PM_BUSY_AND_RAISE(dip, cpudsp, cpupm, new_level) { \
8895cff7825Smh27603 	/* \
8905cff7825Smh27603 	 * Mark driver and PM framework busy first so framework doesn't try \
8915cff7825Smh27603 	 * to bring CPU to lower speed when we need to be at higher speed. \
8925cff7825Smh27603 	 */ \
8935cff7825Smh27603 	CPUDRV_PM_MONITOR_PM_BUSY_COMP((dip), (cpupm)); \
8945cff7825Smh27603 	mutex_exit(&(cpudsp)->lock); \
8955cff7825Smh27603 	DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: instance %d: " \
8965cff7825Smh27603 	    "pm_raise_power called to %d\n", ddi_get_instance((dip)), \
8975cff7825Smh27603 		(new_level))); \
8985cff7825Smh27603 	if (pm_raise_power((dip), CPUDRV_PM_COMP_NUM, (new_level)) != \
8995cff7825Smh27603 	    DDI_SUCCESS) { \
9005cff7825Smh27603 		cmn_err(CE_WARN, "cpudrv_pm_monitor: instance %d: can't " \
9015cff7825Smh27603 		    "raise CPU power level", ddi_get_instance((dip))); \
9025cff7825Smh27603 	} \
9035cff7825Smh27603 	mutex_enter(&(cpudsp)->lock); \
9045cff7825Smh27603 }
9055cff7825Smh27603 
9065cff7825Smh27603 /*
9075cff7825Smh27603  * In order to monitor a CPU, we need to hold cpu_lock to access CPU
9085cff7825Smh27603  * statistics. Holding cpu_lock is not allowed from a callout routine.
9095cff7825Smh27603  * We dispatch a taskq to do that job.
9105cff7825Smh27603  */
9115cff7825Smh27603 static void
9125cff7825Smh27603 cpudrv_pm_monitor_disp(void *arg)
9135cff7825Smh27603 {
9145cff7825Smh27603 	cpudrv_devstate_t	*cpudsp = (cpudrv_devstate_t *)arg;
9155cff7825Smh27603 
9165cff7825Smh27603 	/*
9175cff7825Smh27603 	 * We are here because the last task has scheduled a timeout.
9185cff7825Smh27603 	 * The queue should be empty at this time.
9195cff7825Smh27603 	 */
9205cff7825Smh27603 	mutex_enter(&cpudsp->cpudrv_pm.timeout_lock);
9215cff7825Smh27603 	if (!taskq_dispatch(cpudsp->cpudrv_pm.tq, cpudrv_pm_monitor, arg,
9225cff7825Smh27603 	    TQ_NOSLEEP)) {
9235cff7825Smh27603 		mutex_exit(&cpudsp->cpudrv_pm.timeout_lock);
9245cff7825Smh27603 		DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor_disp: failed to "
9255cff7825Smh27603 		    "dispatch the cpudrv_pm_monitor taskq\n"));
9265cff7825Smh27603 		mutex_enter(&cpudsp->lock);
9275cff7825Smh27603 		CPUDRV_PM_MONITOR_INIT(cpudsp);
9285cff7825Smh27603 		mutex_exit(&cpudsp->lock);
9295cff7825Smh27603 		return;
9305cff7825Smh27603 	}
9315cff7825Smh27603 	cpudsp->cpudrv_pm.timeout_count++;
9325cff7825Smh27603 	mutex_exit(&cpudsp->cpudrv_pm.timeout_lock);
9335cff7825Smh27603 }
9345cff7825Smh27603 
9355cff7825Smh27603 /*
9365cff7825Smh27603  * Monitors each CPU for the amount of time idle thread was running in the
9375cff7825Smh27603  * last quantum and arranges for the CPU to go to the lower or higher speed.
9385cff7825Smh27603  * Called at the time interval appropriate for the current speed. The
9395cff7825Smh27603  * time interval for normal speed is CPUDRV_PM_QUANT_CNT_NORMAL. The time
9405cff7825Smh27603  * interval for other speeds (including unknown speed) is
9415cff7825Smh27603  * CPUDRV_PM_QUANT_CNT_OTHR.
9425cff7825Smh27603  */
9435cff7825Smh27603 static void
9445cff7825Smh27603 cpudrv_pm_monitor(void *arg)
9455cff7825Smh27603 {
9465cff7825Smh27603 	cpudrv_devstate_t	*cpudsp = (cpudrv_devstate_t *)arg;
9475cff7825Smh27603 	cpudrv_pm_t		*cpupm;
9485cff7825Smh27603 	cpudrv_pm_spd_t		*cur_spd, *new_spd;
9495cff7825Smh27603 	cpu_t			*cp;
9505cff7825Smh27603 	dev_info_t		*dip;
9515cff7825Smh27603 	uint_t			idle_cnt, user_cnt, system_cnt;
9525cff7825Smh27603 	clock_t			lbolt_cnt;
9535cff7825Smh27603 	hrtime_t		msnsecs[NCMSTATES];
9545cff7825Smh27603 	boolean_t		is_ready;
9555cff7825Smh27603 
9565cff7825Smh27603 #define	GET_CPU_MSTATE_CNT(state, cnt) \
9575cff7825Smh27603 	msnsecs[state] = NSEC_TO_TICK(msnsecs[state]); \
9585cff7825Smh27603 	if (cpupm->lastquan_mstate[state] > msnsecs[state]) \
9595cff7825Smh27603 		msnsecs[state] = cpupm->lastquan_mstate[state]; \
9605cff7825Smh27603 	cnt = msnsecs[state] - cpupm->lastquan_mstate[state]; \
9615cff7825Smh27603 	cpupm->lastquan_mstate[state] = msnsecs[state]
9625cff7825Smh27603 
9635cff7825Smh27603 	mutex_enter(&cpudsp->lock);
9645cff7825Smh27603 	cpupm = &(cpudsp->cpudrv_pm);
9655cff7825Smh27603 	if (cpupm->timeout_id == 0) {
9665cff7825Smh27603 		mutex_exit(&cpudsp->lock);
9675cff7825Smh27603 		goto do_return;
9685cff7825Smh27603 	}
9695cff7825Smh27603 	cur_spd = cpupm->cur_spd;
9705cff7825Smh27603 	dip = cpudsp->dip;
9715cff7825Smh27603 
9725cff7825Smh27603 	/*
9735cff7825Smh27603 	 * We assume that a CPU is initialized and has a valid cpu_t
9745cff7825Smh27603 	 * structure, if it is ready for cross calls. If this changes,
9755cff7825Smh27603 	 * additional checks might be needed.
9765cff7825Smh27603 	 *
9775cff7825Smh27603 	 * Additionally, for x86 platforms we cannot power manage
9785cff7825Smh27603 	 * any one instance, until all instances have been initialized.
9795cff7825Smh27603 	 * That's because we don't know what the CPU domains look like
9805cff7825Smh27603 	 * until all instances have been initialized.
9815cff7825Smh27603 	 */
9825cff7825Smh27603 	is_ready = CPUDRV_PM_XCALL_IS_READY(cpudsp->cpu_id);
9835cff7825Smh27603 	if (!is_ready) {
9845cff7825Smh27603 		DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: instance %d: "
9855cff7825Smh27603 		    "CPU not ready for x-calls\n", ddi_get_instance(dip)));
986*7f606aceSMark Haywood 	} else if (!(is_ready = cpudrv_pm_power_ready())) {
9875cff7825Smh27603 		DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: instance %d: "
988*7f606aceSMark Haywood 		    "waiting for all CPUs to be power manageable\n",
9895cff7825Smh27603 		    ddi_get_instance(dip)));
9905cff7825Smh27603 	}
9915cff7825Smh27603 	if (!is_ready) {
9925cff7825Smh27603 		/*
9935cff7825Smh27603 		 * Make sure that we are busy so that framework doesn't
9945cff7825Smh27603 		 * try to bring us down in this situation.
9955cff7825Smh27603 		 */
9965cff7825Smh27603 		CPUDRV_PM_MONITOR_PM_BUSY_COMP(dip, cpupm);
9975cff7825Smh27603 		CPUDRV_PM_MONITOR_INIT(cpudsp);
9985cff7825Smh27603 		mutex_exit(&cpudsp->lock);
9995cff7825Smh27603 		goto do_return;
10005cff7825Smh27603 	}
10015cff7825Smh27603 
10025cff7825Smh27603 	/*
10035cff7825Smh27603 	 * Make sure that we are still not at unknown power level.
10045cff7825Smh27603 	 */
10055cff7825Smh27603 	if (cur_spd == NULL) {
10065cff7825Smh27603 		DPRINTF(D_PM_MONITOR, ("cpudrv_pm_monitor: instance %d: "
10075cff7825Smh27603 		    "cur_spd is unknown\n", ddi_get_instance(dip)));
10085cff7825Smh27603 		CPUDRV_PM_MONITOR_PM_BUSY_AND_RAISE(dip, cpudsp, cpupm,
10095cff7825Smh27603 		    cpupm->targ_spd->pm_level);
10105cff7825Smh27603 		/*
10115cff7825Smh27603 		 * We just changed the speed. Wait till at least next
10125cff7825Smh27603 		 * call to this routine before proceeding ahead.
10135cff7825Smh27603 		 */
10145cff7825Smh27603 		CPUDRV_PM_MONITOR_INIT(cpudsp);
10155cff7825Smh27603 		mutex_exit(&cpudsp->lock);
10165cff7825Smh27603 		goto do_return;
10175cff7825Smh27603 	}
10185cff7825Smh27603 
10195cff7825Smh27603 	mutex_enter(&cpu_lock);
10205cff7825Smh27603 	if ((cp = cpu_get(cpudsp->cpu_id)) == NULL) {
10215cff7825Smh27603 		mutex_exit(&cpu_lock);
10225cff7825Smh27603 		CPUDRV_PM_MONITOR_INIT(cpudsp);
10235cff7825Smh27603 		mutex_exit(&cpudsp->lock);
10245cff7825Smh27603 		cmn_err(CE_WARN, "cpudrv_pm_monitor: instance %d: can't get "
10255cff7825Smh27603 		    "cpu_t", ddi_get_instance(dip));
10265cff7825Smh27603 		goto do_return;
10275cff7825Smh27603 	}
102868afbec1Smh27603 
102968afbec1Smh27603 	if (!cpupm->pm_started) {
103068afbec1Smh27603 		cpupm->pm_started = B_TRUE;
10315cff7825Smh27603 		set_supp_freqs(cp, cpupm);
103268afbec1Smh27603 	}
10335cff7825Smh27603 
10344b3651bdSmh27603 	get_cpu_mstate(cp, msnsecs);
10355cff7825Smh27603 	GET_CPU_MSTATE_CNT(CMS_IDLE, idle_cnt);
10365cff7825Smh27603 	GET_CPU_MSTATE_CNT(CMS_USER, user_cnt);
10375cff7825Smh27603 	GET_CPU_MSTATE_CNT(CMS_SYSTEM, system_cnt);
10385cff7825Smh27603 
10395cff7825Smh27603 	/*
10405cff7825Smh27603 	 * We can't do anything when we have just switched to a state
10415cff7825Smh27603 	 * because there is no valid timestamp.
10425cff7825Smh27603 	 */
10435cff7825Smh27603 	if (cpupm->lastquan_lbolt == 0) {
10445cff7825Smh27603 		cpupm->lastquan_lbolt = lbolt;
10455cff7825Smh27603 		mutex_exit(&cpu_lock);
10465cff7825Smh27603 		CPUDRV_PM_MONITOR_INIT(cpudsp);
10475cff7825Smh27603 		mutex_exit(&cpudsp->lock);
10485cff7825Smh27603 		goto do_return;
10495cff7825Smh27603 	}
10505cff7825Smh27603 
10515cff7825Smh27603 	/*
10525cff7825Smh27603 	 * Various watermarks are based on this routine being called back
10535cff7825Smh27603 	 * exactly at the requested period. This is not guaranteed
10545cff7825Smh27603 	 * because this routine is called from a taskq that is dispatched
10555cff7825Smh27603 	 * from a timeout routine.  Handle this by finding out how many
10565cff7825Smh27603 	 * ticks have elapsed since the last call (lbolt_cnt) and adjusting
10575cff7825Smh27603 	 * the idle_cnt based on the delay added to the requested period
10585cff7825Smh27603 	 * by timeout and taskq.
10595cff7825Smh27603 	 */
10605cff7825Smh27603 	lbolt_cnt = lbolt - cpupm->lastquan_lbolt;
10615cff7825Smh27603 	cpupm->lastquan_lbolt = lbolt;
10625cff7825Smh27603 	mutex_exit(&cpu_lock);
10635cff7825Smh27603 	/*
10645cff7825Smh27603 	 * Time taken between recording the current counts and
10655cff7825Smh27603 	 * arranging the next call of this routine is an error in our
10665cff7825Smh27603 	 * calculation. We minimize the error by calling
10675cff7825Smh27603 	 * CPUDRV_PM_MONITOR_INIT() here instead of end of this routine.
10685cff7825Smh27603 	 */
10695cff7825Smh27603 	CPUDRV_PM_MONITOR_INIT(cpudsp);
10705cff7825Smh27603 	DPRINTF(D_PM_MONITOR_VERBOSE, ("cpudrv_pm_monitor: instance %d: "
10715cff7825Smh27603 	    "idle count %d, user count %d, system count %d, pm_level %d, "
10725cff7825Smh27603 	    "pm_busycnt %d\n", ddi_get_instance(dip), idle_cnt, user_cnt,
10735cff7825Smh27603 	    system_cnt, cur_spd->pm_level, cpupm->pm_busycnt));
10745cff7825Smh27603 
10755cff7825Smh27603 #ifdef	DEBUG
10765cff7825Smh27603 	/*
10775cff7825Smh27603 	 * Notify that timeout and taskq has caused delays and we need to
10785cff7825Smh27603 	 * scale our parameters accordingly.
10795cff7825Smh27603 	 *
10805cff7825Smh27603 	 * To get accurate result, don't turn on other DPRINTFs with
10815cff7825Smh27603 	 * the following DPRINTF. PROM calls generated by other
10825cff7825Smh27603 	 * DPRINTFs changes the timing.
10835cff7825Smh27603 	 */
10845cff7825Smh27603 	if (lbolt_cnt > cur_spd->quant_cnt) {
10855cff7825Smh27603 		DPRINTF(D_PM_MONITOR_DELAY, ("cpudrv_pm_monitor: instance %d: "
10865cff7825Smh27603 		    "lbolt count %ld > quantum_count %u\n",
10875cff7825Smh27603 		    ddi_get_instance(dip), lbolt_cnt, cur_spd->quant_cnt));
10885cff7825Smh27603 	}
10895cff7825Smh27603 #endif	/* DEBUG */
10905cff7825Smh27603 
10915cff7825Smh27603 	/*
10925cff7825Smh27603 	 * Adjust counts based on the delay added by timeout and taskq.
10935cff7825Smh27603 	 */
10945cff7825Smh27603 	idle_cnt = (idle_cnt * cur_spd->quant_cnt) / lbolt_cnt;
10955cff7825Smh27603 	user_cnt = (user_cnt * cur_spd->quant_cnt) / lbolt_cnt;
10965cff7825Smh27603 	if ((user_cnt > cur_spd->user_hwm) || (idle_cnt < cur_spd->idle_lwm &&
10975cff7825Smh27603 	    cur_spd->idle_blwm_cnt >= cpudrv_pm_idle_blwm_cnt_max)) {
10985cff7825Smh27603 		cur_spd->idle_blwm_cnt = 0;
10995cff7825Smh27603 		cur_spd->idle_bhwm_cnt = 0;
11005cff7825Smh27603 		/*
11015cff7825Smh27603 		 * In normal situation, arrange to go to next higher speed.
11025cff7825Smh27603 		 * If we are running in special direct pm mode, we just stay
11035cff7825Smh27603 		 * at the current speed.
11045cff7825Smh27603 		 */
11055cff7825Smh27603 		if (cur_spd == cur_spd->up_spd || cpudrv_direct_pm) {
11065cff7825Smh27603 			CPUDRV_PM_MONITOR_PM_BUSY_COMP(dip, cpupm);
11075cff7825Smh27603 		} else {
11085cff7825Smh27603 			new_spd = cur_spd->up_spd;
11095cff7825Smh27603 			CPUDRV_PM_MONITOR_PM_BUSY_AND_RAISE(dip, cpudsp, cpupm,
11105cff7825Smh27603 			    new_spd->pm_level);
11115cff7825Smh27603 		}
11125cff7825Smh27603 	} else if ((user_cnt <= cur_spd->user_lwm) &&
11135cff7825Smh27603 	    (idle_cnt >= cur_spd->idle_hwm) || !CPU_ACTIVE(cp)) {
11145cff7825Smh27603 		cur_spd->idle_blwm_cnt = 0;
11155cff7825Smh27603 		cur_spd->idle_bhwm_cnt = 0;
11165cff7825Smh27603 		/*
11175cff7825Smh27603 		 * Arrange to go to next lower speed by informing our idle
11185cff7825Smh27603 		 * status to the power management framework.
11195cff7825Smh27603 		 */
11205cff7825Smh27603 		CPUDRV_PM_MONITOR_PM_IDLE_COMP(dip, cpupm);
11215cff7825Smh27603 	} else {
11225cff7825Smh27603 		/*
11235cff7825Smh27603 		 * If we are between the idle water marks and have not
11245cff7825Smh27603 		 * been here enough consecutive times to be considered
11255cff7825Smh27603 		 * busy, just increment the count and return.
11265cff7825Smh27603 		 */
11275cff7825Smh27603 		if ((idle_cnt < cur_spd->idle_hwm) &&
11285cff7825Smh27603 		    (idle_cnt >= cur_spd->idle_lwm) &&
11295cff7825Smh27603 		    (cur_spd->idle_bhwm_cnt < cpudrv_pm_idle_bhwm_cnt_max)) {
11305cff7825Smh27603 			cur_spd->idle_blwm_cnt = 0;
11315cff7825Smh27603 			cur_spd->idle_bhwm_cnt++;
11325cff7825Smh27603 			mutex_exit(&cpudsp->lock);
11335cff7825Smh27603 			goto do_return;
11345cff7825Smh27603 		}
11355cff7825Smh27603 		if (idle_cnt < cur_spd->idle_lwm) {
11365cff7825Smh27603 			cur_spd->idle_blwm_cnt++;
11375cff7825Smh27603 			cur_spd->idle_bhwm_cnt = 0;
11385cff7825Smh27603 		}
11395cff7825Smh27603 		/*
11405cff7825Smh27603 		 * Arranges to stay at the current speed.
11415cff7825Smh27603 		 */
11425cff7825Smh27603 		CPUDRV_PM_MONITOR_PM_BUSY_COMP(dip, cpupm);
11435cff7825Smh27603 	}
11445cff7825Smh27603 	mutex_exit(&cpudsp->lock);
11455cff7825Smh27603 do_return:
11465cff7825Smh27603 	mutex_enter(&cpupm->timeout_lock);
11475cff7825Smh27603 	ASSERT(cpupm->timeout_count > 0);
11485cff7825Smh27603 	cpupm->timeout_count--;
11495cff7825Smh27603 	cv_signal(&cpupm->timeout_cv);
11505cff7825Smh27603 	mutex_exit(&cpupm->timeout_lock);
11515cff7825Smh27603 }
1152