xref: /titanic_44/usr/src/uts/common/io/cpudrv.c (revision 444f66e774d0e4f449866c7f5e64095f2fb0def0)
15cff7825Smh27603 /*
25cff7825Smh27603  * CDDL HEADER START
35cff7825Smh27603  *
45cff7825Smh27603  * The contents of this file are subject to the terms of the
55cff7825Smh27603  * Common Development and Distribution License (the "License").
65cff7825Smh27603  * You may not use this file except in compliance with the License.
75cff7825Smh27603  *
85cff7825Smh27603  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
95cff7825Smh27603  * or http://www.opensolaris.org/os/licensing.
105cff7825Smh27603  * See the License for the specific language governing permissions
115cff7825Smh27603  * and limitations under the License.
125cff7825Smh27603  *
135cff7825Smh27603  * When distributing Covered Code, include this CDDL HEADER in each
145cff7825Smh27603  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
155cff7825Smh27603  * If applicable, add the following below this CDDL HEADER, with the
165cff7825Smh27603  * fields enclosed by brackets "[]" replaced with your own identifying
175cff7825Smh27603  * information: Portions Copyright [yyyy] [name of copyright owner]
185cff7825Smh27603  *
195cff7825Smh27603  * CDDL HEADER END
205cff7825Smh27603  */
215cff7825Smh27603 /*
22fcddbe1fSMark Haywood  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
235cff7825Smh27603  * Use is subject to license terms.
245cff7825Smh27603  */
25*444f66e7SMark Haywood /*
26*444f66e7SMark Haywood  * Copyright (c) 2009,  Intel Corporation.
27*444f66e7SMark Haywood  * All Rights Reserved.
28*444f66e7SMark Haywood  */
295cff7825Smh27603 
305cff7825Smh27603 /*
315cff7825Smh27603  * CPU Device driver. The driver is not DDI-compliant.
325cff7825Smh27603  *
335cff7825Smh27603  * The driver supports following features:
345cff7825Smh27603  *	- Power management.
355cff7825Smh27603  */
365cff7825Smh27603 
375cff7825Smh27603 #include <sys/types.h>
385cff7825Smh27603 #include <sys/param.h>
395cff7825Smh27603 #include <sys/errno.h>
405cff7825Smh27603 #include <sys/modctl.h>
415cff7825Smh27603 #include <sys/kmem.h>
425cff7825Smh27603 #include <sys/conf.h>
435cff7825Smh27603 #include <sys/cmn_err.h>
445cff7825Smh27603 #include <sys/stat.h>
455cff7825Smh27603 #include <sys/debug.h>
465cff7825Smh27603 #include <sys/systm.h>
475cff7825Smh27603 #include <sys/ddi.h>
485cff7825Smh27603 #include <sys/sunddi.h>
49c210ded4Sesaxe #include <sys/sdt.h>
500e751525SEric Saxe #include <sys/epm.h>
515cff7825Smh27603 #include <sys/machsystm.h>
525cff7825Smh27603 #include <sys/x_call.h>
537f606aceSMark Haywood #include <sys/cpudrv_mach.h>
545cff7825Smh27603 #include <sys/msacct.h>
555cff7825Smh27603 
565cff7825Smh27603 /*
575cff7825Smh27603  * CPU power management
585cff7825Smh27603  *
595cff7825Smh27603  * The supported power saving model is to slow down the CPU (on SPARC by
605cff7825Smh27603  * dividing the CPU clock and on x86 by dropping down a P-state).
615cff7825Smh27603  * Periodically we determine the amount of time the CPU is running
625cff7825Smh27603  * idle thread and threads in user mode during the last quantum.  If the idle
635cff7825Smh27603  * thread was running less than its low water mark for current speed for
645cff7825Smh27603  * number of consecutive sampling periods, or number of running threads in
655cff7825Smh27603  * user mode are above its high water mark, we arrange to go to the higher
665cff7825Smh27603  * speed.  If the idle thread was running more than its high water mark without
675cff7825Smh27603  * dropping a number of consecutive times below the mark, and number of threads
685cff7825Smh27603  * running in user mode are below its low water mark, we arrange to go to the
695cff7825Smh27603  * next lower speed.  While going down, we go through all the speeds.  While
705cff7825Smh27603  * going up we go to the maximum speed to minimize impact on the user, but have
715cff7825Smh27603  * provisions in the driver to go to other speeds.
725cff7825Smh27603  *
735cff7825Smh27603  * The driver does not have knowledge of a particular implementation of this
745cff7825Smh27603  * scheme and will work with all CPUs supporting this model. On SPARC, the
755cff7825Smh27603  * driver determines supported speeds by looking at 'clock-divisors' property
765cff7825Smh27603  * created by OBP. On x86, the driver retrieves the supported speeds from
775cff7825Smh27603  * ACPI.
785cff7825Smh27603  */
795cff7825Smh27603 
805cff7825Smh27603 /*
815cff7825Smh27603  * Configuration function prototypes and data structures
825cff7825Smh27603  */
835cff7825Smh27603 static int cpudrv_attach(dev_info_t *dip, ddi_attach_cmd_t cmd);
845cff7825Smh27603 static int cpudrv_detach(dev_info_t *dip, ddi_detach_cmd_t cmd);
855cff7825Smh27603 static int cpudrv_power(dev_info_t *dip, int comp, int level);
865cff7825Smh27603 
875cff7825Smh27603 struct dev_ops cpudrv_ops = {
885cff7825Smh27603 	DEVO_REV,		/* rev */
895cff7825Smh27603 	0,			/* refcnt */
905cff7825Smh27603 	nodev,			/* getinfo */
915cff7825Smh27603 	nulldev,		/* identify */
925cff7825Smh27603 	nulldev,		/* probe */
935cff7825Smh27603 	cpudrv_attach,		/* attach */
945cff7825Smh27603 	cpudrv_detach,		/* detach */
955cff7825Smh27603 	nodev,			/* reset */
965cff7825Smh27603 	(struct cb_ops *)NULL,	/* cb_ops */
975cff7825Smh27603 	(struct bus_ops *)NULL,	/* bus_ops */
9819397407SSherry Moore 	cpudrv_power,		/* power */
9919397407SSherry Moore 	ddi_quiesce_not_needed,		/* quiesce */
1005cff7825Smh27603 };
1015cff7825Smh27603 
1025cff7825Smh27603 static struct modldrv modldrv = {
1035cff7825Smh27603 	&mod_driverops,			/* modops */
1047f606aceSMark Haywood 	"CPU Driver",			/* linkinfo */
1055cff7825Smh27603 	&cpudrv_ops,			/* dev_ops */
1065cff7825Smh27603 };
1075cff7825Smh27603 
1085cff7825Smh27603 static struct modlinkage modlinkage = {
1095cff7825Smh27603 	MODREV_1,		/* rev */
1105cff7825Smh27603 	&modldrv,		/* linkage */
1115cff7825Smh27603 	NULL
1125cff7825Smh27603 };
1135cff7825Smh27603 
1145cff7825Smh27603 /*
1155cff7825Smh27603  * Function prototypes
1165cff7825Smh27603  */
1170e751525SEric Saxe static int cpudrv_init(cpudrv_devstate_t *cpudsp);
1180e751525SEric Saxe static void cpudrv_free(cpudrv_devstate_t *cpudsp);
1190e751525SEric Saxe static int cpudrv_comp_create(cpudrv_devstate_t *cpudsp);
1200e751525SEric Saxe static void cpudrv_monitor_disp(void *arg);
1210e751525SEric Saxe static void cpudrv_monitor(void *arg);
1225cff7825Smh27603 
1235cff7825Smh27603 /*
1245cff7825Smh27603  * Driver global variables
1255cff7825Smh27603  */
1265cff7825Smh27603 uint_t cpudrv_debug = 0;
1275cff7825Smh27603 void *cpudrv_state;
1280e751525SEric Saxe static uint_t cpudrv_idle_hwm = CPUDRV_IDLE_HWM;
1290e751525SEric Saxe static uint_t cpudrv_idle_lwm = CPUDRV_IDLE_LWM;
1300e751525SEric Saxe static uint_t cpudrv_idle_buf_zone = CPUDRV_IDLE_BUF_ZONE;
1310e751525SEric Saxe static uint_t cpudrv_idle_bhwm_cnt_max = CPUDRV_IDLE_BHWM_CNT_MAX;
1320e751525SEric Saxe static uint_t cpudrv_idle_blwm_cnt_max = CPUDRV_IDLE_BLWM_CNT_MAX;
1330e751525SEric Saxe static uint_t cpudrv_user_hwm = CPUDRV_USER_HWM;
1340e751525SEric Saxe 
1350e751525SEric Saxe boolean_t cpudrv_enabled = B_TRUE;
1365cff7825Smh27603 
1375cff7825Smh27603 /*
1385cff7825Smh27603  * cpudrv_direct_pm allows user applications to directly control the
1395cff7825Smh27603  * power state transitions (direct pm) without following the normal
1405cff7825Smh27603  * direct pm protocol. This is needed because the normal protocol
1415cff7825Smh27603  * requires that a device only be lowered when it is idle, and be
1425cff7825Smh27603  * brought up when it request to do so by calling pm_raise_power().
1435cff7825Smh27603  * Ignoring this protocol is harmless for CPU (other than speed).
1445cff7825Smh27603  * Moreover it might be the case that CPU is never idle or wants
1455cff7825Smh27603  * to be at higher speed because of the addition CPU cycles required
1465cff7825Smh27603  * to run the user application.
1475cff7825Smh27603  *
1485cff7825Smh27603  * The driver will still report idle/busy status to the framework. Although
1495cff7825Smh27603  * framework will ignore this information for direct pm devices and not
1505cff7825Smh27603  * try to bring them down when idle, user applications can still use this
1515cff7825Smh27603  * information if they wants.
1525cff7825Smh27603  *
1535cff7825Smh27603  * In the future, provide an ioctl to control setting of this mode. In
1545cff7825Smh27603  * that case, this variable should move to the state structure and
1555cff7825Smh27603  * be protected by the lock in the state structure.
1565cff7825Smh27603  */
1575cff7825Smh27603 int cpudrv_direct_pm = 0;
1585cff7825Smh27603 
1595cff7825Smh27603 /*
1605cff7825Smh27603  * Arranges for the handler function to be called at the interval suitable
1615cff7825Smh27603  * for current speed.
1625cff7825Smh27603  */
1630e751525SEric Saxe #define	CPUDRV_MONITOR_INIT(cpudsp) { \
1640e751525SEric Saxe     if (cpudrv_is_enabled(cpudsp)) {	      \
1655cff7825Smh27603 		ASSERT(mutex_owned(&(cpudsp)->lock)); \
1667f606aceSMark Haywood 		(cpudsp)->cpudrv_pm.timeout_id = \
1670e751525SEric Saxe 		    timeout(cpudrv_monitor_disp, \
1685cff7825Smh27603 		    (cpudsp), (((cpudsp)->cpudrv_pm.cur_spd == NULL) ? \
1690e751525SEric Saxe 		    CPUDRV_QUANT_CNT_OTHR : \
1705cff7825Smh27603 		    (cpudsp)->cpudrv_pm.cur_spd->quant_cnt)); \
1717f606aceSMark Haywood 	} \
1725cff7825Smh27603 }
1735cff7825Smh27603 
1745cff7825Smh27603 /*
1755cff7825Smh27603  * Arranges for the handler function not to be called back.
1765cff7825Smh27603  */
1770e751525SEric Saxe #define	CPUDRV_MONITOR_FINI(cpudsp) { \
1785cff7825Smh27603 	timeout_id_t tmp_tid; \
1795cff7825Smh27603 	ASSERT(mutex_owned(&(cpudsp)->lock)); \
1805cff7825Smh27603 	tmp_tid = (cpudsp)->cpudrv_pm.timeout_id; \
1815cff7825Smh27603 	(cpudsp)->cpudrv_pm.timeout_id = 0; \
1825cff7825Smh27603 	mutex_exit(&(cpudsp)->lock); \
1837f606aceSMark Haywood 	if (tmp_tid != 0) { \
1845cff7825Smh27603 		(void) untimeout(tmp_tid); \
1855cff7825Smh27603 		mutex_enter(&(cpudsp)->cpudrv_pm.timeout_lock); \
1865cff7825Smh27603 		while ((cpudsp)->cpudrv_pm.timeout_count != 0) \
1875cff7825Smh27603 			cv_wait(&(cpudsp)->cpudrv_pm.timeout_cv, \
1885cff7825Smh27603 			    &(cpudsp)->cpudrv_pm.timeout_lock); \
1895cff7825Smh27603 		mutex_exit(&(cpudsp)->cpudrv_pm.timeout_lock); \
1907f606aceSMark Haywood 	} \
1915cff7825Smh27603 	mutex_enter(&(cpudsp)->lock); \
1925cff7825Smh27603 }
1935cff7825Smh27603 
1945cff7825Smh27603 int
1955cff7825Smh27603 _init(void)
1965cff7825Smh27603 {
1975cff7825Smh27603 	int	error;
1985cff7825Smh27603 
1995cff7825Smh27603 	DPRINTF(D_INIT, (" _init: function called\n"));
2005cff7825Smh27603 	if ((error = ddi_soft_state_init(&cpudrv_state,
2015cff7825Smh27603 	    sizeof (cpudrv_devstate_t), 0)) != 0) {
2025cff7825Smh27603 		return (error);
2035cff7825Smh27603 	}
2045cff7825Smh27603 
2055cff7825Smh27603 	if ((error = mod_install(&modlinkage)) != 0)  {
2065cff7825Smh27603 		ddi_soft_state_fini(&cpudrv_state);
2075cff7825Smh27603 	}
2085cff7825Smh27603 
2095cff7825Smh27603 	/*
2105cff7825Smh27603 	 * Callbacks used by the PPM driver.
2115cff7825Smh27603 	 */
2120e751525SEric Saxe 	CPUDRV_SET_PPM_CALLBACKS();
2135cff7825Smh27603 	return (error);
2145cff7825Smh27603 }
2155cff7825Smh27603 
2165cff7825Smh27603 int
2175cff7825Smh27603 _fini(void)
2185cff7825Smh27603 {
2195cff7825Smh27603 	int	error;
2205cff7825Smh27603 
2215cff7825Smh27603 	DPRINTF(D_FINI, (" _fini: function called\n"));
2225cff7825Smh27603 	if ((error = mod_remove(&modlinkage)) == 0) {
2235cff7825Smh27603 		ddi_soft_state_fini(&cpudrv_state);
2245cff7825Smh27603 	}
2255cff7825Smh27603 
2265cff7825Smh27603 	return (error);
2275cff7825Smh27603 }
2285cff7825Smh27603 
2295cff7825Smh27603 int
2305cff7825Smh27603 _info(struct modinfo *modinfop)
2315cff7825Smh27603 {
2325cff7825Smh27603 	return (mod_info(&modlinkage, modinfop));
2335cff7825Smh27603 }
2345cff7825Smh27603 
2355cff7825Smh27603 /*
2365cff7825Smh27603  * Driver attach(9e) entry point.
2375cff7825Smh27603  */
2385cff7825Smh27603 static int
2395cff7825Smh27603 cpudrv_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
2405cff7825Smh27603 {
2415cff7825Smh27603 	int			instance;
2425cff7825Smh27603 	cpudrv_devstate_t	*cpudsp;
2435cff7825Smh27603 
2445cff7825Smh27603 	instance = ddi_get_instance(dip);
2455cff7825Smh27603 
2465cff7825Smh27603 	switch (cmd) {
2475cff7825Smh27603 	case DDI_ATTACH:
2485cff7825Smh27603 		DPRINTF(D_ATTACH, ("cpudrv_attach: instance %d: "
2495cff7825Smh27603 		    "DDI_ATTACH called\n", instance));
2500e751525SEric Saxe 		if (!cpudrv_is_enabled(NULL))
2517f606aceSMark Haywood 			return (DDI_FAILURE);
2525cff7825Smh27603 		if (ddi_soft_state_zalloc(cpudrv_state, instance) !=
2535cff7825Smh27603 		    DDI_SUCCESS) {
2545cff7825Smh27603 			cmn_err(CE_WARN, "cpudrv_attach: instance %d: "
2555cff7825Smh27603 			    "can't allocate state", instance);
2560e751525SEric Saxe 			cpudrv_enabled = B_FALSE;
2575cff7825Smh27603 			return (DDI_FAILURE);
2585cff7825Smh27603 		}
2595cff7825Smh27603 		if ((cpudsp = ddi_get_soft_state(cpudrv_state, instance)) ==
2605cff7825Smh27603 		    NULL) {
2615cff7825Smh27603 			cmn_err(CE_WARN, "cpudrv_attach: instance %d: "
2625cff7825Smh27603 			    "can't get state", instance);
2635cff7825Smh27603 			ddi_soft_state_free(cpudrv_state, instance);
2640e751525SEric Saxe 			cpudrv_enabled = B_FALSE;
2655cff7825Smh27603 			return (DDI_FAILURE);
2665cff7825Smh27603 		}
2675cff7825Smh27603 		cpudsp->dip = dip;
2685cff7825Smh27603 
2695cff7825Smh27603 		/*
2705cff7825Smh27603 		 * Find CPU number for this dev_info node.
2715cff7825Smh27603 		 */
2720e751525SEric Saxe 		if (!cpudrv_get_cpu_id(dip, &(cpudsp->cpu_id))) {
2735cff7825Smh27603 			cmn_err(CE_WARN, "cpudrv_attach: instance %d: "
2745cff7825Smh27603 			    "can't convert dip to cpu_id", instance);
2755cff7825Smh27603 			ddi_soft_state_free(cpudrv_state, instance);
2760e751525SEric Saxe 			cpudrv_enabled = B_FALSE;
2775cff7825Smh27603 			return (DDI_FAILURE);
2785cff7825Smh27603 		}
279*444f66e7SMark Haywood 
280*444f66e7SMark Haywood 		mutex_enter(&cpu_lock);
281*444f66e7SMark Haywood 		cpudsp->cp = cpu_get(cpudsp->cpu_id);
282*444f66e7SMark Haywood 		mutex_exit(&cpu_lock);
283*444f66e7SMark Haywood 		if (cpudsp->cp == NULL) {
284*444f66e7SMark Haywood 			cmn_err(CE_WARN, "cpudrv_attach: instance %d: "
285*444f66e7SMark Haywood 			    "can't get cpu_t", ddi_get_instance(cpudsp->dip));
286*444f66e7SMark Haywood 			ddi_soft_state_free(cpudrv_state, instance);
2870e751525SEric Saxe 			cpudrv_enabled = B_FALSE;
2885cff7825Smh27603 			return (DDI_FAILURE);
2895cff7825Smh27603 		}
2900e751525SEric Saxe 
2917f606aceSMark Haywood 		mutex_init(&cpudsp->lock, NULL, MUTEX_DRIVER, NULL);
2920e751525SEric Saxe 		if (cpudrv_is_enabled(cpudsp)) {
2930e751525SEric Saxe 			if (cpudrv_init(cpudsp) != DDI_SUCCESS) {
2940e751525SEric Saxe 				cpudrv_enabled = B_FALSE;
2950e751525SEric Saxe 				cpudrv_free(cpudsp);
2967f606aceSMark Haywood 				ddi_soft_state_free(cpudrv_state, instance);
2977f606aceSMark Haywood 				return (DDI_FAILURE);
2987f606aceSMark Haywood 			}
2990e751525SEric Saxe 			if (cpudrv_comp_create(cpudsp) != DDI_SUCCESS) {
3000e751525SEric Saxe 				cpudrv_enabled = B_FALSE;
3010e751525SEric Saxe 				cpudrv_free(cpudsp);
3027f606aceSMark Haywood 				ddi_soft_state_free(cpudrv_state, instance);
3035cff7825Smh27603 				return (DDI_FAILURE);
3045cff7825Smh27603 			}
3055cff7825Smh27603 			if (ddi_prop_update_string(DDI_DEV_T_NONE,
3065cff7825Smh27603 			    dip, "pm-class", "CPU") != DDI_PROP_SUCCESS) {
3070e751525SEric Saxe 				cpudrv_enabled = B_FALSE;
3080e751525SEric Saxe 				cpudrv_free(cpudsp);
3097f606aceSMark Haywood 				ddi_soft_state_free(cpudrv_state, instance);
3105cff7825Smh27603 				return (DDI_FAILURE);
3115cff7825Smh27603 			}
3125cff7825Smh27603 
3135cff7825Smh27603 			/*
3147f606aceSMark Haywood 			 * Taskq is used to dispatch routine to monitor CPU
3157f606aceSMark Haywood 			 * activities.
3165cff7825Smh27603 			 */
317*444f66e7SMark Haywood 			cpudsp->cpudrv_pm.tq = ddi_taskq_create(dip,
318*444f66e7SMark Haywood 			    "cpudrv_monitor", CPUDRV_TASKQ_THREADS,
319*444f66e7SMark Haywood 			    TASKQ_DEFAULTPRI, 0);
3205cff7825Smh27603 
3217f606aceSMark Haywood 			mutex_init(&cpudsp->cpudrv_pm.timeout_lock, NULL,
3227f606aceSMark Haywood 			    MUTEX_DRIVER, NULL);
3237f606aceSMark Haywood 			cv_init(&cpudsp->cpudrv_pm.timeout_cv, NULL,
3247f606aceSMark Haywood 			    CV_DEFAULT, NULL);
3255cff7825Smh27603 
3265cff7825Smh27603 			/*
3277f606aceSMark Haywood 			 * Driver needs to assume that CPU is running at
3287f606aceSMark Haywood 			 * unknown speed at DDI_ATTACH and switch it to the
3297f606aceSMark Haywood 			 * needed speed. We assume that initial needed speed
3307f606aceSMark Haywood 			 * is full speed for us.
3315cff7825Smh27603 			 */
3325cff7825Smh27603 			/*
3330e751525SEric Saxe 			 * We need to take the lock because cpudrv_monitor()
3345cff7825Smh27603 			 * will start running in parallel with attach().
3355cff7825Smh27603 			 */
3365cff7825Smh27603 			mutex_enter(&cpudsp->lock);
3375cff7825Smh27603 			cpudsp->cpudrv_pm.cur_spd = NULL;
33868afbec1Smh27603 			cpudsp->cpudrv_pm.pm_started = B_FALSE;
3395cff7825Smh27603 			/*
3407f606aceSMark Haywood 			 * We don't call pm_raise_power() directly from attach
3417f606aceSMark Haywood 			 * because driver attach for a slave CPU node can
3427f606aceSMark Haywood 			 * happen before the CPU is even initialized. We just
3437f606aceSMark Haywood 			 * start the monitoring system which understands
34417353130SMark Haywood 			 * unknown speed and moves CPU to top speed when it
34517353130SMark Haywood 			 * has been initialized.
3465cff7825Smh27603 			 */
3470e751525SEric Saxe 			CPUDRV_MONITOR_INIT(cpudsp);
3485cff7825Smh27603 			mutex_exit(&cpudsp->lock);
3495cff7825Smh27603 
3507f606aceSMark Haywood 		}
3517f606aceSMark Haywood 
352*444f66e7SMark Haywood 		if (!cpudrv_mach_init(cpudsp)) {
353*444f66e7SMark Haywood 			cmn_err(CE_WARN, "cpudrv_attach: instance %d: "
354*444f66e7SMark Haywood 			    "cpudrv_mach_init failed", instance);
355*444f66e7SMark Haywood 			cpudrv_enabled = B_FALSE;
356*444f66e7SMark Haywood 			cpudrv_free(cpudsp);
357*444f66e7SMark Haywood 			ddi_soft_state_free(cpudrv_state, instance);
358*444f66e7SMark Haywood 			return (DDI_FAILURE);
359*444f66e7SMark Haywood 		}
360*444f66e7SMark Haywood 
3610e751525SEric Saxe 		CPUDRV_INSTALL_MAX_CHANGE_HANDLER(cpudsp);
3625cff7825Smh27603 
363*444f66e7SMark Haywood 		(void) ddi_prop_update_int(DDI_DEV_T_NONE, dip,
364*444f66e7SMark Haywood 		    DDI_NO_AUTODETACH, 1);
3655cff7825Smh27603 		ddi_report_dev(dip);
3665cff7825Smh27603 		return (DDI_SUCCESS);
3675cff7825Smh27603 
3685cff7825Smh27603 	case DDI_RESUME:
3695cff7825Smh27603 		DPRINTF(D_ATTACH, ("cpudrv_attach: instance %d: "
3705cff7825Smh27603 		    "DDI_RESUME called\n", instance));
3717f606aceSMark Haywood 
3727f606aceSMark Haywood 		cpudsp = ddi_get_soft_state(cpudrv_state, instance);
3737f606aceSMark Haywood 		ASSERT(cpudsp != NULL);
3747f606aceSMark Haywood 
3757f606aceSMark Haywood 		/*
3767f606aceSMark Haywood 		 * Nothing to do for resume, if not doing active PM.
3777f606aceSMark Haywood 		 */
3780e751525SEric Saxe 		if (!cpudrv_is_enabled(cpudsp))
3797f606aceSMark Haywood 			return (DDI_SUCCESS);
3807f606aceSMark Haywood 
3815cff7825Smh27603 		mutex_enter(&cpudsp->lock);
3825cff7825Smh27603 		/*
3835cff7825Smh27603 		 * Driver needs to assume that CPU is running at unknown speed
3845cff7825Smh27603 		 * at DDI_RESUME and switch it to the needed speed. We assume
3855cff7825Smh27603 		 * that the needed speed is full speed for us.
3865cff7825Smh27603 		 */
3875cff7825Smh27603 		cpudsp->cpudrv_pm.cur_spd = NULL;
3880e751525SEric Saxe 		CPUDRV_MONITOR_INIT(cpudsp);
3895cff7825Smh27603 		mutex_exit(&cpudsp->lock);
3900e751525SEric Saxe 		CPUDRV_REDEFINE_TOPSPEED(dip);
3915cff7825Smh27603 		return (DDI_SUCCESS);
3925cff7825Smh27603 
3935cff7825Smh27603 	default:
3945cff7825Smh27603 		return (DDI_FAILURE);
3955cff7825Smh27603 	}
3965cff7825Smh27603 }
3975cff7825Smh27603 
3985cff7825Smh27603 /*
3995cff7825Smh27603  * Driver detach(9e) entry point.
4005cff7825Smh27603  */
4015cff7825Smh27603 static int
4025cff7825Smh27603 cpudrv_detach(dev_info_t *dip, ddi_detach_cmd_t cmd)
4035cff7825Smh27603 {
4045cff7825Smh27603 	int			instance;
4055cff7825Smh27603 	cpudrv_devstate_t	*cpudsp;
4065cff7825Smh27603 	cpudrv_pm_t		*cpupm;
4075cff7825Smh27603 
4085cff7825Smh27603 	instance = ddi_get_instance(dip);
4095cff7825Smh27603 
4105cff7825Smh27603 	switch (cmd) {
4115cff7825Smh27603 	case DDI_DETACH:
4125cff7825Smh27603 		DPRINTF(D_DETACH, ("cpudrv_detach: instance %d: "
4135cff7825Smh27603 		    "DDI_DETACH called\n", instance));
414*444f66e7SMark Haywood 
415*444f66e7SMark Haywood #if defined(__x86)
416*444f66e7SMark Haywood 		cpudsp = ddi_get_soft_state(cpudrv_state, instance);
417*444f66e7SMark Haywood 		ASSERT(cpudsp != NULL);
418*444f66e7SMark Haywood 
419*444f66e7SMark Haywood 		/*
420*444f66e7SMark Haywood 		 * Nothing to do for detach, if no doing active PM.
421*444f66e7SMark Haywood 		 */
422*444f66e7SMark Haywood 		if (!cpudrv_is_enabled(cpudsp))
423*444f66e7SMark Haywood 			return (DDI_SUCCESS);
424*444f66e7SMark Haywood 
425*444f66e7SMark Haywood 		/*
426*444f66e7SMark Haywood 		 * uninstall PPC/_TPC change notification handler
427*444f66e7SMark Haywood 		 */
428*444f66e7SMark Haywood 		CPUDRV_UNINSTALL_MAX_CHANGE_HANDLER(cpudsp);
429*444f66e7SMark Haywood 
430*444f66e7SMark Haywood 		/*
431*444f66e7SMark Haywood 		 * destruct platform specific resource
432*444f66e7SMark Haywood 		 */
433*444f66e7SMark Haywood 		if (!cpudrv_mach_fini(cpudsp))
434*444f66e7SMark Haywood 			return (DDI_FAILURE);
435*444f66e7SMark Haywood 
436*444f66e7SMark Haywood 		mutex_enter(&cpudsp->lock);
437*444f66e7SMark Haywood 		CPUDRV_MONITOR_FINI(cpudsp);
438*444f66e7SMark Haywood 		cv_destroy(&cpudsp->cpudrv_pm.timeout_cv);
439*444f66e7SMark Haywood 		mutex_destroy(&cpudsp->cpudrv_pm.timeout_lock);
440*444f66e7SMark Haywood 		ddi_taskq_destroy(cpudsp->cpudrv_pm.tq);
441*444f66e7SMark Haywood 		cpudrv_free(cpudsp);
442*444f66e7SMark Haywood 		mutex_exit(&cpudsp->lock);
443*444f66e7SMark Haywood 		mutex_destroy(&cpudsp->lock);
444*444f66e7SMark Haywood 		ddi_soft_state_free(cpudrv_state, instance);
445*444f66e7SMark Haywood 		(void) ddi_prop_update_int(DDI_DEV_T_NONE, dip,
446*444f66e7SMark Haywood 		    DDI_NO_AUTODETACH, 0);
447*444f66e7SMark Haywood 		return (DDI_SUCCESS);
448*444f66e7SMark Haywood 
449*444f66e7SMark Haywood #else
4505cff7825Smh27603 		/*
4515cff7825Smh27603 		 * If the only thing supported by the driver is power
4525cff7825Smh27603 		 * management, we can in future enhance the driver and
4535cff7825Smh27603 		 * framework that loads it to unload the driver when
4545cff7825Smh27603 		 * user has disabled CPU power management.
4555cff7825Smh27603 		 */
4565cff7825Smh27603 		return (DDI_FAILURE);
457*444f66e7SMark Haywood #endif
4585cff7825Smh27603 
4595cff7825Smh27603 	case DDI_SUSPEND:
4605cff7825Smh27603 		DPRINTF(D_DETACH, ("cpudrv_detach: instance %d: "
4615cff7825Smh27603 		    "DDI_SUSPEND called\n", instance));
4627f606aceSMark Haywood 
4637f606aceSMark Haywood 		cpudsp = ddi_get_soft_state(cpudrv_state, instance);
4647f606aceSMark Haywood 		ASSERT(cpudsp != NULL);
4657f606aceSMark Haywood 
4667f606aceSMark Haywood 		/*
4677f606aceSMark Haywood 		 * Nothing to do for suspend, if not doing active PM.
4687f606aceSMark Haywood 		 */
4690e751525SEric Saxe 		if (!cpudrv_is_enabled(cpudsp))
4707f606aceSMark Haywood 			return (DDI_SUCCESS);
4717f606aceSMark Haywood 
4725cff7825Smh27603 		/*
4735cff7825Smh27603 		 * During a checkpoint-resume sequence, framework will
4745cff7825Smh27603 		 * stop interrupts to quiesce kernel activity. This will
4755cff7825Smh27603 		 * leave our monitoring system ineffective. Handle this
4765cff7825Smh27603 		 * by stopping our monitoring system and bringing CPU
4775cff7825Smh27603 		 * to full speed. In case we are in special direct pm
4785cff7825Smh27603 		 * mode, we leave the CPU at whatever speed it is. This
4795cff7825Smh27603 		 * is harmless other than speed.
4805cff7825Smh27603 		 */
4815cff7825Smh27603 		mutex_enter(&cpudsp->lock);
4825cff7825Smh27603 		cpupm = &(cpudsp->cpudrv_pm);
4835cff7825Smh27603 
4845cff7825Smh27603 		DPRINTF(D_DETACH, ("cpudrv_detach: instance %d: DDI_SUSPEND - "
48517353130SMark Haywood 		    "cur_spd %d, topspeed %d\n", instance,
48617353130SMark Haywood 		    cpupm->cur_spd->pm_level,
4870e751525SEric Saxe 		    CPUDRV_TOPSPEED(cpupm)->pm_level));
4885cff7825Smh27603 
4890e751525SEric Saxe 		CPUDRV_MONITOR_FINI(cpudsp);
4905cff7825Smh27603 
49117353130SMark Haywood 		if (!cpudrv_direct_pm && (cpupm->cur_spd !=
4920e751525SEric Saxe 		    CPUDRV_TOPSPEED(cpupm))) {
4935cff7825Smh27603 			if (cpupm->pm_busycnt < 1) {
4940e751525SEric Saxe 				if ((pm_busy_component(dip, CPUDRV_COMP_NUM)
4955cff7825Smh27603 				    == DDI_SUCCESS)) {
4965cff7825Smh27603 					cpupm->pm_busycnt++;
4975cff7825Smh27603 				} else {
4980e751525SEric Saxe 					CPUDRV_MONITOR_INIT(cpudsp);
4995cff7825Smh27603 					mutex_exit(&cpudsp->lock);
5005cff7825Smh27603 					cmn_err(CE_WARN, "cpudrv_detach: "
5015cff7825Smh27603 					    "instance %d: can't busy CPU "
5025cff7825Smh27603 					    "component", instance);
5035cff7825Smh27603 					return (DDI_FAILURE);
5045cff7825Smh27603 				}
5055cff7825Smh27603 			}
5065cff7825Smh27603 			mutex_exit(&cpudsp->lock);
5070e751525SEric Saxe 			if (pm_raise_power(dip, CPUDRV_COMP_NUM,
5080e751525SEric Saxe 			    CPUDRV_TOPSPEED(cpupm)->pm_level) !=
50917353130SMark Haywood 			    DDI_SUCCESS) {
5105cff7825Smh27603 				mutex_enter(&cpudsp->lock);
5110e751525SEric Saxe 				CPUDRV_MONITOR_INIT(cpudsp);
5125cff7825Smh27603 				mutex_exit(&cpudsp->lock);
5135cff7825Smh27603 				cmn_err(CE_WARN, "cpudrv_detach: instance %d: "
51417353130SMark Haywood 				    "can't raise CPU power level to %d",
51517353130SMark Haywood 				    instance,
5160e751525SEric Saxe 				    CPUDRV_TOPSPEED(cpupm)->pm_level);
5175cff7825Smh27603 				return (DDI_FAILURE);
5185cff7825Smh27603 			} else {
5195cff7825Smh27603 				return (DDI_SUCCESS);
5205cff7825Smh27603 			}
5215cff7825Smh27603 		} else {
5225cff7825Smh27603 			mutex_exit(&cpudsp->lock);
5235cff7825Smh27603 			return (DDI_SUCCESS);
5245cff7825Smh27603 		}
5255cff7825Smh27603 
5265cff7825Smh27603 	default:
5275cff7825Smh27603 		return (DDI_FAILURE);
5285cff7825Smh27603 	}
5295cff7825Smh27603 }
5305cff7825Smh27603 
5315cff7825Smh27603 /*
5325cff7825Smh27603  * Driver power(9e) entry point.
5335cff7825Smh27603  *
5345cff7825Smh27603  * Driver's notion of current power is set *only* in power(9e) entry point
5355cff7825Smh27603  * after actual power change operation has been successfully completed.
5365cff7825Smh27603  */
5375cff7825Smh27603 /* ARGSUSED */
5385cff7825Smh27603 static int
5395cff7825Smh27603 cpudrv_power(dev_info_t *dip, int comp, int level)
5405cff7825Smh27603 {
5415cff7825Smh27603 	int			instance;
5425cff7825Smh27603 	cpudrv_devstate_t	*cpudsp;
5430e751525SEric Saxe 	cpudrv_pm_t 		*cpudrvpm;
5445cff7825Smh27603 	cpudrv_pm_spd_t		*new_spd;
5455cff7825Smh27603 	boolean_t		is_ready;
5465cff7825Smh27603 	int			ret;
5475cff7825Smh27603 
5485cff7825Smh27603 	instance = ddi_get_instance(dip);
5495cff7825Smh27603 
5505cff7825Smh27603 	DPRINTF(D_POWER, ("cpudrv_power: instance %d: level %d\n",
5515cff7825Smh27603 	    instance, level));
5520e751525SEric Saxe 
5535cff7825Smh27603 	if ((cpudsp = ddi_get_soft_state(cpudrv_state, instance)) == NULL) {
5540e751525SEric Saxe 		cmn_err(CE_WARN, "cpudrv_power: instance %d: can't "
5550e751525SEric Saxe 		    "get state", instance);
5565cff7825Smh27603 		return (DDI_FAILURE);
5575cff7825Smh27603 	}
5585cff7825Smh27603 
5595cff7825Smh27603 	mutex_enter(&cpudsp->lock);
5600e751525SEric Saxe 	cpudrvpm = &(cpudsp->cpudrv_pm);
5615cff7825Smh27603 
5625cff7825Smh27603 	/*
5635cff7825Smh27603 	 * In normal operation, we fail if we are busy and request is
5645cff7825Smh27603 	 * to lower the power level. We let this go through if the driver
5655cff7825Smh27603 	 * is in special direct pm mode. On x86, we also let this through
5667f606aceSMark Haywood 	 * if the change is due to a request to govern the max speed.
5675cff7825Smh27603 	 */
5680e751525SEric Saxe 	if (!cpudrv_direct_pm && (cpudrvpm->pm_busycnt >= 1) &&
5690e751525SEric Saxe 	    !cpudrv_is_governor_thread(cpudrvpm)) {
5700e751525SEric Saxe 		if ((cpudrvpm->cur_spd != NULL) &&
5710e751525SEric Saxe 		    (level < cpudrvpm->cur_spd->pm_level)) {
5725cff7825Smh27603 			mutex_exit(&cpudsp->lock);
5735cff7825Smh27603 			return (DDI_FAILURE);
5745cff7825Smh27603 		}
5755cff7825Smh27603 	}
5765cff7825Smh27603 
5770e751525SEric Saxe 	for (new_spd = cpudrvpm->head_spd; new_spd; new_spd =
5780e751525SEric Saxe 	    new_spd->down_spd) {
5795cff7825Smh27603 		if (new_spd->pm_level == level)
5805cff7825Smh27603 			break;
5815cff7825Smh27603 	}
5825cff7825Smh27603 	if (!new_spd) {
5830e751525SEric Saxe 		CPUDRV_RESET_GOVERNOR_THREAD(cpudrvpm);
5845cff7825Smh27603 		mutex_exit(&cpudsp->lock);
5855cff7825Smh27603 		cmn_err(CE_WARN, "cpudrv_power: instance %d: "
5865cff7825Smh27603 		    "can't locate new CPU speed", instance);
5875cff7825Smh27603 		return (DDI_FAILURE);
5885cff7825Smh27603 	}
5895cff7825Smh27603 
5905cff7825Smh27603 	/*
5915cff7825Smh27603 	 * We currently refuse to power manage if the CPU is not ready to
5925cff7825Smh27603 	 * take cross calls (cross calls fail silently if CPU is not ready
5935cff7825Smh27603 	 * for it).
5945cff7825Smh27603 	 *
595*444f66e7SMark Haywood 	 * Additionally, for x86 platforms we cannot power manage an instance,
596*444f66e7SMark Haywood 	 * until it has been initialized.
5975cff7825Smh27603 	 */
598*444f66e7SMark Haywood 	ASSERT(cpudsp->cp);
5990e751525SEric Saxe 	is_ready = CPUDRV_XCALL_IS_READY(cpudsp->cpu_id);
6005cff7825Smh27603 	if (!is_ready) {
6015cff7825Smh27603 		DPRINTF(D_POWER, ("cpudrv_power: instance %d: "
6025cff7825Smh27603 		    "CPU not ready for x-calls\n", instance));
603*444f66e7SMark Haywood 	} else if (!(is_ready = cpudrv_power_ready(cpudsp->cp))) {
6045cff7825Smh27603 		DPRINTF(D_POWER, ("cpudrv_power: instance %d: "
6050e751525SEric Saxe 		    "waiting for all CPUs to be power manageable\n",
6060e751525SEric Saxe 		    instance));
6075cff7825Smh27603 	}
6085cff7825Smh27603 	if (!is_ready) {
6090e751525SEric Saxe 		CPUDRV_RESET_GOVERNOR_THREAD(cpudrvpm);
6105cff7825Smh27603 		mutex_exit(&cpudsp->lock);
6115cff7825Smh27603 		return (DDI_FAILURE);
6125cff7825Smh27603 	}
6135cff7825Smh27603 
6145cff7825Smh27603 	/*
6150e751525SEric Saxe 	 * Execute CPU specific routine on the requested CPU to
6160e751525SEric Saxe 	 * change its speed to normal-speed/divisor.
6175cff7825Smh27603 	 */
6180e751525SEric Saxe 	if ((ret = cpudrv_change_speed(cpudsp, new_spd)) != DDI_SUCCESS) {
6190e751525SEric Saxe 		cmn_err(CE_WARN, "cpudrv_power: "
6200e751525SEric Saxe 		    "cpudrv_change_speed() return = %d", ret);
6215cff7825Smh27603 		mutex_exit(&cpudsp->lock);
6225cff7825Smh27603 		return (DDI_FAILURE);
6235cff7825Smh27603 	}
6245cff7825Smh27603 
6255cff7825Smh27603 	/*
6265cff7825Smh27603 	 * Reset idle threshold time for the new power level.
6275cff7825Smh27603 	 */
6280e751525SEric Saxe 	if ((cpudrvpm->cur_spd != NULL) && (level <
6290e751525SEric Saxe 	    cpudrvpm->cur_spd->pm_level)) {
6300e751525SEric Saxe 		if (pm_idle_component(dip, CPUDRV_COMP_NUM) ==
6315cff7825Smh27603 		    DDI_SUCCESS) {
6320e751525SEric Saxe 			if (cpudrvpm->pm_busycnt >= 1)
6330e751525SEric Saxe 				cpudrvpm->pm_busycnt--;
6340e751525SEric Saxe 		} else {
6350e751525SEric Saxe 			cmn_err(CE_WARN, "cpudrv_power: instance %d: "
6360e751525SEric Saxe 			    "can't idle CPU component",
6370e751525SEric Saxe 			    ddi_get_instance(dip));
6380e751525SEric Saxe 		}
6395cff7825Smh27603 	}
6405cff7825Smh27603 	/*
6415cff7825Smh27603 	 * Reset various parameters because we are now running at new speed.
6425cff7825Smh27603 	 */
6430e751525SEric Saxe 	cpudrvpm->lastquan_mstate[CMS_IDLE] = 0;
6440e751525SEric Saxe 	cpudrvpm->lastquan_mstate[CMS_SYSTEM] = 0;
6450e751525SEric Saxe 	cpudrvpm->lastquan_mstate[CMS_USER] = 0;
6460e751525SEric Saxe 	cpudrvpm->lastquan_ticks = 0;
6470e751525SEric Saxe 	cpudrvpm->cur_spd = new_spd;
6480e751525SEric Saxe 	CPUDRV_RESET_GOVERNOR_THREAD(cpudrvpm);
6495cff7825Smh27603 	mutex_exit(&cpudsp->lock);
6505cff7825Smh27603 
6515cff7825Smh27603 	return (DDI_SUCCESS);
6525cff7825Smh27603 }
6535cff7825Smh27603 
6545cff7825Smh27603 /*
6555cff7825Smh27603  * Initialize power management data.
6565cff7825Smh27603  */
6575cff7825Smh27603 static int
6580e751525SEric Saxe cpudrv_init(cpudrv_devstate_t *cpudsp)
6595cff7825Smh27603 {
6605cff7825Smh27603 	cpudrv_pm_t 	*cpupm = &(cpudsp->cpudrv_pm);
6615cff7825Smh27603 	cpudrv_pm_spd_t	*cur_spd;
6625cff7825Smh27603 	cpudrv_pm_spd_t	*prev_spd = NULL;
6635cff7825Smh27603 	int		*speeds;
6645cff7825Smh27603 	uint_t		nspeeds;
6655cff7825Smh27603 	int		idle_cnt_percent;
6665cff7825Smh27603 	int		user_cnt_percent;
6675cff7825Smh27603 	int		i;
6685cff7825Smh27603 
6690e751525SEric Saxe 	CPUDRV_GET_SPEEDS(cpudsp, speeds, nspeeds);
6705cff7825Smh27603 	if (nspeeds < 2) {
6715cff7825Smh27603 		/* Need at least two speeds to power manage */
6720e751525SEric Saxe 		CPUDRV_FREE_SPEEDS(speeds, nspeeds);
6735cff7825Smh27603 		return (DDI_FAILURE);
6745cff7825Smh27603 	}
6755cff7825Smh27603 	cpupm->num_spd = nspeeds;
6765cff7825Smh27603 
6775cff7825Smh27603 	/*
6785cff7825Smh27603 	 * Calculate the watermarks and other parameters based on the
6795cff7825Smh27603 	 * supplied speeds.
6805cff7825Smh27603 	 *
6815cff7825Smh27603 	 * One of the basic assumption is that for X amount of CPU work,
6825cff7825Smh27603 	 * if CPU is slowed down by a factor of N, the time it takes to
6835cff7825Smh27603 	 * do the same work will be N * X.
6845cff7825Smh27603 	 *
6855cff7825Smh27603 	 * The driver declares that a CPU is idle and ready for slowed down,
6865cff7825Smh27603 	 * if amount of idle thread is more than the current speed idle_hwm
6875cff7825Smh27603 	 * without dropping below idle_hwm a number of consecutive sampling
6885cff7825Smh27603 	 * intervals and number of running threads in user mode are below
6895cff7825Smh27603 	 * user_lwm.  We want to set the current user_lwm such that if we
6905cff7825Smh27603 	 * just switched to the next slower speed with no change in real work
6915cff7825Smh27603 	 * load, the amount of user threads at the slower speed will be such
6925cff7825Smh27603 	 * that it falls below the slower speed's user_hwm.  If we didn't do
6935cff7825Smh27603 	 * that then we will just come back to the higher speed as soon as we
6945cff7825Smh27603 	 * go down even with no change in work load.
6955cff7825Smh27603 	 * The user_hwm is a fixed precentage and not calculated dynamically.
6965cff7825Smh27603 	 *
6975cff7825Smh27603 	 * We bring the CPU up if idle thread at current speed is less than
6985cff7825Smh27603 	 * the current speed idle_lwm for a number of consecutive sampling
6995cff7825Smh27603 	 * intervals or user threads are above the user_hwm for the current
7005cff7825Smh27603 	 * speed.
7015cff7825Smh27603 	 */
7025cff7825Smh27603 	for (i = 0; i < nspeeds; i++) {
7035cff7825Smh27603 		cur_spd = kmem_zalloc(sizeof (cpudrv_pm_spd_t), KM_SLEEP);
7045cff7825Smh27603 		cur_spd->speed = speeds[i];
7055cff7825Smh27603 		if (i == 0) {	/* normal speed */
7065cff7825Smh27603 			cpupm->head_spd = cur_spd;
7070e751525SEric Saxe 			CPUDRV_TOPSPEED(cpupm) = cur_spd;
7080e751525SEric Saxe 			cur_spd->quant_cnt = CPUDRV_QUANT_CNT_NORMAL;
7095cff7825Smh27603 			cur_spd->idle_hwm =
7100e751525SEric Saxe 			    (cpudrv_idle_hwm * cur_spd->quant_cnt) / 100;
7115cff7825Smh27603 			/* can't speed anymore */
7125cff7825Smh27603 			cur_spd->idle_lwm = 0;
7135cff7825Smh27603 			cur_spd->user_hwm = UINT_MAX;
7145cff7825Smh27603 		} else {
7150e751525SEric Saxe 			cur_spd->quant_cnt = CPUDRV_QUANT_CNT_OTHR;
7165cff7825Smh27603 			ASSERT(prev_spd != NULL);
7175cff7825Smh27603 			prev_spd->down_spd = cur_spd;
7185cff7825Smh27603 			cur_spd->up_spd = cpupm->head_spd;
7195cff7825Smh27603 
7205cff7825Smh27603 			/*
7215cff7825Smh27603 			 * Let's assume CPU is considered idle at full speed
7225cff7825Smh27603 			 * when it is spending I% of time in running the idle
7235cff7825Smh27603 			 * thread.  At full speed, CPU will be busy (100 - I) %
7245cff7825Smh27603 			 * of times.  This % of busyness increases by factor of
7255cff7825Smh27603 			 * N as CPU slows down.  CPU that is idle I% of times
7265cff7825Smh27603 			 * in full speed, it is idle (100 - ((100 - I) * N)) %
7275cff7825Smh27603 			 * of times in N speed.  The idle_lwm is a fixed
7285cff7825Smh27603 			 * percentage.  A large value of N may result in
7295cff7825Smh27603 			 * idle_hwm to go below idle_lwm.  We need to make sure
7305cff7825Smh27603 			 * that there is at least a buffer zone seperation
7315cff7825Smh27603 			 * between the idle_lwm and idle_hwm values.
7325cff7825Smh27603 			 */
7330e751525SEric Saxe 			idle_cnt_percent = CPUDRV_IDLE_CNT_PERCENT(
7340e751525SEric Saxe 			    cpudrv_idle_hwm, speeds, i);
7355cff7825Smh27603 			idle_cnt_percent = max(idle_cnt_percent,
7360e751525SEric Saxe 			    (cpudrv_idle_lwm + cpudrv_idle_buf_zone));
7375cff7825Smh27603 			cur_spd->idle_hwm =
7385cff7825Smh27603 			    (idle_cnt_percent * cur_spd->quant_cnt) / 100;
7395cff7825Smh27603 			cur_spd->idle_lwm =
7400e751525SEric Saxe 			    (cpudrv_idle_lwm * cur_spd->quant_cnt) / 100;
7415cff7825Smh27603 
7425cff7825Smh27603 			/*
7435cff7825Smh27603 			 * The lwm for user threads are determined such that
7445cff7825Smh27603 			 * if CPU slows down, the load of work in the
7455cff7825Smh27603 			 * new speed would still keep the CPU at or below the
7465cff7825Smh27603 			 * user_hwm in the new speed.  This is to prevent
7475cff7825Smh27603 			 * the quick jump back up to higher speed.
7485cff7825Smh27603 			 */
7490e751525SEric Saxe 			cur_spd->user_hwm = (cpudrv_user_hwm *
7505cff7825Smh27603 			    cur_spd->quant_cnt) / 100;
7510e751525SEric Saxe 			user_cnt_percent = CPUDRV_USER_CNT_PERCENT(
7520e751525SEric Saxe 			    cpudrv_user_hwm, speeds, i);
7535cff7825Smh27603 			prev_spd->user_lwm =
7545cff7825Smh27603 			    (user_cnt_percent * prev_spd->quant_cnt) / 100;
7555cff7825Smh27603 		}
7565cff7825Smh27603 		prev_spd = cur_spd;
7575cff7825Smh27603 	}
7585cff7825Smh27603 	/* Slowest speed. Can't slow down anymore */
7595cff7825Smh27603 	cur_spd->idle_hwm = UINT_MAX;
7605cff7825Smh27603 	cur_spd->user_lwm = -1;
7615cff7825Smh27603 #ifdef	DEBUG
7620e751525SEric Saxe 	DPRINTF(D_PM_INIT, ("cpudrv_init: instance %d: head_spd spd %d, "
7635cff7825Smh27603 	    "num_spd %d\n", ddi_get_instance(cpudsp->dip),
7645cff7825Smh27603 	    cpupm->head_spd->speed, cpupm->num_spd));
7655cff7825Smh27603 	for (cur_spd = cpupm->head_spd; cur_spd; cur_spd = cur_spd->down_spd) {
7660e751525SEric Saxe 		DPRINTF(D_PM_INIT, ("cpudrv_init: instance %d: speed %d, "
7675cff7825Smh27603 		    "down_spd spd %d, idle_hwm %d, user_lwm %d, "
7685cff7825Smh27603 		    "up_spd spd %d, idle_lwm %d, user_hwm %d, "
7695cff7825Smh27603 		    "quant_cnt %d\n", ddi_get_instance(cpudsp->dip),
7705cff7825Smh27603 		    cur_spd->speed,
7715cff7825Smh27603 		    (cur_spd->down_spd ? cur_spd->down_spd->speed : 0),
7725cff7825Smh27603 		    cur_spd->idle_hwm, cur_spd->user_lwm,
7735cff7825Smh27603 		    (cur_spd->up_spd ? cur_spd->up_spd->speed : 0),
7745cff7825Smh27603 		    cur_spd->idle_lwm, cur_spd->user_hwm,
7755cff7825Smh27603 		    cur_spd->quant_cnt));
7765cff7825Smh27603 	}
7775cff7825Smh27603 #endif	/* DEBUG */
7780e751525SEric Saxe 	CPUDRV_FREE_SPEEDS(speeds, nspeeds);
7795cff7825Smh27603 	return (DDI_SUCCESS);
7805cff7825Smh27603 }
7815cff7825Smh27603 
7825cff7825Smh27603 /*
7835cff7825Smh27603  * Free CPU power management data.
7845cff7825Smh27603  */
7855cff7825Smh27603 static void
7860e751525SEric Saxe cpudrv_free(cpudrv_devstate_t *cpudsp)
7875cff7825Smh27603 {
7885cff7825Smh27603 	cpudrv_pm_t 	*cpupm = &(cpudsp->cpudrv_pm);
7895cff7825Smh27603 	cpudrv_pm_spd_t	*cur_spd, *next_spd;
7905cff7825Smh27603 
7915cff7825Smh27603 	cur_spd = cpupm->head_spd;
7925cff7825Smh27603 	while (cur_spd) {
7935cff7825Smh27603 		next_spd = cur_spd->down_spd;
7945cff7825Smh27603 		kmem_free(cur_spd, sizeof (cpudrv_pm_spd_t));
7955cff7825Smh27603 		cur_spd = next_spd;
7965cff7825Smh27603 	}
7975cff7825Smh27603 	bzero(cpupm, sizeof (cpudrv_pm_t));
7985cff7825Smh27603 }
7995cff7825Smh27603 
8005cff7825Smh27603 /*
8015cff7825Smh27603  * Create pm-components property.
8025cff7825Smh27603  */
8035cff7825Smh27603 static int
8040e751525SEric Saxe cpudrv_comp_create(cpudrv_devstate_t *cpudsp)
8055cff7825Smh27603 {
8065cff7825Smh27603 	cpudrv_pm_t 	*cpupm = &(cpudsp->cpudrv_pm);
8075cff7825Smh27603 	cpudrv_pm_spd_t	*cur_spd;
8085cff7825Smh27603 	char		**pmc;
8095cff7825Smh27603 	int		size;
8105cff7825Smh27603 	char		name[] = "NAME=CPU Speed";
8115cff7825Smh27603 	int		i, j;
8125cff7825Smh27603 	uint_t		comp_spd;
8135cff7825Smh27603 	int		result = DDI_FAILURE;
8145cff7825Smh27603 
8155cff7825Smh27603 	pmc = kmem_zalloc((cpupm->num_spd + 1) * sizeof (char *), KM_SLEEP);
8160e751525SEric Saxe 	size = CPUDRV_COMP_SIZE();
8170e751525SEric Saxe 	if (cpupm->num_spd > CPUDRV_COMP_MAX_VAL) {
8180e751525SEric Saxe 		cmn_err(CE_WARN, "cpudrv_comp_create: instance %d: "
8195cff7825Smh27603 		    "number of speeds exceeded limits",
8205cff7825Smh27603 		    ddi_get_instance(cpudsp->dip));
8215cff7825Smh27603 		kmem_free(pmc, (cpupm->num_spd + 1) * sizeof (char *));
8225cff7825Smh27603 		return (result);
8235cff7825Smh27603 	}
8245cff7825Smh27603 
8255cff7825Smh27603 	for (i = cpupm->num_spd, cur_spd = cpupm->head_spd; i > 0;
8265cff7825Smh27603 	    i--, cur_spd = cur_spd->down_spd) {
8275cff7825Smh27603 		cur_spd->pm_level = i;
8285cff7825Smh27603 		pmc[i] = kmem_zalloc((size * sizeof (char)), KM_SLEEP);
8290e751525SEric Saxe 		comp_spd = CPUDRV_COMP_SPEED(cpupm, cur_spd);
8300e751525SEric Saxe 		if (comp_spd > CPUDRV_COMP_MAX_VAL) {
8310e751525SEric Saxe 			cmn_err(CE_WARN, "cpudrv_comp_create: "
8325cff7825Smh27603 			    "instance %d: speed exceeded limits",
8335cff7825Smh27603 			    ddi_get_instance(cpudsp->dip));
8345cff7825Smh27603 			for (j = cpupm->num_spd; j >= i; j--) {
8355cff7825Smh27603 				kmem_free(pmc[j], size * sizeof (char));
8365cff7825Smh27603 			}
8375cff7825Smh27603 			kmem_free(pmc, (cpupm->num_spd + 1) *
8385cff7825Smh27603 			    sizeof (char *));
8395cff7825Smh27603 			return (result);
8405cff7825Smh27603 		}
8410e751525SEric Saxe 		CPUDRV_COMP_SPRINT(pmc[i], cpupm, cur_spd, comp_spd)
8420e751525SEric Saxe 		DPRINTF(D_PM_COMP_CREATE, ("cpudrv_comp_create: "
8435cff7825Smh27603 		    "instance %d: pm-components power level %d string '%s'\n",
8445cff7825Smh27603 		    ddi_get_instance(cpudsp->dip), i, pmc[i]));
8455cff7825Smh27603 	}
8465cff7825Smh27603 	pmc[0] = kmem_zalloc(sizeof (name), KM_SLEEP);
8475cff7825Smh27603 	(void) strcat(pmc[0], name);
8480e751525SEric Saxe 	DPRINTF(D_PM_COMP_CREATE, ("cpudrv_comp_create: instance %d: "
8495cff7825Smh27603 	    "pm-components component name '%s'\n",
8505cff7825Smh27603 	    ddi_get_instance(cpudsp->dip), pmc[0]));
8515cff7825Smh27603 
8525cff7825Smh27603 	if (ddi_prop_update_string_array(DDI_DEV_T_NONE, cpudsp->dip,
8535cff7825Smh27603 	    "pm-components", pmc, cpupm->num_spd + 1) == DDI_PROP_SUCCESS) {
8545cff7825Smh27603 		result = DDI_SUCCESS;
8555cff7825Smh27603 	} else {
8560e751525SEric Saxe 		cmn_err(CE_WARN, "cpudrv_comp_create: instance %d: "
8575cff7825Smh27603 		    "can't create pm-components property",
8585cff7825Smh27603 		    ddi_get_instance(cpudsp->dip));
8595cff7825Smh27603 	}
8605cff7825Smh27603 
8615cff7825Smh27603 	for (i = cpupm->num_spd; i > 0; i--) {
8625cff7825Smh27603 		kmem_free(pmc[i], size * sizeof (char));
8635cff7825Smh27603 	}
8645cff7825Smh27603 	kmem_free(pmc[0], sizeof (name));
8655cff7825Smh27603 	kmem_free(pmc, (cpupm->num_spd + 1) * sizeof (char *));
8665cff7825Smh27603 	return (result);
8675cff7825Smh27603 }
8685cff7825Smh27603 
8695cff7825Smh27603 /*
8705cff7825Smh27603  * Mark a component idle.
8715cff7825Smh27603  */
8720e751525SEric Saxe #define	CPUDRV_MONITOR_PM_IDLE_COMP(dip, cpupm) { \
8735cff7825Smh27603 	if ((cpupm)->pm_busycnt >= 1) { \
8740e751525SEric Saxe 		if (pm_idle_component((dip), CPUDRV_COMP_NUM) == \
8755cff7825Smh27603 		    DDI_SUCCESS) { \
8760e751525SEric Saxe 			DPRINTF(D_PM_MONITOR, ("cpudrv_monitor: " \
8775cff7825Smh27603 			    "instance %d: pm_idle_component called\n", \
8785cff7825Smh27603 			    ddi_get_instance((dip)))); \
8795cff7825Smh27603 			(cpupm)->pm_busycnt--; \
8805cff7825Smh27603 		} else { \
8810e751525SEric Saxe 			cmn_err(CE_WARN, "cpudrv_monitor: instance %d: " \
8825cff7825Smh27603 			    "can't idle CPU component", \
8835cff7825Smh27603 			    ddi_get_instance((dip))); \
8845cff7825Smh27603 		} \
8855cff7825Smh27603 	} \
8865cff7825Smh27603 }
8875cff7825Smh27603 
8885cff7825Smh27603 /*
8895cff7825Smh27603  * Marks a component busy in both PM framework and driver state structure.
8905cff7825Smh27603  */
8910e751525SEric Saxe #define	CPUDRV_MONITOR_PM_BUSY_COMP(dip, cpupm) { \
8925cff7825Smh27603 	if ((cpupm)->pm_busycnt < 1) { \
8930e751525SEric Saxe 		if (pm_busy_component((dip), CPUDRV_COMP_NUM) == \
8945cff7825Smh27603 		    DDI_SUCCESS) { \
8950e751525SEric Saxe 			DPRINTF(D_PM_MONITOR, ("cpudrv_monitor: " \
8965cff7825Smh27603 			    "instance %d: pm_busy_component called\n", \
8975cff7825Smh27603 			    ddi_get_instance((dip)))); \
8985cff7825Smh27603 			(cpupm)->pm_busycnt++; \
8995cff7825Smh27603 		} else { \
9000e751525SEric Saxe 			cmn_err(CE_WARN, "cpudrv_monitor: instance %d: " \
9015cff7825Smh27603 			    "can't busy CPU component", \
9025cff7825Smh27603 			    ddi_get_instance((dip))); \
9035cff7825Smh27603 		} \
9045cff7825Smh27603 	} \
9055cff7825Smh27603 }
9065cff7825Smh27603 
9075cff7825Smh27603 /*
9085cff7825Smh27603  * Marks a component busy and calls pm_raise_power().
9095cff7825Smh27603  */
91067bdf3b0SMark Haywood #define	CPUDRV_MONITOR_PM_BUSY_AND_RAISE(dip, cpudsp, cpupm, new_spd) { \
91167bdf3b0SMark Haywood 	int ret; \
9125cff7825Smh27603 	/* \
9135cff7825Smh27603 	 * Mark driver and PM framework busy first so framework doesn't try \
9145cff7825Smh27603 	 * to bring CPU to lower speed when we need to be at higher speed. \
9155cff7825Smh27603 	 */ \
9160e751525SEric Saxe 	CPUDRV_MONITOR_PM_BUSY_COMP((dip), (cpupm)); \
9175cff7825Smh27603 	mutex_exit(&(cpudsp)->lock); \
9180e751525SEric Saxe 	DPRINTF(D_PM_MONITOR, ("cpudrv_monitor: instance %d: " \
9195cff7825Smh27603 	    "pm_raise_power called to %d\n", ddi_get_instance((dip)), \
92067bdf3b0SMark Haywood 		(new_spd->pm_level))); \
92167bdf3b0SMark Haywood 	ret = pm_raise_power((dip), CPUDRV_COMP_NUM, (new_spd->pm_level)); \
92267bdf3b0SMark Haywood 	if (ret != DDI_SUCCESS) { \
9230e751525SEric Saxe 		cmn_err(CE_WARN, "cpudrv_monitor: instance %d: can't " \
9245cff7825Smh27603 		    "raise CPU power level", ddi_get_instance((dip))); \
9255cff7825Smh27603 	} \
9265cff7825Smh27603 	mutex_enter(&(cpudsp)->lock); \
92767bdf3b0SMark Haywood 	if (ret == DDI_SUCCESS && cpudsp->cpudrv_pm.cur_spd == NULL) { \
92867bdf3b0SMark Haywood 		cpudsp->cpudrv_pm.cur_spd = new_spd; \
92967bdf3b0SMark Haywood 	} \
9305cff7825Smh27603 }
9315cff7825Smh27603 
9325cff7825Smh27603 /*
9335cff7825Smh27603  * In order to monitor a CPU, we need to hold cpu_lock to access CPU
9345cff7825Smh27603  * statistics. Holding cpu_lock is not allowed from a callout routine.
9355cff7825Smh27603  * We dispatch a taskq to do that job.
9365cff7825Smh27603  */
9375cff7825Smh27603 static void
9380e751525SEric Saxe cpudrv_monitor_disp(void *arg)
9395cff7825Smh27603 {
9405cff7825Smh27603 	cpudrv_devstate_t	*cpudsp = (cpudrv_devstate_t *)arg;
9415cff7825Smh27603 
9425cff7825Smh27603 	/*
9435cff7825Smh27603 	 * We are here because the last task has scheduled a timeout.
9445cff7825Smh27603 	 * The queue should be empty at this time.
9455cff7825Smh27603 	 */
9465cff7825Smh27603 	mutex_enter(&cpudsp->cpudrv_pm.timeout_lock);
947*444f66e7SMark Haywood 	if ((ddi_taskq_dispatch(cpudsp->cpudrv_pm.tq, cpudrv_monitor, arg,
948*444f66e7SMark Haywood 	    DDI_NOSLEEP)) != DDI_SUCCESS) {
9495cff7825Smh27603 		mutex_exit(&cpudsp->cpudrv_pm.timeout_lock);
9500e751525SEric Saxe 		DPRINTF(D_PM_MONITOR, ("cpudrv_monitor_disp: failed to "
9510e751525SEric Saxe 		    "dispatch the cpudrv_monitor taskq\n"));
9525cff7825Smh27603 		mutex_enter(&cpudsp->lock);
9530e751525SEric Saxe 		CPUDRV_MONITOR_INIT(cpudsp);
9545cff7825Smh27603 		mutex_exit(&cpudsp->lock);
9555cff7825Smh27603 		return;
9565cff7825Smh27603 	}
9575cff7825Smh27603 	cpudsp->cpudrv_pm.timeout_count++;
9585cff7825Smh27603 	mutex_exit(&cpudsp->cpudrv_pm.timeout_lock);
9595cff7825Smh27603 }
9605cff7825Smh27603 
9615cff7825Smh27603 /*
9625cff7825Smh27603  * Monitors each CPU for the amount of time idle thread was running in the
9635cff7825Smh27603  * last quantum and arranges for the CPU to go to the lower or higher speed.
9645cff7825Smh27603  * Called at the time interval appropriate for the current speed. The
9650e751525SEric Saxe  * time interval for normal speed is CPUDRV_QUANT_CNT_NORMAL. The time
9665cff7825Smh27603  * interval for other speeds (including unknown speed) is
9670e751525SEric Saxe  * CPUDRV_QUANT_CNT_OTHR.
9685cff7825Smh27603  */
9695cff7825Smh27603 static void
9700e751525SEric Saxe cpudrv_monitor(void *arg)
9715cff7825Smh27603 {
9725cff7825Smh27603 	cpudrv_devstate_t	*cpudsp = (cpudrv_devstate_t *)arg;
9735cff7825Smh27603 	cpudrv_pm_t		*cpupm;
9745cff7825Smh27603 	cpudrv_pm_spd_t		*cur_spd, *new_spd;
9755cff7825Smh27603 	dev_info_t		*dip;
9765cff7825Smh27603 	uint_t			idle_cnt, user_cnt, system_cnt;
977fcddbe1fSMark Haywood 	clock_t			ticks;
978fcddbe1fSMark Haywood 	uint_t			tick_cnt;
9795cff7825Smh27603 	hrtime_t		msnsecs[NCMSTATES];
9805cff7825Smh27603 	boolean_t		is_ready;
9815cff7825Smh27603 
9825cff7825Smh27603 #define	GET_CPU_MSTATE_CNT(state, cnt) \
9835cff7825Smh27603 	msnsecs[state] = NSEC_TO_TICK(msnsecs[state]); \
9845cff7825Smh27603 	if (cpupm->lastquan_mstate[state] > msnsecs[state]) \
9855cff7825Smh27603 		msnsecs[state] = cpupm->lastquan_mstate[state]; \
9865cff7825Smh27603 	cnt = msnsecs[state] - cpupm->lastquan_mstate[state]; \
9875cff7825Smh27603 	cpupm->lastquan_mstate[state] = msnsecs[state]
9885cff7825Smh27603 
9895cff7825Smh27603 	mutex_enter(&cpudsp->lock);
9905cff7825Smh27603 	cpupm = &(cpudsp->cpudrv_pm);
9915cff7825Smh27603 	if (cpupm->timeout_id == 0) {
9925cff7825Smh27603 		mutex_exit(&cpudsp->lock);
9935cff7825Smh27603 		goto do_return;
9945cff7825Smh27603 	}
9955cff7825Smh27603 	cur_spd = cpupm->cur_spd;
9965cff7825Smh27603 	dip = cpudsp->dip;
9975cff7825Smh27603 
9985cff7825Smh27603 	/*
9995cff7825Smh27603 	 * We assume that a CPU is initialized and has a valid cpu_t
10005cff7825Smh27603 	 * structure, if it is ready for cross calls. If this changes,
10015cff7825Smh27603 	 * additional checks might be needed.
10025cff7825Smh27603 	 *
1003*444f66e7SMark Haywood 	 * Additionally, for x86 platforms we cannot power manage an
1004*444f66e7SMark Haywood 	 * instance, until it has been initialized.
10055cff7825Smh27603 	 */
1006*444f66e7SMark Haywood 	ASSERT(cpudsp->cp);
10070e751525SEric Saxe 	is_ready = CPUDRV_XCALL_IS_READY(cpudsp->cpu_id);
10085cff7825Smh27603 	if (!is_ready) {
10090e751525SEric Saxe 		DPRINTF(D_PM_MONITOR, ("cpudrv_monitor: instance %d: "
10105cff7825Smh27603 		    "CPU not ready for x-calls\n", ddi_get_instance(dip)));
1011*444f66e7SMark Haywood 	} else if (!(is_ready = cpudrv_power_ready(cpudsp->cp))) {
10120e751525SEric Saxe 		DPRINTF(D_PM_MONITOR, ("cpudrv_monitor: instance %d: "
10137f606aceSMark Haywood 		    "waiting for all CPUs to be power manageable\n",
10145cff7825Smh27603 		    ddi_get_instance(dip)));
10155cff7825Smh27603 	}
10165cff7825Smh27603 	if (!is_ready) {
10175cff7825Smh27603 		/*
10185cff7825Smh27603 		 * Make sure that we are busy so that framework doesn't
10195cff7825Smh27603 		 * try to bring us down in this situation.
10205cff7825Smh27603 		 */
10210e751525SEric Saxe 		CPUDRV_MONITOR_PM_BUSY_COMP(dip, cpupm);
10220e751525SEric Saxe 		CPUDRV_MONITOR_INIT(cpudsp);
10235cff7825Smh27603 		mutex_exit(&cpudsp->lock);
10245cff7825Smh27603 		goto do_return;
10255cff7825Smh27603 	}
10265cff7825Smh27603 
10275cff7825Smh27603 	/*
10285cff7825Smh27603 	 * Make sure that we are still not at unknown power level.
10295cff7825Smh27603 	 */
10305cff7825Smh27603 	if (cur_spd == NULL) {
10310e751525SEric Saxe 		DPRINTF(D_PM_MONITOR, ("cpudrv_monitor: instance %d: "
10325cff7825Smh27603 		    "cur_spd is unknown\n", ddi_get_instance(dip)));
10330e751525SEric Saxe 		CPUDRV_MONITOR_PM_BUSY_AND_RAISE(dip, cpudsp, cpupm,
103467bdf3b0SMark Haywood 		    CPUDRV_TOPSPEED(cpupm));
10355cff7825Smh27603 		/*
10365cff7825Smh27603 		 * We just changed the speed. Wait till at least next
10375cff7825Smh27603 		 * call to this routine before proceeding ahead.
10385cff7825Smh27603 		 */
10390e751525SEric Saxe 		CPUDRV_MONITOR_INIT(cpudsp);
10405cff7825Smh27603 		mutex_exit(&cpudsp->lock);
10415cff7825Smh27603 		goto do_return;
10425cff7825Smh27603 	}
10435cff7825Smh27603 
10445cff7825Smh27603 	mutex_enter(&cpu_lock);
10450e751525SEric Saxe 	if (cpudsp->cp == NULL &&
10460e751525SEric Saxe 	    (cpudsp->cp = cpu_get(cpudsp->cpu_id)) == NULL) {
10475cff7825Smh27603 		mutex_exit(&cpu_lock);
10480e751525SEric Saxe 		CPUDRV_MONITOR_INIT(cpudsp);
10495cff7825Smh27603 		mutex_exit(&cpudsp->lock);
10500e751525SEric Saxe 		cmn_err(CE_WARN, "cpudrv_monitor: instance %d: can't get "
10515cff7825Smh27603 		    "cpu_t", ddi_get_instance(dip));
10525cff7825Smh27603 		goto do_return;
10535cff7825Smh27603 	}
105468afbec1Smh27603 
105568afbec1Smh27603 	if (!cpupm->pm_started) {
105668afbec1Smh27603 		cpupm->pm_started = B_TRUE;
10570e751525SEric Saxe 		cpudrv_set_supp_freqs(cpudsp);
105868afbec1Smh27603 	}
10595cff7825Smh27603 
10600e751525SEric Saxe 	get_cpu_mstate(cpudsp->cp, msnsecs);
10615cff7825Smh27603 	GET_CPU_MSTATE_CNT(CMS_IDLE, idle_cnt);
10625cff7825Smh27603 	GET_CPU_MSTATE_CNT(CMS_USER, user_cnt);
10635cff7825Smh27603 	GET_CPU_MSTATE_CNT(CMS_SYSTEM, system_cnt);
10645cff7825Smh27603 
10655cff7825Smh27603 	/*
10665cff7825Smh27603 	 * We can't do anything when we have just switched to a state
10675cff7825Smh27603 	 * because there is no valid timestamp.
10685cff7825Smh27603 	 */
1069fcddbe1fSMark Haywood 	if (cpupm->lastquan_ticks == 0) {
1070fcddbe1fSMark Haywood 		cpupm->lastquan_ticks = NSEC_TO_TICK(gethrtime());
10715cff7825Smh27603 		mutex_exit(&cpu_lock);
10720e751525SEric Saxe 		CPUDRV_MONITOR_INIT(cpudsp);
10735cff7825Smh27603 		mutex_exit(&cpudsp->lock);
10745cff7825Smh27603 		goto do_return;
10755cff7825Smh27603 	}
10765cff7825Smh27603 
10775cff7825Smh27603 	/*
10785cff7825Smh27603 	 * Various watermarks are based on this routine being called back
10795cff7825Smh27603 	 * exactly at the requested period. This is not guaranteed
10805cff7825Smh27603 	 * because this routine is called from a taskq that is dispatched
10815cff7825Smh27603 	 * from a timeout routine.  Handle this by finding out how many
1082fcddbe1fSMark Haywood 	 * ticks have elapsed since the last call and adjusting
10835cff7825Smh27603 	 * the idle_cnt based on the delay added to the requested period
10845cff7825Smh27603 	 * by timeout and taskq.
10855cff7825Smh27603 	 */
1086fcddbe1fSMark Haywood 	ticks = NSEC_TO_TICK(gethrtime());
1087fcddbe1fSMark Haywood 	tick_cnt = ticks - cpupm->lastquan_ticks;
1088fcddbe1fSMark Haywood 	ASSERT(tick_cnt != 0);
1089fcddbe1fSMark Haywood 	cpupm->lastquan_ticks = ticks;
10905cff7825Smh27603 	mutex_exit(&cpu_lock);
10915cff7825Smh27603 	/*
10925cff7825Smh27603 	 * Time taken between recording the current counts and
10935cff7825Smh27603 	 * arranging the next call of this routine is an error in our
10945cff7825Smh27603 	 * calculation. We minimize the error by calling
10950e751525SEric Saxe 	 * CPUDRV_MONITOR_INIT() here instead of end of this routine.
10965cff7825Smh27603 	 */
10970e751525SEric Saxe 	CPUDRV_MONITOR_INIT(cpudsp);
10980e751525SEric Saxe 	DPRINTF(D_PM_MONITOR_VERBOSE, ("cpudrv_monitor: instance %d: "
10995cff7825Smh27603 	    "idle count %d, user count %d, system count %d, pm_level %d, "
11005cff7825Smh27603 	    "pm_busycnt %d\n", ddi_get_instance(dip), idle_cnt, user_cnt,
11015cff7825Smh27603 	    system_cnt, cur_spd->pm_level, cpupm->pm_busycnt));
11025cff7825Smh27603 
11035cff7825Smh27603 #ifdef	DEBUG
11045cff7825Smh27603 	/*
11055cff7825Smh27603 	 * Notify that timeout and taskq has caused delays and we need to
11065cff7825Smh27603 	 * scale our parameters accordingly.
11075cff7825Smh27603 	 *
11085cff7825Smh27603 	 * To get accurate result, don't turn on other DPRINTFs with
11095cff7825Smh27603 	 * the following DPRINTF. PROM calls generated by other
11105cff7825Smh27603 	 * DPRINTFs changes the timing.
11115cff7825Smh27603 	 */
1112fcddbe1fSMark Haywood 	if (tick_cnt > cur_spd->quant_cnt) {
11130e751525SEric Saxe 		DPRINTF(D_PM_MONITOR_DELAY, ("cpudrv_monitor: instance %d: "
1114fcddbe1fSMark Haywood 		    "tick count %d > quantum_count %u\n",
1115fcddbe1fSMark Haywood 		    ddi_get_instance(dip), tick_cnt, cur_spd->quant_cnt));
11165cff7825Smh27603 	}
11175cff7825Smh27603 #endif	/* DEBUG */
11185cff7825Smh27603 
11195cff7825Smh27603 	/*
11205cff7825Smh27603 	 * Adjust counts based on the delay added by timeout and taskq.
11215cff7825Smh27603 	 */
1122fcddbe1fSMark Haywood 	idle_cnt = (idle_cnt * cur_spd->quant_cnt) / tick_cnt;
1123fcddbe1fSMark Haywood 	user_cnt = (user_cnt * cur_spd->quant_cnt) / tick_cnt;
1124fcddbe1fSMark Haywood 
11255cff7825Smh27603 	if ((user_cnt > cur_spd->user_hwm) || (idle_cnt < cur_spd->idle_lwm &&
11260e751525SEric Saxe 	    cur_spd->idle_blwm_cnt >= cpudrv_idle_blwm_cnt_max)) {
11275cff7825Smh27603 		cur_spd->idle_blwm_cnt = 0;
11285cff7825Smh27603 		cur_spd->idle_bhwm_cnt = 0;
11295cff7825Smh27603 		/*
11305cff7825Smh27603 		 * In normal situation, arrange to go to next higher speed.
11315cff7825Smh27603 		 * If we are running in special direct pm mode, we just stay
11325cff7825Smh27603 		 * at the current speed.
11335cff7825Smh27603 		 */
11345cff7825Smh27603 		if (cur_spd == cur_spd->up_spd || cpudrv_direct_pm) {
11350e751525SEric Saxe 			CPUDRV_MONITOR_PM_BUSY_COMP(dip, cpupm);
11365cff7825Smh27603 		} else {
11375cff7825Smh27603 			new_spd = cur_spd->up_spd;
11380e751525SEric Saxe 			CPUDRV_MONITOR_PM_BUSY_AND_RAISE(dip, cpudsp, cpupm,
113967bdf3b0SMark Haywood 			    new_spd);
11405cff7825Smh27603 		}
11415cff7825Smh27603 	} else if ((user_cnt <= cur_spd->user_lwm) &&
11420e751525SEric Saxe 	    (idle_cnt >= cur_spd->idle_hwm) || !CPU_ACTIVE(cpudsp->cp)) {
11435cff7825Smh27603 		cur_spd->idle_blwm_cnt = 0;
11445cff7825Smh27603 		cur_spd->idle_bhwm_cnt = 0;
11455cff7825Smh27603 		/*
11465cff7825Smh27603 		 * Arrange to go to next lower speed by informing our idle
11475cff7825Smh27603 		 * status to the power management framework.
11485cff7825Smh27603 		 */
11490e751525SEric Saxe 		CPUDRV_MONITOR_PM_IDLE_COMP(dip, cpupm);
11505cff7825Smh27603 	} else {
11515cff7825Smh27603 		/*
11525cff7825Smh27603 		 * If we are between the idle water marks and have not
11535cff7825Smh27603 		 * been here enough consecutive times to be considered
11545cff7825Smh27603 		 * busy, just increment the count and return.
11555cff7825Smh27603 		 */
11565cff7825Smh27603 		if ((idle_cnt < cur_spd->idle_hwm) &&
11575cff7825Smh27603 		    (idle_cnt >= cur_spd->idle_lwm) &&
11580e751525SEric Saxe 		    (cur_spd->idle_bhwm_cnt < cpudrv_idle_bhwm_cnt_max)) {
11595cff7825Smh27603 			cur_spd->idle_blwm_cnt = 0;
11605cff7825Smh27603 			cur_spd->idle_bhwm_cnt++;
11615cff7825Smh27603 			mutex_exit(&cpudsp->lock);
11625cff7825Smh27603 			goto do_return;
11635cff7825Smh27603 		}
11645cff7825Smh27603 		if (idle_cnt < cur_spd->idle_lwm) {
11655cff7825Smh27603 			cur_spd->idle_blwm_cnt++;
11665cff7825Smh27603 			cur_spd->idle_bhwm_cnt = 0;
11675cff7825Smh27603 		}
11685cff7825Smh27603 		/*
11695cff7825Smh27603 		 * Arranges to stay at the current speed.
11705cff7825Smh27603 		 */
11710e751525SEric Saxe 		CPUDRV_MONITOR_PM_BUSY_COMP(dip, cpupm);
11725cff7825Smh27603 	}
11735cff7825Smh27603 	mutex_exit(&cpudsp->lock);
11745cff7825Smh27603 do_return:
11755cff7825Smh27603 	mutex_enter(&cpupm->timeout_lock);
11765cff7825Smh27603 	ASSERT(cpupm->timeout_count > 0);
11775cff7825Smh27603 	cpupm->timeout_count--;
11785cff7825Smh27603 	cv_signal(&cpupm->timeout_cv);
11795cff7825Smh27603 	mutex_exit(&cpupm->timeout_lock);
11805cff7825Smh27603 }
1181