1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #pragma ident "%Z%%M% %I% %E% SMI" 28 29 #include "bge_impl.h" 30 #include <sys/sdt.h> 31 32 /* 33 * This is the string displayed by modinfo, etc. 34 * Make sure you keep the version ID up to date! 35 */ 36 static char bge_ident[] = "Broadcom Gb Ethernet v0.52"; 37 38 /* 39 * Property names 40 */ 41 static char debug_propname[] = "bge-debug-flags"; 42 static char clsize_propname[] = "cache-line-size"; 43 static char latency_propname[] = "latency-timer"; 44 static char localmac_boolname[] = "local-mac-address?"; 45 static char localmac_propname[] = "local-mac-address"; 46 static char macaddr_propname[] = "mac-address"; 47 static char subdev_propname[] = "subsystem-id"; 48 static char subven_propname[] = "subsystem-vendor-id"; 49 static char rxrings_propname[] = "bge-rx-rings"; 50 static char txrings_propname[] = "bge-tx-rings"; 51 static char fm_cap[] = "fm-capable"; 52 static char default_mtu[] = "default_mtu"; 53 54 static int bge_add_intrs(bge_t *, int); 55 static void bge_rem_intrs(bge_t *); 56 57 /* 58 * Describes the chip's DMA engine 59 */ 60 static ddi_dma_attr_t dma_attr = { 61 DMA_ATTR_V0, /* dma_attr version */ 62 0x0000000000000000ull, /* dma_attr_addr_lo */ 63 0xFFFFFFFFFFFFFFFFull, /* dma_attr_addr_hi */ 64 0x00000000FFFFFFFFull, /* dma_attr_count_max */ 65 0x0000000000000001ull, /* dma_attr_align */ 66 0x00000FFF, /* dma_attr_burstsizes */ 67 0x00000001, /* dma_attr_minxfer */ 68 0x000000000000FFFFull, /* dma_attr_maxxfer */ 69 0xFFFFFFFFFFFFFFFFull, /* dma_attr_seg */ 70 1, /* dma_attr_sgllen */ 71 0x00000001, /* dma_attr_granular */ 72 DDI_DMA_FLAGERR /* dma_attr_flags */ 73 }; 74 75 /* 76 * PIO access attributes for registers 77 */ 78 static ddi_device_acc_attr_t bge_reg_accattr = { 79 DDI_DEVICE_ATTR_V0, 80 DDI_NEVERSWAP_ACC, 81 DDI_STRICTORDER_ACC, 82 DDI_FLAGERR_ACC 83 }; 84 85 /* 86 * DMA access attributes for descriptors: NOT to be byte swapped. 87 */ 88 static ddi_device_acc_attr_t bge_desc_accattr = { 89 DDI_DEVICE_ATTR_V0, 90 DDI_NEVERSWAP_ACC, 91 DDI_STRICTORDER_ACC, 92 DDI_FLAGERR_ACC 93 }; 94 95 /* 96 * DMA access attributes for data: NOT to be byte swapped. 97 */ 98 static ddi_device_acc_attr_t bge_data_accattr = { 99 DDI_DEVICE_ATTR_V0, 100 DDI_NEVERSWAP_ACC, 101 DDI_STRICTORDER_ACC 102 }; 103 104 static ether_addr_t bge_broadcast_addr = { 105 0xff, 0xff, 0xff, 0xff, 0xff, 0xff 106 }; 107 108 /* 109 * Versions of the O/S up to Solaris 8 didn't support network booting 110 * from any network interface except the first (NET0). Patching this 111 * flag to a non-zero value will tell the driver to work around this 112 * limitation by creating an extra (internal) pathname node. To do 113 * this, just add a line like the following to the CLIENT'S etc/system 114 * file ON THE ROOT FILESYSTEM SERVER before booting the client: 115 * 116 * set bge:bge_net1_boot_support = 1; 117 */ 118 static uint32_t bge_net1_boot_support = 1; 119 120 static int bge_m_start(void *); 121 static void bge_m_stop(void *); 122 static int bge_m_promisc(void *, boolean_t); 123 static int bge_m_multicst(void *, boolean_t, const uint8_t *); 124 static int bge_m_unicst(void *, const uint8_t *); 125 static void bge_m_resources(void *); 126 static void bge_m_ioctl(void *, queue_t *, mblk_t *); 127 static boolean_t bge_m_getcapab(void *, mac_capab_t, void *); 128 static int bge_unicst_set(void *, const uint8_t *, 129 mac_addr_slot_t); 130 static int bge_m_unicst_add(void *, mac_multi_addr_t *); 131 static int bge_m_unicst_remove(void *, mac_addr_slot_t); 132 static int bge_m_unicst_modify(void *, mac_multi_addr_t *); 133 static int bge_m_unicst_get(void *, mac_multi_addr_t *); 134 135 #define BGE_M_CALLBACK_FLAGS (MC_RESOURCES | MC_IOCTL | MC_GETCAPAB) 136 137 static mac_callbacks_t bge_m_callbacks = { 138 BGE_M_CALLBACK_FLAGS, 139 bge_m_stat, 140 bge_m_start, 141 bge_m_stop, 142 bge_m_promisc, 143 bge_m_multicst, 144 bge_m_unicst, 145 bge_m_tx, 146 bge_m_resources, 147 bge_m_ioctl, 148 bge_m_getcapab 149 }; 150 151 /* 152 * ========== Transmit and receive ring reinitialisation ========== 153 */ 154 155 /* 156 * These <reinit> routines each reset the specified ring to an initial 157 * state, assuming that the corresponding <init> routine has already 158 * been called exactly once. 159 */ 160 161 static void 162 bge_reinit_send_ring(send_ring_t *srp) 163 { 164 /* 165 * Reinitialise control variables ... 166 */ 167 ASSERT(srp->tx_flow == 0); 168 srp->tx_next = 0; 169 srp->tx_free = srp->desc.nslots; 170 171 ASSERT(mutex_owned(srp->tc_lock)); 172 srp->tc_next = 0; 173 174 /* 175 * Zero and sync all the h/w Send Buffer Descriptors 176 */ 177 DMA_ZERO(srp->desc); 178 DMA_SYNC(srp->desc, DDI_DMA_SYNC_FORDEV); 179 } 180 181 static void 182 bge_reinit_recv_ring(recv_ring_t *rrp) 183 { 184 /* 185 * Reinitialise control variables ... 186 */ 187 rrp->rx_next = 0; 188 } 189 190 static void 191 bge_reinit_buff_ring(buff_ring_t *brp, uint64_t ring) 192 { 193 bge_rbd_t *hw_rbd_p; 194 sw_rbd_t *srbdp; 195 uint32_t bufsize; 196 uint32_t nslots; 197 uint32_t slot; 198 199 static uint16_t ring_type_flag[BGE_BUFF_RINGS_MAX] = { 200 RBD_FLAG_STD_RING, 201 RBD_FLAG_JUMBO_RING, 202 RBD_FLAG_MINI_RING 203 }; 204 205 /* 206 * Zero, initialise and sync all the h/w Receive Buffer Descriptors 207 * Note: all the remaining fields (<type>, <flags>, <ip_cksum>, 208 * <tcp_udp_cksum>, <error_flag>, <vlan_tag>, and <reserved>) 209 * should be zeroed, and so don't need to be set up specifically 210 * once the whole area has been cleared. 211 */ 212 DMA_ZERO(brp->desc); 213 214 hw_rbd_p = DMA_VPTR(brp->desc); 215 nslots = brp->desc.nslots; 216 ASSERT(brp->buf[0].nslots == nslots/BGE_SPLIT); 217 bufsize = brp->buf[0].size; 218 srbdp = brp->sw_rbds; 219 for (slot = 0; slot < nslots; ++hw_rbd_p, ++srbdp, ++slot) { 220 hw_rbd_p->host_buf_addr = srbdp->pbuf.cookie.dmac_laddress; 221 hw_rbd_p->index = slot; 222 hw_rbd_p->len = bufsize; 223 hw_rbd_p->opaque = srbdp->pbuf.token; 224 hw_rbd_p->flags |= ring_type_flag[ring]; 225 } 226 227 DMA_SYNC(brp->desc, DDI_DMA_SYNC_FORDEV); 228 229 /* 230 * Finally, reinitialise the ring control variables ... 231 */ 232 brp->rf_next = (nslots != 0) ? (nslots-1) : 0; 233 } 234 235 /* 236 * Reinitialize all rings 237 */ 238 static void 239 bge_reinit_rings(bge_t *bgep) 240 { 241 uint64_t ring; 242 243 ASSERT(mutex_owned(bgep->genlock)); 244 245 /* 246 * Send Rings ... 247 */ 248 for (ring = 0; ring < bgep->chipid.tx_rings; ++ring) 249 bge_reinit_send_ring(&bgep->send[ring]); 250 251 /* 252 * Receive Return Rings ... 253 */ 254 for (ring = 0; ring < bgep->chipid.rx_rings; ++ring) 255 bge_reinit_recv_ring(&bgep->recv[ring]); 256 257 /* 258 * Receive Producer Rings ... 259 */ 260 for (ring = 0; ring < BGE_BUFF_RINGS_USED; ++ring) 261 bge_reinit_buff_ring(&bgep->buff[ring], ring); 262 } 263 264 /* 265 * ========== Internal state management entry points ========== 266 */ 267 268 #undef BGE_DBG 269 #define BGE_DBG BGE_DBG_NEMO /* debug flag for this code */ 270 271 /* 272 * These routines provide all the functionality required by the 273 * corresponding GLD entry points, but don't update the GLD state 274 * so they can be called internally without disturbing our record 275 * of what GLD thinks we should be doing ... 276 */ 277 278 /* 279 * bge_reset() -- reset h/w & rings to initial state 280 */ 281 static int 282 #ifdef BGE_IPMI_ASF 283 bge_reset(bge_t *bgep, uint_t asf_mode) 284 #else 285 bge_reset(bge_t *bgep) 286 #endif 287 { 288 uint64_t ring; 289 int retval; 290 291 BGE_TRACE(("bge_reset($%p)", (void *)bgep)); 292 293 ASSERT(mutex_owned(bgep->genlock)); 294 295 /* 296 * Grab all the other mutexes in the world (this should 297 * ensure no other threads are manipulating driver state) 298 */ 299 for (ring = 0; ring < BGE_RECV_RINGS_MAX; ++ring) 300 mutex_enter(bgep->recv[ring].rx_lock); 301 for (ring = 0; ring < BGE_BUFF_RINGS_MAX; ++ring) 302 mutex_enter(bgep->buff[ring].rf_lock); 303 rw_enter(bgep->errlock, RW_WRITER); 304 for (ring = 0; ring < BGE_SEND_RINGS_MAX; ++ring) 305 mutex_enter(bgep->send[ring].tc_lock); 306 307 #ifdef BGE_IPMI_ASF 308 retval = bge_chip_reset(bgep, B_TRUE, asf_mode); 309 #else 310 retval = bge_chip_reset(bgep, B_TRUE); 311 #endif 312 bge_reinit_rings(bgep); 313 314 /* 315 * Free the world ... 316 */ 317 for (ring = BGE_SEND_RINGS_MAX; ring-- > 0; ) 318 mutex_exit(bgep->send[ring].tc_lock); 319 rw_exit(bgep->errlock); 320 for (ring = BGE_BUFF_RINGS_MAX; ring-- > 0; ) 321 mutex_exit(bgep->buff[ring].rf_lock); 322 for (ring = BGE_RECV_RINGS_MAX; ring-- > 0; ) 323 mutex_exit(bgep->recv[ring].rx_lock); 324 325 BGE_DEBUG(("bge_reset($%p) done", (void *)bgep)); 326 return (retval); 327 } 328 329 /* 330 * bge_stop() -- stop processing, don't reset h/w or rings 331 */ 332 static void 333 bge_stop(bge_t *bgep) 334 { 335 BGE_TRACE(("bge_stop($%p)", (void *)bgep)); 336 337 ASSERT(mutex_owned(bgep->genlock)); 338 339 #ifdef BGE_IPMI_ASF 340 if (bgep->asf_enabled) { 341 bgep->asf_pseudostop = B_TRUE; 342 } else { 343 #endif 344 bge_chip_stop(bgep, B_FALSE); 345 #ifdef BGE_IPMI_ASF 346 } 347 #endif 348 349 BGE_DEBUG(("bge_stop($%p) done", (void *)bgep)); 350 } 351 352 /* 353 * bge_start() -- start transmitting/receiving 354 */ 355 static int 356 bge_start(bge_t *bgep, boolean_t reset_phys) 357 { 358 int retval; 359 360 BGE_TRACE(("bge_start($%p, %d)", (void *)bgep, reset_phys)); 361 362 ASSERT(mutex_owned(bgep->genlock)); 363 364 /* 365 * Start chip processing, including enabling interrupts 366 */ 367 retval = bge_chip_start(bgep, reset_phys); 368 369 BGE_DEBUG(("bge_start($%p, %d) done", (void *)bgep, reset_phys)); 370 return (retval); 371 } 372 373 /* 374 * bge_restart - restart transmitting/receiving after error or suspend 375 */ 376 int 377 bge_restart(bge_t *bgep, boolean_t reset_phys) 378 { 379 int retval = DDI_SUCCESS; 380 ASSERT(mutex_owned(bgep->genlock)); 381 382 #ifdef BGE_IPMI_ASF 383 if (bgep->asf_enabled) { 384 if (bge_reset(bgep, ASF_MODE_POST_INIT) != DDI_SUCCESS) 385 retval = DDI_FAILURE; 386 } else 387 if (bge_reset(bgep, ASF_MODE_NONE) != DDI_SUCCESS) 388 retval = DDI_FAILURE; 389 #else 390 if (bge_reset(bgep) != DDI_SUCCESS) 391 retval = DDI_FAILURE; 392 #endif 393 if (bgep->bge_mac_state == BGE_MAC_STARTED) { 394 if (bge_start(bgep, reset_phys) != DDI_SUCCESS) 395 retval = DDI_FAILURE; 396 bgep->watchdog = 0; 397 ddi_trigger_softintr(bgep->resched_id); 398 } 399 400 BGE_DEBUG(("bge_restart($%p, %d) done", (void *)bgep, reset_phys)); 401 return (retval); 402 } 403 404 405 /* 406 * ========== Nemo-required management entry points ========== 407 */ 408 409 #undef BGE_DBG 410 #define BGE_DBG BGE_DBG_NEMO /* debug flag for this code */ 411 412 /* 413 * bge_m_stop() -- stop transmitting/receiving 414 */ 415 static void 416 bge_m_stop(void *arg) 417 { 418 bge_t *bgep = arg; /* private device info */ 419 420 BGE_TRACE(("bge_m_stop($%p)", arg)); 421 422 /* 423 * Just stop processing, then record new GLD state 424 */ 425 mutex_enter(bgep->genlock); 426 if (!(bgep->progress & PROGRESS_INTR)) { 427 /* can happen during autorecovery */ 428 mutex_exit(bgep->genlock); 429 return; 430 } 431 432 bgep->link_up_msg = bgep->link_down_msg = " (stopped)"; 433 bge_stop(bgep); 434 bgep->bge_mac_state = BGE_MAC_STOPPED; 435 BGE_DEBUG(("bge_m_stop($%p) done", arg)); 436 if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) 437 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_UNAFFECTED); 438 mutex_exit(bgep->genlock); 439 } 440 441 /* 442 * bge_m_start() -- start transmitting/receiving 443 */ 444 static int 445 bge_m_start(void *arg) 446 { 447 bge_t *bgep = arg; /* private device info */ 448 449 BGE_TRACE(("bge_m_start($%p)", arg)); 450 451 /* 452 * Start processing and record new GLD state 453 */ 454 mutex_enter(bgep->genlock); 455 if (!(bgep->progress & PROGRESS_INTR)) { 456 /* can happen during autorecovery */ 457 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 458 mutex_exit(bgep->genlock); 459 return (EIO); 460 } 461 #ifdef BGE_IPMI_ASF 462 if (bgep->asf_enabled) { 463 if ((bgep->asf_status == ASF_STAT_RUN) && 464 (bgep->asf_pseudostop)) { 465 466 bgep->link_up_msg = bgep->link_down_msg 467 = " (initialized)"; 468 bgep->bge_mac_state = BGE_MAC_STARTED; 469 mutex_exit(bgep->genlock); 470 return (0); 471 } 472 } 473 if (bge_reset(bgep, ASF_MODE_INIT) != DDI_SUCCESS) { 474 #else 475 if (bge_reset(bgep) != DDI_SUCCESS) { 476 #endif 477 (void) bge_check_acc_handle(bgep, bgep->cfg_handle); 478 (void) bge_check_acc_handle(bgep, bgep->io_handle); 479 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 480 mutex_exit(bgep->genlock); 481 return (EIO); 482 } 483 bgep->link_up_msg = bgep->link_down_msg = " (initialized)"; 484 if (bge_start(bgep, B_TRUE) != DDI_SUCCESS) { 485 (void) bge_check_acc_handle(bgep, bgep->cfg_handle); 486 (void) bge_check_acc_handle(bgep, bgep->io_handle); 487 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 488 mutex_exit(bgep->genlock); 489 return (EIO); 490 } 491 bgep->bge_mac_state = BGE_MAC_STARTED; 492 BGE_DEBUG(("bge_m_start($%p) done", arg)); 493 494 if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 495 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 496 mutex_exit(bgep->genlock); 497 return (EIO); 498 } 499 if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) { 500 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 501 mutex_exit(bgep->genlock); 502 return (EIO); 503 } 504 #ifdef BGE_IPMI_ASF 505 if (bgep->asf_enabled) { 506 if (bgep->asf_status != ASF_STAT_RUN) { 507 /* start ASF heart beat */ 508 bgep->asf_timeout_id = timeout(bge_asf_heartbeat, 509 (void *)bgep, 510 drv_usectohz(BGE_ASF_HEARTBEAT_INTERVAL)); 511 bgep->asf_status = ASF_STAT_RUN; 512 } 513 } 514 #endif 515 mutex_exit(bgep->genlock); 516 517 return (0); 518 } 519 520 /* 521 * bge_m_unicst() -- set the physical network address 522 */ 523 static int 524 bge_m_unicst(void *arg, const uint8_t *macaddr) 525 { 526 /* 527 * Request to set address in 528 * address slot 0, i.e., default address 529 */ 530 return (bge_unicst_set(arg, macaddr, 0)); 531 } 532 533 /* 534 * bge_unicst_set() -- set the physical network address 535 */ 536 static int 537 bge_unicst_set(void *arg, const uint8_t *macaddr, mac_addr_slot_t slot) 538 { 539 bge_t *bgep = arg; /* private device info */ 540 541 BGE_TRACE(("bge_m_unicst_set($%p, %s)", arg, 542 ether_sprintf((void *)macaddr))); 543 /* 544 * Remember the new current address in the driver state 545 * Sync the chip's idea of the address too ... 546 */ 547 mutex_enter(bgep->genlock); 548 if (!(bgep->progress & PROGRESS_INTR)) { 549 /* can happen during autorecovery */ 550 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 551 mutex_exit(bgep->genlock); 552 return (EIO); 553 } 554 ethaddr_copy(macaddr, bgep->curr_addr[slot].addr); 555 #ifdef BGE_IPMI_ASF 556 if (bge_chip_sync(bgep, B_FALSE) == DDI_FAILURE) { 557 #else 558 if (bge_chip_sync(bgep) == DDI_FAILURE) { 559 #endif 560 (void) bge_check_acc_handle(bgep, bgep->cfg_handle); 561 (void) bge_check_acc_handle(bgep, bgep->io_handle); 562 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 563 mutex_exit(bgep->genlock); 564 return (EIO); 565 } 566 #ifdef BGE_IPMI_ASF 567 if (bgep->asf_enabled) { 568 /* 569 * The above bge_chip_sync() function wrote the ethernet MAC 570 * addresses registers which destroyed the IPMI/ASF sideband. 571 * Here, we have to reset chip to make IPMI/ASF sideband work. 572 */ 573 if (bgep->asf_status == ASF_STAT_RUN) { 574 /* 575 * We must stop ASF heart beat before bge_chip_stop(), 576 * otherwise some computers (ex. IBM HS20 blade server) 577 * may crash. 578 */ 579 bge_asf_update_status(bgep); 580 bge_asf_stop_timer(bgep); 581 bgep->asf_status = ASF_STAT_STOP; 582 583 bge_asf_pre_reset_operations(bgep, BGE_INIT_RESET); 584 } 585 bge_chip_stop(bgep, B_FALSE); 586 587 if (bge_restart(bgep, B_FALSE) == DDI_FAILURE) { 588 (void) bge_check_acc_handle(bgep, bgep->cfg_handle); 589 (void) bge_check_acc_handle(bgep, bgep->io_handle); 590 ddi_fm_service_impact(bgep->devinfo, 591 DDI_SERVICE_DEGRADED); 592 mutex_exit(bgep->genlock); 593 return (EIO); 594 } 595 596 /* 597 * Start our ASF heartbeat counter as soon as possible. 598 */ 599 if (bgep->asf_status != ASF_STAT_RUN) { 600 /* start ASF heart beat */ 601 bgep->asf_timeout_id = timeout(bge_asf_heartbeat, 602 (void *)bgep, 603 drv_usectohz(BGE_ASF_HEARTBEAT_INTERVAL)); 604 bgep->asf_status = ASF_STAT_RUN; 605 } 606 } 607 #endif 608 BGE_DEBUG(("bge_m_unicst_set($%p) done", arg)); 609 if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 610 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 611 mutex_exit(bgep->genlock); 612 return (EIO); 613 } 614 if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) { 615 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 616 mutex_exit(bgep->genlock); 617 return (EIO); 618 } 619 mutex_exit(bgep->genlock); 620 621 return (0); 622 } 623 624 /* 625 * The following four routines are used as callbacks for multiple MAC 626 * address support: 627 * - bge_m_unicst_add(void *, mac_multi_addr_t *); 628 * - bge_m_unicst_remove(void *, mac_addr_slot_t); 629 * - bge_m_unicst_modify(void *, mac_multi_addr_t *); 630 * - bge_m_unicst_get(void *, mac_multi_addr_t *); 631 */ 632 633 /* 634 * bge_m_unicst_add() - will find an unused address slot, set the 635 * address value to the one specified, reserve that slot and enable 636 * the NIC to start filtering on the new MAC address. 637 * address slot. Returns 0 on success. 638 */ 639 static int 640 bge_m_unicst_add(void *arg, mac_multi_addr_t *maddr) 641 { 642 bge_t *bgep = arg; /* private device info */ 643 mac_addr_slot_t slot; 644 int err; 645 646 if (mac_unicst_verify(bgep->mh, 647 maddr->mma_addr, maddr->mma_addrlen) == B_FALSE) 648 return (EINVAL); 649 650 mutex_enter(bgep->genlock); 651 if (bgep->unicst_addr_avail == 0) { 652 /* no slots available */ 653 mutex_exit(bgep->genlock); 654 return (ENOSPC); 655 } 656 657 /* 658 * Primary/default address is in slot 0. The next three 659 * addresses are the multiple MAC addresses. So multiple 660 * MAC address 0 is in slot 1, 1 in slot 2, and so on. 661 * So the first multiple MAC address resides in slot 1. 662 */ 663 for (slot = 1; slot < bgep->unicst_addr_total; slot++) { 664 if (bgep->curr_addr[slot].set == B_FALSE) { 665 bgep->curr_addr[slot].set = B_TRUE; 666 break; 667 } 668 } 669 670 ASSERT(slot < bgep->unicst_addr_total); 671 bgep->unicst_addr_avail--; 672 mutex_exit(bgep->genlock); 673 maddr->mma_slot = slot; 674 675 if ((err = bge_unicst_set(bgep, maddr->mma_addr, slot)) != 0) { 676 mutex_enter(bgep->genlock); 677 bgep->curr_addr[slot].set = B_FALSE; 678 bgep->unicst_addr_avail++; 679 mutex_exit(bgep->genlock); 680 } 681 return (err); 682 } 683 684 /* 685 * bge_m_unicst_remove() - removes a MAC address that was added by a 686 * call to bge_m_unicst_add(). The slot number that was returned in 687 * add() is passed in the call to remove the address. 688 * Returns 0 on success. 689 */ 690 static int 691 bge_m_unicst_remove(void *arg, mac_addr_slot_t slot) 692 { 693 bge_t *bgep = arg; /* private device info */ 694 695 if (slot <= 0 || slot >= bgep->unicst_addr_total) 696 return (EINVAL); 697 698 mutex_enter(bgep->genlock); 699 if (bgep->curr_addr[slot].set == B_TRUE) { 700 bgep->curr_addr[slot].set = B_FALSE; 701 bgep->unicst_addr_avail++; 702 mutex_exit(bgep->genlock); 703 /* 704 * Copy the default address to the passed slot 705 */ 706 return (bge_unicst_set(bgep, bgep->curr_addr[0].addr, slot)); 707 } 708 mutex_exit(bgep->genlock); 709 return (EINVAL); 710 } 711 712 /* 713 * bge_m_unicst_modify() - modifies the value of an address that 714 * has been added by bge_m_unicst_add(). The new address, address 715 * length and the slot number that was returned in the call to add 716 * should be passed to bge_m_unicst_modify(). mma_flags should be 717 * set to 0. Returns 0 on success. 718 */ 719 static int 720 bge_m_unicst_modify(void *arg, mac_multi_addr_t *maddr) 721 { 722 bge_t *bgep = arg; /* private device info */ 723 mac_addr_slot_t slot; 724 725 if (mac_unicst_verify(bgep->mh, 726 maddr->mma_addr, maddr->mma_addrlen) == B_FALSE) 727 return (EINVAL); 728 729 slot = maddr->mma_slot; 730 731 if (slot <= 0 || slot >= bgep->unicst_addr_total) 732 return (EINVAL); 733 734 mutex_enter(bgep->genlock); 735 if (bgep->curr_addr[slot].set == B_TRUE) { 736 mutex_exit(bgep->genlock); 737 return (bge_unicst_set(bgep, maddr->mma_addr, slot)); 738 } 739 mutex_exit(bgep->genlock); 740 741 return (EINVAL); 742 } 743 744 /* 745 * bge_m_unicst_get() - will get the MAC address and all other 746 * information related to the address slot passed in mac_multi_addr_t. 747 * mma_flags should be set to 0 in the call. 748 * On return, mma_flags can take the following values: 749 * 1) MMAC_SLOT_UNUSED 750 * 2) MMAC_SLOT_USED | MMAC_VENDOR_ADDR 751 * 3) MMAC_SLOT_UNUSED | MMAC_VENDOR_ADDR 752 * 4) MMAC_SLOT_USED 753 */ 754 static int 755 bge_m_unicst_get(void *arg, mac_multi_addr_t *maddr) 756 { 757 bge_t *bgep = arg; /* private device info */ 758 mac_addr_slot_t slot; 759 760 slot = maddr->mma_slot; 761 762 if (slot <= 0 || slot >= bgep->unicst_addr_total) 763 return (EINVAL); 764 765 mutex_enter(bgep->genlock); 766 if (bgep->curr_addr[slot].set == B_TRUE) { 767 ethaddr_copy(bgep->curr_addr[slot].addr, 768 maddr->mma_addr); 769 maddr->mma_flags = MMAC_SLOT_USED; 770 } else { 771 maddr->mma_flags = MMAC_SLOT_UNUSED; 772 } 773 mutex_exit(bgep->genlock); 774 775 return (0); 776 } 777 778 /* 779 * Compute the index of the required bit in the multicast hash map. 780 * This must mirror the way the hardware actually does it! 781 * See Broadcom document 570X-PG102-R page 125. 782 */ 783 static uint32_t 784 bge_hash_index(const uint8_t *mca) 785 { 786 uint32_t hash; 787 788 CRC32(hash, mca, ETHERADDRL, -1U, crc32_table); 789 790 return (hash); 791 } 792 793 /* 794 * bge_m_multicst_add() -- enable/disable a multicast address 795 */ 796 static int 797 bge_m_multicst(void *arg, boolean_t add, const uint8_t *mca) 798 { 799 bge_t *bgep = arg; /* private device info */ 800 uint32_t hash; 801 uint32_t index; 802 uint32_t word; 803 uint32_t bit; 804 uint8_t *refp; 805 806 BGE_TRACE(("bge_m_multicst($%p, %s, %s)", arg, 807 (add) ? "add" : "remove", ether_sprintf((void *)mca))); 808 809 /* 810 * Precalculate all required masks, pointers etc ... 811 */ 812 hash = bge_hash_index(mca); 813 index = hash % BGE_HASH_TABLE_SIZE; 814 word = index/32u; 815 bit = 1 << (index % 32u); 816 refp = &bgep->mcast_refs[index]; 817 818 BGE_DEBUG(("bge_m_multicst: hash 0x%x index %d (%d:0x%x) = %d", 819 hash, index, word, bit, *refp)); 820 821 /* 822 * We must set the appropriate bit in the hash map (and the 823 * corresponding h/w register) when the refcount goes from 0 824 * to >0, and clear it when the last ref goes away (refcount 825 * goes from >0 back to 0). If we change the hash map, we 826 * must also update the chip's hardware map registers. 827 */ 828 mutex_enter(bgep->genlock); 829 if (!(bgep->progress & PROGRESS_INTR)) { 830 /* can happen during autorecovery */ 831 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 832 mutex_exit(bgep->genlock); 833 return (EIO); 834 } 835 if (add) { 836 if ((*refp)++ == 0) { 837 bgep->mcast_hash[word] |= bit; 838 #ifdef BGE_IPMI_ASF 839 if (bge_chip_sync(bgep, B_TRUE) == DDI_FAILURE) { 840 #else 841 if (bge_chip_sync(bgep) == DDI_FAILURE) { 842 #endif 843 (void) bge_check_acc_handle(bgep, 844 bgep->cfg_handle); 845 (void) bge_check_acc_handle(bgep, 846 bgep->io_handle); 847 ddi_fm_service_impact(bgep->devinfo, 848 DDI_SERVICE_DEGRADED); 849 mutex_exit(bgep->genlock); 850 return (EIO); 851 } 852 } 853 } else { 854 if (--(*refp) == 0) { 855 bgep->mcast_hash[word] &= ~bit; 856 #ifdef BGE_IPMI_ASF 857 if (bge_chip_sync(bgep, B_TRUE) == DDI_FAILURE) { 858 #else 859 if (bge_chip_sync(bgep) == DDI_FAILURE) { 860 #endif 861 (void) bge_check_acc_handle(bgep, 862 bgep->cfg_handle); 863 (void) bge_check_acc_handle(bgep, 864 bgep->io_handle); 865 ddi_fm_service_impact(bgep->devinfo, 866 DDI_SERVICE_DEGRADED); 867 mutex_exit(bgep->genlock); 868 return (EIO); 869 } 870 } 871 } 872 BGE_DEBUG(("bge_m_multicst($%p) done", arg)); 873 if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 874 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 875 mutex_exit(bgep->genlock); 876 return (EIO); 877 } 878 if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) { 879 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 880 mutex_exit(bgep->genlock); 881 return (EIO); 882 } 883 mutex_exit(bgep->genlock); 884 885 return (0); 886 } 887 888 /* 889 * bge_m_promisc() -- set or reset promiscuous mode on the board 890 * 891 * Program the hardware to enable/disable promiscuous and/or 892 * receive-all-multicast modes. 893 */ 894 static int 895 bge_m_promisc(void *arg, boolean_t on) 896 { 897 bge_t *bgep = arg; 898 899 BGE_TRACE(("bge_m_promisc_set($%p, %d)", arg, on)); 900 901 /* 902 * Store MAC layer specified mode and pass to chip layer to update h/w 903 */ 904 mutex_enter(bgep->genlock); 905 if (!(bgep->progress & PROGRESS_INTR)) { 906 /* can happen during autorecovery */ 907 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 908 mutex_exit(bgep->genlock); 909 return (EIO); 910 } 911 bgep->promisc = on; 912 #ifdef BGE_IPMI_ASF 913 if (bge_chip_sync(bgep, B_TRUE) == DDI_FAILURE) { 914 #else 915 if (bge_chip_sync(bgep) == DDI_FAILURE) { 916 #endif 917 (void) bge_check_acc_handle(bgep, bgep->cfg_handle); 918 (void) bge_check_acc_handle(bgep, bgep->io_handle); 919 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 920 mutex_exit(bgep->genlock); 921 return (EIO); 922 } 923 BGE_DEBUG(("bge_m_promisc_set($%p) done", arg)); 924 if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 925 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 926 mutex_exit(bgep->genlock); 927 return (EIO); 928 } 929 if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) { 930 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 931 mutex_exit(bgep->genlock); 932 return (EIO); 933 } 934 mutex_exit(bgep->genlock); 935 return (0); 936 } 937 938 /*ARGSUSED*/ 939 static boolean_t 940 bge_m_getcapab(void *arg, mac_capab_t cap, void *cap_data) 941 { 942 bge_t *bgep = arg; 943 944 switch (cap) { 945 case MAC_CAPAB_HCKSUM: { 946 uint32_t *txflags = cap_data; 947 948 *txflags = HCKSUM_INET_FULL_V4 | HCKSUM_IPHDRCKSUM; 949 break; 950 } 951 952 case MAC_CAPAB_POLL: 953 /* 954 * There's nothing for us to fill in, simply returning 955 * B_TRUE stating that we support polling is sufficient. 956 */ 957 break; 958 959 case MAC_CAPAB_MULTIADDRESS: { 960 multiaddress_capab_t *mmacp = cap_data; 961 962 mutex_enter(bgep->genlock); 963 /* 964 * The number of MAC addresses made available by 965 * this capability is one less than the total as 966 * the primary address in slot 0 is counted in 967 * the total. 968 */ 969 mmacp->maddr_naddr = bgep->unicst_addr_total - 1; 970 mmacp->maddr_naddrfree = bgep->unicst_addr_avail; 971 /* No multiple factory addresses, set mma_flag to 0 */ 972 mmacp->maddr_flag = 0; 973 mmacp->maddr_handle = bgep; 974 mmacp->maddr_add = bge_m_unicst_add; 975 mmacp->maddr_remove = bge_m_unicst_remove; 976 mmacp->maddr_modify = bge_m_unicst_modify; 977 mmacp->maddr_get = bge_m_unicst_get; 978 mmacp->maddr_reserve = NULL; 979 mutex_exit(bgep->genlock); 980 break; 981 } 982 983 default: 984 return (B_FALSE); 985 } 986 return (B_TRUE); 987 } 988 989 /* 990 * Loopback ioctl code 991 */ 992 993 static lb_property_t loopmodes[] = { 994 { normal, "normal", BGE_LOOP_NONE }, 995 { external, "1000Mbps", BGE_LOOP_EXTERNAL_1000 }, 996 { external, "100Mbps", BGE_LOOP_EXTERNAL_100 }, 997 { external, "10Mbps", BGE_LOOP_EXTERNAL_10 }, 998 { internal, "PHY", BGE_LOOP_INTERNAL_PHY }, 999 { internal, "MAC", BGE_LOOP_INTERNAL_MAC } 1000 }; 1001 1002 static enum ioc_reply 1003 bge_set_loop_mode(bge_t *bgep, uint32_t mode) 1004 { 1005 const char *msg; 1006 1007 /* 1008 * If the mode isn't being changed, there's nothing to do ... 1009 */ 1010 if (mode == bgep->param_loop_mode) 1011 return (IOC_ACK); 1012 1013 /* 1014 * Validate the requested mode and prepare a suitable message 1015 * to explain the link down/up cycle that the change will 1016 * probably induce ... 1017 */ 1018 switch (mode) { 1019 default: 1020 return (IOC_INVAL); 1021 1022 case BGE_LOOP_NONE: 1023 msg = " (loopback disabled)"; 1024 break; 1025 1026 case BGE_LOOP_EXTERNAL_1000: 1027 case BGE_LOOP_EXTERNAL_100: 1028 case BGE_LOOP_EXTERNAL_10: 1029 msg = " (external loopback selected)"; 1030 break; 1031 1032 case BGE_LOOP_INTERNAL_PHY: 1033 msg = " (PHY internal loopback selected)"; 1034 break; 1035 1036 case BGE_LOOP_INTERNAL_MAC: 1037 msg = " (MAC internal loopback selected)"; 1038 break; 1039 } 1040 1041 /* 1042 * All OK; tell the caller to reprogram 1043 * the PHY and/or MAC for the new mode ... 1044 */ 1045 bgep->link_down_msg = bgep->link_up_msg = msg; 1046 bgep->param_loop_mode = mode; 1047 return (IOC_RESTART_ACK); 1048 } 1049 1050 static enum ioc_reply 1051 bge_loop_ioctl(bge_t *bgep, queue_t *wq, mblk_t *mp, struct iocblk *iocp) 1052 { 1053 lb_info_sz_t *lbsp; 1054 lb_property_t *lbpp; 1055 uint32_t *lbmp; 1056 int cmd; 1057 1058 _NOTE(ARGUNUSED(wq)) 1059 1060 /* 1061 * Validate format of ioctl 1062 */ 1063 if (mp->b_cont == NULL) 1064 return (IOC_INVAL); 1065 1066 cmd = iocp->ioc_cmd; 1067 switch (cmd) { 1068 default: 1069 /* NOTREACHED */ 1070 bge_error(bgep, "bge_loop_ioctl: invalid cmd 0x%x", cmd); 1071 return (IOC_INVAL); 1072 1073 case LB_GET_INFO_SIZE: 1074 if (iocp->ioc_count != sizeof (lb_info_sz_t)) 1075 return (IOC_INVAL); 1076 lbsp = (lb_info_sz_t *)mp->b_cont->b_rptr; 1077 *lbsp = sizeof (loopmodes); 1078 return (IOC_REPLY); 1079 1080 case LB_GET_INFO: 1081 if (iocp->ioc_count != sizeof (loopmodes)) 1082 return (IOC_INVAL); 1083 lbpp = (lb_property_t *)mp->b_cont->b_rptr; 1084 bcopy(loopmodes, lbpp, sizeof (loopmodes)); 1085 return (IOC_REPLY); 1086 1087 case LB_GET_MODE: 1088 if (iocp->ioc_count != sizeof (uint32_t)) 1089 return (IOC_INVAL); 1090 lbmp = (uint32_t *)mp->b_cont->b_rptr; 1091 *lbmp = bgep->param_loop_mode; 1092 return (IOC_REPLY); 1093 1094 case LB_SET_MODE: 1095 if (iocp->ioc_count != sizeof (uint32_t)) 1096 return (IOC_INVAL); 1097 lbmp = (uint32_t *)mp->b_cont->b_rptr; 1098 return (bge_set_loop_mode(bgep, *lbmp)); 1099 } 1100 } 1101 1102 /* 1103 * Specific bge IOCTLs, the gld module handles the generic ones. 1104 */ 1105 static void 1106 bge_m_ioctl(void *arg, queue_t *wq, mblk_t *mp) 1107 { 1108 bge_t *bgep = arg; 1109 struct iocblk *iocp; 1110 enum ioc_reply status; 1111 boolean_t need_privilege; 1112 int err; 1113 int cmd; 1114 1115 /* 1116 * Validate the command before bothering with the mutex ... 1117 */ 1118 iocp = (struct iocblk *)mp->b_rptr; 1119 iocp->ioc_error = 0; 1120 need_privilege = B_TRUE; 1121 cmd = iocp->ioc_cmd; 1122 switch (cmd) { 1123 default: 1124 miocnak(wq, mp, 0, EINVAL); 1125 return; 1126 1127 case BGE_MII_READ: 1128 case BGE_MII_WRITE: 1129 case BGE_SEE_READ: 1130 case BGE_SEE_WRITE: 1131 case BGE_FLASH_READ: 1132 case BGE_FLASH_WRITE: 1133 case BGE_DIAG: 1134 case BGE_PEEK: 1135 case BGE_POKE: 1136 case BGE_PHY_RESET: 1137 case BGE_SOFT_RESET: 1138 case BGE_HARD_RESET: 1139 break; 1140 1141 case LB_GET_INFO_SIZE: 1142 case LB_GET_INFO: 1143 case LB_GET_MODE: 1144 need_privilege = B_FALSE; 1145 /* FALLTHRU */ 1146 case LB_SET_MODE: 1147 break; 1148 1149 case ND_GET: 1150 need_privilege = B_FALSE; 1151 /* FALLTHRU */ 1152 case ND_SET: 1153 break; 1154 } 1155 1156 if (need_privilege) { 1157 /* 1158 * Check for specific net_config privilege on Solaris 10+. 1159 * Otherwise just check for root access ... 1160 */ 1161 if (secpolicy_net_config != NULL) 1162 err = secpolicy_net_config(iocp->ioc_cr, B_FALSE); 1163 else 1164 err = drv_priv(iocp->ioc_cr); 1165 if (err != 0) { 1166 miocnak(wq, mp, 0, err); 1167 return; 1168 } 1169 } 1170 1171 mutex_enter(bgep->genlock); 1172 if (!(bgep->progress & PROGRESS_INTR)) { 1173 /* can happen during autorecovery */ 1174 mutex_exit(bgep->genlock); 1175 miocnak(wq, mp, 0, EIO); 1176 return; 1177 } 1178 1179 switch (cmd) { 1180 default: 1181 _NOTE(NOTREACHED) 1182 status = IOC_INVAL; 1183 break; 1184 1185 case BGE_MII_READ: 1186 case BGE_MII_WRITE: 1187 case BGE_SEE_READ: 1188 case BGE_SEE_WRITE: 1189 case BGE_FLASH_READ: 1190 case BGE_FLASH_WRITE: 1191 case BGE_DIAG: 1192 case BGE_PEEK: 1193 case BGE_POKE: 1194 case BGE_PHY_RESET: 1195 case BGE_SOFT_RESET: 1196 case BGE_HARD_RESET: 1197 status = bge_chip_ioctl(bgep, wq, mp, iocp); 1198 break; 1199 1200 case LB_GET_INFO_SIZE: 1201 case LB_GET_INFO: 1202 case LB_GET_MODE: 1203 case LB_SET_MODE: 1204 status = bge_loop_ioctl(bgep, wq, mp, iocp); 1205 break; 1206 1207 case ND_GET: 1208 case ND_SET: 1209 status = bge_nd_ioctl(bgep, wq, mp, iocp); 1210 break; 1211 } 1212 1213 /* 1214 * Do we need to reprogram the PHY and/or the MAC? 1215 * Do it now, while we still have the mutex. 1216 * 1217 * Note: update the PHY first, 'cos it controls the 1218 * speed/duplex parameters that the MAC code uses. 1219 */ 1220 switch (status) { 1221 case IOC_RESTART_REPLY: 1222 case IOC_RESTART_ACK: 1223 if (bge_phys_update(bgep) != DDI_SUCCESS) { 1224 ddi_fm_service_impact(bgep->devinfo, 1225 DDI_SERVICE_DEGRADED); 1226 status = IOC_INVAL; 1227 } 1228 #ifdef BGE_IPMI_ASF 1229 if (bge_chip_sync(bgep, B_TRUE) == DDI_FAILURE) { 1230 #else 1231 if (bge_chip_sync(bgep) == DDI_FAILURE) { 1232 #endif 1233 ddi_fm_service_impact(bgep->devinfo, 1234 DDI_SERVICE_DEGRADED); 1235 status = IOC_INVAL; 1236 } 1237 if (bgep->intr_type == DDI_INTR_TYPE_MSI) 1238 bge_chip_msi_trig(bgep); 1239 break; 1240 } 1241 1242 if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 1243 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 1244 status = IOC_INVAL; 1245 } 1246 if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) { 1247 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 1248 status = IOC_INVAL; 1249 } 1250 mutex_exit(bgep->genlock); 1251 1252 /* 1253 * Finally, decide how to reply 1254 */ 1255 switch (status) { 1256 default: 1257 case IOC_INVAL: 1258 /* 1259 * Error, reply with a NAK and EINVAL or the specified error 1260 */ 1261 miocnak(wq, mp, 0, iocp->ioc_error == 0 ? 1262 EINVAL : iocp->ioc_error); 1263 break; 1264 1265 case IOC_DONE: 1266 /* 1267 * OK, reply already sent 1268 */ 1269 break; 1270 1271 case IOC_RESTART_ACK: 1272 case IOC_ACK: 1273 /* 1274 * OK, reply with an ACK 1275 */ 1276 miocack(wq, mp, 0, 0); 1277 break; 1278 1279 case IOC_RESTART_REPLY: 1280 case IOC_REPLY: 1281 /* 1282 * OK, send prepared reply as ACK or NAK 1283 */ 1284 mp->b_datap->db_type = iocp->ioc_error == 0 ? 1285 M_IOCACK : M_IOCNAK; 1286 qreply(wq, mp); 1287 break; 1288 } 1289 } 1290 1291 static void 1292 bge_m_resources(void *arg) 1293 { 1294 bge_t *bgep = arg; 1295 recv_ring_t *rrp; 1296 mac_rx_fifo_t mrf; 1297 int ring; 1298 1299 mutex_enter(bgep->genlock); 1300 1301 /* 1302 * Register Rx rings as resources and save mac 1303 * resource id for future reference 1304 */ 1305 mrf.mrf_type = MAC_RX_FIFO; 1306 mrf.mrf_blank = bge_chip_blank; 1307 mrf.mrf_arg = (void *)bgep; 1308 mrf.mrf_normal_blank_time = bge_rx_ticks_norm; 1309 mrf.mrf_normal_pkt_count = bge_rx_count_norm; 1310 1311 for (ring = 0; ring < bgep->chipid.rx_rings; ring++) { 1312 rrp = &bgep->recv[ring]; 1313 rrp->handle = mac_resource_add(bgep->mh, 1314 (mac_resource_t *)&mrf); 1315 } 1316 1317 mutex_exit(bgep->genlock); 1318 } 1319 1320 /* 1321 * ========== Per-instance setup/teardown code ========== 1322 */ 1323 1324 #undef BGE_DBG 1325 #define BGE_DBG BGE_DBG_INIT /* debug flag for this code */ 1326 1327 /* 1328 * Utility routine to carve a slice off a chunk of allocated memory, 1329 * updating the chunk descriptor accordingly. The size of the slice 1330 * is given by the product of the <qty> and <size> parameters. 1331 */ 1332 static void 1333 bge_slice_chunk(dma_area_t *slice, dma_area_t *chunk, 1334 uint32_t qty, uint32_t size) 1335 { 1336 static uint32_t sequence = 0xbcd5704a; 1337 size_t totsize; 1338 1339 totsize = qty*size; 1340 ASSERT(size >= 0); 1341 ASSERT(totsize <= chunk->alength); 1342 1343 *slice = *chunk; 1344 slice->nslots = qty; 1345 slice->size = size; 1346 slice->alength = totsize; 1347 slice->token = ++sequence; 1348 1349 chunk->mem_va = (caddr_t)chunk->mem_va + totsize; 1350 chunk->alength -= totsize; 1351 chunk->offset += totsize; 1352 chunk->cookie.dmac_laddress += totsize; 1353 chunk->cookie.dmac_size -= totsize; 1354 } 1355 1356 /* 1357 * Initialise the specified Receive Producer (Buffer) Ring, using 1358 * the information in the <dma_area> descriptors that it contains 1359 * to set up all the other fields. This routine should be called 1360 * only once for each ring. 1361 */ 1362 static void 1363 bge_init_buff_ring(bge_t *bgep, uint64_t ring) 1364 { 1365 buff_ring_t *brp; 1366 bge_status_t *bsp; 1367 sw_rbd_t *srbdp; 1368 dma_area_t pbuf; 1369 uint32_t bufsize; 1370 uint32_t nslots; 1371 uint32_t slot; 1372 uint32_t split; 1373 1374 static bge_regno_t nic_ring_addrs[BGE_BUFF_RINGS_MAX] = { 1375 NIC_MEM_SHADOW_BUFF_STD, 1376 NIC_MEM_SHADOW_BUFF_JUMBO, 1377 NIC_MEM_SHADOW_BUFF_MINI 1378 }; 1379 static bge_regno_t mailbox_regs[BGE_BUFF_RINGS_MAX] = { 1380 RECV_STD_PROD_INDEX_REG, 1381 RECV_JUMBO_PROD_INDEX_REG, 1382 RECV_MINI_PROD_INDEX_REG 1383 }; 1384 static bge_regno_t buff_cons_xref[BGE_BUFF_RINGS_MAX] = { 1385 STATUS_STD_BUFF_CONS_INDEX, 1386 STATUS_JUMBO_BUFF_CONS_INDEX, 1387 STATUS_MINI_BUFF_CONS_INDEX 1388 }; 1389 1390 BGE_TRACE(("bge_init_buff_ring($%p, %d)", 1391 (void *)bgep, ring)); 1392 1393 brp = &bgep->buff[ring]; 1394 nslots = brp->desc.nslots; 1395 ASSERT(brp->buf[0].nslots == nslots/BGE_SPLIT); 1396 bufsize = brp->buf[0].size; 1397 1398 /* 1399 * Set up the copy of the h/w RCB 1400 * 1401 * Note: unlike Send & Receive Return Rings, (where the max_len 1402 * field holds the number of slots), in a Receive Buffer Ring 1403 * this field indicates the size of each buffer in the ring. 1404 */ 1405 brp->hw_rcb.host_ring_addr = brp->desc.cookie.dmac_laddress; 1406 brp->hw_rcb.max_len = bufsize; 1407 brp->hw_rcb.flags = nslots > 0 ? 0 : RCB_FLAG_RING_DISABLED; 1408 brp->hw_rcb.nic_ring_addr = nic_ring_addrs[ring]; 1409 1410 /* 1411 * Other one-off initialisation of per-ring data 1412 */ 1413 brp->bgep = bgep; 1414 bsp = DMA_VPTR(bgep->status_block); 1415 brp->cons_index_p = &bsp->buff_cons_index[buff_cons_xref[ring]]; 1416 brp->chip_mbx_reg = mailbox_regs[ring]; 1417 mutex_init(brp->rf_lock, NULL, MUTEX_DRIVER, 1418 DDI_INTR_PRI(bgep->intr_pri)); 1419 1420 /* 1421 * Allocate the array of s/w Receive Buffer Descriptors 1422 */ 1423 srbdp = kmem_zalloc(nslots*sizeof (*srbdp), KM_SLEEP); 1424 brp->sw_rbds = srbdp; 1425 1426 /* 1427 * Now initialise each array element once and for all 1428 */ 1429 for (split = 0; split < BGE_SPLIT; ++split) { 1430 pbuf = brp->buf[split]; 1431 for (slot = 0; slot < nslots/BGE_SPLIT; ++srbdp, ++slot) 1432 bge_slice_chunk(&srbdp->pbuf, &pbuf, 1, bufsize); 1433 ASSERT(pbuf.alength == 0); 1434 } 1435 } 1436 1437 /* 1438 * Clean up initialisation done above before the memory is freed 1439 */ 1440 static void 1441 bge_fini_buff_ring(bge_t *bgep, uint64_t ring) 1442 { 1443 buff_ring_t *brp; 1444 sw_rbd_t *srbdp; 1445 1446 BGE_TRACE(("bge_fini_buff_ring($%p, %d)", 1447 (void *)bgep, ring)); 1448 1449 brp = &bgep->buff[ring]; 1450 srbdp = brp->sw_rbds; 1451 kmem_free(srbdp, brp->desc.nslots*sizeof (*srbdp)); 1452 1453 mutex_destroy(brp->rf_lock); 1454 } 1455 1456 /* 1457 * Initialise the specified Receive (Return) Ring, using the 1458 * information in the <dma_area> descriptors that it contains 1459 * to set up all the other fields. This routine should be called 1460 * only once for each ring. 1461 */ 1462 static void 1463 bge_init_recv_ring(bge_t *bgep, uint64_t ring) 1464 { 1465 recv_ring_t *rrp; 1466 bge_status_t *bsp; 1467 uint32_t nslots; 1468 1469 BGE_TRACE(("bge_init_recv_ring($%p, %d)", 1470 (void *)bgep, ring)); 1471 1472 /* 1473 * The chip architecture requires that receive return rings have 1474 * 512 or 1024 or 2048 elements per ring. See 570X-PG108-R page 103. 1475 */ 1476 rrp = &bgep->recv[ring]; 1477 nslots = rrp->desc.nslots; 1478 ASSERT(nslots == 0 || nslots == 512 || 1479 nslots == 1024 || nslots == 2048); 1480 1481 /* 1482 * Set up the copy of the h/w RCB 1483 */ 1484 rrp->hw_rcb.host_ring_addr = rrp->desc.cookie.dmac_laddress; 1485 rrp->hw_rcb.max_len = nslots; 1486 rrp->hw_rcb.flags = nslots > 0 ? 0 : RCB_FLAG_RING_DISABLED; 1487 rrp->hw_rcb.nic_ring_addr = 0; 1488 1489 /* 1490 * Other one-off initialisation of per-ring data 1491 */ 1492 rrp->bgep = bgep; 1493 bsp = DMA_VPTR(bgep->status_block); 1494 rrp->prod_index_p = RECV_INDEX_P(bsp, ring); 1495 rrp->chip_mbx_reg = RECV_RING_CONS_INDEX_REG(ring); 1496 mutex_init(rrp->rx_lock, NULL, MUTEX_DRIVER, 1497 DDI_INTR_PRI(bgep->intr_pri)); 1498 } 1499 1500 1501 /* 1502 * Clean up initialisation done above before the memory is freed 1503 */ 1504 static void 1505 bge_fini_recv_ring(bge_t *bgep, uint64_t ring) 1506 { 1507 recv_ring_t *rrp; 1508 1509 BGE_TRACE(("bge_fini_recv_ring($%p, %d)", 1510 (void *)bgep, ring)); 1511 1512 rrp = &bgep->recv[ring]; 1513 if (rrp->rx_softint) 1514 ddi_remove_softintr(rrp->rx_softint); 1515 mutex_destroy(rrp->rx_lock); 1516 } 1517 1518 /* 1519 * Initialise the specified Send Ring, using the information in the 1520 * <dma_area> descriptors that it contains to set up all the other 1521 * fields. This routine should be called only once for each ring. 1522 */ 1523 static void 1524 bge_init_send_ring(bge_t *bgep, uint64_t ring) 1525 { 1526 send_ring_t *srp; 1527 bge_status_t *bsp; 1528 sw_sbd_t *ssbdp; 1529 dma_area_t desc; 1530 dma_area_t pbuf; 1531 uint32_t nslots; 1532 uint32_t slot; 1533 uint32_t split; 1534 1535 BGE_TRACE(("bge_init_send_ring($%p, %d)", 1536 (void *)bgep, ring)); 1537 1538 /* 1539 * The chip architecture requires that host-based send rings 1540 * have 512 elements per ring. See 570X-PG102-R page 56. 1541 */ 1542 srp = &bgep->send[ring]; 1543 nslots = srp->desc.nslots; 1544 ASSERT(nslots == 0 || nslots == 512); 1545 1546 /* 1547 * Set up the copy of the h/w RCB 1548 */ 1549 srp->hw_rcb.host_ring_addr = srp->desc.cookie.dmac_laddress; 1550 srp->hw_rcb.max_len = nslots; 1551 srp->hw_rcb.flags = nslots > 0 ? 0 : RCB_FLAG_RING_DISABLED; 1552 srp->hw_rcb.nic_ring_addr = NIC_MEM_SHADOW_SEND_RING(ring, nslots); 1553 1554 /* 1555 * Other one-off initialisation of per-ring data 1556 */ 1557 srp->bgep = bgep; 1558 bsp = DMA_VPTR(bgep->status_block); 1559 srp->cons_index_p = SEND_INDEX_P(bsp, ring); 1560 srp->chip_mbx_reg = SEND_RING_HOST_INDEX_REG(ring); 1561 mutex_init(srp->tx_lock, NULL, MUTEX_DRIVER, 1562 DDI_INTR_PRI(bgep->intr_pri)); 1563 mutex_init(srp->tc_lock, NULL, MUTEX_DRIVER, 1564 DDI_INTR_PRI(bgep->intr_pri)); 1565 1566 /* 1567 * Allocate the array of s/w Send Buffer Descriptors 1568 */ 1569 ssbdp = kmem_zalloc(nslots*sizeof (*ssbdp), KM_SLEEP); 1570 srp->sw_sbds = ssbdp; 1571 1572 /* 1573 * Now initialise each array element once and for all 1574 */ 1575 desc = srp->desc; 1576 for (split = 0; split < BGE_SPLIT; ++split) { 1577 pbuf = srp->buf[split]; 1578 for (slot = 0; slot < nslots/BGE_SPLIT; ++ssbdp, ++slot) { 1579 bge_slice_chunk(&ssbdp->desc, &desc, 1, 1580 sizeof (bge_sbd_t)); 1581 bge_slice_chunk(&ssbdp->pbuf, &pbuf, 1, 1582 bgep->chipid.snd_buff_size); 1583 } 1584 ASSERT(pbuf.alength == 0); 1585 } 1586 ASSERT(desc.alength == 0); 1587 } 1588 1589 /* 1590 * Clean up initialisation done above before the memory is freed 1591 */ 1592 static void 1593 bge_fini_send_ring(bge_t *bgep, uint64_t ring) 1594 { 1595 send_ring_t *srp; 1596 sw_sbd_t *ssbdp; 1597 1598 BGE_TRACE(("bge_fini_send_ring($%p, %d)", 1599 (void *)bgep, ring)); 1600 1601 srp = &bgep->send[ring]; 1602 ssbdp = srp->sw_sbds; 1603 kmem_free(ssbdp, srp->desc.nslots*sizeof (*ssbdp)); 1604 1605 mutex_destroy(srp->tx_lock); 1606 mutex_destroy(srp->tc_lock); 1607 } 1608 1609 /* 1610 * Initialise all transmit, receive, and buffer rings. 1611 */ 1612 void 1613 bge_init_rings(bge_t *bgep) 1614 { 1615 uint64_t ring; 1616 1617 BGE_TRACE(("bge_init_rings($%p)", (void *)bgep)); 1618 1619 /* 1620 * Perform one-off initialisation of each ring ... 1621 */ 1622 for (ring = 0; ring < BGE_SEND_RINGS_MAX; ++ring) 1623 bge_init_send_ring(bgep, ring); 1624 for (ring = 0; ring < BGE_RECV_RINGS_MAX; ++ring) 1625 bge_init_recv_ring(bgep, ring); 1626 for (ring = 0; ring < BGE_BUFF_RINGS_MAX; ++ring) 1627 bge_init_buff_ring(bgep, ring); 1628 } 1629 1630 /* 1631 * Undo the work of bge_init_rings() above before the memory is freed 1632 */ 1633 void 1634 bge_fini_rings(bge_t *bgep) 1635 { 1636 uint64_t ring; 1637 1638 BGE_TRACE(("bge_fini_rings($%p)", (void *)bgep)); 1639 1640 for (ring = 0; ring < BGE_BUFF_RINGS_MAX; ++ring) 1641 bge_fini_buff_ring(bgep, ring); 1642 for (ring = 0; ring < BGE_RECV_RINGS_MAX; ++ring) 1643 bge_fini_recv_ring(bgep, ring); 1644 for (ring = 0; ring < BGE_SEND_RINGS_MAX; ++ring) 1645 bge_fini_send_ring(bgep, ring); 1646 } 1647 1648 /* 1649 * Allocate an area of memory and a DMA handle for accessing it 1650 */ 1651 static int 1652 bge_alloc_dma_mem(bge_t *bgep, size_t memsize, ddi_device_acc_attr_t *attr_p, 1653 uint_t dma_flags, dma_area_t *dma_p) 1654 { 1655 caddr_t va; 1656 int err; 1657 1658 BGE_TRACE(("bge_alloc_dma_mem($%p, %ld, $%p, 0x%x, $%p)", 1659 (void *)bgep, memsize, attr_p, dma_flags, dma_p)); 1660 1661 /* 1662 * Allocate handle 1663 */ 1664 err = ddi_dma_alloc_handle(bgep->devinfo, &dma_attr, 1665 DDI_DMA_SLEEP, NULL, &dma_p->dma_hdl); 1666 if (err != DDI_SUCCESS) 1667 return (DDI_FAILURE); 1668 1669 /* 1670 * Allocate memory 1671 */ 1672 err = ddi_dma_mem_alloc(dma_p->dma_hdl, memsize, attr_p, 1673 dma_flags & (DDI_DMA_CONSISTENT | DDI_DMA_STREAMING), 1674 DDI_DMA_SLEEP, NULL, &va, &dma_p->alength, &dma_p->acc_hdl); 1675 if (err != DDI_SUCCESS) 1676 return (DDI_FAILURE); 1677 1678 /* 1679 * Bind the two together 1680 */ 1681 dma_p->mem_va = va; 1682 err = ddi_dma_addr_bind_handle(dma_p->dma_hdl, NULL, 1683 va, dma_p->alength, dma_flags, DDI_DMA_SLEEP, NULL, 1684 &dma_p->cookie, &dma_p->ncookies); 1685 1686 BGE_DEBUG(("bge_alloc_dma_mem(): bind %d bytes; err %d, %d cookies", 1687 dma_p->alength, err, dma_p->ncookies)); 1688 1689 if (err != DDI_DMA_MAPPED || dma_p->ncookies != 1) 1690 return (DDI_FAILURE); 1691 1692 dma_p->nslots = ~0U; 1693 dma_p->size = ~0U; 1694 dma_p->token = ~0U; 1695 dma_p->offset = 0; 1696 return (DDI_SUCCESS); 1697 } 1698 1699 /* 1700 * Free one allocated area of DMAable memory 1701 */ 1702 static void 1703 bge_free_dma_mem(dma_area_t *dma_p) 1704 { 1705 if (dma_p->dma_hdl != NULL) { 1706 if (dma_p->ncookies) { 1707 (void) ddi_dma_unbind_handle(dma_p->dma_hdl); 1708 dma_p->ncookies = 0; 1709 } 1710 ddi_dma_free_handle(&dma_p->dma_hdl); 1711 dma_p->dma_hdl = NULL; 1712 } 1713 1714 if (dma_p->acc_hdl != NULL) { 1715 ddi_dma_mem_free(&dma_p->acc_hdl); 1716 dma_p->acc_hdl = NULL; 1717 } 1718 } 1719 1720 /* 1721 * This function allocates all the transmit and receive buffers 1722 * and descriptors, in four chunks (or one, if MONOLITHIC). 1723 */ 1724 int 1725 bge_alloc_bufs(bge_t *bgep) 1726 { 1727 dma_area_t area; 1728 size_t rxbuffsize; 1729 size_t txbuffsize; 1730 size_t rxbuffdescsize; 1731 size_t rxdescsize; 1732 size_t txdescsize; 1733 uint64_t ring; 1734 uint64_t rx_rings = bgep->chipid.rx_rings; 1735 uint64_t tx_rings = bgep->chipid.tx_rings; 1736 int split; 1737 int err; 1738 1739 BGE_TRACE(("bge_alloc_bufs($%p)", 1740 (void *)bgep)); 1741 1742 rxbuffsize = BGE_STD_SLOTS_USED*bgep->chipid.std_buf_size; 1743 rxbuffsize += bgep->chipid.jumbo_slots*bgep->chipid.recv_jumbo_size; 1744 rxbuffsize += BGE_MINI_SLOTS_USED*BGE_MINI_BUFF_SIZE; 1745 1746 txbuffsize = BGE_SEND_SLOTS_USED*bgep->chipid.snd_buff_size; 1747 txbuffsize *= tx_rings; 1748 1749 rxdescsize = rx_rings*bgep->chipid.recv_slots; 1750 rxdescsize *= sizeof (bge_rbd_t); 1751 1752 rxbuffdescsize = BGE_STD_SLOTS_USED; 1753 rxbuffdescsize += bgep->chipid.jumbo_slots; 1754 rxbuffdescsize += BGE_MINI_SLOTS_USED; 1755 rxbuffdescsize *= sizeof (bge_rbd_t); 1756 1757 txdescsize = tx_rings*BGE_SEND_SLOTS_USED; 1758 txdescsize *= sizeof (bge_sbd_t); 1759 txdescsize += sizeof (bge_statistics_t); 1760 txdescsize += sizeof (bge_status_t); 1761 txdescsize += BGE_STATUS_PADDING; 1762 1763 #if BGE_MONOLITHIC 1764 1765 err = bge_alloc_dma_mem(bgep, 1766 rxbuffsize+txbuffsize+rxbuffdescsize+rxdescsize+txdescsize, 1767 &bge_data_accattr, DDI_DMA_RDWR | DDI_DMA_CONSISTENT, &area); 1768 if (err != DDI_SUCCESS) 1769 return (DDI_FAILURE); 1770 1771 BGE_DEBUG(("allocated range $%p-$%p (0x%lx-0x%lx)", 1772 DMA_VPTR(area), 1773 (caddr_t)DMA_VPTR(area)+area.alength, 1774 area.cookie.dmac_laddress, 1775 area.cookie.dmac_laddress+area.alength)); 1776 1777 bge_slice_chunk(&bgep->rx_buff[0], &area, 1, rxbuffsize); 1778 bge_slice_chunk(&bgep->tx_buff[0], &area, 1, txbuffsize); 1779 bge_slice_chunk(&bgep->rx_desc[0], &area, 1, rxdescsize); 1780 bge_slice_chunk(&bgep->tx_desc, &area, 1, txdescsize); 1781 1782 #else 1783 /* 1784 * Allocate memory & handles for RX buffers 1785 */ 1786 ASSERT((rxbuffsize % BGE_SPLIT) == 0); 1787 for (split = 0; split < BGE_SPLIT; ++split) { 1788 err = bge_alloc_dma_mem(bgep, rxbuffsize/BGE_SPLIT, 1789 &bge_data_accattr, DDI_DMA_READ | BGE_DMA_MODE, 1790 &bgep->rx_buff[split]); 1791 if (err != DDI_SUCCESS) 1792 return (DDI_FAILURE); 1793 } 1794 1795 /* 1796 * Allocate memory & handles for TX buffers 1797 */ 1798 ASSERT((txbuffsize % BGE_SPLIT) == 0); 1799 for (split = 0; split < BGE_SPLIT; ++split) { 1800 err = bge_alloc_dma_mem(bgep, txbuffsize/BGE_SPLIT, 1801 &bge_data_accattr, DDI_DMA_WRITE | BGE_DMA_MODE, 1802 &bgep->tx_buff[split]); 1803 if (err != DDI_SUCCESS) 1804 return (DDI_FAILURE); 1805 } 1806 1807 /* 1808 * Allocate memory & handles for receive return rings 1809 */ 1810 ASSERT((rxdescsize % rx_rings) == 0); 1811 for (split = 0; split < rx_rings; ++split) { 1812 err = bge_alloc_dma_mem(bgep, rxdescsize/rx_rings, 1813 &bge_desc_accattr, DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 1814 &bgep->rx_desc[split]); 1815 if (err != DDI_SUCCESS) 1816 return (DDI_FAILURE); 1817 } 1818 1819 /* 1820 * Allocate memory & handles for buffer (producer) descriptor rings 1821 */ 1822 err = bge_alloc_dma_mem(bgep, rxbuffdescsize, &bge_desc_accattr, 1823 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, &bgep->rx_desc[split]); 1824 if (err != DDI_SUCCESS) 1825 return (DDI_FAILURE); 1826 1827 /* 1828 * Allocate memory & handles for TX descriptor rings, 1829 * status block, and statistics area 1830 */ 1831 err = bge_alloc_dma_mem(bgep, txdescsize, &bge_desc_accattr, 1832 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, &bgep->tx_desc); 1833 if (err != DDI_SUCCESS) 1834 return (DDI_FAILURE); 1835 1836 #endif /* BGE_MONOLITHIC */ 1837 1838 /* 1839 * Now carve up each of the allocated areas ... 1840 */ 1841 for (split = 0; split < BGE_SPLIT; ++split) { 1842 area = bgep->rx_buff[split]; 1843 bge_slice_chunk(&bgep->buff[BGE_STD_BUFF_RING].buf[split], 1844 &area, BGE_STD_SLOTS_USED/BGE_SPLIT, 1845 bgep->chipid.std_buf_size); 1846 bge_slice_chunk(&bgep->buff[BGE_JUMBO_BUFF_RING].buf[split], 1847 &area, bgep->chipid.jumbo_slots/BGE_SPLIT, 1848 bgep->chipid.recv_jumbo_size); 1849 bge_slice_chunk(&bgep->buff[BGE_MINI_BUFF_RING].buf[split], 1850 &area, BGE_MINI_SLOTS_USED/BGE_SPLIT, 1851 BGE_MINI_BUFF_SIZE); 1852 ASSERT(area.alength >= 0); 1853 } 1854 1855 for (split = 0; split < BGE_SPLIT; ++split) { 1856 area = bgep->tx_buff[split]; 1857 for (ring = 0; ring < tx_rings; ++ring) 1858 bge_slice_chunk(&bgep->send[ring].buf[split], 1859 &area, BGE_SEND_SLOTS_USED/BGE_SPLIT, 1860 bgep->chipid.snd_buff_size); 1861 for (; ring < BGE_SEND_RINGS_MAX; ++ring) 1862 bge_slice_chunk(&bgep->send[ring].buf[split], 1863 &area, 0/BGE_SPLIT, 1864 bgep->chipid.snd_buff_size); 1865 ASSERT(area.alength >= 0); 1866 } 1867 1868 for (ring = 0; ring < rx_rings; ++ring) 1869 bge_slice_chunk(&bgep->recv[ring].desc, &bgep->rx_desc[ring], 1870 bgep->chipid.recv_slots, sizeof (bge_rbd_t)); 1871 1872 area = bgep->rx_desc[rx_rings]; 1873 for (; ring < BGE_RECV_RINGS_MAX; ++ring) 1874 bge_slice_chunk(&bgep->recv[ring].desc, &area, 1875 0, sizeof (bge_rbd_t)); 1876 bge_slice_chunk(&bgep->buff[BGE_STD_BUFF_RING].desc, &area, 1877 BGE_STD_SLOTS_USED, sizeof (bge_rbd_t)); 1878 bge_slice_chunk(&bgep->buff[BGE_JUMBO_BUFF_RING].desc, &area, 1879 bgep->chipid.jumbo_slots, sizeof (bge_rbd_t)); 1880 bge_slice_chunk(&bgep->buff[BGE_MINI_BUFF_RING].desc, &area, 1881 BGE_MINI_SLOTS_USED, sizeof (bge_rbd_t)); 1882 ASSERT(area.alength == 0); 1883 1884 area = bgep->tx_desc; 1885 for (ring = 0; ring < tx_rings; ++ring) 1886 bge_slice_chunk(&bgep->send[ring].desc, &area, 1887 BGE_SEND_SLOTS_USED, sizeof (bge_sbd_t)); 1888 for (; ring < BGE_SEND_RINGS_MAX; ++ring) 1889 bge_slice_chunk(&bgep->send[ring].desc, &area, 1890 0, sizeof (bge_sbd_t)); 1891 bge_slice_chunk(&bgep->statistics, &area, 1, sizeof (bge_statistics_t)); 1892 bge_slice_chunk(&bgep->status_block, &area, 1, sizeof (bge_status_t)); 1893 ASSERT(area.alength == BGE_STATUS_PADDING); 1894 DMA_ZERO(bgep->status_block); 1895 1896 return (DDI_SUCCESS); 1897 } 1898 1899 /* 1900 * This routine frees the transmit and receive buffers and descriptors. 1901 * Make sure the chip is stopped before calling it! 1902 */ 1903 void 1904 bge_free_bufs(bge_t *bgep) 1905 { 1906 int split; 1907 1908 BGE_TRACE(("bge_free_bufs($%p)", 1909 (void *)bgep)); 1910 1911 #if BGE_MONOLITHIC 1912 bge_free_dma_mem(&bgep->rx_buff[0]); 1913 #else 1914 bge_free_dma_mem(&bgep->tx_desc); 1915 for (split = 0; split < BGE_RECV_RINGS_SPLIT; ++split) 1916 bge_free_dma_mem(&bgep->rx_desc[split]); 1917 for (split = 0; split < BGE_SPLIT; ++split) 1918 bge_free_dma_mem(&bgep->tx_buff[split]); 1919 for (split = 0; split < BGE_SPLIT; ++split) 1920 bge_free_dma_mem(&bgep->rx_buff[split]); 1921 #endif /* BGE_MONOLITHIC */ 1922 } 1923 1924 /* 1925 * Determine (initial) MAC address ("BIA") to use for this interface 1926 */ 1927 1928 static void 1929 bge_find_mac_address(bge_t *bgep, chip_id_t *cidp) 1930 { 1931 struct ether_addr sysaddr; 1932 char propbuf[8]; /* "true" or "false", plus NUL */ 1933 uchar_t *bytes; 1934 int *ints; 1935 uint_t nelts; 1936 int err; 1937 1938 BGE_TRACE(("bge_find_mac_address($%p)", 1939 (void *)bgep)); 1940 1941 BGE_DEBUG(("bge_find_mac_address: hw_mac_addr %012llx, => %s (%sset)", 1942 cidp->hw_mac_addr, 1943 ether_sprintf((void *)cidp->vendor_addr.addr), 1944 cidp->vendor_addr.set ? "" : "not ")); 1945 1946 /* 1947 * The "vendor's factory-set address" may already have 1948 * been extracted from the chip, but if the property 1949 * "local-mac-address" is set we use that instead. It 1950 * will normally be set by OBP, but it could also be 1951 * specified in a .conf file(!) 1952 * 1953 * There doesn't seem to be a way to define byte-array 1954 * properties in a .conf, so we check whether it looks 1955 * like an array of 6 ints instead. 1956 * 1957 * Then, we check whether it looks like an array of 6 1958 * bytes (which it should, if OBP set it). If we can't 1959 * make sense of it either way, we'll ignore it. 1960 */ 1961 err = ddi_prop_lookup_int_array(DDI_DEV_T_ANY, bgep->devinfo, 1962 DDI_PROP_DONTPASS, localmac_propname, &ints, &nelts); 1963 if (err == DDI_PROP_SUCCESS) { 1964 if (nelts == ETHERADDRL) { 1965 while (nelts--) 1966 cidp->vendor_addr.addr[nelts] = ints[nelts]; 1967 cidp->vendor_addr.set = B_TRUE; 1968 } 1969 ddi_prop_free(ints); 1970 } 1971 1972 err = ddi_prop_lookup_byte_array(DDI_DEV_T_ANY, bgep->devinfo, 1973 DDI_PROP_DONTPASS, localmac_propname, &bytes, &nelts); 1974 if (err == DDI_PROP_SUCCESS) { 1975 if (nelts == ETHERADDRL) { 1976 while (nelts--) 1977 cidp->vendor_addr.addr[nelts] = bytes[nelts]; 1978 cidp->vendor_addr.set = B_TRUE; 1979 } 1980 ddi_prop_free(bytes); 1981 } 1982 1983 BGE_DEBUG(("bge_find_mac_address: +local %s (%sset)", 1984 ether_sprintf((void *)cidp->vendor_addr.addr), 1985 cidp->vendor_addr.set ? "" : "not ")); 1986 1987 /* 1988 * Look up the OBP property "local-mac-address?". Note that even 1989 * though its value is a string (which should be "true" or "false"), 1990 * it can't be decoded by ddi_prop_lookup_string(9F). So, we zero 1991 * the buffer first and then fetch the property as an untyped array; 1992 * this may or may not include a final NUL, but since there will 1993 * always be one left at the end of the buffer we can now treat it 1994 * as a string anyway. 1995 */ 1996 nelts = sizeof (propbuf); 1997 bzero(propbuf, nelts--); 1998 err = ddi_getlongprop_buf(DDI_DEV_T_ANY, bgep->devinfo, 1999 DDI_PROP_CANSLEEP, localmac_boolname, propbuf, (int *)&nelts); 2000 2001 /* 2002 * Now, if the address still isn't set from the hardware (SEEPROM) 2003 * or the OBP or .conf property, OR if the user has foolishly set 2004 * 'local-mac-address? = false', use "the system address" instead 2005 * (but only if it's non-null i.e. has been set from the IDPROM). 2006 */ 2007 if (cidp->vendor_addr.set == B_FALSE || strcmp(propbuf, "false") == 0) 2008 if (localetheraddr(NULL, &sysaddr) != 0) { 2009 ethaddr_copy(&sysaddr, cidp->vendor_addr.addr); 2010 cidp->vendor_addr.set = B_TRUE; 2011 } 2012 2013 BGE_DEBUG(("bge_find_mac_address: +system %s (%sset)", 2014 ether_sprintf((void *)cidp->vendor_addr.addr), 2015 cidp->vendor_addr.set ? "" : "not ")); 2016 2017 /* 2018 * Finally(!), if there's a valid "mac-address" property (created 2019 * if we netbooted from this interface), we must use this instead 2020 * of any of the above to ensure that the NFS/install server doesn't 2021 * get confused by the address changing as Solaris takes over! 2022 */ 2023 err = ddi_prop_lookup_byte_array(DDI_DEV_T_ANY, bgep->devinfo, 2024 DDI_PROP_DONTPASS, macaddr_propname, &bytes, &nelts); 2025 if (err == DDI_PROP_SUCCESS) { 2026 if (nelts == ETHERADDRL) { 2027 while (nelts--) 2028 cidp->vendor_addr.addr[nelts] = bytes[nelts]; 2029 cidp->vendor_addr.set = B_TRUE; 2030 } 2031 ddi_prop_free(bytes); 2032 } 2033 2034 BGE_DEBUG(("bge_find_mac_address: =final %s (%sset)", 2035 ether_sprintf((void *)cidp->vendor_addr.addr), 2036 cidp->vendor_addr.set ? "" : "not ")); 2037 } 2038 2039 2040 /*ARGSUSED*/ 2041 int 2042 bge_check_acc_handle(bge_t *bgep, ddi_acc_handle_t handle) 2043 { 2044 ddi_fm_error_t de; 2045 2046 ddi_fm_acc_err_get(handle, &de, DDI_FME_VERSION); 2047 ddi_fm_acc_err_clear(handle, DDI_FME_VERSION); 2048 return (de.fme_status); 2049 } 2050 2051 /*ARGSUSED*/ 2052 int 2053 bge_check_dma_handle(bge_t *bgep, ddi_dma_handle_t handle) 2054 { 2055 ddi_fm_error_t de; 2056 2057 ASSERT(bgep->progress & PROGRESS_BUFS); 2058 ddi_fm_dma_err_get(handle, &de, DDI_FME_VERSION); 2059 return (de.fme_status); 2060 } 2061 2062 /* 2063 * The IO fault service error handling callback function 2064 */ 2065 /*ARGSUSED*/ 2066 static int 2067 bge_fm_error_cb(dev_info_t *dip, ddi_fm_error_t *err, const void *impl_data) 2068 { 2069 /* 2070 * as the driver can always deal with an error in any dma or 2071 * access handle, we can just return the fme_status value. 2072 */ 2073 pci_ereport_post(dip, err, NULL); 2074 return (err->fme_status); 2075 } 2076 2077 static void 2078 bge_fm_init(bge_t *bgep) 2079 { 2080 ddi_iblock_cookie_t iblk; 2081 2082 /* Only register with IO Fault Services if we have some capability */ 2083 if (bgep->fm_capabilities) { 2084 bge_reg_accattr.devacc_attr_access = DDI_FLAGERR_ACC; 2085 bge_desc_accattr.devacc_attr_access = DDI_FLAGERR_ACC; 2086 dma_attr.dma_attr_flags = DDI_DMA_FLAGERR; 2087 2088 /* Register capabilities with IO Fault Services */ 2089 ddi_fm_init(bgep->devinfo, &bgep->fm_capabilities, &iblk); 2090 2091 /* 2092 * Initialize pci ereport capabilities if ereport capable 2093 */ 2094 if (DDI_FM_EREPORT_CAP(bgep->fm_capabilities) || 2095 DDI_FM_ERRCB_CAP(bgep->fm_capabilities)) 2096 pci_ereport_setup(bgep->devinfo); 2097 2098 /* 2099 * Register error callback if error callback capable 2100 */ 2101 if (DDI_FM_ERRCB_CAP(bgep->fm_capabilities)) 2102 ddi_fm_handler_register(bgep->devinfo, 2103 bge_fm_error_cb, (void*) bgep); 2104 } else { 2105 /* 2106 * These fields have to be cleared of FMA if there are no 2107 * FMA capabilities at runtime. 2108 */ 2109 bge_reg_accattr.devacc_attr_access = DDI_DEFAULT_ACC; 2110 bge_desc_accattr.devacc_attr_access = DDI_DEFAULT_ACC; 2111 dma_attr.dma_attr_flags = 0; 2112 } 2113 } 2114 2115 static void 2116 bge_fm_fini(bge_t *bgep) 2117 { 2118 /* Only unregister FMA capabilities if we registered some */ 2119 if (bgep->fm_capabilities) { 2120 2121 /* 2122 * Release any resources allocated by pci_ereport_setup() 2123 */ 2124 if (DDI_FM_EREPORT_CAP(bgep->fm_capabilities) || 2125 DDI_FM_ERRCB_CAP(bgep->fm_capabilities)) 2126 pci_ereport_teardown(bgep->devinfo); 2127 2128 /* 2129 * Un-register error callback if error callback capable 2130 */ 2131 if (DDI_FM_ERRCB_CAP(bgep->fm_capabilities)) 2132 ddi_fm_handler_unregister(bgep->devinfo); 2133 2134 /* Unregister from IO Fault Services */ 2135 ddi_fm_fini(bgep->devinfo); 2136 } 2137 } 2138 2139 static void 2140 #ifdef BGE_IPMI_ASF 2141 bge_unattach(bge_t *bgep, uint_t asf_mode) 2142 #else 2143 bge_unattach(bge_t *bgep) 2144 #endif 2145 { 2146 BGE_TRACE(("bge_unattach($%p)", 2147 (void *)bgep)); 2148 2149 /* 2150 * Flag that no more activity may be initiated 2151 */ 2152 bgep->progress &= ~PROGRESS_READY; 2153 2154 /* 2155 * Quiesce the PHY and MAC (leave it reset but still powered). 2156 * Clean up and free all BGE data structures 2157 */ 2158 if (bgep->cyclic_id) { 2159 mutex_enter(&cpu_lock); 2160 cyclic_remove(bgep->cyclic_id); 2161 mutex_exit(&cpu_lock); 2162 } 2163 if (bgep->progress & PROGRESS_KSTATS) 2164 bge_fini_kstats(bgep); 2165 if (bgep->progress & PROGRESS_NDD) 2166 bge_nd_cleanup(bgep); 2167 if (bgep->progress & PROGRESS_PHY) 2168 bge_phys_reset(bgep); 2169 if (bgep->progress & PROGRESS_HWINT) { 2170 mutex_enter(bgep->genlock); 2171 #ifdef BGE_IPMI_ASF 2172 if (bge_chip_reset(bgep, B_FALSE, asf_mode) != DDI_SUCCESS) 2173 #else 2174 if (bge_chip_reset(bgep, B_FALSE) != DDI_SUCCESS) 2175 #endif 2176 ddi_fm_service_impact(bgep->devinfo, 2177 DDI_SERVICE_UNAFFECTED); 2178 #ifdef BGE_IPMI_ASF 2179 if (bgep->asf_enabled) { 2180 /* 2181 * This register has been overlaid. We restore its 2182 * initial value here. 2183 */ 2184 bge_nic_put32(bgep, BGE_NIC_DATA_SIG_ADDR, 2185 BGE_NIC_DATA_SIG); 2186 } 2187 #endif 2188 if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) 2189 ddi_fm_service_impact(bgep->devinfo, 2190 DDI_SERVICE_UNAFFECTED); 2191 if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) 2192 ddi_fm_service_impact(bgep->devinfo, 2193 DDI_SERVICE_UNAFFECTED); 2194 mutex_exit(bgep->genlock); 2195 } 2196 if (bgep->progress & PROGRESS_INTR) { 2197 bge_intr_disable(bgep); 2198 bge_fini_rings(bgep); 2199 } 2200 if (bgep->progress & PROGRESS_HWINT) { 2201 bge_rem_intrs(bgep); 2202 rw_destroy(bgep->errlock); 2203 mutex_destroy(bgep->softintrlock); 2204 mutex_destroy(bgep->genlock); 2205 } 2206 if (bgep->progress & PROGRESS_FACTOTUM) 2207 ddi_remove_softintr(bgep->factotum_id); 2208 if (bgep->progress & PROGRESS_RESCHED) 2209 ddi_remove_softintr(bgep->resched_id); 2210 if (bgep->progress & PROGRESS_BUFS) 2211 bge_free_bufs(bgep); 2212 if (bgep->progress & PROGRESS_REGS) 2213 ddi_regs_map_free(&bgep->io_handle); 2214 if (bgep->progress & PROGRESS_CFG) 2215 pci_config_teardown(&bgep->cfg_handle); 2216 2217 bge_fm_fini(bgep); 2218 2219 ddi_remove_minor_node(bgep->devinfo, NULL); 2220 kmem_free(bgep, sizeof (*bgep)); 2221 } 2222 2223 static int 2224 bge_resume(dev_info_t *devinfo) 2225 { 2226 bge_t *bgep; /* Our private data */ 2227 chip_id_t *cidp; 2228 chip_id_t chipid; 2229 2230 bgep = ddi_get_driver_private(devinfo); 2231 if (bgep == NULL) 2232 return (DDI_FAILURE); 2233 2234 /* 2235 * Refuse to resume if the data structures aren't consistent 2236 */ 2237 if (bgep->devinfo != devinfo) 2238 return (DDI_FAILURE); 2239 2240 #ifdef BGE_IPMI_ASF 2241 /* 2242 * Power management hasn't been supported in BGE now. If you 2243 * want to implement it, please add the ASF/IPMI related 2244 * code here. 2245 */ 2246 2247 #endif 2248 2249 /* 2250 * Read chip ID & set up config space command register(s) 2251 * Refuse to resume if the chip has changed its identity! 2252 */ 2253 cidp = &bgep->chipid; 2254 mutex_enter(bgep->genlock); 2255 bge_chip_cfg_init(bgep, &chipid, B_FALSE); 2256 if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 2257 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 2258 mutex_exit(bgep->genlock); 2259 return (DDI_FAILURE); 2260 } 2261 mutex_exit(bgep->genlock); 2262 if (chipid.vendor != cidp->vendor) 2263 return (DDI_FAILURE); 2264 if (chipid.device != cidp->device) 2265 return (DDI_FAILURE); 2266 if (chipid.revision != cidp->revision) 2267 return (DDI_FAILURE); 2268 if (chipid.asic_rev != cidp->asic_rev) 2269 return (DDI_FAILURE); 2270 2271 /* 2272 * All OK, reinitialise h/w & kick off GLD scheduling 2273 */ 2274 mutex_enter(bgep->genlock); 2275 if (bge_restart(bgep, B_TRUE) != DDI_SUCCESS) { 2276 (void) bge_check_acc_handle(bgep, bgep->cfg_handle); 2277 (void) bge_check_acc_handle(bgep, bgep->io_handle); 2278 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 2279 mutex_exit(bgep->genlock); 2280 return (DDI_FAILURE); 2281 } 2282 if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 2283 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 2284 mutex_exit(bgep->genlock); 2285 return (DDI_FAILURE); 2286 } 2287 if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) { 2288 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 2289 mutex_exit(bgep->genlock); 2290 return (DDI_FAILURE); 2291 } 2292 mutex_exit(bgep->genlock); 2293 return (DDI_SUCCESS); 2294 } 2295 2296 /* 2297 * attach(9E) -- Attach a device to the system 2298 * 2299 * Called once for each board successfully probed. 2300 */ 2301 static int 2302 bge_attach(dev_info_t *devinfo, ddi_attach_cmd_t cmd) 2303 { 2304 bge_t *bgep; /* Our private data */ 2305 mac_register_t *macp; 2306 chip_id_t *cidp; 2307 cyc_handler_t cychand; 2308 cyc_time_t cyctime; 2309 caddr_t regs; 2310 int instance; 2311 int err; 2312 int intr_types; 2313 #ifdef BGE_IPMI_ASF 2314 uint32_t mhcrValue; 2315 #endif 2316 2317 instance = ddi_get_instance(devinfo); 2318 2319 BGE_GTRACE(("bge_attach($%p, %d) instance %d", 2320 (void *)devinfo, cmd, instance)); 2321 BGE_BRKPT(NULL, "bge_attach"); 2322 2323 switch (cmd) { 2324 default: 2325 return (DDI_FAILURE); 2326 2327 case DDI_RESUME: 2328 return (bge_resume(devinfo)); 2329 2330 case DDI_ATTACH: 2331 break; 2332 } 2333 2334 bgep = kmem_zalloc(sizeof (*bgep), KM_SLEEP); 2335 ddi_set_driver_private(devinfo, bgep); 2336 bgep->bge_guard = BGE_GUARD; 2337 bgep->devinfo = devinfo; 2338 2339 /* 2340 * Initialize more fields in BGE private data 2341 */ 2342 bgep->debug = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 2343 DDI_PROP_DONTPASS, debug_propname, bge_debug); 2344 (void) snprintf(bgep->ifname, sizeof (bgep->ifname), "%s%d", 2345 BGE_DRIVER_NAME, instance); 2346 2347 /* 2348 * Initialize for fma support 2349 */ 2350 bgep->fm_capabilities = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 2351 DDI_PROP_DONTPASS, fm_cap, 2352 DDI_FM_EREPORT_CAPABLE | DDI_FM_ACCCHK_CAPABLE | 2353 DDI_FM_DMACHK_CAPABLE | DDI_FM_ERRCB_CAPABLE); 2354 BGE_DEBUG(("bgep->fm_capabilities = %d", bgep->fm_capabilities)); 2355 bge_fm_init(bgep); 2356 2357 /* 2358 * Look up the IOMMU's page size for DVMA mappings (must be 2359 * a power of 2) and convert to a mask. This can be used to 2360 * determine whether a message buffer crosses a page boundary. 2361 * Note: in 2s complement binary notation, if X is a power of 2362 * 2, then -X has the representation "11...1100...00". 2363 */ 2364 bgep->pagemask = dvma_pagesize(devinfo); 2365 ASSERT(ddi_ffs(bgep->pagemask) == ddi_fls(bgep->pagemask)); 2366 bgep->pagemask = -bgep->pagemask; 2367 2368 /* 2369 * Map config space registers 2370 * Read chip ID & set up config space command register(s) 2371 * 2372 * Note: this leaves the chip accessible by Memory Space 2373 * accesses, but with interrupts and Bus Mastering off. 2374 * This should ensure that nothing untoward will happen 2375 * if it has been left active by the (net-)bootloader. 2376 * We'll re-enable Bus Mastering once we've reset the chip, 2377 * and allow interrupts only when everything else is set up. 2378 */ 2379 err = pci_config_setup(devinfo, &bgep->cfg_handle); 2380 #ifdef BGE_IPMI_ASF 2381 mhcrValue = pci_config_get32(bgep->cfg_handle, PCI_CONF_BGE_MHCR); 2382 if (mhcrValue & MHCR_ENABLE_ENDIAN_WORD_SWAP) { 2383 bgep->asf_wordswapped = B_TRUE; 2384 } else { 2385 bgep->asf_wordswapped = B_FALSE; 2386 } 2387 bge_asf_get_config(bgep); 2388 #endif 2389 if (err != DDI_SUCCESS) { 2390 bge_problem(bgep, "pci_config_setup() failed"); 2391 goto attach_fail; 2392 } 2393 bgep->progress |= PROGRESS_CFG; 2394 cidp = &bgep->chipid; 2395 bzero(cidp, sizeof (*cidp)); 2396 bge_chip_cfg_init(bgep, cidp, B_FALSE); 2397 if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 2398 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 2399 goto attach_fail; 2400 } 2401 2402 #ifdef BGE_IPMI_ASF 2403 if (DEVICE_5721_SERIES_CHIPSETS(bgep) || 2404 DEVICE_5714_SERIES_CHIPSETS(bgep)) { 2405 bgep->asf_newhandshake = B_TRUE; 2406 } else { 2407 bgep->asf_newhandshake = B_FALSE; 2408 } 2409 #endif 2410 2411 /* 2412 * Update those parts of the chip ID derived from volatile 2413 * registers with the values seen by OBP (in case the chip 2414 * has been reset externally and therefore lost them). 2415 */ 2416 cidp->subven = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 2417 DDI_PROP_DONTPASS, subven_propname, cidp->subven); 2418 cidp->subdev = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 2419 DDI_PROP_DONTPASS, subdev_propname, cidp->subdev); 2420 cidp->clsize = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 2421 DDI_PROP_DONTPASS, clsize_propname, cidp->clsize); 2422 cidp->latency = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 2423 DDI_PROP_DONTPASS, latency_propname, cidp->latency); 2424 cidp->rx_rings = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 2425 DDI_PROP_DONTPASS, rxrings_propname, cidp->rx_rings); 2426 cidp->tx_rings = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 2427 DDI_PROP_DONTPASS, txrings_propname, cidp->tx_rings); 2428 2429 if (bge_jumbo_enable == B_TRUE) { 2430 cidp->default_mtu = ddi_prop_get_int(DDI_DEV_T_ANY, devinfo, 2431 DDI_PROP_DONTPASS, default_mtu, BGE_DEFAULT_MTU); 2432 if ((cidp->default_mtu < BGE_DEFAULT_MTU)|| 2433 (cidp->default_mtu > BGE_MAXIMUM_MTU)) { 2434 cidp->default_mtu = BGE_DEFAULT_MTU; 2435 } 2436 } 2437 /* 2438 * Map operating registers 2439 */ 2440 err = ddi_regs_map_setup(devinfo, BGE_PCI_OPREGS_RNUMBER, 2441 ®s, 0, 0, &bge_reg_accattr, &bgep->io_handle); 2442 if (err != DDI_SUCCESS) { 2443 bge_problem(bgep, "ddi_regs_map_setup() failed"); 2444 goto attach_fail; 2445 } 2446 bgep->io_regs = regs; 2447 bgep->progress |= PROGRESS_REGS; 2448 2449 /* 2450 * Characterise the device, so we know its requirements. 2451 * Then allocate the appropriate TX and RX descriptors & buffers. 2452 */ 2453 if (bge_chip_id_init(bgep) == EIO) { 2454 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 2455 goto attach_fail; 2456 } 2457 err = bge_alloc_bufs(bgep); 2458 if (err != DDI_SUCCESS) { 2459 bge_problem(bgep, "DMA buffer allocation failed"); 2460 goto attach_fail; 2461 } 2462 bgep->progress |= PROGRESS_BUFS; 2463 2464 /* 2465 * Add the softint handlers: 2466 * 2467 * Both of these handlers are used to avoid restrictions on the 2468 * context and/or mutexes required for some operations. In 2469 * particular, the hardware interrupt handler and its subfunctions 2470 * can detect a number of conditions that we don't want to handle 2471 * in that context or with that set of mutexes held. So, these 2472 * softints are triggered instead: 2473 * 2474 * the <resched> softint is triggered if we have previously 2475 * had to refuse to send a packet because of resource shortage 2476 * (we've run out of transmit buffers), but the send completion 2477 * interrupt handler has now detected that more buffers have 2478 * become available. 2479 * 2480 * the <factotum> is triggered if the h/w interrupt handler 2481 * sees the <link state changed> or <error> bits in the status 2482 * block. It's also triggered periodically to poll the link 2483 * state, just in case we aren't getting link status change 2484 * interrupts ... 2485 */ 2486 err = ddi_add_softintr(devinfo, DDI_SOFTINT_LOW, &bgep->resched_id, 2487 NULL, NULL, bge_reschedule, (caddr_t)bgep); 2488 if (err != DDI_SUCCESS) { 2489 bge_problem(bgep, "ddi_add_softintr() failed"); 2490 goto attach_fail; 2491 } 2492 bgep->progress |= PROGRESS_RESCHED; 2493 err = ddi_add_softintr(devinfo, DDI_SOFTINT_LOW, &bgep->factotum_id, 2494 NULL, NULL, bge_chip_factotum, (caddr_t)bgep); 2495 if (err != DDI_SUCCESS) { 2496 bge_problem(bgep, "ddi_add_softintr() failed"); 2497 goto attach_fail; 2498 } 2499 bgep->progress |= PROGRESS_FACTOTUM; 2500 2501 /* Get supported interrupt types */ 2502 if (ddi_intr_get_supported_types(devinfo, &intr_types) != DDI_SUCCESS) { 2503 bge_error(bgep, "ddi_intr_get_supported_types failed\n"); 2504 2505 goto attach_fail; 2506 } 2507 2508 BGE_DEBUG(("%s: ddi_intr_get_supported_types() returned: %x", 2509 bgep->ifname, intr_types)); 2510 2511 if ((intr_types & DDI_INTR_TYPE_MSI) && bgep->chipid.msi_enabled) { 2512 if (bge_add_intrs(bgep, DDI_INTR_TYPE_MSI) != DDI_SUCCESS) { 2513 bge_error(bgep, "MSI registration failed, " 2514 "trying FIXED interrupt type\n"); 2515 } else { 2516 BGE_DEBUG(("%s: Using MSI interrupt type", 2517 bgep->ifname)); 2518 bgep->intr_type = DDI_INTR_TYPE_MSI; 2519 bgep->progress |= PROGRESS_HWINT; 2520 } 2521 } 2522 2523 if (!(bgep->progress & PROGRESS_HWINT) && 2524 (intr_types & DDI_INTR_TYPE_FIXED)) { 2525 if (bge_add_intrs(bgep, DDI_INTR_TYPE_FIXED) != DDI_SUCCESS) { 2526 bge_error(bgep, "FIXED interrupt " 2527 "registration failed\n"); 2528 goto attach_fail; 2529 } 2530 2531 BGE_DEBUG(("%s: Using FIXED interrupt type", bgep->ifname)); 2532 2533 bgep->intr_type = DDI_INTR_TYPE_FIXED; 2534 bgep->progress |= PROGRESS_HWINT; 2535 } 2536 2537 if (!(bgep->progress & PROGRESS_HWINT)) { 2538 bge_error(bgep, "No interrupts registered\n"); 2539 goto attach_fail; 2540 } 2541 2542 /* 2543 * Note that interrupts are not enabled yet as 2544 * mutex locks are not initialized. Initialize mutex locks. 2545 */ 2546 mutex_init(bgep->genlock, NULL, MUTEX_DRIVER, 2547 DDI_INTR_PRI(bgep->intr_pri)); 2548 mutex_init(bgep->softintrlock, NULL, MUTEX_DRIVER, 2549 DDI_INTR_PRI(bgep->intr_pri)); 2550 rw_init(bgep->errlock, NULL, RW_DRIVER, 2551 DDI_INTR_PRI(bgep->intr_pri)); 2552 2553 /* 2554 * Initialize rings. 2555 */ 2556 bge_init_rings(bgep); 2557 2558 /* 2559 * Now that mutex locks are initialized, enable interrupts. 2560 */ 2561 bge_intr_enable(bgep); 2562 bgep->progress |= PROGRESS_INTR; 2563 2564 /* 2565 * Initialise link state variables 2566 * Stop, reset & reinitialise the chip. 2567 * Initialise the (internal) PHY. 2568 */ 2569 bgep->link_state = LINK_STATE_UNKNOWN; 2570 bgep->link_up_msg = bgep->link_down_msg = " (initialized)"; 2571 2572 mutex_enter(bgep->genlock); 2573 2574 /* 2575 * Reset chip & rings to initial state; also reset address 2576 * filtering, promiscuity, loopback mode. 2577 */ 2578 #ifdef BGE_IPMI_ASF 2579 if (bge_reset(bgep, ASF_MODE_SHUTDOWN) != DDI_SUCCESS) { 2580 #else 2581 if (bge_reset(bgep) != DDI_SUCCESS) { 2582 #endif 2583 (void) bge_check_acc_handle(bgep, bgep->cfg_handle); 2584 (void) bge_check_acc_handle(bgep, bgep->io_handle); 2585 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 2586 mutex_exit(bgep->genlock); 2587 goto attach_fail; 2588 } 2589 2590 #ifdef BGE_IPMI_ASF 2591 if (bgep->asf_enabled) { 2592 bgep->asf_status = ASF_STAT_RUN_INIT; 2593 } 2594 #endif 2595 2596 bzero(bgep->mcast_hash, sizeof (bgep->mcast_hash)); 2597 bzero(bgep->mcast_refs, sizeof (bgep->mcast_refs)); 2598 bgep->promisc = B_FALSE; 2599 bgep->param_loop_mode = BGE_LOOP_NONE; 2600 if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) { 2601 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 2602 mutex_exit(bgep->genlock); 2603 goto attach_fail; 2604 } 2605 if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) { 2606 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 2607 mutex_exit(bgep->genlock); 2608 goto attach_fail; 2609 } 2610 2611 mutex_exit(bgep->genlock); 2612 2613 if (bge_phys_init(bgep) == EIO) { 2614 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_LOST); 2615 goto attach_fail; 2616 } 2617 bgep->progress |= PROGRESS_PHY; 2618 2619 /* 2620 * Register NDD-tweakable parameters 2621 */ 2622 if (bge_nd_init(bgep)) { 2623 bge_problem(bgep, "bge_nd_init() failed"); 2624 goto attach_fail; 2625 } 2626 bgep->progress |= PROGRESS_NDD; 2627 2628 /* 2629 * Create & initialise named kstats 2630 */ 2631 bge_init_kstats(bgep, instance); 2632 bgep->progress |= PROGRESS_KSTATS; 2633 2634 /* 2635 * Determine whether to override the chip's own MAC address 2636 */ 2637 bge_find_mac_address(bgep, cidp); 2638 ethaddr_copy(cidp->vendor_addr.addr, bgep->curr_addr[0].addr); 2639 bgep->curr_addr[0].set = B_TRUE; 2640 2641 bgep->unicst_addr_total = MAC_ADDRESS_REGS_MAX; 2642 /* 2643 * Address available is one less than MAX 2644 * as primary address is not advertised 2645 * as a multiple MAC address. 2646 */ 2647 bgep->unicst_addr_avail = MAC_ADDRESS_REGS_MAX - 1; 2648 2649 if ((macp = mac_alloc(MAC_VERSION)) == NULL) 2650 goto attach_fail; 2651 macp->m_type_ident = MAC_PLUGIN_IDENT_ETHER; 2652 macp->m_driver = bgep; 2653 macp->m_dip = devinfo; 2654 macp->m_src_addr = bgep->curr_addr[0].addr; 2655 macp->m_callbacks = &bge_m_callbacks; 2656 macp->m_min_sdu = 0; 2657 macp->m_max_sdu = cidp->ethmax_size - sizeof (struct ether_header); 2658 /* 2659 * Finally, we're ready to register ourselves with the MAC layer 2660 * interface; if this succeeds, we're all ready to start() 2661 */ 2662 err = mac_register(macp, &bgep->mh); 2663 mac_free(macp); 2664 if (err != 0) 2665 goto attach_fail; 2666 2667 cychand.cyh_func = bge_chip_cyclic; 2668 cychand.cyh_arg = bgep; 2669 cychand.cyh_level = CY_LOCK_LEVEL; 2670 cyctime.cyt_when = 0; 2671 cyctime.cyt_interval = BGE_CYCLIC_PERIOD; 2672 mutex_enter(&cpu_lock); 2673 bgep->cyclic_id = cyclic_add(&cychand, &cyctime); 2674 mutex_exit(&cpu_lock); 2675 2676 bgep->progress |= PROGRESS_READY; 2677 ASSERT(bgep->bge_guard == BGE_GUARD); 2678 return (DDI_SUCCESS); 2679 2680 attach_fail: 2681 #ifdef BGE_IPMI_ASF 2682 bge_unattach(bgep, ASF_MODE_SHUTDOWN); 2683 #else 2684 bge_unattach(bgep); 2685 #endif 2686 return (DDI_FAILURE); 2687 } 2688 2689 /* 2690 * bge_suspend() -- suspend transmit/receive for powerdown 2691 */ 2692 static int 2693 bge_suspend(bge_t *bgep) 2694 { 2695 /* 2696 * Stop processing and idle (powerdown) the PHY ... 2697 */ 2698 mutex_enter(bgep->genlock); 2699 #ifdef BGE_IPMI_ASF 2700 /* 2701 * Power management hasn't been supported in BGE now. If you 2702 * want to implement it, please add the ASF/IPMI related 2703 * code here. 2704 */ 2705 #endif 2706 bge_stop(bgep); 2707 if (bge_phys_idle(bgep) != DDI_SUCCESS) { 2708 (void) bge_check_acc_handle(bgep, bgep->io_handle); 2709 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 2710 mutex_exit(bgep->genlock); 2711 return (DDI_FAILURE); 2712 } 2713 if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) { 2714 ddi_fm_service_impact(bgep->devinfo, DDI_SERVICE_DEGRADED); 2715 mutex_exit(bgep->genlock); 2716 return (DDI_FAILURE); 2717 } 2718 mutex_exit(bgep->genlock); 2719 2720 return (DDI_SUCCESS); 2721 } 2722 2723 /* 2724 * detach(9E) -- Detach a device from the system 2725 */ 2726 static int 2727 bge_detach(dev_info_t *devinfo, ddi_detach_cmd_t cmd) 2728 { 2729 bge_t *bgep; 2730 #ifdef BGE_IPMI_ASF 2731 uint_t asf_mode; 2732 asf_mode = ASF_MODE_NONE; 2733 #endif 2734 2735 BGE_GTRACE(("bge_detach($%p, %d)", (void *)devinfo, cmd)); 2736 2737 bgep = ddi_get_driver_private(devinfo); 2738 2739 switch (cmd) { 2740 default: 2741 return (DDI_FAILURE); 2742 2743 case DDI_SUSPEND: 2744 return (bge_suspend(bgep)); 2745 2746 case DDI_DETACH: 2747 break; 2748 } 2749 2750 #ifdef BGE_IPMI_ASF 2751 mutex_enter(bgep->genlock); 2752 if (bgep->asf_enabled && ((bgep->asf_status == ASF_STAT_RUN) || 2753 (bgep->asf_status == ASF_STAT_RUN_INIT))) { 2754 2755 bge_asf_update_status(bgep); 2756 if (bgep->asf_status == ASF_STAT_RUN) { 2757 bge_asf_stop_timer(bgep); 2758 } 2759 bgep->asf_status = ASF_STAT_STOP; 2760 2761 bge_asf_pre_reset_operations(bgep, BGE_SHUTDOWN_RESET); 2762 2763 if (bgep->asf_pseudostop) { 2764 bgep->link_up_msg = bgep->link_down_msg = " (stopped)"; 2765 bge_chip_stop(bgep, B_FALSE); 2766 bgep->bge_mac_state = BGE_MAC_STOPPED; 2767 bgep->asf_pseudostop = B_FALSE; 2768 } 2769 2770 asf_mode = ASF_MODE_POST_SHUTDOWN; 2771 2772 if (bge_check_acc_handle(bgep, bgep->cfg_handle) != DDI_FM_OK) 2773 ddi_fm_service_impact(bgep->devinfo, 2774 DDI_SERVICE_UNAFFECTED); 2775 if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) 2776 ddi_fm_service_impact(bgep->devinfo, 2777 DDI_SERVICE_UNAFFECTED); 2778 } 2779 mutex_exit(bgep->genlock); 2780 #endif 2781 2782 /* 2783 * Unregister from the GLD subsystem. This can fail, in 2784 * particular if there are DLPI style-2 streams still open - 2785 * in which case we just return failure without shutting 2786 * down chip operations. 2787 */ 2788 if (mac_unregister(bgep->mh) != 0) 2789 return (DDI_FAILURE); 2790 2791 /* 2792 * All activity stopped, so we can clean up & exit 2793 */ 2794 #ifdef BGE_IPMI_ASF 2795 bge_unattach(bgep, asf_mode); 2796 #else 2797 bge_unattach(bgep); 2798 #endif 2799 return (DDI_SUCCESS); 2800 } 2801 2802 2803 /* 2804 * ========== Module Loading Data & Entry Points ========== 2805 */ 2806 2807 #undef BGE_DBG 2808 #define BGE_DBG BGE_DBG_INIT /* debug flag for this code */ 2809 2810 DDI_DEFINE_STREAM_OPS(bge_dev_ops, nulldev, nulldev, bge_attach, bge_detach, 2811 nodev, NULL, D_MP, NULL); 2812 2813 static struct modldrv bge_modldrv = { 2814 &mod_driverops, /* Type of module. This one is a driver */ 2815 bge_ident, /* short description */ 2816 &bge_dev_ops /* driver specific ops */ 2817 }; 2818 2819 static struct modlinkage modlinkage = { 2820 MODREV_1, (void *)&bge_modldrv, NULL 2821 }; 2822 2823 2824 int 2825 _info(struct modinfo *modinfop) 2826 { 2827 return (mod_info(&modlinkage, modinfop)); 2828 } 2829 2830 int 2831 _init(void) 2832 { 2833 int status; 2834 2835 mac_init_ops(&bge_dev_ops, "bge"); 2836 status = mod_install(&modlinkage); 2837 if (status == DDI_SUCCESS) 2838 mutex_init(bge_log_mutex, NULL, MUTEX_DRIVER, NULL); 2839 else 2840 mac_fini_ops(&bge_dev_ops); 2841 return (status); 2842 } 2843 2844 int 2845 _fini(void) 2846 { 2847 int status; 2848 2849 status = mod_remove(&modlinkage); 2850 if (status == DDI_SUCCESS) { 2851 mac_fini_ops(&bge_dev_ops); 2852 mutex_destroy(bge_log_mutex); 2853 } 2854 return (status); 2855 } 2856 2857 2858 /* 2859 * bge_add_intrs: 2860 * 2861 * Register FIXED or MSI interrupts. 2862 */ 2863 static int 2864 bge_add_intrs(bge_t *bgep, int intr_type) 2865 { 2866 dev_info_t *dip = bgep->devinfo; 2867 int avail, actual, intr_size, count = 0; 2868 int i, flag, ret; 2869 2870 BGE_DEBUG(("bge_add_intrs($%p, 0x%x)", (void *)bgep, intr_type)); 2871 2872 /* Get number of interrupts */ 2873 ret = ddi_intr_get_nintrs(dip, intr_type, &count); 2874 if ((ret != DDI_SUCCESS) || (count == 0)) { 2875 bge_error(bgep, "ddi_intr_get_nintrs() failure, ret: %d, " 2876 "count: %d", ret, count); 2877 2878 return (DDI_FAILURE); 2879 } 2880 2881 /* Get number of available interrupts */ 2882 ret = ddi_intr_get_navail(dip, intr_type, &avail); 2883 if ((ret != DDI_SUCCESS) || (avail == 0)) { 2884 bge_error(bgep, "ddi_intr_get_navail() failure, " 2885 "ret: %d, avail: %d\n", ret, avail); 2886 2887 return (DDI_FAILURE); 2888 } 2889 2890 if (avail < count) { 2891 BGE_DEBUG(("%s: nintrs() returned %d, navail returned %d", 2892 bgep->ifname, count, avail)); 2893 } 2894 2895 /* 2896 * BGE hardware generates only single MSI even though it claims 2897 * to support multiple MSIs. So, hard code MSI count value to 1. 2898 */ 2899 if (intr_type == DDI_INTR_TYPE_MSI) { 2900 count = 1; 2901 flag = DDI_INTR_ALLOC_STRICT; 2902 } else { 2903 flag = DDI_INTR_ALLOC_NORMAL; 2904 } 2905 2906 /* Allocate an array of interrupt handles */ 2907 intr_size = count * sizeof (ddi_intr_handle_t); 2908 bgep->htable = kmem_alloc(intr_size, KM_SLEEP); 2909 2910 /* Call ddi_intr_alloc() */ 2911 ret = ddi_intr_alloc(dip, bgep->htable, intr_type, 0, 2912 count, &actual, flag); 2913 2914 if ((ret != DDI_SUCCESS) || (actual == 0)) { 2915 bge_error(bgep, "ddi_intr_alloc() failed %d\n", ret); 2916 2917 kmem_free(bgep->htable, intr_size); 2918 return (DDI_FAILURE); 2919 } 2920 2921 if (actual < count) { 2922 BGE_DEBUG(("%s: Requested: %d, Received: %d", 2923 bgep->ifname, count, actual)); 2924 } 2925 2926 bgep->intr_cnt = actual; 2927 2928 /* 2929 * Get priority for first msi, assume remaining are all the same 2930 */ 2931 if ((ret = ddi_intr_get_pri(bgep->htable[0], &bgep->intr_pri)) != 2932 DDI_SUCCESS) { 2933 bge_error(bgep, "ddi_intr_get_pri() failed %d\n", ret); 2934 2935 /* Free already allocated intr */ 2936 for (i = 0; i < actual; i++) { 2937 (void) ddi_intr_free(bgep->htable[i]); 2938 } 2939 2940 kmem_free(bgep->htable, intr_size); 2941 return (DDI_FAILURE); 2942 } 2943 2944 /* Call ddi_intr_add_handler() */ 2945 for (i = 0; i < actual; i++) { 2946 if ((ret = ddi_intr_add_handler(bgep->htable[i], bge_intr, 2947 (caddr_t)bgep, (caddr_t)(uintptr_t)i)) != DDI_SUCCESS) { 2948 bge_error(bgep, "ddi_intr_add_handler() " 2949 "failed %d\n", ret); 2950 2951 /* Free already allocated intr */ 2952 for (i = 0; i < actual; i++) { 2953 (void) ddi_intr_free(bgep->htable[i]); 2954 } 2955 2956 kmem_free(bgep->htable, intr_size); 2957 return (DDI_FAILURE); 2958 } 2959 } 2960 2961 if ((ret = ddi_intr_get_cap(bgep->htable[0], &bgep->intr_cap)) 2962 != DDI_SUCCESS) { 2963 bge_error(bgep, "ddi_intr_get_cap() failed %d\n", ret); 2964 2965 for (i = 0; i < actual; i++) { 2966 (void) ddi_intr_remove_handler(bgep->htable[i]); 2967 (void) ddi_intr_free(bgep->htable[i]); 2968 } 2969 2970 kmem_free(bgep->htable, intr_size); 2971 return (DDI_FAILURE); 2972 } 2973 2974 return (DDI_SUCCESS); 2975 } 2976 2977 /* 2978 * bge_rem_intrs: 2979 * 2980 * Unregister FIXED or MSI interrupts 2981 */ 2982 static void 2983 bge_rem_intrs(bge_t *bgep) 2984 { 2985 int i; 2986 2987 BGE_DEBUG(("bge_rem_intrs($%p)", (void *)bgep)); 2988 2989 /* Call ddi_intr_remove_handler() */ 2990 for (i = 0; i < bgep->intr_cnt; i++) { 2991 (void) ddi_intr_remove_handler(bgep->htable[i]); 2992 (void) ddi_intr_free(bgep->htable[i]); 2993 } 2994 2995 kmem_free(bgep->htable, bgep->intr_cnt * sizeof (ddi_intr_handle_t)); 2996 } 2997 2998 2999 void 3000 bge_intr_enable(bge_t *bgep) 3001 { 3002 int i; 3003 3004 if (bgep->intr_cap & DDI_INTR_FLAG_BLOCK) { 3005 /* Call ddi_intr_block_enable() for MSI interrupts */ 3006 (void) ddi_intr_block_enable(bgep->htable, bgep->intr_cnt); 3007 } else { 3008 /* Call ddi_intr_enable for MSI or FIXED interrupts */ 3009 for (i = 0; i < bgep->intr_cnt; i++) { 3010 (void) ddi_intr_enable(bgep->htable[i]); 3011 } 3012 } 3013 } 3014 3015 3016 void 3017 bge_intr_disable(bge_t *bgep) 3018 { 3019 int i; 3020 3021 if (bgep->intr_cap & DDI_INTR_FLAG_BLOCK) { 3022 /* Call ddi_intr_block_disable() */ 3023 (void) ddi_intr_block_disable(bgep->htable, bgep->intr_cnt); 3024 } else { 3025 for (i = 0; i < bgep->intr_cnt; i++) { 3026 (void) ddi_intr_disable(bgep->htable[i]); 3027 } 3028 } 3029 } 3030