1/* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21/* 22 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26#pragma ident "%Z%%M% %I% %E% SMI" 27 28#pragma dictionary "PCIEX" 29 30#include <fm/topo_hc.h> 31 32/* 33 * FIT rates - assume leaf devices are somewhat less reliable than 34 * root complexes, switches and bridges 35 */ 36#define PCIEX_RC_FIT 500 37#define PCIEX_SW_FIT 500 38#define PCIEX_BDG_FIT 500 39#define PCIEX_DEV_FIT 1000 40#define PCIEX_RC_INV_FIT 500 41#define PCIEX_DEV_INV_FIT 1000 42#define PCIEX_RC_NR_FIT 500 43#define PCIEX_SW_NR_FIT 500 44#define PCIEX_BDG_NR_FIT 500 45#define PCIEX_DEV_NR_FIT 1000 46#define PCIEX_BUS_FIT 500 47#define PCIEX_BUS_NR_FIT 500 48 49/* 50 * SERD parameters. 51 * 52 * PCI Express correctable link errors are automatically handled by the 53 * hardware, so have relatively little impact and we can allow quite a 54 * high frequency. We will also be quite conservative about nonfatal internal 55 * errors reported by the driver. 56 * 57 * Nonfatal dpe errors (ptlp/ecrc errors) have to be recovered by the hardened 58 * driver which may cause intermittant performance/responsiveness problems, so 59 * we have tighter serd parameters for these. These are most likely errors in 60 * buffers/caches within devices and bridges, so use similar rates to cpu 61 * data cache parity errors. 62 */ 63#define CORRLINK_COUNT 6 64#define CORRLINK_TIME 2h 65#define NONFATAL_DPE_COUNT 3 66#define NONFATAL_DPE_TIME 168h 67 68/* 69 * if the source-id payload is valid, then check it matches 70 */ 71#define SOURCE_ID_MATCHES_BDF \ 72 (!payloadprop_defined("source-valid") || \ 73 payloadprop("source-valid") == 0 || \ 74 payloadprop("source-id") == ((b << 8) | (d << 3) | f)) 75 76#define SOURCE_ID_MATCHES_OWN_BDF \ 77 (payloadprop_defined("source-valid") && \ 78 payloadprop("source-valid") == 1 && \ 79 payloadprop("source-id") == (confprop(pciexrc, TOPO_PCI_BDF) + 0)) 80 81/* 82 * Other useful macros. These use the EXCAP property (PCI Express Capabilities 83 * register) to find the type for PCI Express devices, and the CLASS-CODE 84 * property (PCI Class Code register) for to find the type of PCI devices behind 85 * a PCI Express-PCI bridge - note that 60400 and 60401 are defined as PCI-PCI 86 * bridges, everything else is consider a PCI leaf device. 87 */ 88#define PCIEXFN pciexbus/pciexdev/pciexfn 89#define PCIEXFNHZ pciexbus<>/pciexdev<>/pciexfn<> 90#define PCIEXFN1 pciexbus[b]/pciexdev[d]/pciexfn[f] 91#define PCIFN pcibus/pcidev/pcifn 92#define PCIFNHZ pcibus<>/pcidev<>/pcifn<> 93#define PCIFN1 pcibus[b]/pcidev[d]/pcifn[f] 94#define IS_LF(f) (confprop(f, TOPO_PCI_EXCAP) == "pciexdev") 95#define IS_BG(f) (confprop(f, TOPO_PCI_EXCAP) == "pcibus") 96#define IS_SD(f) (confprop(f, TOPO_PCI_EXCAP) == "pciexswd") 97#define IS_SU(f) (confprop(f, TOPO_PCI_EXCAP) == "pciexswu") 98#define IS_PCI_LF(f) (confprop_defined(f, TOPO_PCI_CLASS) && \ 99 confprop(f, TOPO_PCI_CLASS) != "60400" && \ 100 confprop(f, TOPO_PCI_CLASS) != "60401") 101 102/* 103 * define faults 104 */ 105event fault.io.pciex.device-interr@PCIEXFN, FITrate=PCIEX_DEV_FIT; 106 107event fault.io.pciex.device-interr-deg@PCIEXFN, FITrate=PCIEX_DEV_FIT, retire=0; 108 109engine serd.io.pciex.flt-nf@PCIEXFN, N=NONFATAL_DPE_COUNT, T=NONFATAL_DPE_TIME; 110event fault.io.pciex.device-interr-unaf@PCIEXFN, FITrate=PCIEX_DEV_FIT, 111 engine=serd.io.pciex.flt-nf@PCIEXFN; 112 113engine serd.io.pciex.corrlink@PCIEXFN, N=CORRLINK_COUNT, T=CORRLINK_TIME; 114event fault.io.pciex.device-interr-corr@PCIEXFN, FITrate=PCIEX_DEV_FIT, 115 engine=serd.io.pciex.corrlink@PCIEXFN; 116 117event fault.io.pciex.device-interr@pciexrc, FITrate=PCIEX_RC_FIT; 118 119event fault.io.pciex.device-interr-deg@pciexrc, FITrate=PCIEX_RC_FIT, retire=0; 120 121engine serd.io.pciex.flt-nf@pciexrc, N=NONFATAL_DPE_COUNT, T=NONFATAL_DPE_TIME; 122event fault.io.pciex.device-interr-unaf@pciexrc, FITrate=PCIEX_RC_FIT, 123 engine=serd.io.pciex.flt-nf@pciexrc; 124 125engine serd.io.pciex.corrlink@pciexrc, N=CORRLINK_COUNT, T=CORRLINK_TIME; 126event fault.io.pciex.device-interr-corr@pciexrc, FITrate=PCIEX_RC_FIT, 127 engine=serd.io.pciex.corrlink@pciexrc; 128 129event fault.io.pciex.device-invreq@PCIEXFN, FITrate=PCIEX_DEV_INV_FIT; 130 131event fault.io.pciex.device-invreq@pciexrc, FITrate=PCIEX_RC_FIT; 132 133event fault.io.pciex.device-noresp@PCIEXFN, FITrate=PCIEX_DEV_NR_FIT; 134 135event fault.io.pciex.device-noresp@pciexrc, FITrate=PCIEX_RC_NR_FIT; 136 137event fault.io.pciex.bus-noresp@PCIEXFN, FITrate=PCIEX_BUS_NR_FIT; 138 139event fault.io.pciex.bus-linkerr@PCIEXFN, FITrate=PCIEX_BUS_FIT; 140 141engine serd.io.pciex.corrlink-bus@PCIEXFN, N=CORRLINK_COUNT, T=CORRLINK_TIME; 142event fault.io.pciex.bus-linkerr-corr@PCIEXFN, FITrate=PCIEX_BUS_FIT, 143 engine=serd.io.pciex.corrlink-bus@PCIEXFN; 144 145/* 146 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 147 * Handling of leaf driver detected internal errors. Use serd engine if 148 * no service impact - otherwise fail immediately 149 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 150 */ 151event ereport.io.device.inval_state@PCIEXFN{within(5s)}; 152event ereport.io.device.no_response@PCIEXFN{within(5s)}; 153event ereport.io.device.stall@PCIEXFN{within(5s)}; 154event ereport.io.device.badint_limit@PCIEXFN{within(5s)}; 155event ereport.io.device.intern_corr@PCIEXFN{within(5s)}; 156event ereport.io.device.intern_uncorr@PCIEXFN{within(5s)}; 157event ereport.io.service.lost@PCIEXFN{within(5s)}; 158event ereport.io.service.degraded@PCIEXFN{within(5s)}; 159event ereport.io.service.unaffected@PCIEXFN{within(5s)}; 160event ereport.io.service.restored@PCIEXFN{within(30s)}; 161event ereport.io.service.lost@PCIFN{within(5s)}; 162event ereport.io.service.degraded@PCIFN{within(5s)}; 163event ereport.io.service.unaffected@PCIFN{within(5s)}; 164 165event error.io.pciex.noimpact-d@PCIEXFN; 166event error.io.pciex.noimpact-d@PCIEXFN/PCIEXFN; 167event error.io.pciex.noimpact-d@PCIEXFN/PCIFN; 168event error.io.pciex.noimpact-d@PCIFN/PCIFN; 169event error.io.pciex.noimpact-d@PCIFN; 170event error.io.pciex.degraded-d@PCIEXFN; 171event error.io.pciex.degraded-d@PCIEXFN/PCIEXFN; 172event error.io.pciex.degraded-d@PCIEXFN/PCIFN; 173event error.io.pciex.degraded-d@PCIFN/PCIFN; 174event error.io.pciex.degraded-d@PCIFN; 175event error.io.pciex.lost-d@PCIEXFN; 176event error.io.pciex.lost-d@PCIEXFN/PCIEXFN; 177event error.io.pciex.lost-d@PCIEXFN/PCIFN; 178event error.io.pciex.lost-d@PCIFN/PCIFN; 179event error.io.pciex.lost-d@PCIFN; 180event error.io.service.restored@PCIEXFN; 181event error.io.service.restored@PCIFN; 182event error.io.device.nf-device@PCIEXFN; 183event error.io.device.deg-device@PCIEXFN; 184event error.io.device.f-device@PCIEXFN; 185 186prop error.io.device.f-device@PCIEXFN (1)-> 187 ereport.io.device.inval_state@PCIEXFN, 188 ereport.io.device.no_response@PCIEXFN, 189 ereport.io.device.stall@PCIEXFN, 190 ereport.io.device.badint_limit@PCIEXFN, 191 ereport.io.device.intern_corr@PCIEXFN, 192 ereport.io.device.intern_uncorr@PCIEXFN; 193 194prop error.io.device.f-device@PCIEXFN (1)-> 195 error.io.pciex.lost-d@PCIEXFN; 196 197prop error.io.device.deg-device@PCIEXFN (1)-> 198 ereport.io.device.inval_state@PCIEXFN, 199 ereport.io.device.no_response@PCIEXFN, 200 ereport.io.device.stall@PCIEXFN, 201 ereport.io.device.badint_limit@PCIEXFN, 202 ereport.io.device.intern_corr@PCIEXFN, 203 ereport.io.device.intern_uncorr@PCIEXFN; 204 205prop error.io.device.deg-device@PCIEXFN (1)-> 206 error.io.pciex.degraded-d@PCIEXFN; 207 208prop error.io.device.nf-device@PCIEXFN (1)-> 209 ereport.io.device.inval_state@PCIEXFN, 210 ereport.io.device.no_response@PCIEXFN, 211 ereport.io.device.stall@PCIEXFN, 212 ereport.io.device.badint_limit@PCIEXFN, 213 ereport.io.device.intern_corr@PCIEXFN, 214 ereport.io.device.intern_uncorr@PCIEXFN; 215 216prop error.io.device.nf-device@PCIEXFN (1)-> 217 error.io.pciex.noimpact-d@PCIEXFN; 218 219/* 220 * handling of service impact ereports. 221 */ 222prop error.io.pciex.lost-d@PCIEXFN (0)-> 223 ereport.io.service.lost@PCIEXFN, 224 error.io.pciex.lost-d@PCIEXFN/PCIEXFNHZ, 225 error.io.pciex.lost-d@PCIEXFN/PCIFNHZ; 226 227prop error.io.pciex.lost-d@PCIFN (0)-> 228 ereport.io.service.lost@PCIFN, 229 error.io.pciex.lost-d@PCIFN/PCIFNHZ; 230 231prop error.io.pciex.degraded-d@PCIEXFN (1)-> 232 ereport.io.service.degraded@PCIEXFN, 233 error.io.pciex.degraded-d@PCIEXFN/PCIEXFNHZ, 234 error.io.pciex.degraded-d@PCIEXFN/PCIFNHZ; 235 236prop error.io.pciex.degraded-d@PCIFN (1)-> 237 ereport.io.service.degraded@PCIFN, 238 error.io.pciex.degraded-d@PCIFN/PCIFNHZ; 239 240prop error.io.pciex.noimpact-d@PCIEXFN (1)-> 241 ereport.io.service.unaffected@PCIEXFN, 242 error.io.service.restored@PCIEXFN, 243 error.io.pciex.noimpact-d@PCIEXFN/PCIEXFNHZ, 244 error.io.pciex.noimpact-d@PCIEXFN/PCIFNHZ; 245 246prop error.io.pciex.noimpact-d@PCIFN (1)-> 247 ereport.io.service.unaffected@PCIFN, 248 error.io.service.restored@PCIFN, 249 error.io.pciex.noimpact-d@PCIFN/PCIFNHZ; 250 251prop error.io.service.restored@PCIEXFN (1)-> 252 ereport.io.service.lost@PCIEXFN, 253 ereport.io.service.degraded@PCIEXFN; 254 255prop error.io.service.restored@PCIEXFN (1)-> 256 ereport.io.service.restored@PCIEXFN; 257 258/* 259 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 260 * A faulty PCI Express hostbridge (root complex) may cause: 261 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 262 * - nr-d: the device not to respond to a valid upstream request 263 * - ca-d: the device to completer abort a valid upstream request 264 * - mtlp-d: a malformed tlp to be transmitted downstream 265 * - badreq-d: a bad downstream request - not CRC error (may cause 266 * completer to respond with ur or ca) 267 * - ecrcreq-d: TLP with end-to-end CRC error transmitted downstream 268 * - ecrccomp-d: TLP with end-to-end CRC error transmitted downstream 269 * - poisreq-d: poisoned request transmitted downstream 270 * - poiscomp-d: poisoned completion transmitted downstream 271 * - corrlink: correctable link or physical level error 272 * - fatlink: fatal link or physical level error 273 */ 274event error.io.pciex.nr-d@pciexrc/PCIEXFN; 275event error.io.pciex.ca-d@pciexrc/PCIEXFN; 276event error.io.pciex.mtlp-d@pciexrc/PCIEXFN; 277event error.io.pciex.corrlink@pciexrc/pciexbus; 278event error.io.pciex.fatlink@pciexrc/PCIEXFN; 279event error.io.pciex.badreq-d@pciexrc/PCIEXFN; 280event error.io.pciex.nf-poisecrc-d@pciexrc/PCIEXFN; 281event error.io.pciex.f-poisecrc-d@pciexrc/PCIEXFN; 282event error.io.pciex.deg-poisecrc-d@pciexrc/PCIEXFN; 283 284prop fault.io.pciex.device-noresp@pciexrc (1)-> 285 error.io.pciex.nr-d@pciexrc/PCIEXFNHZ; 286 287prop fault.io.pciex.device-invreq@pciexrc (1)-> 288 error.io.pciex.badreq-d@pciexrc/PCIEXFNHZ; 289 290prop fault.io.pciex.device-interr-corr@pciexrc (1)-> 291 error.io.pciex.corrlink@pciexrc/pciexbus<>; 292 293prop fault.io.pciex.device-interr-unaf@pciexrc (1)-> 294 error.io.pciex.nf-poisecrc-d@pciexrc/PCIEXFNHZ; 295 296prop fault.io.pciex.device-interr-deg@pciexrc (1)-> 297 error.io.pciex.deg-poisecrc-d@pciexrc/PCIEXFNHZ; 298 299prop fault.io.pciex.device-interr@pciexrc (1)-> 300 error.io.pciex.f-poisecrc-d@pciexrc/PCIEXFNHZ, 301 error.io.pciex.ca-d@pciexrc/PCIEXFNHZ, 302 error.io.pciex.mtlp-d@pciexrc/PCIEXFNHZ, 303 error.io.pciex.fatlink@pciexrc/PCIEXFNHZ; 304 305/* 306 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 307 * A faulty PCI Express leaf device or upstream switch port may cause: 308 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 309 * - flt-nr-u: the device not to respond to a valid downstream request 310 * - flt-ca-u: the device to completer abort a valid downstream request 311 * - flt-badreq-u: a bad upstream request - not CRC error (may cause 312 * completer to respond with ur or ca) - leaf only 313 * - flt-mtlp-u: a malformed tlp transmitted upstream - leaf only 314 * - flt-ecrcreq-u: request with end-to-end CRC error transmitted upstream 315 * - flt-ecrccomp-u: compl with end-to-end CRC error transmitted upstream 316 * - flt-poisreq-u: poisoned request transmitted upstream 317 * - flt-poiscomp-u: poisoned completion transmitted upstream 318 * - device: internal error reported by leaf device 319 * - corrlink: correctable link or physical level error 320 * - fatlink: fatal link or physical level error 321 */ 322 323event error.io.pciex.flt-nr-u@PCIEXFN; 324event error.io.pciex.flt-ca-u@PCIEXFN; 325event error.io.pciex.flt-mtlp-u@PCIEXFN; 326event error.io.pciex.fatlink@PCIEXFN; 327event error.io.pciex.flt-badreq-u@PCIEXFN; 328event error.io.pciex.flt-nf-poisecrc-u@PCIEXFN; 329event error.io.pciex.flt-f-poisecrc-u@PCIEXFN; 330event error.io.pciex.flt-deg-poisecrc-u@PCIEXFN; 331event error.io.pciex.corrlink@pciexbus; 332 333prop fault.io.pciex.device-noresp@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 334 error.io.pciex.flt-nr-u@PCIEXFN; 335 336prop fault.io.pciex.device-noresp@PCIEXFN { IS_SU(PCIEXFN) } (1)-> 337 error.io.pciex.flt-nr-u@PCIEXFN; 338 339prop fault.io.pciex.device-invreq@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 340 error.io.pciex.flt-badreq-u@PCIEXFN; 341 342prop fault.io.pciex.device-interr-corr@PCIEXFN { IS_SU(PCIEXFN) } (1)-> 343 error.io.pciex.corrlink@pciexbus; 344 345prop fault.io.pciex.device-interr-unaf@PCIEXFN { IS_SU(PCIEXFN) } (1)-> 346 error.io.pciex.flt-nf-poisecrc-u@PCIEXFN; 347 348prop fault.io.pciex.device-interr-corr@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 349 error.io.pciex.corrlink@pciexbus, 350 error.io.device.nf-device@PCIEXFN; 351 352prop fault.io.pciex.device-interr-unaf@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 353 error.io.pciex.flt-nf-poisecrc-u@PCIEXFN; 354 355prop fault.io.pciex.device-interr-deg@PCIEXFN { IS_SU(PCIEXFN) } (1)-> 356 error.io.pciex.flt-deg-poisecrc-u@PCIEXFN; 357 358prop fault.io.pciex.device-interr@PCIEXFN { IS_SU(PCIEXFN) } (1)-> 359 error.io.pciex.flt-f-poisecrc-u@PCIEXFN, 360 error.io.pciex.flt-ca-u@PCIEXFN, 361 error.io.pciex.fatlink@PCIEXFN; 362 363prop fault.io.pciex.device-interr-deg@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 364 error.io.pciex.flt-deg-poisecrc-u@PCIEXFN, 365 error.io.device.deg-device@PCIEXFN; 366 367prop fault.io.pciex.device-interr@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 368 error.io.pciex.flt-f-poisecrc-u@PCIEXFN, 369 error.io.device.f-device@PCIEXFN, 370 error.io.pciex.flt-ca-u@PCIEXFN, 371 error.io.pciex.flt-mtlp-u@PCIEXFN, 372 error.io.pciex.fatlink@PCIEXFN; 373 374/* 375 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 376 * A faulty PCI Express downstream switch port may cause 377 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 378 * - nr-d: the device not to respond to an upstream request 379 * - ca-d: the device to completer abort an upstream request 380 * - ecrcreq-d: TLP with end-to-end CRC error transmitted upstream 381 * - ecrccomp-d: TLP with end-to-end CRC error transmitted upstream 382 * - poisreq-d: poisoned request transmitted upstream 383 * - poiscomp-d: poisoned completion transmitted upstream 384 * - corrlink: correctable link or physical level error 385 * - fatlink: fatal link or physical level error 386 */ 387 388event error.io.pciex.nr-d@PCIEXFN/PCIEXFN; 389event error.io.pciex.ca-d@PCIEXFN/PCIEXFN; 390event error.io.pciex.corrlink@PCIEXFN/pciexbus; 391event error.io.pciex.fatlink@PCIEXFN/PCIEXFN; 392event error.io.pciex.nf-poisecrc-d@PCIEXFN/PCIEXFN; 393event error.io.pciex.f-poisecrc-d@PCIEXFN/PCIEXFN; 394event error.io.pciex.deg-poisecrc-d@PCIEXFN/PCIEXFN; 395 396prop fault.io.pciex.device-noresp@PCIEXFN { IS_SD(PCIEXFN) } (1)-> 397 error.io.pciex.nr-d@PCIEXFN/PCIEXFNHZ; 398 399prop fault.io.pciex.device-interr-corr@PCIEXFN { IS_SD(PCIEXFN) } (1)-> 400 error.io.pciex.corrlink@PCIEXFN/pciexbus<>; 401 402prop fault.io.pciex.device-interr-unaf@PCIEXFN { IS_SD(PCIEXFN) } (1)-> 403 error.io.pciex.nf-poisecrc-d@PCIEXFN/PCIEXFNHZ; 404 405prop fault.io.pciex.device-interr-deg@PCIEXFN { IS_SD(PCIEXFN) } (1)-> 406 error.io.pciex.deg-poisecrc-d@PCIEXFN/PCIEXFNHZ; 407 408prop fault.io.pciex.device-interr@PCIEXFN { IS_SD(PCIEXFN) } (1)-> 409 error.io.pciex.ca-d@PCIEXFN/PCIEXFNHZ, 410 error.io.pciex.f-poisecrc-d@PCIEXFN/PCIEXFNHZ, 411 error.io.pciex.fatlink@PCIEXFN/PCIEXFNHZ; 412 413/* 414 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 415 * A faulty PCIEX bus may cause: 416 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 417 * - flt-nr-u: a device to not respond because the link is down 418 * - nr-d: a device to not respond because the link is down 419 * - corrlink: correctable link or physical level error 420 * - fatlink: fatal link or physical level error 421 */ 422 423event error.io.pciex.nr-d@PCIEXFN; 424 425prop fault.io.pciex.bus-noresp@PCIEXFN { !IS_SD(PCIEXFN) } (0)-> 426 error.io.pciex.flt-nr-u@PCIEXFN, 427 error.io.pciex.nr-d@PCIEXFN; 428 429prop fault.io.pciex.bus-linkerr-corr@PCIEXFN (0)-> 430 error.io.pciex.corrlink@pciexbus; 431 432prop fault.io.pciex.bus-linkerr@PCIEXFN { !IS_SD(PCIEXFN) } (0)-> 433 error.io.pciex.fatlink@PCIEXFN; 434 435/* 436 * ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 437 * A faulty pciex-pci bridge may cause 438 * ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 439 * The following errors to propagate onto the PCI Express fabric 440 * - flt-nr-u: the device not to respond to a valid downstream request 441 * - flt-ca-u: the device to completer abort a valid downstream request 442 * - flt-ecrcreq-u: request with end-to-end CRC error transmitted upstream 443 * - flt-ecrccomp-u: compl with end-to-end CRC error transmitted upstream 444 * - flt-poisreq-u: poisoned request transmitted upstream 445 * - flt-poiscomp-u: poisoned completion transmitted upstream 446 * - corrlink: correctable link or physical level error upstream 447 * - fatlink: fatal link or physical level error upstream 448 * - sec-interr: internal error on pci express to pci bridge 449 * 450 * And the following errors to propagate onto the secondary pci or pci/x bus 451 * (these will be handled by code in the pci.esc file). 452 * - nr-pw-d: the device not to respond to a valid upstream request 453 * - nr-drw-d: the device not to respond to a valid upstream request 454 * - retry-to-d: failure to retry an downstream delayed request 455 * - ta-pw-d: the device responds with a ta to a valid upstream 456 * request 457 * - ta-drw-d: the device responds with a ta to a valid upstream 458 * request 459 * - ape-d: address/parity to get corrupted during downstream transmission. 460 * - dpe-d: data/parity to get corrupted during downstream transmission. 461 * - scpe-d: split completion to get corrupted during downstream transmission 462 */ 463 464event error.io.pci.ape-d@PCIEXFN/PCIFN; 465event error.io.pci.f-dpe-d@PCIEXFN/PCIFN; 466event error.io.pci.deg-dpe-d@PCIEXFN/PCIFN; 467event error.io.pci.nf-dpe-d@PCIEXFN/PCIFN; 468event error.io.pci.retry-to-d@PCIEXFN/PCIFN; 469event error.io.pci.nr-pw-d@PCIEXFN/PCIFN; 470event error.io.pci.nr-drw-d@PCIEXFN/PCIFN; 471event error.io.pci.ta-pw-d@PCIEXFN/PCIFN; 472event error.io.pci.ta-drw-d@PCIEXFN/PCIFN; 473event error.io.pcix.scpe-d@PCIEXFN/PCIFN; 474event error.io.pciex.sec-interr@PCIEXFN; 475event ereport.io.pci.sec-sta@PCIEXFN{within(5s)}; 476 477prop fault.io.pciex.device-noresp@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 478 error.io.pciex.flt-nr-u@PCIEXFN, 479 error.io.pci.retry-to-d@PCIEXFN/PCIFNHZ, 480 error.io.pci.nr-pw-d@PCIEXFN/PCIFNHZ, 481 error.io.pci.nr-drw-d@PCIEXFN/PCIFNHZ; 482 483prop fault.io.pciex.device-interr-corr@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 484 error.io.pciex.corrlink@pciexbus; 485 486prop fault.io.pciex.device-interr-unaf@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 487 error.io.pciex.flt-nf-poisecrc-u@PCIEXFN, 488 error.io.pci.nf-dpe-d@PCIEXFN/PCIFNHZ; 489 490prop fault.io.pciex.device-interr-deg@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 491 error.io.pciex.flt-deg-poisecrc-u@PCIEXFN, 492 error.io.pci.deg-dpe-d@PCIEXFN/PCIFNHZ; 493 494prop fault.io.pciex.device-interr@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 495 error.io.pciex.flt-f-poisecrc-u@PCIEXFN, 496 error.io.pciex.flt-ca-u@PCIEXFN, 497 error.io.pciex.flt-mtlp-u@PCIEXFN, 498 error.io.pciex.sec-interr@PCIEXFN, 499 error.io.pciex.fatlink@PCIEXFN, 500 error.io.pci.ta-pw-d@PCIEXFN/PCIFNHZ, 501 error.io.pci.ta-drw-d@PCIEXFN/PCIFNHZ, 502 error.io.pci.ape-d@PCIEXFN/PCIFNHZ, 503 error.io.pcix.scpe-d@PCIEXFN/PCIFNHZ, 504 error.io.pci.f-dpe-d@PCIEXFN/PCIFNHZ; 505 506prop fault.io.pciex.device-interr-unaf@PCIEXFN { IS_BG(PCIEXFN) } (0)-> 507 ereport.io.pci.sec-sta@PCIEXFN; 508 509prop fault.io.pciex.device-interr@PCIEXFN { IS_BG(PCIEXFN) } (0)-> 510 ereport.io.pci.sec-sta@PCIEXFN; 511 512/* 513 * the following rules for ptlp and ecrc faults are split into fatal and 514 * nonfatal, depending on the service impact reported by the leaf driver 515 */ 516event error.io.pciex.nf-poisecrc-d@PCIEXFN; 517event error.io.pciex.deg-poisecrc-d@PCIEXFN; 518event error.io.pciex.f-poisecrc-d@PCIEXFN; 519event error.io.pciex.ecrcreq-d@PCIEXFN; 520event error.io.pciex.ecrccomp-d@PCIEXFN; 521event error.io.pciex.poisreq-d@PCIEXFN; 522event error.io.pciex.poiscomp-d@PCIEXFN; 523event error.io.pciex.flt-poisreq-u@PCIEXFN; 524event error.io.pciex.flt-poiscomp-u@PCIEXFN; 525event error.io.pciex.flt-ecrcreq-u@PCIEXFN; 526event error.io.pciex.flt-ecrccomp-u@PCIEXFN; 527 528prop error.io.pciex.nf-poisecrc-d@PCIEXFN (1)-> 529 error.io.pciex.ecrcreq-d@PCIEXFN, 530 error.io.pciex.ecrccomp-d@PCIEXFN, 531 error.io.pciex.poisreq-d@PCIEXFN, 532 error.io.pciex.poiscomp-d@PCIEXFN; 533 534prop error.io.pciex.nf-poisecrc-d@PCIEXFN (1)-> 535 error.io.pciex.noimpact-d@PCIEXFN; 536 537prop error.io.pciex.f-poisecrc-d@PCIEXFN (1)-> 538 error.io.pciex.ecrcreq-d@PCIEXFN, 539 error.io.pciex.ecrccomp-d@PCIEXFN, 540 error.io.pciex.poisreq-d@PCIEXFN, 541 error.io.pciex.poiscomp-d@PCIEXFN; 542 543prop error.io.pciex.f-poisecrc-d@PCIEXFN (1)-> 544 error.io.pciex.lost-d@PCIEXFN; 545 546prop error.io.pciex.deg-poisecrc-d@PCIEXFN (1)-> 547 error.io.pciex.ecrcreq-d@PCIEXFN, 548 error.io.pciex.ecrccomp-d@PCIEXFN, 549 error.io.pciex.poisreq-d@PCIEXFN, 550 error.io.pciex.poiscomp-d@PCIEXFN; 551 552prop error.io.pciex.deg-poisecrc-d@PCIEXFN (1)-> 553 error.io.pciex.degraded-d@PCIEXFN; 554 555prop error.io.pciex.flt-nf-poisecrc-u@PCIEXFN (1)-> 556 error.io.pciex.flt-ecrcreq-u@PCIEXFN, 557 error.io.pciex.flt-ecrccomp-u@PCIEXFN, 558 error.io.pciex.flt-poisreq-u@PCIEXFN, 559 error.io.pciex.flt-poiscomp-u@PCIEXFN; 560 561prop error.io.pciex.flt-nf-poisecrc-u@PCIEXFN (1)-> 562 error.io.pciex.noimpact-d@PCIEXFN; 563 564prop error.io.pciex.flt-deg-poisecrc-u@PCIEXFN (1)-> 565 error.io.pciex.flt-ecrcreq-u@PCIEXFN, 566 error.io.pciex.flt-ecrccomp-u@PCIEXFN, 567 error.io.pciex.flt-poisreq-u@PCIEXFN, 568 error.io.pciex.flt-poiscomp-u@PCIEXFN; 569 570prop error.io.pciex.flt-deg-poisecrc-u@PCIEXFN (1)-> 571 error.io.pciex.degraded-d@PCIEXFN; 572 573prop error.io.pciex.flt-f-poisecrc-u@PCIEXFN (1)-> 574 error.io.pciex.flt-ecrcreq-u@PCIEXFN, 575 error.io.pciex.flt-ecrccomp-u@PCIEXFN, 576 error.io.pciex.flt-poisreq-u@PCIEXFN, 577 error.io.pciex.flt-poiscomp-u@PCIEXFN; 578 579prop error.io.pciex.flt-f-poisecrc-u@PCIEXFN (1)-> 580 error.io.pciex.lost-d@PCIEXFN; 581 582/* 583 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 584 * declarations 585 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 586 */ 587event error.io.pciex.fatal@PCIEXFN; 588event error.io.pciex.nonfatal@PCIEXFN; 589event error.io.pciex.flt-ur-u@PCIEXFN; 590event error.io.pciex.mtlp-d@PCIEXFN; 591event error.io.pciex.sw-mtlp-d@PCIEXFN; 592event error.io.pciex.mtlp-d@PCIEXFN/PCIEXFN; 593event error.io.pciex.ca-d@PCIEXFN; 594event error.io.pciex.ca-fwd-d@PCIEXFN; 595event error.io.pciex.ca-fwd-d@PCIEXFN/PCIEXFN; 596event error.io.pciex.poisreq-fwd-d@PCIEXFN; 597event error.io.pciex.poisreq-fwd-d@pciexrc/PCIEXFN; 598event error.io.pciex.poisreq-fwd-d@PCIEXFN/PCIEXFN; 599event error.io.pciex.poiscomp-fwd-d@PCIEXFN; 600event error.io.pciex.poiscomp-fwd-d@PCIEXFN/PCIEXFN; 601event error.io.pciex.ecrcreq-fwd-d@PCIEXFN/PCIEXFN; 602event error.io.pciex.ecrccomp-fwd-d@PCIEXFN/PCIEXFN; 603event error.io.pciex.ecrcreq-fwd-d@PCIEXFN; 604event error.io.pciex.ecrccomp-fwd-d@PCIEXFN; 605event error.io.pciex.source-ecrcreq-u@PCIEXFN; 606event error.io.pciex.source-ecrccomp-u@PCIEXFN; 607event error.io.pciex.source-poiscomp-u@PCIEXFN; 608event error.io.pciex.source-poisreq-u@PCIEXFN; 609event error.io.pciex.badreq-d@PCIEXFN; 610event error.io.pciex.badreq-d@PCIEXFN/PCIEXFN; 611event error.io.pci.badreq-pw-d@PCIEXFN/PCIFN; 612event error.io.pci.badreq-drw-d@PCIEXFN/PCIFN; 613event error.io.pci.target-ma-d@PCIEXFN; 614event error.io.pci.target-rta-d@PCIEXFN; 615event error.io.pci.dpdata-pw-d@PCIEXFN/PCIFN; 616event error.io.pci.dpdata-dw-d@PCIEXFN/PCIFN; 617event error.io.pci.dpdata-dr-d@PCIEXFN/PCIFN; 618event error.io.pciex.ca-u@PCIEXFN; 619event error.io.pciex.ca-u@PCIEXFN/PCIEXFN; 620event error.io.pciex.ca-u@pciexrc/PCIEXFN; 621event error.io.pciex.ur-u@PCIEXFN; 622event error.io.pciex.ur-u@PCIEXFN/PCIEXFN; 623event error.io.pciex.ur-u@pciexrc/PCIEXFN; 624event error.io.pciex.nr-u@PCIEXFN; 625event error.io.pciex.nr-u@PCIEXFN/PCIEXFN; 626event error.io.pciex.nr-u@pciexrc/PCIEXFN; 627event error.io.pciex.mtlp-u@PCIEXFN; 628event error.io.pciex.mtlp-u@PCIEXFN/PCIEXFN; 629event error.io.pciex.mtlp-u@pciexrc/PCIEXFN; 630event error.io.pciex.badreq-u@PCIEXFN; 631event error.io.pciex.badreq-u@PCIEXFN/PCIEXFN; 632event error.io.pciex.badreq-u@pciexrc/PCIEXFN; 633event error.io.pciex.poisreq-u@PCIEXFN; 634event error.io.pciex.poisreq-u@PCIEXFN/PCIEXFN; 635event error.io.pciex.poisreq-u@pciexrc/PCIEXFN; 636event error.io.pciex.poiscomp-u@PCIEXFN; 637event error.io.pciex.poiscomp-u@PCIEXFN/PCIEXFN; 638event error.io.pciex.poiscomp-u@pciexrc/PCIEXFN; 639event error.io.pciex.ecrcreq-u@PCIEXFN; 640event error.io.pciex.ecrcreq-u@PCIEXFN/PCIEXFN; 641event error.io.pciex.ecrccomp-u@PCIEXFN; 642event error.io.pciex.ecrccomp-u@PCIEXFN/PCIEXFN; 643 644event ereport.io.pci.ma@PCIEXFN{within(5s)}; 645event ereport.io.pci.mdpe@PCIEXFN{within(5s)}; 646event ereport.io.pci.dpe@PCIEXFN{within(5s)}; 647event ereport.io.pci.rta@PCIEXFN{within(5s)}; 648event ereport.io.pci.sta@PCIEXFN{within(5s)}; 649event ereport.io.pciex.dl.dllp@PCIEXFN{within(5s)}; 650event ereport.io.pciex.dl.btlp@PCIEXFN{within(5s)}; 651event ereport.io.pciex.dl.bdllp@PCIEXFN{within(5s)}; 652event ereport.io.pciex.dl.rto@PCIEXFN{within(5s)}; 653event ereport.io.pciex.dl.rnr@PCIEXFN{within(5s)}; 654event ereport.io.pciex.pl.re@PCIEXFN{within(5s)}; 655event ereport.io.pciex.pl.te@PCIEXFN{within(5s)}; 656event ereport.io.pciex.tl.fcp@PCIEXFN{within(5s)}; 657event ereport.io.pciex.tl.rof@PCIEXFN{within(5s)}; 658event ereport.io.pciex.tl.mtlp@PCIEXFN{within(5s)}; 659event ereport.io.pciex.tl.ur@PCIEXFN{within(5s)}; 660event ereport.io.pciex.tl.ca@PCIEXFN{within(5s)}; 661event ereport.io.pciex.tl.ptlp@PCIEXFN{within(5s)}; 662event ereport.io.pciex.tl.ecrc@PCIEXFN{within(5s)}; 663event ereport.io.pciex.tl.uc@PCIEXFN{within(5s)}; 664event ereport.io.pciex.tl.cto@PCIEXFN{within(5s)}; 665event ereport.io.pciex.dl.dllp@pciexrc{within(5s)}; 666event ereport.io.pciex.dl.btlp@pciexrc{within(5s)}; 667event ereport.io.pciex.dl.bdllp@pciexrc{within(5s)}; 668event ereport.io.pciex.dl.rto@pciexrc{within(5s)}; 669event ereport.io.pciex.dl.rnr@pciexrc{within(5s)}; 670event ereport.io.pciex.pl.re@pciexrc{within(5s)}; 671event ereport.io.pciex.pl.te@pciexrc{within(5s)}; 672event ereport.io.pciex.tl.fcp@pciexrc{within(5s)}; 673event ereport.io.pciex.tl.rof@pciexrc{within(5s)}; 674event ereport.io.pciex.tl.mtlp@pciexrc{within(5s)}; 675event ereport.io.pciex.tl.ur@pciexrc{within(5s)}; 676event ereport.io.pciex.tl.ca@pciexrc{within(5s)}; 677event ereport.io.pciex.tl.ptlp@pciexrc{within(5s)}; 678event ereport.io.pciex.tl.ecrc@pciexrc{within(5s)}; 679event ereport.io.pciex.tl.cto@pciexrc{within(5s)}; 680event ereport.io.pci.sec-ma@pciexrc{within(5s)}; 681event ereport.io.pci.sec-mdpe@pciexrc{within(5s)}; 682event ereport.io.pci.sec-dpe@pciexrc{within(5s)}; 683event ereport.io.pci.sec-rta@pciexrc{within(5s)}; 684event ereport.io.pci.sec-sta@pciexrc{within(5s)}; 685event ereport.io.pci.sec-mdpe@PCIEXFN{within(5s)}; 686event ereport.io.pci.sec-dpe@PCIEXFN{within(5s)}; 687event ereport.io.pci.sec-rserr@PCIEXFN{within(5s)}; 688event ereport.io.pci.sserr@PCIEXFN{within(5s)}; 689event ereport.io.pci.sec-rserr@pciexrc{within(5s)}; 690event ereport.io.pciex.rc.fe-msg@pciexrc{within(5s)}; 691event ereport.io.pciex.rc.nfe-msg@pciexrc{within(5s)}; 692event ereport.io.pciex.rc.mue-msg@pciexrc{within(5s)}; 693event ereport.io.pciex.bdg.sec-interr@PCIEXFN{within(5s)}; 694event ereport.io.pciex.bdg.sec-ude@PCIEXFN{within(5s)}; 695event ereport.io.pci.target-mdpe@PCIEXFN{within(5s)}; 696event ereport.io.pci.target-mdpe@PCIFN{within(5s)}; 697 698/* 699 * handling of fatal and nonfatal error messages propagated up to root complex 700 * 701 * Use these for errors reported by root-complex on behalf of another device. 702 * Can use source-id payload to identify where the message came from. 703 */ 704prop error.io.pciex.fatal@PCIEXFN1 (1)-> 705 ereport.io.pciex.rc.mue-msg@pciexrc { is_under(pciexrc, PCIEXFN1) }, 706 ereport.io.pciex.rc.fe-msg@pciexrc { is_under(pciexrc, PCIEXFN1) && 707 SOURCE_ID_MATCHES_BDF }; 708 709prop error.io.pciex.fatal@PCIEXFN (0)-> 710 ereport.io.pci.sserr@PCIEXFN1; 711 712prop error.io.pciex.fatal@PCIEXFN { is_under(PCIEXFN1, PCIEXFN) } (0)-> 713 ereport.io.pci.sserr@PCIEXFN1, 714 ereport.io.pci.sec-rserr@PCIEXFN1; 715 716prop error.io.pciex.fatal@PCIEXFN { is_under(pciexrc, PCIEXFN) } (0)-> 717 ereport.io.pci.sec-rserr@pciexrc; 718 719prop error.io.pciex.nonfatal@PCIEXFN1 (1)-> 720 ereport.io.pciex.rc.mue-msg@pciexrc { is_under(pciexrc, PCIEXFN1) }, 721 ereport.io.pciex.rc.nfe-msg@pciexrc { is_under(pciexrc, PCIEXFN1) && 722 SOURCE_ID_MATCHES_BDF }; 723 724prop error.io.pciex.nonfatal@PCIEXFN (0)-> 725 ereport.io.pci.sserr@PCIEXFN; 726 727prop error.io.pciex.nonfatal@PCIEXFN { is_under(PCIEXFN1, PCIEXFN) } (0)-> 728 ereport.io.pci.sserr@PCIEXFN1, 729 ereport.io.pci.sec-rserr@PCIEXFN1; 730 731prop error.io.pciex.nonfatal@PCIEXFN { is_under(pciexrc, PCIEXFN) } (0)-> 732 ereport.io.pci.sec-rserr@pciexrc; 733 734/* 735 * link-level errors - could generate ereports at either end of link 736 * 737 * can use may propagations here as these ereports are only seen for these 738 * faults. 739 */ 740prop error.io.pciex.corrlink@pciexbus { !IS_SD(PCIEXFN) } (0)-> 741 ereport.io.pciex.dl.btlp@PCIEXFN, 742 ereport.io.pciex.dl.bdllp@PCIEXFN, 743 ereport.io.pciex.dl.rto@PCIEXFN, 744 ereport.io.pciex.dl.rnr@PCIEXFN, 745 ereport.io.pciex.pl.re@PCIEXFN; 746 747prop error.io.pciex.corrlink@PCIEXFN/pciexbus { IS_SD(PCIEXFN) } (0)-> 748 ereport.io.pciex.dl.btlp@PCIEXFN, 749 ereport.io.pciex.dl.bdllp@PCIEXFN, 750 ereport.io.pciex.dl.rto@PCIEXFN, 751 ereport.io.pciex.dl.rnr@PCIEXFN, 752 ereport.io.pciex.pl.re@PCIEXFN; 753 754prop error.io.pciex.corrlink@pciexrc/pciexbus (0)-> 755 ereport.io.pciex.dl.btlp@pciexrc, 756 ereport.io.pciex.dl.bdllp@pciexrc, 757 ereport.io.pciex.dl.rto@pciexrc, 758 ereport.io.pciex.dl.rnr@pciexrc, 759 ereport.io.pciex.pl.re@pciexrc; 760 761prop error.io.pciex.fatlink@PCIEXFN { !IS_SD(PCIEXFN) } (0)-> 762 error.io.pciex.fatal@PCIEXFN; 763 764prop error.io.pciex.fatlink@PCIEXFN { !IS_SD(PCIEXFN) } (0)-> 765 ereport.io.pciex.dl.dllp@PCIEXFN, 766 ereport.io.pciex.tl.fcp@PCIEXFN, 767 ereport.io.pciex.tl.rof@PCIEXFN; 768 769prop error.io.pciex.fatlink@PCIEXFN/PCIEXFN { IS_SD(PCIEXFN) } (0)-> 770 error.io.pciex.fatal@PCIEXFN; 771 772prop error.io.pciex.fatlink@PCIEXFN/PCIEXFN { IS_SD(PCIEXFN) } (0)-> 773 ereport.io.pciex.dl.dllp@PCIEXFN, 774 ereport.io.pciex.pl.te@PCIEXFN, 775 ereport.io.pciex.tl.fcp@PCIEXFN, 776 ereport.io.pciex.tl.rof@PCIEXFN; 777 778prop error.io.pciex.fatlink@pciexrc/PCIEXFN (0)-> 779 ereport.io.pciex.dl.dllp@pciexrc, 780 ereport.io.pciex.pl.te@pciexrc, 781 ereport.io.pciex.tl.fcp@pciexrc, 782 ereport.io.pciex.tl.rof@pciexrc; 783 784/* 785 * bridge internal error 786 */ 787prop error.io.pciex.sec-interr@PCIEXFN { IS_BG(PCIEXFN) } (2) -> 788 error.io.pciex.nonfatal@PCIEXFN, 789 ereport.io.pciex.bdg.sec-interr@PCIEXFN; 790 791/* 792 * downstream poisoned request 793 * 794 * - poisreq-d cascades down to the leaf device/bridge and any switch ports 795 * on route must raise a ptlp ereport while any switch ports forwarding 796 * the poisoned request must raise sec-mdpe ereports. The originator of the 797 * poisoning (be it root complex or downstream port of a switch) also raises 798 * sec-mdpe. A hardened leaf driver will also raise ptlp. A target-mdpe may 799 * be seen at the leaf (which may be a pci device beyond the bridge). 800 * 801 * Additionally, the leaf/bridge may treat the request as a ur, which the 802 * root complex will see and report an ma. Use flt-ur-u to represent this. 803 * 804 * The fault can always be recognized and the source identified using the ptlp 805 * and sec-mdpe ereports. 806 */ 807prop error.io.pciex.poisreq-d@PCIEXFN (1)-> 808 error.io.pciex.poisreq-fwd-d@PCIEXFN; 809 810prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_SD(PCIEXFN) || 811 IS_SU(PCIEXFN) } (1)-> 812 error.io.pciex.flt-ur-u@PCIEXFN, 813 error.io.pciex.poisreq-fwd-d@PCIEXFN/PCIEXFNHZ; 814 815prop error.io.pciex.poisreq-fwd-d@pciexrc/PCIEXFN (1)-> 816 ereport.io.pci.sec-mdpe@pciexrc; 817 818prop error.io.pciex.poisreq-fwd-d@PCIEXFN/PCIEXFN { IS_SU(PCIEXFN) } (0)-> 819 ereport.io.pci.sec-mdpe@PCIEXFN; 820 821prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_SU(PCIEXFN) } (2)-> 822 ereport.io.pci.dpe@PCIEXFN, 823 ereport.io.pciex.tl.ptlp@PCIEXFN; 824 825prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_SU(PCIEXFN) } (0)-> 826 error.io.pciex.nonfatal@PCIEXFN; 827 828prop error.io.pciex.poisreq-fwd-d@PCIEXFN/PCIEXFN { IS_SD(PCIEXFN) } (1)-> 829 ereport.io.pci.sec-mdpe@PCIEXFN; 830 831prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_SD(PCIEXFN) } (0)-> 832 ereport.io.pci.dpe@PCIEXFN, 833 ereport.io.pciex.tl.ptlp@PCIEXFN, 834 error.io.pciex.nonfatal@PCIEXFN; 835 836prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (3)-> 837 ereport.io.pci.dpe@PCIEXFN, 838 ereport.io.pciex.tl.ptlp@PCIEXFN, 839 error.io.pciex.nonfatal@PCIEXFN; 840 841prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 842 error.io.pci.dpdata-pw-d@PCIEXFN/PCIFNHZ, 843 error.io.pci.dpdata-dw-d@PCIEXFN/PCIFNHZ; 844 845prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 846 error.io.pciex.nonfatal@PCIEXFN; 847 848prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 849 ereport.io.pci.dpe@PCIEXFN, 850 ereport.io.pciex.tl.ptlp@PCIEXFN, 851 error.io.pciex.flt-ur-u@PCIEXFN; 852 853prop error.io.pciex.poisreq-fwd-d@PCIEXFN (0)-> 854 ereport.io.pci.target-mdpe@PCIEXFN; 855 856/* 857 * downstream poisoned completion 858 * 859 * - poiscomp-d cascades down to the leaf device/bridge and any switch ports on 860 * route must raise ptlp and mdpe ereports. A hardened leaf driver will also 861 * raise pltp and mdpe. For non-hardened leaf devices, no ptlp/mdpe may be 862 * reported, and though we should still see a nonfatal error reported from 863 * the root complex identifying the leaf device, we won't actually be informed 864 * that the error was an ptlp. 865 */ 866prop error.io.pciex.poiscomp-d@PCIEXFN (1)-> 867 error.io.pciex.poiscomp-fwd-d@PCIEXFN; 868 869prop error.io.pciex.poiscomp-fwd-d@PCIEXFN (1)-> 870 error.io.pciex.poiscomp-fwd-d@PCIEXFN/PCIEXFNHZ; 871 872prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_SU(PCIEXFN) } (2)-> 873 ereport.io.pci.dpe@PCIEXFN, 874 ereport.io.pciex.tl.ptlp@PCIEXFN; 875 876prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_SU(PCIEXFN) } (1)-> 877 ereport.io.pci.mdpe@PCIEXFN, 878 ereport.io.pci.sec-mdpe@PCIEXFN; 879 880prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_SU(PCIEXFN) } (0)-> 881 error.io.pciex.nonfatal@PCIEXFN; 882 883prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_SD(PCIEXFN) } (0)-> 884 ereport.io.pci.mdpe@PCIEXFN, 885 ereport.io.pci.sec-mdpe@PCIEXFN, 886 ereport.io.pci.dpe@PCIEXFN, 887 ereport.io.pciex.tl.ptlp@PCIEXFN, 888 error.io.pciex.nonfatal@PCIEXFN; 889 890prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (4)-> 891 ereport.io.pci.mdpe@PCIEXFN, 892 ereport.io.pci.dpe@PCIEXFN, 893 ereport.io.pciex.tl.ptlp@PCIEXFN, 894 error.io.pciex.nonfatal@PCIEXFN; 895 896prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 897 error.io.pci.dpdata-dr-d@PCIEXFN/PCIFNHZ; 898 899prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 900 error.io.pciex.nonfatal@PCIEXFN; 901 902prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 903 ereport.io.pci.mdpe@PCIEXFN, 904 ereport.io.pci.dpe@PCIEXFN, 905 ereport.io.pciex.tl.ptlp@PCIEXFN; 906 907/* 908 * downstream request with ecrc error. 909 * 910 * - ecrcreq-d cascades down to the leaf device/bridge and any switches on 911 * route can optionally raise an ecrc ereport. A hardened leaf driver may also 912 * raise ecrc. For non-hardened leaf devices, no ecrc may be reported, and 913 * though we should still see a nonfatal error reported from the root complex 914 * identifying the leaf device, we won't actually be informed that the error 915 * was an ecrc. 916 * 917 * Additionally, as the leaf/bridge will just throw away the packet, we should 918 * eventually get a cto at the root complex - so use an nr-u at the pciex 919 * leaf or bridge to get the appropriate behaviour. For the case where the leaf 920 * driver wasn't hardened we may be able to identify the leaf device (and 921 * therefore any intermediate switches which might have caused the problem) 922 * either via a target-ma ereport if available or via the nonfatal error 923 * reported from the root complex identifying the leaf device. The combination 924 * of a nonfatal error reported from the root complex and a cto from the root 925 * complex is sufficient to positively identify this case. 926 */ 927prop error.io.pciex.ecrcreq-d@PCIEXFN (1)-> 928 error.io.pciex.ecrcreq-fwd-d@PCIEXFN; 929 930prop error.io.pciex.ecrcreq-fwd-d@PCIEXFN { IS_SU(PCIEXFN) || 931 IS_SD(PCIEXFN) } (1)-> 932 error.io.pciex.flt-nr-u@PCIEXFN, 933 error.io.pciex.ecrcreq-fwd-d@PCIEXFN/PCIEXFNHZ; 934 935prop error.io.pciex.ecrcreq-fwd-d@PCIEXFN { IS_SU(PCIEXFN) || 936 IS_SD(PCIEXFN) } (0)-> 937 ereport.io.pciex.tl.ecrc@PCIEXFN, 938 error.io.pciex.nonfatal@PCIEXFN; 939 940prop error.io.pciex.ecrcreq-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (3)-> 941 error.io.pciex.nonfatal@PCIEXFN, 942 ereport.io.pciex.tl.ecrc@PCIEXFN, 943 error.io.pciex.flt-nr-u@PCIEXFN; 944 945prop error.io.pciex.ecrcreq-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (2)-> 946 error.io.pciex.nonfatal@PCIEXFN, 947 error.io.pciex.flt-nr-u@PCIEXFN; 948 949prop error.io.pciex.ecrcreq-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 950 ereport.io.pciex.tl.ecrc@PCIEXFN; 951 952/* 953 * downstream completion with ecrc error. 954 * 955 * - ecrccomp-d cascades down to the leaf device/bridge and any switches on 956 * route can optionally raise an ecrc ereport. A hardened leaf driver may 957 * also raise ecrc. For non-hardened leaf devices, no ecrc may be reported, 958 * and though we should still see a nonfatal error reported from the root 959 * complex identifying the leaf device, we won't actually be informed that 960 * the error was an ecrc. 961 * 962 * Additionally, as the leaf/bridge will just throw away the packet, we should 963 * eventually get a cto. Note the leaf ereports are optional (ie in case driver 964 * not hardened) but if we get both ecrc and cto we need to distinguish from 965 * cto only which would be an nr-d. 966 */ 967prop error.io.pciex.ecrccomp-d@PCIEXFN (1)-> 968 error.io.pciex.ecrccomp-fwd-d@PCIEXFN; 969 970prop error.io.pciex.ecrccomp-fwd-d@PCIEXFN (1)-> 971 error.io.pciex.ecrccomp-fwd-d@PCIEXFN/PCIEXFNHZ; 972 973prop error.io.pciex.ecrccomp-fwd-d@PCIEXFN { IS_SU(PCIEXFN) || 974 IS_SD(PCIEXFN) } (0)-> 975 error.io.pciex.nonfatal@PCIEXFN, 976 ereport.io.pciex.tl.ecrc@PCIEXFN; 977 978prop error.io.pciex.ecrccomp-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (3)-> 979 error.io.pciex.nonfatal@PCIEXFN, 980 ereport.io.pciex.tl.ecrc@PCIEXFN, 981 error.io.pciex.nr-d@PCIEXFN; 982 983prop error.io.pciex.ecrccomp-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 984 error.io.pciex.nonfatal@PCIEXFN; 985 986prop error.io.pciex.ecrccomp-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 987 ereport.io.pciex.tl.ecrc@PCIEXFN, 988 error.io.pciex.nr-d@PCIEXFN; 989 990/* 991 * upstream poisoned request 992 * 993 * - flt-poisreq-u is on the pciex node which generated the fault 994 * - source-poisreq-u refers to at least one leaf or bridge device 995 * whose bdf (if leaf) must match the source-id in the payload of the 996 * ereport generated from the root complex. 997 * - poisreq-u propagates up to the root complex and any switch ports on 998 * route will raise a ptlp ereport, while any upstream devices generating 999 * or forwarding the poisoned packed will raise an mdpe ereport. The root 1000 * complex should also report a ptlp. 1001 * 1002 * Additionally, as the root complex may treat the request as a ur, which the 1003 * leaf/bridge will see (and if hardened report) as an ma (including sending a 1004 * ta onto the child pci bus if this was a delayed write). 1005 * 1006 * We can always recognize what sort of fault this is from the ptlp (with no 1007 * sec-mdpe) at the root complex. Recognizing which originating devices may be 1008 * implicated can be done using the mdpe ereport (for a hardened leaf driver), 1009 * or for a non-hardened leaf driver by using the source-id payload in the ptlp 1010 * ereport to identify the originator of the request. The ptlp/mdpe ereports 1011 * at the intervening switches will narrow the fault down to a single suspect. 1012 */ 1013 1014prop error.io.pciex.flt-poisreq-u@PCIEXFN1 { (IS_LF(PCIEXFN) || 1015 IS_BG(PCIEXFN)) && is_under(PCIEXFN1, PCIEXFN) } (0)-> 1016 error.io.pciex.source-poisreq-u@PCIEXFN; 1017 1018prop error.io.pciex.source-poisreq-u@PCIEXFN1 { IS_LF(PCIEXFN1) && 1019 SOURCE_ID_MATCHES_BDF && is_under(pciexrc, PCIEXFN1) } (0)-> 1020 ereport.io.pciex.tl.ptlp@pciexrc, 1021 ereport.io.pciex.tl.ur@pciexrc; 1022 1023prop error.io.pciex.source-poisreq-u@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1024 ereport.io.pci.ma@PCIEXFN; 1025 1026prop error.io.pciex.source-poisreq-u@PCIEXFN { IS_BG(PCIEXFN) && 1027 is_under(pciexrc, PCIEXFN) } (0)-> 1028 ereport.io.pciex.tl.ptlp@pciexrc, 1029 ereport.io.pciex.tl.ur@pciexrc; 1030 1031prop error.io.pciex.source-poisreq-u@PCIEXFN { IS_BG(PCIEXFN) } (0)-> 1032 ereport.io.pci.ma@PCIEXFN, 1033 ereport.io.pci.sec-sta@PCIEXFN, 1034 error.io.pci.ta-drw-d@PCIEXFN/PCIFN; 1035 1036prop error.io.pciex.flt-poisreq-u@PCIEXFN (1)-> 1037 error.io.pciex.poisreq-u@PCIEXFN; 1038 1039/* 1040 * the remaining propagations are also used for poisoned requests propagating 1041 * up due to a fault behind a pcie-pci bridge 1042 */ 1043prop error.io.pciex.poisreq-u@PCIEXFN/PCIEXFN (1)-> 1044 error.io.pciex.poisreq-u@PCIEXFN; 1045 1046prop error.io.pciex.poisreq-u@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 1047 ereport.io.pci.mdpe@PCIEXFN; 1048 1049prop error.io.pciex.poisreq-u@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1050 ereport.io.pci.mdpe@PCIEXFN; 1051 1052prop error.io.pciex.poisreq-u@PCIEXFN { IS_SD(PCIEXFN) } (2)-> 1053 ereport.io.pci.sec-dpe@PCIEXFN, 1054 ereport.io.pciex.tl.ptlp@PCIEXFN; 1055 1056prop error.io.pciex.poisreq-u@PCIEXFN { IS_SD(PCIEXFN) } (0)-> 1057 ereport.io.pci.mdpe@PCIEXFN, 1058 error.io.pciex.nonfatal@PCIEXFN; 1059 1060prop error.io.pciex.poisreq-u@PCIEXFN { IS_SU(PCIEXFN) } (1)-> 1061 ereport.io.pci.mdpe@PCIEXFN; 1062 1063prop error.io.pciex.poisreq-u@PCIEXFN { IS_SU(PCIEXFN) } (0)-> 1064 ereport.io.pci.sec-dpe@PCIEXFN, 1065 ereport.io.pciex.tl.ptlp@PCIEXFN, 1066 error.io.pciex.nonfatal@PCIEXFN; 1067 1068prop error.io.pciex.poisreq-u@pciexrc/PCIEXFN (1)-> 1069 ereport.io.pci.sec-dpe@pciexrc; 1070 1071/* 1072 * upstream poisoned completion 1073 * 1074 * - flt-poiscomp-u is on the pciex node which generated the fault. There will 1075 * be a target-mdpe downstream from here. 1076 * - source-poiscomp-u refers to at least one leaf or bridge device 1077 * whose bdf (if leaf) must match the source-id in the payload of the 1078 * ereport generated from the root complex. 1079 * - poiscomp-u propagates up to the root complex and any switches on 1080 * route will raise ptlp and sec-mdpe ereports. The root complex will also 1081 * raise a sec-mdpe and ptlp. 1082 * 1083 * We can always recognize what sort of fault this is from the ptlp/sec-mdpe at 1084 * the root complex. Recognizing which originating devices may be implicated 1085 * can be done using the source-id payload in the ptlp ereport to identify the 1086 * originator of the completion. The ptlp/sec-mdpe ereports at the intervening 1087 * switches will narrow the fault down to a single suspect. 1088 */ 1089prop error.io.pciex.flt-poiscomp-u@PCIEXFN { IS_LF(PCIEXFN1) && 1090 is_under(PCIEXFN, PCIEXFN1) } (0)-> 1091 ereport.io.pci.target-mdpe@PCIEXFN1; 1092 1093prop error.io.pciex.flt-poiscomp-u@PCIEXFN { IS_PCI_LF(PCIFN) && 1094 is_under(PCIEXFN, PCIFN) } (0)-> 1095 ereport.io.pci.target-mdpe@PCIFN; 1096 1097prop error.io.pciex.flt-poiscomp-u@PCIEXFN1 { (IS_LF(PCIEXFN) || 1098 IS_BG(PCIEXFN)) && is_under(PCIEXFN1, PCIEXFN) } (0)-> 1099 error.io.pciex.source-poiscomp-u@PCIEXFN; 1100 1101prop error.io.pciex.source-poiscomp-u@PCIEXFN1 { IS_LF(PCIEXFN1) && 1102 SOURCE_ID_MATCHES_BDF && is_under(pciexrc, PCIEXFN1) } (0)-> 1103 ereport.io.pciex.tl.ptlp@pciexrc; 1104 1105prop error.io.pciex.source-poiscomp-u@PCIEXFN1 { IS_BG(PCIEXFN1) && 1106 is_under(pciexrc, PCIEXFN1) } (0)-> 1107 ereport.io.pciex.tl.ptlp@pciexrc; 1108 1109prop error.io.pciex.flt-poiscomp-u@PCIEXFN (1)-> 1110 error.io.pciex.poiscomp-u@PCIEXFN; 1111 1112/* 1113 * the remaining propagations are also used for poisoned completions propagating 1114 * up due to a fault behind a pcie-pci bridge 1115 */ 1116prop error.io.pciex.poiscomp-u@PCIEXFN/PCIEXFN (1)-> 1117 error.io.pciex.poiscomp-u@PCIEXFN; 1118 1119prop error.io.pciex.poiscomp-u@PCIEXFN { IS_SD(PCIEXFN) } (2)-> 1120 ereport.io.pci.sec-dpe@PCIEXFN, 1121 ereport.io.pciex.tl.ptlp@PCIEXFN; 1122 1123prop error.io.pciex.poiscomp-u@PCIEXFN { IS_SD(PCIEXFN) } (1)-> 1124 ereport.io.pci.sec-mdpe@PCIEXFN, 1125 ereport.io.pci.mdpe@PCIEXFN; 1126 1127prop error.io.pciex.poiscomp-u@PCIEXFN { IS_SD(PCIEXFN) } (0)-> 1128 error.io.pciex.nonfatal@PCIEXFN; 1129 1130prop error.io.pciex.poiscomp-u@PCIEXFN { IS_SU(PCIEXFN) } (0)-> 1131 ereport.io.pci.mdpe@PCIEXFN, 1132 ereport.io.pci.sec-mdpe@PCIEXFN, 1133 ereport.io.pci.sec-dpe@PCIEXFN, 1134 ereport.io.pciex.tl.ptlp@PCIEXFN, 1135 error.io.pciex.nonfatal@PCIEXFN; 1136 1137prop error.io.pciex.poiscomp-u@pciexrc/PCIEXFN (1)-> 1138 ereport.io.pci.sec-dpe@pciexrc; 1139 1140prop error.io.pciex.poiscomp-u@pciexrc/PCIEXFN (0)-> 1141 ereport.io.pci.sec-mdpe@pciexrc; 1142 1143/* 1144 * upstream request with ecrc error. 1145 * 1146 * - flt-ecrcreq-u is on the pciex node which generated the fault. 1147 * - source-ecrcreq-u cascades down to at least one leaf device (pciex or pci), 1148 * whose bdf (if pciex) must match the source-id in the payload of the 1149 * ereport generated from the root complex. 1150 * - ecrcreq-u propagates up to the root complex which must report it with an 1151 * ecrc ereport and any switches on route can optionally raise an ecrc ereport 1152 * 1153 * Additionally, as the root complex will just throw away the packet, we may 1154 * eventually get a cto - so use an nr-d at the pciex leaf or bridge to get 1155 * the appropriate behaviour. 1156 * 1157 * We can always recognize what sort of fault this is from the ecrc (with no 1158 * cto) at the root complex. Recognizing which leaf device may be implicated 1159 * can be done from the cto ereport (for a hardened leaf driver) or for a 1160 * non-hardened leaf using the source-id payload of the ecrc. 1161 */ 1162prop error.io.pciex.flt-ecrcreq-u@PCIEXFN1 { (IS_LF(PCIEXFN) || 1163 IS_BG(PCIEXFN)) && is_under(PCIEXFN1, PCIEXFN) } (0)-> 1164 error.io.pciex.source-ecrcreq-u@PCIEXFN; 1165 1166prop error.io.pciex.source-ecrcreq-u@PCIEXFN (0)-> 1167 error.io.pciex.nr-d@PCIEXFN; 1168 1169prop error.io.pciex.source-ecrcreq-u@PCIEXFN1 { IS_LF(PCIEXFN1) && 1170 SOURCE_ID_MATCHES_BDF && is_under(pciexrc, PCIEXFN1) } (0)-> 1171 ereport.io.pciex.tl.ecrc@pciexrc; 1172 1173prop error.io.pciex.source-ecrcreq-u@PCIEXFN { IS_BG(PCIEXFN) && 1174 is_under(pciexrc, PCIEXFN) } (0)-> 1175 ereport.io.pciex.tl.ecrc@pciexrc; 1176 1177prop error.io.pciex.flt-ecrcreq-u@PCIEXFN (1)-> 1178 error.io.pciex.ecrcreq-u@PCIEXFN; 1179 1180prop error.io.pciex.ecrcreq-u@PCIEXFN/PCIEXFN (1)-> 1181 error.io.pciex.ecrcreq-u@PCIEXFN; 1182 1183prop error.io.pciex.ecrcreq-u@PCIEXFN { IS_SD(PCIEXFN)||IS_SU(PCIEXFN) } (0)-> 1184 ereport.io.pciex.tl.ecrc@PCIEXFN, 1185 error.io.pciex.nonfatal@PCIEXFN; 1186 1187/* 1188 * upstream completion with ecrc error. 1189 * 1190 * - flt-ecrccomp-u is on the pciex node which generated the fault. 1191 * - source-ecrccomp-u cascades down to at least one leaf device (pciex or pci), 1192 * whose bdf (if pciex) must match the source-id in the payload of the 1193 * ereport generated from the root complex. 1194 * - ecrccomp-u propagates up to the root complex, which should report it with 1195 * an ecrc ereport and any switches on route can optionally raise an ecrc 1196 * ereport. 1197 * 1198 * Additionally, as the root complex will just throw away the packet, we'll 1199 * eventually get a cto - so use an flt-nr-u at the pciex leaf or bridge to get 1200 * the appropriate behaviour. 1201 * 1202 * We can always recognize what sort of fault this from the ecrc/cto from the 1203 * root complex. Recognizing which leaf device may be implicated can be done 1204 * using either the source-id payload of the ecrc or the target-ma ereport if 1205 * available. 1206 */ 1207prop error.io.pciex.flt-ecrccomp-u@PCIEXFN1 { (IS_LF(PCIEXFN) || 1208 IS_BG(PCIEXFN)) && is_under(PCIEXFN1, PCIEXFN) } (0)-> 1209 error.io.pciex.source-ecrccomp-u@PCIEXFN; 1210 1211prop error.io.pciex.source-ecrccomp-u@PCIEXFN (0)-> 1212 error.io.pciex.flt-nr-u@PCIEXFN; 1213 1214prop error.io.pciex.source-ecrccomp-u@PCIEXFN1 { IS_LF(PCIEXFN1) && 1215 SOURCE_ID_MATCHES_BDF && is_under(pciexrc, PCIEXFN1) } (0)-> 1216 ereport.io.pciex.tl.ecrc@pciexrc; 1217 1218prop error.io.pciex.source-ecrccomp-u@PCIEXFN { IS_BG(PCIEXFN) && 1219 is_under(pciexrc, PCIEXFN) } (0)-> 1220 ereport.io.pciex.tl.ecrc@pciexrc; 1221 1222prop error.io.pciex.flt-ecrccomp-u@PCIEXFN (1)-> 1223 error.io.pciex.ecrccomp-u@PCIEXFN; 1224 1225prop error.io.pciex.ecrccomp-u@PCIEXFN/PCIEXFN (1)-> 1226 error.io.pciex.ecrccomp-u@PCIEXFN; 1227 1228prop error.io.pciex.ecrccomp-u@PCIEXFN { IS_SD(PCIEXFN)||IS_SU(PCIEXFN) } (0)-> 1229 ereport.io.pciex.tl.ecrc@PCIEXFN, 1230 error.io.pciex.nonfatal@PCIEXFN; 1231 1232/* 1233 * no response to downstream requester 1234 * 1235 * - nr-d will effectively cascade downstream to the requester. The fault here 1236 * is always at the root complex. For a hardened leaf device driver, we will 1237 * always be able to recognize this as the requester will report this as a 1238 * cto. For non-hardened leaf devices, no cto will be reported, and though we 1239 * should still see a nonfatal error reported from the root complex 1240 * identifying the leaf device, we won't actually be informed that the error 1241 * was a cto. 1242 */ 1243prop error.io.pciex.nr-d@PCIEXFN (1)-> 1244 error.io.pciex.nr-d@PCIEXFN/PCIEXFNHZ; 1245 1246prop error.io.pciex.nr-d@PCIEXFN { IS_BG(PCIEXFN) } (2)-> 1247 error.io.pciex.nonfatal@PCIEXFN, 1248 ereport.io.pciex.tl.cto@PCIEXFN; 1249 1250prop error.io.pciex.nr-d@PCIEXFN { IS_BG(PCIEXFN) } (0)-> 1251 ereport.io.pci.ma@PCIEXFN, 1252 ereport.io.pci.sec-sta@PCIEXFN, 1253 error.io.pci.nr-drw-d@PCIEXFN/PCIFN, 1254 error.io.pci.ta-drw-d@PCIEXFN/PCIFN; 1255 1256prop error.io.pciex.nr-d@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 1257 error.io.pciex.nonfatal@PCIEXFN; 1258 1259prop error.io.pciex.nr-d@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1260 ereport.io.pci.ma@PCIEXFN, 1261 ereport.io.pciex.tl.cto@PCIEXFN; 1262 1263/* 1264 * no response to upstream requester 1265 * 1266 * - flt-nr-u will effectively cascade upstream to the root complex which will 1267 * report it as a cto. 1268 * 1269 * We have to use target-ma to informs us which device failed to respond. 1270 */ 1271prop error.io.pciex.flt-nr-u@PCIEXFN (1)-> 1272 error.io.pci.target-ma-d@PCIEXFN; 1273 1274prop error.io.pciex.flt-nr-u@PCIEXFN (1)-> 1275 error.io.pciex.nr-u@PCIEXFN; 1276 1277prop error.io.pciex.nr-u@PCIEXFN/PCIEXFN (1)-> 1278 error.io.pciex.nr-u@PCIEXFN; 1279 1280prop error.io.pciex.nr-u@pciexrc/PCIEXFN (1)-> 1281 ereport.io.pciex.tl.cto@pciexrc; 1282 1283prop error.io.pciex.nr-u@pciexrc/PCIEXFN (0)-> 1284 ereport.io.pci.sec-ma@pciexrc; 1285 1286/* 1287 * downstream malformed tlp 1288 * 1289 * This will cascade downstream to the receiver which will report it as an mtlp. 1290 * For non-hardened leaf drivers, no mtlp will be reported, and though we should 1291 * still see a fatal error reported from the root complex identifying the leaf 1292 * device, we won't actually be informed that the error was a mtlp. 1293 * Note that sw-mtlp-d is to handle the case where the switch is actually 1294 * the target of the packet (config request etc). 1295 */ 1296prop error.io.pciex.mtlp-d@PCIEXFN { IS_SD(PCIEXFN) || IS_SU(PCIEXFN) } (1)-> 1297 error.io.pciex.sw-mtlp-d@PCIEXFN, 1298 error.io.pciex.mtlp-d@PCIEXFN/PCIEXFNHZ; 1299 1300prop error.io.pciex.sw-mtlp-d@PCIEXFN { IS_SU(PCIEXFN) } (2)-> 1301 error.io.pciex.fatal@PCIEXFN, 1302 ereport.io.pciex.tl.mtlp@PCIEXFN; 1303 1304prop error.io.pciex.mtlp-d@PCIEXFN { IS_BG(PCIEXFN) } (2)-> 1305 error.io.pciex.fatal@PCIEXFN, 1306 ereport.io.pciex.tl.mtlp@PCIEXFN; 1307 1308prop error.io.pciex.mtlp-d@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 1309 error.io.pciex.fatal@PCIEXFN; 1310 1311prop error.io.pciex.mtlp-d@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1312 ereport.io.pciex.tl.mtlp@PCIEXFN; 1313 1314/* 1315 * upstream malformed tlp 1316 * 1317 * This will cascade upstream to the receiver which will report it as an mtlp. 1318 */ 1319prop error.io.pciex.flt-mtlp-u@PCIEXFN (1)-> 1320 error.io.pciex.mtlp-u@PCIEXFN; 1321 1322prop error.io.pciex.mtlp-u@PCIEXFN/PCIEXFN (1)-> 1323 error.io.pciex.mtlp-u@PCIEXFN; 1324 1325prop error.io.pciex.mtlp-u@pciexrc/PCIEXFN (1)-> 1326 ereport.io.pciex.tl.mtlp@pciexrc; 1327 1328/* 1329 * downstream completer aborts 1330 * 1331 * This could be the fault of the root complex or a switch reporting an internal 1332 * error, or of the leaf device sending an invalid request (the latter is 1333 * handled by the flt-badreq-u case below). 1334 * 1335 * This is reported by the completer or by an intervening downstream switch 1336 * port. The completer abort response propagates down to the initiator which 1337 * will set the legacy pci bit rta. 1338 * 1339 * The fault can always be recognized by the ca ereport from the root complex 1340 * or downstream switch port. The originator of the request can be recognized 1341 * by the rta for a hardened driver or by using the source-id payload of the 1342 * ca ereport for a non-hardened driver. 1343 */ 1344prop error.io.pciex.ca-d@pciexrc/PCIEXFN (0)-> 1345 ereport.io.pciex.tl.ca@pciexrc; 1346 1347prop error.io.pciex.ca-d@pciexrc/PCIEXFN (1)-> 1348 ereport.io.pci.sec-sta@pciexrc; 1349 1350prop error.io.pciex.ca-d@PCIEXFN/PCIEXFN (0)-> 1351 ereport.io.pci.sec-sta@PCIEXFN; 1352 1353prop error.io.pciex.ca-d@PCIEXFN/PCIEXFN (2)-> 1354 ereport.io.pciex.tl.ca@PCIEXFN, 1355 error.io.pciex.nonfatal@PCIEXFN; 1356 1357prop error.io.pciex.ca-d@PCIEXFN (0)-> 1358 error.io.pciex.ca-fwd-d@PCIEXFN; 1359 1360prop error.io.pciex.ca-fwd-d@PCIEXFN (1)-> 1361 error.io.pciex.ca-fwd-d@PCIEXFN/PCIEXFNHZ; 1362 1363prop error.io.pciex.ca-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 1364 ereport.io.pci.rta@PCIEXFN; 1365 1366prop error.io.pciex.ca-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (0)-> 1367 ereport.io.pci.sec-sta@PCIEXFN, 1368 error.io.pci.ta-drw-d@PCIEXFN/PCIFN; 1369 1370prop error.io.pciex.ca-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1371 ereport.io.pci.rta@PCIEXFN; 1372 1373/* 1374 * upstream completer aborts 1375 * 1376 * This could be the fault of the leaf device/bridge/upstream switch port 1377 * reporting an internal error, or of the root complex sending an invalid 1378 * request (the latter case is handled by badreq-d below). 1379 * 1380 * This is reported as a ca by the completer. The completer (for non-posted 1381 * requests) sends the appropriate error bits in the completion message to 1382 * the initiator which will set the legacy pci bit sec-rta. 1383 * 1384 * The fault can always be recognized from the sec-rta bit at the root complex. 1385 * 1386 * If the fault was with a PCI Express leaf with a hardened driver, then we 1387 * will identify the device from the ca ereport. 1388 * 1389 * If the fault was with a PCI Express leaf with a non-hardened driver, then we 1390 * can still identify the leaf device from the source-id payload of the nonfatal 1391 * message ereport from the root complex or from the target-rta ereport. 1392 */ 1393prop error.io.pciex.flt-ca-u@PCIEXFN { !IS_LF(PCIEXFN) } (1)-> 1394 ereport.io.pciex.tl.ca@PCIEXFN; 1395 1396prop error.io.pciex.flt-ca-u@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1397 ereport.io.pciex.tl.ca@PCIEXFN; 1398 1399prop error.io.pciex.flt-ca-u@PCIEXFN (0)-> 1400 error.io.pciex.nonfatal@PCIEXFN, 1401 ereport.io.pci.sta@PCIEXFN; 1402 1403prop error.io.pciex.flt-ca-u@PCIEXFN (2)-> 1404 error.io.pci.target-rta-d@PCIEXFN, 1405 error.io.pciex.ca-u@PCIEXFN; 1406 1407prop error.io.pciex.ca-u@PCIEXFN/PCIEXFN (1)-> 1408 error.io.pciex.ca-u@PCIEXFN; 1409 1410prop error.io.pciex.ca-u@pciexrc/PCIEXFN (0)-> 1411 ereport.io.pci.sec-rta@pciexrc; 1412 1413/* 1414 * upstream bad request 1415 * 1416 * When detecting bad data on a request the completer (or any switch on the 1417 * way to the completer) may report ur or ca. If the switch detects the problem 1418 * first then the request doesn't get forwarded on to the completer. 1419 * 1420 * These are reported as ur/ca ereports. For non-posted requests, the reporter 1421 * then sends the appropriate error bits in the completion message to the 1422 * initiator which will set the legacy pci bits ma or rta. 1423 * 1424 * For flt-badreq-u, the ca/ur ereports contain a source-id payload that 1425 * identifies the initiator. 1426 * 1427 * The fault can always be recognized by the ca/ur ereport from the root 1428 * complex or downstream switch port. The originator of the request can be 1429 * recognized by the rta/ma for a hardened driver or by using the source-id 1430 * payload of the ca/ur ereport for a non-hardened driver. 1431 */ 1432prop error.io.pciex.flt-badreq-u@PCIEXFN (0)-> 1433 ereport.io.pci.ma@PCIEXFN, 1434 ereport.io.pci.rta@PCIEXFN; 1435 1436prop error.io.pciex.flt-badreq-u@PCIEXFN1 { 1437 SOURCE_ID_MATCHES_BDF && is_under(pciexrc, PCIEXFN1) } (0)-> 1438 ereport.io.pciex.tl.ur@pciexrc, 1439 ereport.io.pciex.tl.ca@pciexrc; 1440 1441prop error.io.pciex.flt-badreq-u@PCIEXFN (1)-> 1442 error.io.pciex.badreq-u@PCIEXFN; 1443 1444prop error.io.pciex.badreq-u@PCIEXFN/PCIEXFN (1)-> 1445 error.io.pciex.badreq-u@PCIEXFN; 1446 1447prop error.io.pciex.badreq-u@pciexrc/PCIEXFN (0)-> 1448 ereport.io.pci.sec-sta@pciexrc; 1449 1450prop error.io.pciex.flt-badreq-u@PCIEXFN1 { IS_SD(PCIEXFN) && 1451 SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIEXFN1) } (0)-> 1452 ereport.io.pciex.tl.ur@PCIEXFN, 1453 ereport.io.pciex.tl.ca@PCIEXFN; 1454 1455prop error.io.pciex.flt-badreq-u@PCIEXFN1 { IS_SD(PCIEXFN) && 1456 is_under(PCIEXFN, PCIEXFN1) } (0)-> 1457 ereport.io.pci.sec-sta@PCIEXFN, 1458 error.io.pciex.nonfatal@PCIEXFN; 1459 1460/* 1461 * downstream bad request 1462 * 1463 * When detecting bad data on a request the completer (or any switch on the 1464 * way to the completer) may report ur or ca. If the switch detects the problem 1465 * first then the request doesn't get forwarded on to the completer. 1466 * 1467 * These are reported as ur/ca ereports (except where the completer is a non- 1468 * hardened leaf driver when all we get is a nonfatal error from the root 1469 * complex identifying the leaf device). The reporter then sends the appropriate 1470 * error bits in the completion message to the initiator which will set the 1471 * legacy pci bits ma or rta (oddly there is no equivalent in pcie error 1472 * reporting). 1473 */ 1474prop error.io.pciex.badreq-d@PCIEXFN { IS_SU(PCIEXFN) || IS_SD(PCIEXFN) } (1)-> 1475 error.io.pciex.flt-ur-u@PCIEXFN, 1476 error.io.pciex.flt-ca-u@PCIEXFN, 1477 error.io.pciex.badreq-d@PCIEXFN/PCIEXFNHZ; 1478 1479prop error.io.pciex.badreq-d@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 1480 error.io.pciex.flt-ur-u@PCIEXFN, 1481 error.io.pciex.flt-ca-u@PCIEXFN, 1482 error.io.pci.badreq-pw-d@PCIEXFN/PCIFNHZ, 1483 error.io.pci.badreq-drw-d@PCIEXFN/PCIFNHZ; 1484 1485prop error.io.pciex.badreq-d@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 1486 error.io.pciex.flt-ur-u@PCIEXFN, 1487 error.io.pciex.flt-ca-u@PCIEXFN; 1488 1489prop error.io.pciex.flt-ur-u@PCIEXFN { !IS_LF(PCIEXFN) } (1)-> 1490 ereport.io.pciex.tl.ur@PCIEXFN; 1491 1492prop error.io.pciex.flt-ur-u@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1493 ereport.io.pciex.tl.ur@PCIEXFN; 1494 1495prop error.io.pciex.flt-ur-u@PCIEXFN (2)-> 1496 error.io.pci.target-ma-d@PCIEXFN, 1497 error.io.pciex.ur-u@PCIEXFN; 1498 1499prop error.io.pciex.flt-ur-u@PCIEXFN (0)-> 1500 error.io.pciex.nonfatal@PCIEXFN; 1501 1502prop error.io.pciex.ur-u@PCIEXFN/PCIEXFN (1)-> 1503 error.io.pciex.ur-u@PCIEXFN; 1504 1505prop error.io.pciex.ur-u@pciexrc/PCIEXFN (0)-> 1506 ereport.io.pci.sec-ma@pciexrc; 1507 1508/* 1509 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1510 * Stub unused legacy pci ereports at root complex. 1511 * Stub tl.uc as we can't do anything useful with it (we should eventually 1512 * get a cto which we can do something with - a uc without a cto is a genuinely 1513 * spurious completion which is at least harmless). 1514 * Stub messages that the root complex sends to itself. 1515 * Stub mce/mue/ce/nr/noadverr. 1516 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1517 */ 1518 1519event error.io.pciex.discard_rc@pciexrc; 1520 1521event ereport.io.pciex.noadverr@PCIEXFN{within(5s)}; 1522event ereport.io.pciex.correctable@PCIEXFN{within(5s)}; 1523event ereport.io.pciex.nonfatal@PCIEXFN{within(5s)}; 1524event ereport.io.pciex.a-nonfatal@PCIEXFN{within(5s)}; 1525event ereport.io.pciex.fatal@PCIEXFN{within(5s)}; 1526event ereport.io.pci.nr@PCIEXFN{within(5s)}; 1527event ereport.io.pci.nr@pciexrc{within(5s)}; 1528event ereport.io.pci.ma@pciexrc{within(5s)}; 1529event ereport.io.pci.rta@pciexrc{within(5s)}; 1530event ereport.io.pci.sta@pciexrc{within(5s)}; 1531event ereport.io.pci.dpe@pciexrc{within(5s)}; 1532event ereport.io.pci.mdpe@pciexrc{within(5s)}; 1533event ereport.io.pci.sserr@pciexrc{within(5s)}; 1534event ereport.io.pciex.tl.uc@pciexrc{within(5s)}; 1535event ereport.io.pciex.noadverr@pciexrc{within(5s)}; 1536event ereport.io.pciex.a-nonfatal@pciexrc{within(5s)}; 1537event ereport.io.pciex.rc.ce-msg@pciexrc{within(5s)}; 1538event ereport.io.pciex.rc.mce-msg@pciexrc{within(5s)}; 1539 1540event upset.io.pciex.discard_uc@PCIEXFN; 1541event upset.io.pciex.discard@PCIEXFN; 1542event upset.io.pciex.discard@pciexrc; 1543 1544prop upset.io.pciex.discard_uc@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 1545 ereport.io.pciex.tl.uc@PCIEXFN; 1546 1547prop upset.io.pciex.discard_uc@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 1548 ereport.io.pciex.tl.uc@PCIEXFN; 1549 1550prop upset.io.pciex.discard@PCIEXFN (1)-> 1551 ereport.io.pci.nr@PCIEXFN, 1552 ereport.io.pciex.noadverr@PCIEXFN, 1553 ereport.io.pciex.correctable@PCIEXFN, 1554 ereport.io.pciex.nonfatal@PCIEXFN, 1555 ereport.io.pciex.a-nonfatal@PCIEXFN, 1556 ereport.io.pciex.fatal@PCIEXFN; 1557 1558prop error.io.pciex.discard_rc@pciexrc (0)-> 1559 ereport.io.pciex.rc.mue-msg@pciexrc, 1560 ereport.io.pciex.rc.fe-msg@pciexrc { SOURCE_ID_MATCHES_OWN_BDF }, 1561 ereport.io.pciex.rc.nfe-msg@pciexrc { SOURCE_ID_MATCHES_OWN_BDF }; 1562 1563prop upset.io.pciex.discard@pciexrc (1)-> 1564 error.io.pciex.discard_rc@pciexrc, 1565 ereport.io.pci.nr@pciexrc, 1566 ereport.io.pciex.noadverr@pciexrc, 1567 ereport.io.pciex.a-nonfatal@pciexrc, 1568 ereport.io.pciex.rc.ce-msg@pciexrc, 1569 ereport.io.pciex.rc.mce-msg@pciexrc, 1570 ereport.io.pciex.tl.uc@pciexrc, 1571 ereport.io.pci.ma@pciexrc, 1572 ereport.io.pci.rta@pciexrc, 1573 ereport.io.pci.sta@pciexrc, 1574 ereport.io.pci.dpe@pciexrc, 1575 ereport.io.pci.mdpe@pciexrc, 1576 ereport.io.pci.sserr@pciexrc; 1577 1578/* 1579 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1580 * rules for propagations from child PCI bus 1581 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1582 */ 1583 1584event error.io.pci.retry-to-u@PCIEXFN/PCIFN; 1585event error.io.pci.ma-u@PCIEXFN/PCIFN; 1586event error.io.pci.ta-u@PCIEXFN/PCIFN; 1587event error.io.pci.ape-u@PCIEXFN/PCIFN; 1588event error.io.pci.source-ape-u@PCIFN; 1589event error.io.pci.target-ma-d@PCIFN; 1590event error.io.pci.target-rta-d@PCIFN; 1591event error.io.pci.badreq-pw-u@PCIEXFN/PCIFN; 1592event error.io.pci.badreq-drw-u@PCIEXFN/PCIFN; 1593event error.io.pci.source-perr-u@PCIFN; 1594event error.io.pci.source-dpdata-u@PCIFN; 1595event error.io.pci.dpdata-pw-u@PCIEXFN/PCIFN; 1596event error.io.pci.dpdata-dw-u@PCIEXFN/PCIFN; 1597event error.io.pci.dpdata-dr-u@PCIEXFN/PCIFN; 1598event error.io.pci.perr-pw-u@PCIEXFN/PCIFN; 1599event error.io.pci.perr-dw-u@PCIEXFN/PCIFN; 1600event error.io.pci.perr-dr-u@PCIEXFN/PCIFN; 1601event error.io.pci.serr-u@PCIEXFN/PCIFN; 1602event error.io.pcix.scpe-u@PCIEXFN/PCIFN; 1603event error.io.pcix.source-scpe-u@PCIFN; 1604event error.io.pcix.spl-comp-ma-u@PCIEXFN/PCIFN; 1605event error.io.pcix.spl-comp-ta-u@PCIEXFN/PCIFN; 1606event error.io.pcix.spl-comp-ma-d@PCIEXFN/PCIFN; 1607event error.io.pcix.spl-comp-ta-d@PCIEXFN/PCIFN; 1608event error.io.pcix.uscmd@PCIEXFN; 1609 1610event ereport.io.pcix.sec-spl-dis@PCIEXFN{within(5s)}; 1611event ereport.io.pciex.bdg.uscmd@PCIEXFN{within(5s)}; 1612event ereport.io.pciex.bdg.sec-perr@PCIEXFN{within(5s)}; 1613event ereport.io.pciex.bdg.sec-uadr@PCIEXFN{within(5s)}; 1614event ereport.io.pciex.bdg.sec-uat@PCIEXFN{within(5s)}; 1615event ereport.io.pciex.bdg.sec-serr@PCIEXFN{within(5s)}; 1616event ereport.io.pciex.bdg.sec-tex@PCIEXFN{within(5s)}; 1617event ereport.io.pciex.bdg.sec-rma@PCIEXFN{within(5s)}; 1618event ereport.io.pciex.bdg.sec-rta@PCIEXFN{within(5s)}; 1619event ereport.io.pciex.bdg.sec-ma-sc@PCIEXFN{within(5s)}; 1620event ereport.io.pciex.bdg.sec-ta-sc@PCIEXFN{within(5s)}; 1621event ereport.io.pci.dto@PCIEXFN{within(5s)}; 1622event ereport.io.pci.sec-rta@PCIEXFN{within(5s)}; 1623event ereport.io.pci.sec-ma@PCIEXFN{within(5s)}; 1624 1625/* 1626 * ma-u will only propagate on to pciex bus for non-posted accesses. It 1627 * is then represented as an unsupported request. 1628 */ 1629prop error.io.pci.ma-u@PCIEXFN/PCIFN (0)-> 1630 ereport.io.pciex.tl.ur@PCIEXFN; 1631 1632prop error.io.pci.ma-u@PCIEXFN/PCIFN { is_under(pciexrc, PCIEXFN/PCIFN) } (0)-> 1633 ereport.io.pci.sec-ma@pciexrc; 1634 1635prop error.io.pci.ma-u@PCIEXFN/PCIFN (2)-> 1636 ereport.io.pci.sec-ma@PCIEXFN, 1637 error.io.pciex.nonfatal@PCIEXFN; 1638 1639prop error.io.pci.target-ma-d@PCIFN1 { IS_BG(PCIEXFN) && IS_PCI_LF(PCIFN1) && 1640 SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIFN1) } (0)-> 1641 ereport.io.pciex.bdg.sec-rma@PCIEXFN; 1642 1643/* 1644 * ta-u will only propagate on to pciex bus for non-posted accesses. It is 1645 * then represented as a completer abort. 1646 */ 1647prop error.io.pci.ta-u@PCIEXFN/PCIFN (0)-> 1648 ereport.io.pci.sta@PCIEXFN, 1649 ereport.io.pciex.tl.ca@PCIEXFN; 1650 1651prop error.io.pci.ta-u@PCIEXFN/PCIFN { is_under(pciexrc, PCIEXFN/PCIFN) } (0)-> 1652 ereport.io.pci.sec-rta@pciexrc; 1653 1654prop error.io.pci.ta-u@PCIEXFN/PCIFN (2)-> 1655 ereport.io.pci.sec-rta@PCIEXFN, 1656 error.io.pciex.nonfatal@PCIEXFN; 1657 1658prop error.io.pci.target-rta-d@PCIFN1 { IS_BG(PCIEXFN) && IS_PCI_LF(PCIFN1) && 1659 SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIFN1) } (0)-> 1660 ereport.io.pciex.bdg.sec-rta@PCIEXFN; 1661 1662/* 1663 * PERR# on a delayed write is represented as an unsupported request 1664 */ 1665prop error.io.pci.perr-dw-u@PCIEXFN/PCIFN (1)-> 1666 ereport.io.pci.sec-mdpe@PCIEXFN; 1667 1668prop error.io.pci.perr-dw-u@PCIEXFN/PCIFN (0)-> 1669 error.io.pciex.flt-ur-u@PCIEXFN; 1670 1671prop error.io.pci.perr-pw-u@PCIEXFN/PCIFN (1)-> 1672 ereport.io.pci.sec-mdpe@PCIEXFN; 1673 1674prop error.io.pci.perr-pw-u@PCIEXFN/PCIFN (0)-> 1675 error.io.pciex.nonfatal@PCIEXFN; 1676 1677prop error.io.pci.perr-dr-u@PCIEXFN/PCIFN (1)-> 1678 error.io.pciex.nonfatal@PCIEXFN; 1679 1680prop error.io.pci.source-perr-u@PCIFN1 { IS_BG(PCIEXFN) && IS_PCI_LF(PCIFN1) && 1681 SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIFN1) } (0)-> 1682 ereport.io.pciex.bdg.sec-perr@PCIEXFN; 1683 1684/* 1685 * If the bridge receives data with bad ecc/parity from pci/pci-x, it will 1686 * propagate onto pci express as a poisoned tlp 1687 */ 1688prop error.io.pci.dpdata-dr-u@PCIEXFN/PCIFN (2)-> 1689 ereport.io.pci.sec-dpe@PCIEXFN, 1690 error.io.pciex.poiscomp-u@PCIEXFN; 1691 1692prop error.io.pci.dpdata-dr-u@PCIEXFN/PCIFN (0)-> 1693 error.io.pciex.nonfatal@PCIEXFN; 1694 1695prop error.io.pci.dpdata-dr-u@PCIEXFN/PCIFN (1)-> 1696 ereport.io.pci.sec-mdpe@PCIEXFN, 1697 ereport.io.pci.mdpe@PCIEXFN; 1698 1699prop error.io.pci.dpdata-dw-u@PCIEXFN/PCIFN (1)-> 1700 ereport.io.pci.sec-dpe@PCIEXFN; 1701 1702prop error.io.pci.dpdata-dw-u@PCIEXFN/PCIFN (0)-> 1703 error.io.pciex.nonfatal@PCIEXFN, 1704 error.io.pciex.poisreq-u@PCIEXFN, 1705 ereport.io.pci.ma@PCIEXFN, 1706 ereport.io.pci.sec-sta@PCIEXFN, 1707 error.io.pci.ta-drw-d@PCIEXFN/PCIFN; 1708 1709prop error.io.pci.dpdata-pw-u@PCIEXFN/PCIFN (2)-> 1710 ereport.io.pci.sec-dpe@PCIEXFN, 1711 error.io.pciex.poisreq-u@PCIEXFN; 1712 1713prop error.io.pci.dpdata-pw-u@PCIEXFN/PCIFN (0)-> 1714 error.io.pciex.nonfatal@PCIEXFN, 1715 ereport.io.pci.ma@PCIEXFN; 1716 1717prop error.io.pci.source-dpdata-u@PCIFN { is_under(pciexrc, PCIFN) } (0)-> 1718 ereport.io.pciex.tl.ptlp@pciexrc, 1719 ereport.io.pciex.tl.ur@pciexrc; 1720 1721prop error.io.pci.source-dpdata-u@PCIFN1 { IS_BG(PCIEXFN) && IS_PCI_LF(PCIFN1) 1722 && SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIFN1) } (0)-> 1723 ereport.io.pciex.bdg.sec-ude@PCIEXFN; 1724 1725/* 1726 * If the bridge sees an address or attribute parity error it is considered 1727 * a fatal error. 1728 */ 1729prop error.io.pci.ape-u@PCIEXFN/PCIFN (2)-> 1730 ereport.io.pci.sec-dpe@PCIEXFN, 1731 error.io.pciex.fatal@PCIEXFN; 1732 1733prop error.io.pci.source-ape-u@PCIFN1 { IS_BG(PCIEXFN) && IS_PCI_LF(PCIFN1) && 1734 SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIFN1) } (0)-> 1735 ereport.io.pciex.bdg.sec-uat@PCIEXFN, 1736 ereport.io.pciex.bdg.sec-uadr@PCIEXFN; 1737 1738prop error.io.pci.ape-u@PCIEXFN/PCIFN (0)-> 1739 ereport.io.pci.sec-rserr@PCIEXFN, 1740 ereport.io.pciex.bdg.sec-serr@PCIEXFN, 1741 ereport.io.pci.sec-sta@PCIEXFN; 1742 1743/* 1744 * If the bridge sees a split completion error (pci-x only) it could 1745 * result in a number of things 1746 * - unrecovered split completion message data error (uscmd). This would 1747 * happen on a pio write. A completer abort is returned to the initiator. 1748 * - for various faults in the split completion (eg address parity error) 1749 * we will respond with a target abort (which the child device will treat 1750 * as a split completion ta) 1751 * - for other faults we can't tell who send the split completion and so 1752 * just drop the request (which the child device sees as a split 1753 * completion ma) 1754 */ 1755prop error.io.pcix.scpe-u@PCIEXFN/PCIFN (0)-> 1756 ereport.io.pci.sec-dpe@PCIEXFN, 1757 ereport.io.pci.sec-rserr@PCIEXFN, 1758 ereport.io.pciex.bdg.sec-serr@PCIEXFN, 1759 ereport.io.pci.sec-sta@PCIEXFN, 1760 error.io.pciex.fatal@PCIEXFN; 1761 1762prop error.io.pcix.source-scpe-u@PCIFN1 { IS_BG(PCIEXFN) && IS_PCI_LF(PCIFN1) && 1763 SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIFN1) } (0)-> 1764 ereport.io.pciex.bdg.sec-uat@PCIEXFN, 1765 ereport.io.pciex.bdg.sec-uadr@PCIEXFN; 1766 1767prop error.io.pcix.scpe-u@PCIEXFN/PCIFN (1)-> 1768 error.io.pcix.uscmd@PCIEXFN, 1769 error.io.pcix.spl-comp-ma-d@PCIEXFN/PCIFN, 1770 error.io.pcix.spl-comp-ta-d@PCIEXFN/PCIFN; 1771 1772prop error.io.pcix.uscmd@PCIEXFN (4)-> 1773 error.io.pciex.fatal@PCIEXFN, 1774 ereport.io.pci.sta@PCIEXFN, 1775 ereport.io.pciex.tl.ca@PCIEXFN, 1776 ereport.io.pciex.bdg.uscmd@PCIEXFN; 1777 1778prop error.io.pcix.uscmd@PCIEXFN { is_under(pciexrc, PCIEXFN) } (0)-> 1779 ereport.io.pci.sec-rta@pciexrc; 1780 1781/* 1782 * Similarly a child device may have responded with a master abort or 1783 * target abort to one of our split competions. The hardware just logs these. 1784 */ 1785prop error.io.pcix.spl-comp-ma-u@PCIEXFN/PCIFN (3)-> 1786 error.io.pciex.nonfatal@PCIEXFN, 1787 ereport.io.pcix.sec-spl-dis@PCIEXFN, 1788 ereport.io.pciex.bdg.sec-ma-sc@PCIEXFN; 1789 1790prop error.io.pcix.spl-comp-ma-u@PCIEXFN/PCIFN (0)-> 1791 ereport.io.pci.sec-ma@PCIEXFN; 1792 1793prop error.io.pcix.spl-comp-ta-u@PCIEXFN/PCIFN (4)-> 1794 error.io.pciex.nonfatal@PCIEXFN, 1795 ereport.io.pcix.sec-spl-dis@PCIEXFN, 1796 ereport.io.pciex.bdg.sec-ta-sc@PCIEXFN, 1797 ereport.io.pci.sec-rta@PCIEXFN; 1798 1799/* 1800 * SERR# is considered fatal 1801 */ 1802prop error.io.pci.serr-u@PCIEXFN/PCIFN (3)-> 1803 error.io.pciex.fatal@PCIEXFN, 1804 ereport.io.pci.sec-rserr@PCIEXFN, 1805 ereport.io.pciex.bdg.sec-serr@PCIEXFN; 1806 1807/* 1808 * Retry time-out is nonfatal. The initial requester has stopped retrying so 1809 * there's nothing else the hardware can do but flag the error. 1810 */ 1811prop error.io.pci.retry-to-u@PCIEXFN/PCIFN (2)-> 1812 error.io.pciex.nonfatal@PCIEXFN, 1813 ereport.io.pciex.bdg.sec-tex@PCIEXFN; 1814 1815prop error.io.pci.retry-to-u@PCIEXFN/PCIFN (0)-> 1816 ereport.io.pci.sta@PCIEXFN, 1817 ereport.io.pci.dto@PCIEXFN; 1818 1819prop error.io.pci.retry-to-u@PCIEXFN/PCIFN { 1820 is_under(pciexrc, PCIEXFN/PCIFN) } (0)-> 1821 ereport.io.pci.sec-rta@pciexrc; 1822 1823/* 1824 * A bad dma request (eg with invalid address) propagates onto pci express 1825 * as a bad dma request. The end result may be a master abort or target abort 1826 * (depending on whether the child is pci-x or pci). 1827 */ 1828prop error.io.pci.badreq-pw-u@PCIEXFN/PCIFN (0)-> 1829 ereport.io.pci.ma@PCIEXFN, 1830 ereport.io.pci.rta@PCIEXFN, 1831 ereport.io.pci.sec-sta@PCIEXFN; 1832 1833prop error.io.pci.badreq-pw-u@PCIEXFN/PCIFN { 1834 is_under(pciexrc, PCIEXFN/PCIFN) } (0)-> 1835 ereport.io.pciex.tl.ur@pciexrc, 1836 ereport.io.pciex.tl.ca@pciexrc, 1837 ereport.io.pci.sec-sta@pciexrc; 1838 1839prop error.io.pci.badreq-pw-u@PCIEXFN/PCIFN { IS_SD(PCIEXFN1) && 1840 is_under(PCIEXFN1, PCIEXFN/PCIFN) } (0)-> 1841 ereport.io.pciex.tl.ur@PCIEXFN1, 1842 ereport.io.pciex.tl.ca@PCIEXFN1, 1843 ereport.io.pci.sec-sta@PCIEXFN1, 1844 error.io.pciex.nonfatal@PCIEXFN1; 1845 1846prop error.io.pci.badreq-drw-u@PCIEXFN/PCIFN (0)-> 1847 ereport.io.pci.ma@PCIEXFN, 1848 ereport.io.pci.rta@PCIEXFN, 1849 ereport.io.pci.sec-sta@PCIEXFN; 1850 1851prop error.io.pci.badreq-drw-u@PCIEXFN/PCIFN { 1852 is_under(pciexrc, PCIEXFN/PCIFN) } (0)-> 1853 ereport.io.pciex.tl.ur@pciexrc, 1854 ereport.io.pciex.tl.ca@pciexrc, 1855 ereport.io.pci.sec-sta@pciexrc; 1856 1857prop error.io.pci.badreq-drw-u@PCIEXFN/PCIFN { IS_SD(PCIEXFN1) && 1858 is_under(PCIEXFN1, PCIEXFN/PCIFN) } (0)-> 1859 ereport.io.pciex.tl.ur@PCIEXFN1, 1860 ereport.io.pciex.tl.ca@PCIEXFN1, 1861 ereport.io.pci.sec-sta@PCIEXFN1, 1862 error.io.pciex.nonfatal@PCIEXFN1; 1863 1864/* 1865 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1866 * target- propagations 1867 * 1868 * A Root Complex driver may generate "target-" ereports when knowledge of the 1869 * physical address associated with a fault allows the target device to be 1870 * determined. This is not a requirement of the Diagnosis Engine, but can be 1871 * valuable when available. 1872 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1873 */ 1874event error.io.pci.target-ma-d@PCIEXFN/PCIEXFN; 1875event error.io.pci.target-rta-d@PCIEXFN/PCIEXFN; 1876event error.io.pci.target-ma-d@PCIEXFN/PCIFN; 1877event error.io.pci.target-rta-d@PCIEXFN/PCIFN; 1878 1879event ereport.io.pci.target-rta@PCIEXFN{within(5s)}; 1880event ereport.io.pci.target-ma@PCIEXFN{within(5s)}; 1881 1882prop error.io.pci.target-ma-d@PCIEXFN (1)-> 1883 error.io.pci.target-ma-d@PCIEXFN/PCIEXFNHZ; 1884 1885prop error.io.pci.target-ma-d@PCIEXFN (1)-> 1886 error.io.pci.target-ma-d@PCIEXFN/PCIFNHZ; 1887 1888prop error.io.pci.target-ma-d@PCIEXFN (0)-> 1889 ereport.io.pci.target-ma@PCIEXFN; 1890 1891prop error.io.pci.target-rta-d@PCIEXFN (1)-> 1892 error.io.pci.target-rta-d@PCIEXFN/PCIEXFNHZ; 1893 1894prop error.io.pci.target-rta-d@PCIEXFN (1)-> 1895 error.io.pci.target-rta-d@PCIEXFN/PCIFNHZ; 1896 1897prop error.io.pci.target-rta-d@PCIEXFN (0)-> 1898 ereport.io.pci.target-rta@PCIEXFN; 1899 1900/* 1901 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1902 * stub unused pciex-pci bridge ereports 1903 * - ignore usc/sec-unex-spl 1904 * - ignore sec-spl-or/sec-spl-dly as these aren't really faults (tuning info) 1905 * - ignore ecc.ue ereports (we get everything we need from dpe/mdpe) 1906 * - ignore ecc.ce ereports for now (could do serd on these) 1907 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1908 */ 1909 1910event ereport.io.pciex.bdg.usc@PCIEXFN{within(5s)}; 1911event ereport.io.pcix.sec-unex-spl@PCIEXFN{within(5s)}; 1912event ereport.io.pcix.sec-spl-or@PCIEXFN{within(5s)}; 1913event ereport.io.pcix.sec-spl-dly@PCIEXFN{within(5s)}; 1914event ereport.io.pcix.sec-ecc.ce-addr@PCIEXFN{within(5s)}; 1915event ereport.io.pcix.sec-ecc.ce-attr@PCIEXFN{within(5s)}; 1916event ereport.io.pcix.sec-ecc.ce-data@PCIEXFN{within(5s)}; 1917event ereport.io.pcix.sec-ecc.ue-addr@PCIEXFN{within(5s)}; 1918event ereport.io.pcix.sec-ecc.ue-attr@PCIEXFN{within(5s)}; 1919event ereport.io.pcix.sec-ecc.ue-data@PCIEXFN{within(5s)}; 1920event ereport.io.pcix.sec-s-ce@PCIEXFN{within(5s)}; 1921event ereport.io.pcix.sec-s-ue@PCIEXFN{within(5s)}; 1922 1923event upset.io.pciex.discard-bdg@PCIEXFN; 1924 1925prop upset.io.pciex.discard-bdg@PCIEXFN (1)-> 1926 ereport.io.pciex.bdg.usc@PCIEXFN, 1927 ereport.io.pcix.sec-unex-spl@PCIEXFN, 1928 ereport.io.pcix.sec-spl-or@PCIEXFN, 1929 ereport.io.pcix.sec-spl-dly@PCIEXFN, 1930 ereport.io.pcix.sec-ecc.ce-addr@PCIEXFN, 1931 ereport.io.pcix.sec-ecc.ce-attr@PCIEXFN, 1932 ereport.io.pcix.sec-ecc.ce-data@PCIEXFN, 1933 ereport.io.pcix.sec-ecc.ue-addr@PCIEXFN, 1934 ereport.io.pcix.sec-ecc.ue-attr@PCIEXFN, 1935 ereport.io.pcix.sec-ecc.ue-data@PCIEXFN, 1936 ereport.io.pcix.sec-s-ce@PCIEXFN, 1937 ereport.io.pcix.sec-s-ue@PCIEXFN; 1938