xref: /titanic_41/usr/src/uts/sun4v/sys/machasi.h (revision ea394cb00fd96864e34d2841b4a22357b621c78f)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 #ifndef _SYS_MACHASI_H
27 #define	_SYS_MACHASI_H
28 
29 /*
30  * alternate address space identifiers
31  *
32  * 0x00 - 0x2F are privileged
33  * 0x30 - 0x7f are hyperprivileged
34  * 0x80 - 0xFF can be used by users
35  */
36 
37 /*
38  * ASIs specific to sun4v compliant  processors.
39  */
40 
41 #ifdef __cplusplus
42 extern "C" {
43 #endif
44 
45 #define	ASI_BLK_AIUP		0x16	/* block as if user primary */
46 #define	ASI_BLK_AIUS		0x17	/* block as if user secondary */
47 #define	ASI_BLK_AIUPL		0x1E	/* block as if user primary little */
48 #define	ASI_BLK_AIUSL		0x1F	/* block as if user secondary little */
49 
50 #define	ASI_NQUAD_LD		0x24	/* 128-bit atomic load */
51 #define	ASI_NQUAD_LD_L		0x2C	/* 128-bit atomic load little */
52 #define	ASI_QUAD_LDD_PHYS	0x26	/* 128-bit physical atomic load */
53 #define	ASI_QUAD_LDD_PHYS_L	0x2E	/* 128-bit phys. atomic load little */
54 
55 #define	ASI_SCRATCHPAD		0x20	/* sun4v scratch pad registers ASI */
56 #define	ASI_MMU			0x21	/* sun4v ctx register ASI */
57 #define	ASI_MMU_CTX		ASI_MMU
58 
59 #define	ASI_QUEUE		0x25
60 
61 /*
62  * MMU fault status area (see sys/hypervisor_api.h for layout)
63  */
64 #define	MMU_FAULT_STATUS_AREA(REG)	\
65 	ldxa	[%g0]ASI_SCRATCHPAD, REG
66 
67 /*
68  * Scratch pad registers
69  * (0x0 through 0x18 guaranteed fast, rest may be slow)
70  */
71 #define	SCRATCHPAD_MMUMISSAREA	0x0	/* Shared with OBP - set by OBP */
72 #define	SCRATCHPAD_CPUID	0x8	/* Shared with OBP - set by HV */
73 #define	SCRATCHPAD_UTSBREG1	0x10
74 #define	SCRATCHPAD_UTSBREG2	0x18
75 					/* 0x20 & 0x28 HV only */
76 #define	SCRATCHPAD_UNUSED1	0x30
77 #define	SCRATCHPAD_UNUSED2	0x38	/* reserved for OBP */
78 
79 /*
80  * Ancillary state registers, for asrset_t
81  */
82 #define	ASR_GSR	(3)
83 
84 #ifdef __cplusplus
85 }
86 #endif
87 
88 #endif /* _SYS_MACHASI_H */
89