1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _SYS_MACHASI_H 28 #define _SYS_MACHASI_H 29 30 #pragma ident "%Z%%M% %I% %E% SMI" 31 32 /* 33 * alternate address space identifiers 34 * 35 * 0x00 - 0x2F are privileged 36 * 0x30 - 0x7f are hyperprivileged 37 * 0x80 - 0xFF can be used by users 38 */ 39 40 /* 41 * ASIs specific to sun4v compliant processors. 42 */ 43 44 #ifdef __cplusplus 45 extern "C" { 46 #endif 47 48 #define ASI_BLK_AIUP 0x16 /* block as if user primary */ 49 #define ASI_BLK_AIUS 0x17 /* block as if user secondary */ 50 #define ASI_BLK_AIUPL 0x1E /* block as if user primary little */ 51 #define ASI_BLK_AIUSL 0x1F /* block as if user secondary little */ 52 53 #define ASI_NQUAD_LD 0x24 /* 128-bit atomic load */ 54 #define ASI_NQUAD_LD_L 0x2C /* 128-bit atomic load little */ 55 #define ASI_QUAD_LDD_PHYS 0x26 /* 128-bit physical atomic load */ 56 #define ASI_QUAD_LDD_PHYS_L 0x2E /* 128-bit phys. atomic load little */ 57 58 #define ASI_SCRATCHPAD 0x20 /* sun4v scratch pad registers ASI */ 59 #define ASI_MMU 0x21 /* sun4v ctx register ASI */ 60 #define ASI_MMU_CTX ASI_MMU 61 62 #define ASI_QUEUE 0x25 63 64 /* 65 * MMU fault status area (see sys/hypervisor_api.h for layout) 66 */ 67 #define MMU_FAULT_STATUS_AREA(REG) \ 68 ldxa [%g0]ASI_SCRATCHPAD, REG 69 70 /* 71 * Scratch pad registers 72 * (0x0 through 0x18 guaranteed fast, rest may be slow) 73 */ 74 #define SCRATCHPAD_MMUMISSAREA 0x0 /* Shared with OBP - set by OBP */ 75 #define SCRATCHPAD_CPUID 0x8 /* Shared with OBP - set by HV */ 76 #define SCRATCHPAD_UTSBREG1 0x10 77 #define SCRATCHPAD_UTSBREG2 0x18 78 /* 0x20 & 0x28 HV only */ 79 #define SCRATCHPAD_UNUSED1 0x30 80 #define SCRATCHPAD_UNUSED2 0x38 /* reserved for OBP */ 81 82 /* 83 * Ancillary state registers, for asrset_t 84 */ 85 #define ASR_GSR (3) 86 87 #ifdef __cplusplus 88 } 89 #endif 90 91 #endif /* _SYS_MACHASI_H */ 92