xref: /titanic_41/usr/src/uts/sun4v/sys/cpu_module.h (revision 179184d3e9bc6ab146407a62a8461338687b1908)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 #ifndef _SYS_CPU_MODULE_H
27 #define	_SYS_CPU_MODULE_H
28 
29 #pragma ident	"%Z%%M%	%I%	%E% SMI"
30 
31 #include <sys/pte.h>
32 #include <sys/async.h>
33 #include <sys/x_call.h>
34 #include <sys/conf.h>
35 #include <sys/obpdefs.h>
36 
37 #ifdef	__cplusplus
38 extern "C" {
39 #endif
40 
41 
42 #ifdef _KERNEL
43 
44 /*
45  * The are functions that are expected of the cpu modules.
46  */
47 
48 extern struct module_ops *moduleops;
49 
50 struct kdi;
51 
52 /*
53  * module initialization
54  */
55 void	cpu_setup(void);
56 
57 /*
58  * set CPU implementation details
59  *
60  * mmu_init_mmu_page_sizes changes the mmu_page_sizes variable from
61  *	The default 4 page sizes to 6 page sizes for Panther-only domains,
62  *	and is called from fillsysinfo.c:check_cpus_set at early bootup time.
63  */
64 struct cpu_node;
65 void	cpu_fiximp(struct cpu_node *cpunode);
66 #pragma weak mmu_init_mmu_page_sizes
67 int	mmu_init_mmu_page_sizes(int cinfo);
68 
69 /*
70  * virtual demap flushes (tlbs & virtual tag caches)
71  */
72 void	vtag_flushpage(caddr_t addr, uint64_t sfmmup);
73 void	vtag_flushall(void);
74 #pragma weak vtag_flushall_uctxs
75 void    vtag_flushall_uctxs(void);
76 void	vtag_flushpage_tl1(uint64_t addr,  uint64_t sfmmup);
77 void	vtag_flush_pgcnt_tl1(uint64_t addr, uint64_t sfmmup_pgcnt);
78 void	vtag_flushall_tl1(uint64_t dummy1, uint64_t dummy2);
79 void	vtag_unmap_perm_tl1(uint64_t addr, uint64_t ctx);
80 
81 /*
82  * Calculate, set optimal dtlb pagesize, for ISM and mpss, to support
83  * cpus with non-fully-associative dtlbs.
84  */
85 extern uchar_t *ctx_pgsz_array;
86 
87 /*
88  * flush instruction cache if needed
89  */
90 void	flush_instr_mem(caddr_t addr, size_t len);
91 
92 /*
93  * Cpu-specific error and ecache handling routines
94  */
95 #pragma weak itlb_parity_trap
96 void itlb_parity_trap(void);
97 
98 #pragma weak dtlb_parity_trap
99 void dtlb_parity_trap(void);
100 
101 /*
102  * this symbol appears as a second label for vtag_flushall
103  * only for cpus that implement DEMAP_ALL_TYPE
104  */
105 #pragma	weak demap_all
106 
107 /*
108  * change cpu speed
109  */
110 void	cpu_change_speed(uint64_t divisor, uint64_t arg2);
111 
112 /*
113  * flush routine
114  */
115 #pragma weak dtrace_flush_sec
116 void	dtrace_flush_sec(uintptr_t);
117 
118 /*
119  * Cpu private initialize/uninitialize, including ecache scrubber.
120  */
121 void	cpu_init_private(struct cpu *);
122 void	cpu_uninit_private(struct cpu *);
123 
124 #pragma weak cpu_mp_init
125 void    cpu_mp_init(void);
126 
127 #pragma weak cpu_feature_init
128 void    cpu_feature_init(void);
129 
130 #pragma weak cpu_error_init
131 void	cpu_error_init(int);
132 
133 extern int kzero(void *addr, size_t count);
134 extern void uzero(void *addr, size_t count);
135 extern void bzero(void *addr, size_t count);
136 
137 /*
138  * trapstat interface and cpu_trapstat_conf commands
139  */
140 #define	CPU_TSTATCONF_INIT	1
141 #define	CPU_TSTATCONF_FINI	2
142 #define	CPU_TSTATCONF_ENABLE	3
143 #define	CPU_TSTATCONF_DISABLE	4
144 
145 int	cpu_trapstat_conf(int cmd);
146 void	cpu_trapstat_data(void *buf, uint_t pgszs);
147 
148 #define	NO_EU_MAPPING_FOUND		0xffffffff
149 /*
150  * Default MMU pagesize mask for sun4v architecture.
151  */
152 #define	DEFAULT_SUN4V_MMU_PAGESIZE_MASK	((1 << TTE8K) | (1 << TTE64K) \
153 					    | (1 << TTE4M))
154 
155 void	cpu_setup_common(char **);
156 
157 boolean_t	broken_md_flag;
158 int	va_bits;
159 
160 #endif /* _KERNEL */
161 
162 #ifdef	__cplusplus
163 }
164 #endif
165 
166 #endif /* _SYS_CPU_MODULE_H */
167