xref: /titanic_41/usr/src/uts/sun4v/os/mach_cpu_states.c (revision 8b464eb836173b92f2b7a65623cd06c8c3c59289)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 #pragma ident	"%Z%%M%	%I%	%E% SMI"
27 
28 #include <sys/types.h>
29 #include <sys/systm.h>
30 #include <sys/archsystm.h>
31 #include <sys/t_lock.h>
32 #include <sys/uadmin.h>
33 #include <sys/panic.h>
34 #include <sys/reboot.h>
35 #include <sys/autoconf.h>
36 #include <sys/machsystm.h>
37 #include <sys/promif.h>
38 #include <sys/membar.h>
39 #include <vm/hat_sfmmu.h>
40 #include <sys/cpu_module.h>
41 #include <sys/cpu_sgnblk_defs.h>
42 #include <sys/intreg.h>
43 #include <sys/consdev.h>
44 #include <sys/kdi_impl.h>
45 #include <sys/traptrace.h>
46 #include <sys/hypervisor_api.h>
47 #include <sys/vmsystm.h>
48 #include <sys/dtrace.h>
49 #include <sys/xc_impl.h>
50 #include <sys/callb.h>
51 #include <sys/mdesc.h>
52 #include <sys/mach_descrip.h>
53 #include <sys/wdt.h>
54 
55 /*
56  * hvdump_buf_va is a pointer to the currently-configured hvdump_buf.
57  * A value of NULL indicates that this area is not configured.
58  * hvdump_buf_sz is tunable but will be clamped to HVDUMP_SIZE_MAX.
59  */
60 
61 caddr_t hvdump_buf_va;
62 uint64_t hvdump_buf_sz = HVDUMP_SIZE_DEFAULT;
63 static uint64_t hvdump_buf_pa;
64 
65 u_longlong_t panic_tick;
66 
67 extern u_longlong_t gettick();
68 static void reboot_machine(char *);
69 static void update_hvdump_buffer(void);
70 
71 /*
72  * For xt_sync synchronization.
73  */
74 extern uint64_t xc_tick_limit;
75 extern uint64_t xc_tick_jump_limit;
76 
77 /*
78  * We keep our own copies, used for cache flushing, because we can be called
79  * before cpu_fiximpl().
80  */
81 static int kdi_dcache_size;
82 static int kdi_dcache_linesize;
83 static int kdi_icache_size;
84 static int kdi_icache_linesize;
85 
86 /*
87  * Assembly support for generic modules in sun4v/ml/mach_xc.s
88  */
89 extern void init_mondo_nocheck(xcfunc_t *func, uint64_t arg1, uint64_t arg2);
90 extern void kdi_flush_idcache(int, int, int, int);
91 extern uint64_t get_cpuaddr(uint64_t, uint64_t);
92 
93 /*
94  * Machine dependent code to reboot.
95  * "mdep" is interpreted as a character pointer; if non-null, it is a pointer
96  * to a string to be used as the argument string when rebooting.
97  *
98  * "invoke_cb" is a boolean. It is set to true when mdboot() can safely
99  * invoke CB_CL_MDBOOT callbacks before shutting the system down, i.e. when
100  * we are in a normal shutdown sequence (interrupts are not blocked, the
101  * system is not panic'ing or being suspended).
102  */
103 /*ARGSUSED*/
104 void
105 mdboot(int cmd, int fcn, char *bootstr, boolean_t invoke_cb)
106 {
107 	extern void pm_cfb_check_and_powerup(void);
108 
109 	/*
110 	 * XXX - rconsvp is set to NULL to ensure that output messages
111 	 * are sent to the underlying "hardware" device using the
112 	 * monitor's printf routine since we are in the process of
113 	 * either rebooting or halting the machine.
114 	 */
115 	rconsvp = NULL;
116 
117 	/*
118 	 * At a high interrupt level we can't:
119 	 *	1) bring up the console
120 	 * or
121 	 *	2) wait for pending interrupts prior to redistribution
122 	 *	   to the current CPU
123 	 *
124 	 * so we do them now.
125 	 */
126 	pm_cfb_check_and_powerup();
127 
128 	/* make sure there are no more changes to the device tree */
129 	devtree_freeze();
130 
131 	if (invoke_cb)
132 		(void) callb_execute_class(CB_CL_MDBOOT, NULL);
133 
134 	/*
135 	 * Clear any unresolved UEs from memory.
136 	 */
137 	page_retire_mdboot();
138 
139 	/*
140 	 * stop other cpus which also raise our priority. since there is only
141 	 * one active cpu after this, and our priority will be too high
142 	 * for us to be preempted, we're essentially single threaded
143 	 * from here on out.
144 	 */
145 	stop_other_cpus();
146 
147 	/*
148 	 * try and reset leaf devices.  reset_leaves() should only
149 	 * be called when there are no other threads that could be
150 	 * accessing devices
151 	 */
152 	reset_leaves();
153 
154 	watchdog_clear();
155 
156 	if (fcn == AD_HALT) {
157 		halt((char *)NULL);
158 	} else if (fcn == AD_POWEROFF) {
159 		power_down(NULL);
160 	} else {
161 		if (bootstr == NULL) {
162 			switch (fcn) {
163 
164 			case AD_BOOT:
165 				bootstr = "";
166 				break;
167 
168 			case AD_IBOOT:
169 				bootstr = "-a";
170 				break;
171 
172 			case AD_SBOOT:
173 				bootstr = "-s";
174 				break;
175 
176 			case AD_SIBOOT:
177 				bootstr = "-sa";
178 				break;
179 			default:
180 				cmn_err(CE_WARN,
181 				    "mdboot: invalid function %d", fcn);
182 				bootstr = "";
183 				break;
184 			}
185 		}
186 		reboot_machine(bootstr);
187 	}
188 	/* MAYBE REACHED */
189 }
190 
191 /* mdpreboot - may be called prior to mdboot while root fs still mounted */
192 /*ARGSUSED*/
193 void
194 mdpreboot(int cmd, int fcn, char *bootstr)
195 {
196 }
197 
198 /*
199  * Halt the machine and then reboot with the device
200  * and arguments specified in bootstr.
201  */
202 static void
203 reboot_machine(char *bootstr)
204 {
205 	flush_windows();
206 	stop_other_cpus();		/* send stop signal to other CPUs */
207 	prom_printf("rebooting...\n");
208 	/*
209 	 * For platforms that use CPU signatures, we
210 	 * need to set the signature block to OS and
211 	 * the state to exiting for all the processors.
212 	 */
213 	CPU_SIGNATURE(OS_SIG, SIGST_EXIT, SIGSUBST_REBOOT, -1);
214 	prom_reboot(bootstr);
215 	/*NOTREACHED*/
216 }
217 
218 /*
219  * We use the x-trap mechanism and idle_stop_xcall() to stop the other CPUs.
220  * Once in panic_idle() they raise spl, record their location, and spin.
221  */
222 static void
223 panic_idle(void)
224 {
225 	(void) spl7();
226 
227 	debug_flush_windows();
228 	(void) setjmp(&curthread->t_pcb);
229 
230 	CPU->cpu_m.in_prom = 1;
231 	membar_stld();
232 
233 	for (;;);
234 }
235 
236 /*
237  * Force the other CPUs to trap into panic_idle(), and then remove them
238  * from the cpu_ready_set so they will no longer receive cross-calls.
239  */
240 /*ARGSUSED*/
241 void
242 panic_stopcpus(cpu_t *cp, kthread_t *t, int spl)
243 {
244 	cpuset_t cps;
245 	int i;
246 
247 	(void) splzs();
248 	CPUSET_ALL_BUT(cps, cp->cpu_id);
249 	xt_some(cps, (xcfunc_t *)idle_stop_xcall, (uint64_t)&panic_idle, NULL);
250 
251 	for (i = 0; i < NCPU; i++) {
252 		if (i != cp->cpu_id && CPU_XCALL_READY(i)) {
253 			int ntries = 0x10000;
254 
255 			while (!cpu[i]->cpu_m.in_prom && ntries) {
256 				DELAY(50);
257 				ntries--;
258 			}
259 
260 			if (!cpu[i]->cpu_m.in_prom)
261 				printf("panic: failed to stop cpu%d\n", i);
262 
263 			cpu[i]->cpu_flags &= ~CPU_READY;
264 			cpu[i]->cpu_flags |= CPU_QUIESCED;
265 			CPUSET_DEL(cpu_ready_set, cpu[i]->cpu_id);
266 		}
267 	}
268 }
269 
270 /*
271  * Platform callback following each entry to panicsys().  If we've panicked at
272  * level 14, we examine t_panic_trap to see if a fatal trap occurred.  If so,
273  * we disable further %tick_cmpr interrupts.  If not, an explicit call to panic
274  * was made and so we re-enqueue an interrupt request structure to allow
275  * further level 14 interrupts to be processed once we lower PIL.  This allows
276  * us to handle panics from the deadman() CY_HIGH_LEVEL cyclic.
277  */
278 void
279 panic_enter_hw(int spl)
280 {
281 	if (!panic_tick) {
282 		panic_tick = gettick();
283 		if (mach_htraptrace_enable) {
284 			uint64_t prev_freeze;
285 
286 			/*  there are no possible error codes for this hcall */
287 			(void) hv_ttrace_freeze((uint64_t)TRAP_TFREEZE_ALL,
288 			    &prev_freeze);
289 		}
290 #ifdef TRAPTRACE
291 		TRAPTRACE_FREEZE;
292 #endif
293 	}
294 	if (spl == ipltospl(PIL_14)) {
295 		uint_t opstate = disable_vec_intr();
296 
297 		if (curthread->t_panic_trap != NULL) {
298 			tickcmpr_disable();
299 			intr_dequeue_req(PIL_14, cbe_level14_inum);
300 		} else {
301 			if (!tickcmpr_disabled())
302 				intr_enqueue_req(PIL_14, cbe_level14_inum);
303 			/*
304 			 * Clear SOFTINT<14>, SOFTINT<0> (TICK_INT)
305 			 * and SOFTINT<16> (STICK_INT) to indicate
306 			 * that the current level 14 has been serviced.
307 			 */
308 			wr_clr_softint((1 << PIL_14) |
309 				TICK_INT_MASK | STICK_INT_MASK);
310 		}
311 
312 		enable_vec_intr(opstate);
313 	}
314 }
315 
316 /*
317  * Miscellaneous hardware-specific code to execute after panicstr is set
318  * by the panic code: we also print and record PTL1 panic information here.
319  */
320 /*ARGSUSED*/
321 void
322 panic_quiesce_hw(panic_data_t *pdp)
323 {
324 	extern uint_t getpstate(void);
325 	extern void setpstate(uint_t);
326 
327 	/*
328 	 * Turn off TRAPTRACE and save the current %tick value in panic_tick.
329 	 */
330 	if (!panic_tick) {
331 		panic_tick = gettick();
332 		if (mach_htraptrace_enable) {
333 			uint64_t prev_freeze;
334 
335 			/*  there are no possible error codes for this hcall */
336 			(void) hv_ttrace_freeze((uint64_t)TRAP_TFREEZE_ALL,
337 			    &prev_freeze);
338 		}
339 #ifdef TRAPTRACE
340 		TRAPTRACE_FREEZE;
341 #endif
342 	}
343 	/*
344 	 * For Platforms that use CPU signatures, we
345 	 * need to set the signature block to OS, the state to
346 	 * exiting, and the substate to panic for all the processors.
347 	 */
348 	CPU_SIGNATURE(OS_SIG, SIGST_EXIT, SIGSUBST_PANIC, -1);
349 
350 	update_hvdump_buffer();
351 
352 	/*
353 	 * Disable further ECC errors from the bus nexus.
354 	 */
355 	(void) bus_func_invoke(BF_TYPE_ERRDIS);
356 
357 	/*
358 	 * Redirect all interrupts to the current CPU.
359 	 */
360 	intr_redist_all_cpus_shutdown();
361 
362 	/*
363 	 * This call exists solely to support dumps to network
364 	 * devices after sync from OBP.
365 	 *
366 	 * If we came here via the sync callback, then on some
367 	 * platforms, interrupts may have arrived while we were
368 	 * stopped in OBP.  OBP will arrange for those interrupts to
369 	 * be redelivered if you say "go", but not if you invoke a
370 	 * client callback like 'sync'.	 For some dump devices
371 	 * (network swap devices), we need interrupts to be
372 	 * delivered in order to dump, so we have to call the bus
373 	 * nexus driver to reset the interrupt state machines.
374 	 */
375 	(void) bus_func_invoke(BF_TYPE_RESINTR);
376 
377 	setpstate(getpstate() | PSTATE_IE);
378 }
379 
380 /*
381  * Platforms that use CPU signatures need to set the signature block to OS and
382  * the state to exiting for all CPUs. PANIC_CONT indicates that we're about to
383  * write the crash dump, which tells the SSP/SMS to begin a timeout routine to
384  * reboot the machine if the dump never completes.
385  */
386 /*ARGSUSED*/
387 void
388 panic_dump_hw(int spl)
389 {
390 	CPU_SIGNATURE(OS_SIG, SIGST_EXIT, SIGSUBST_DUMP, -1);
391 }
392 
393 /*
394  * for ptl1_panic
395  */
396 void
397 ptl1_init_cpu(struct cpu *cpu)
398 {
399 	ptl1_state_t *pstate = &cpu->cpu_m.ptl1_state;
400 
401 	/*CONSTCOND*/
402 	if (sizeof (struct cpu) + PTL1_SSIZE > CPU_ALLOC_SIZE) {
403 		panic("ptl1_init_cpu: not enough space left for ptl1_panic "
404 		    "stack, sizeof (struct cpu) = %lu",
405 		    (unsigned long)sizeof (struct cpu));
406 	}
407 
408 	pstate->ptl1_stktop = (uintptr_t)cpu + CPU_ALLOC_SIZE;
409 	cpu_pa[cpu->cpu_id] = va_to_pa(cpu);
410 }
411 
412 void
413 ptl1_panic_handler(ptl1_state_t *pstate)
414 {
415 	static const char *ptl1_reasons[] = {
416 #ifdef	PTL1_PANIC_DEBUG
417 		"trap for debug purpose",	/* PTL1_BAD_DEBUG */
418 #else
419 		"unknown trap",			/* PTL1_BAD_DEBUG */
420 #endif
421 		"register window trap",		/* PTL1_BAD_WTRAP */
422 		"kernel MMU miss",		/* PTL1_BAD_KMISS */
423 		"kernel protection fault",	/* PTL1_BAD_KPROT_FAULT */
424 		"ISM MMU miss",			/* PTL1_BAD_ISM */
425 		"kernel MMU trap",		/* PTL1_BAD_MMUTRAP */
426 		"kernel trap handler state",	/* PTL1_BAD_TRAP */
427 		"floating point trap",		/* PTL1_BAD_FPTRAP */
428 #ifdef	DEBUG
429 		"pointer to intr_vec",		/* PTL1_BAD_INTR_VEC */
430 #else
431 		"unknown trap",			/* PTL1_BAD_INTR_VEC */
432 #endif
433 #ifdef	TRAPTRACE
434 		"TRACE_PTR state",		/* PTL1_BAD_TRACE_PTR */
435 #else
436 		"unknown trap",			/* PTL1_BAD_TRACE_PTR */
437 #endif
438 		"stack overflow",		/* PTL1_BAD_STACK */
439 		"DTrace flags",			/* PTL1_BAD_DTRACE_FLAGS */
440 		"attempt to steal locked ctx",  /* PTL1_BAD_CTX_STEAL */
441 		"CPU ECC error loop",		/* PTL1_BAD_ECC */
442 		"unexpected error from hypervisor call", /* PTL1_BAD_HCALL */
443 		"unexpected global level(%gl)", /* PTL1_BAD_GL */
444 		"Watchdog Reset", 		/* PTL1_BAD_WATCHDOG */
445 		"unexpected RED mode trap", 	/* PTL1_BAD_RED */
446 		"return value EINVAL from hcall: "\
447 		    "UNMAP_PERM_ADDR",	/* PTL1_BAD_HCALL_UNMAP_PERM_EINVAL */
448 		"return value ENOMAP from hcall: "\
449 		    "UNMAP_PERM_ADDR", /* PTL1_BAD_HCALL_UNMAP_PERM_ENOMAP */
450 	};
451 
452 	uint_t reason = pstate->ptl1_regs.ptl1_gregs[0].ptl1_g1;
453 	uint_t tl = pstate->ptl1_regs.ptl1_trap_regs[0].ptl1_tl;
454 	struct trap_info ti = { 0 };
455 
456 	/*
457 	 * Use trap_info for a place holder to call panic_savetrap() and
458 	 * panic_showtrap() to save and print out ptl1_panic information.
459 	 */
460 	if (curthread->t_panic_trap == NULL)
461 		curthread->t_panic_trap = &ti;
462 
463 	if (reason < sizeof (ptl1_reasons) / sizeof (ptl1_reasons[0]))
464 		panic("bad %s at TL %u", ptl1_reasons[reason], tl);
465 	else
466 		panic("ptl1_panic reason 0x%x at TL %u", reason, tl);
467 }
468 
469 void
470 clear_watchdog_on_exit(void)
471 {
472 	prom_printf("Debugging requested; hardware watchdog suspended.\n");
473 	(void) watchdog_suspend();
474 }
475 
476 /*
477  * Restore the watchdog timer when returning from a debugger
478  * after a panic or L1-A and resume watchdog pat.
479  */
480 void
481 restore_watchdog_on_entry()
482 {
483 	watchdog_resume();
484 }
485 
486 int
487 kdi_watchdog_disable(void)
488 {
489 	watchdog_suspend();
490 
491 	return (0);
492 }
493 
494 void
495 kdi_watchdog_restore(void)
496 {
497 	watchdog_resume();
498 }
499 
500 void
501 mach_dump_buffer_init(void)
502 {
503 	uint64_t  ret, minsize = 0;
504 
505 	if (hvdump_buf_sz > HVDUMP_SIZE_MAX)
506 		hvdump_buf_sz = HVDUMP_SIZE_MAX;
507 
508 	hvdump_buf_va = contig_mem_alloc_align(hvdump_buf_sz, PAGESIZE);
509 	if (hvdump_buf_va == NULL)
510 		return;
511 
512 	hvdump_buf_pa = va_to_pa(hvdump_buf_va);
513 
514 	ret = hv_dump_buf_update(hvdump_buf_pa, hvdump_buf_sz,
515 	    &minsize);
516 
517 	if (ret != H_EOK) {
518 		contig_mem_free(hvdump_buf_va, hvdump_buf_sz);
519 		hvdump_buf_va = NULL;
520 		cmn_err(CE_NOTE, "!Error in setting up hvstate"
521 		    "dump buffer. Error = 0x%lx, size = 0x%lx,"
522 		    "buf_pa = 0x%lx", ret, hvdump_buf_sz,
523 		    hvdump_buf_pa);
524 
525 		if (ret == H_EINVAL) {
526 			cmn_err(CE_NOTE, "!Buffer size too small."
527 			    "Available buffer size = 0x%lx,"
528 			    "Minimum buffer size required = 0x%lx",
529 			    hvdump_buf_sz, minsize);
530 		}
531 	}
532 }
533 
534 
535 static void
536 update_hvdump_buffer(void)
537 {
538 	uint64_t ret, dummy_val;
539 
540 	if (hvdump_buf_va == NULL)
541 		return;
542 
543 	ret = hv_dump_buf_update(hvdump_buf_pa, hvdump_buf_sz,
544 	    &dummy_val);
545 	if (ret != H_EOK) {
546 		cmn_err(CE_NOTE, "!Cannot update hvstate dump"
547 		    "buffer. Error = 0x%lx", ret);
548 	}
549 }
550 
551 
552 static int
553 getintprop(pnode_t node, char *name, int deflt)
554 {
555 	int	value;
556 
557 	switch (prom_getproplen(node, name)) {
558 	case 0:
559 		value = 1;	/* boolean properties */
560 		break;
561 
562 	case sizeof (int):
563 		(void) prom_getprop(node, name, (caddr_t)&value);
564 		break;
565 
566 	default:
567 		value = deflt;
568 		break;
569 	}
570 
571 	return (value);
572 }
573 
574 /*
575  * Called by setcpudelay
576  */
577 void
578 cpu_init_tick_freq(void)
579 {
580 	md_t *mdp;
581 	mde_cookie_t rootnode;
582 	int		listsz;
583 	mde_cookie_t	*listp = NULL;
584 	int	num_nodes;
585 	uint64_t stick_prop;
586 
587 	if (broken_md_flag) {
588 		sys_tick_freq = cpunodes[CPU->cpu_id].clock_freq;
589 		return;
590 	}
591 
592 	if ((mdp = md_get_handle()) == NULL)
593 		panic("stick_frequency property not found in MD");
594 
595 	rootnode = md_root_node(mdp);
596 	ASSERT(rootnode != MDE_INVAL_ELEM_COOKIE);
597 
598 	num_nodes = md_node_count(mdp);
599 
600 	ASSERT(num_nodes > 0);
601 	listsz = num_nodes * sizeof (mde_cookie_t);
602 	listp = (mde_cookie_t *)prom_alloc((caddr_t)0, listsz, 0);
603 
604 	if (listp == NULL)
605 		panic("cannot allocate list for MD properties");
606 
607 	num_nodes = md_scan_dag(mdp, rootnode, md_find_name(mdp, "platform"),
608 	    md_find_name(mdp, "fwd"), listp);
609 
610 	ASSERT(num_nodes == 1);
611 
612 	if (md_get_prop_val(mdp, *listp, "stick-frequency", &stick_prop) != 0)
613 		panic("stick_frequency property not found in MD");
614 
615 	sys_tick_freq = stick_prop;
616 
617 	prom_free((caddr_t)listp, listsz);
618 	(void) md_fini_handle(mdp);
619 }
620 
621 int shipit(int n, uint64_t cpu_list_ra);
622 extern uint64_t xc_tick_limit;
623 extern uint64_t xc_tick_jump_limit;
624 
625 #ifdef DEBUG
626 #define	SEND_MONDO_STATS	1
627 #endif
628 
629 #ifdef SEND_MONDO_STATS
630 uint32_t x_one_stimes[64];
631 uint32_t x_one_ltimes[16];
632 uint32_t x_set_stimes[64];
633 uint32_t x_set_ltimes[16];
634 uint32_t x_set_cpus[NCPU];
635 #endif
636 
637 void
638 send_one_mondo(int cpuid)
639 {
640 	int retries, stat;
641 	uint64_t starttick, endtick, tick, lasttick;
642 	struct machcpu	*mcpup = &(CPU->cpu_m);
643 
644 	CPU_STATS_ADDQ(CPU, sys, xcalls, 1);
645 	starttick = lasttick = gettick();
646 	mcpup->cpu_list[0] = (uint16_t)cpuid;
647 	stat = shipit(1, mcpup->cpu_list_ra);
648 	endtick = starttick + xc_tick_limit;
649 	retries = 0;
650 	while (stat != H_EOK) {
651 		if (stat != H_EWOULDBLOCK) {
652 			if (panic_quiesce)
653 				return;
654 			if (stat == H_ECPUERROR)
655 				cmn_err(CE_PANIC, "send_one_mondo: "
656 				    "cpuid: 0x%x has been marked in "
657 				    "error", cpuid);
658 			else
659 				cmn_err(CE_PANIC, "send_one_mondo: "
660 				    "unexpected hypervisor error 0x%x "
661 				    "while sending a mondo to cpuid: "
662 				    "0x%x", stat, cpuid);
663 		}
664 		tick = gettick();
665 		/*
666 		 * If there is a big jump between the current tick
667 		 * count and lasttick, we have probably hit a break
668 		 * point.  Adjust endtick accordingly to avoid panic.
669 		 */
670 		if (tick > (lasttick + xc_tick_jump_limit))
671 			endtick += (tick - lasttick);
672 		lasttick = tick;
673 		if (tick > endtick) {
674 			if (panic_quiesce)
675 				return;
676 			cmn_err(CE_PANIC, "send mondo timeout "
677 			    "(target 0x%x) [retries: 0x%x hvstat: 0x%x]",
678 			    cpuid, retries, stat);
679 		}
680 		drv_usecwait(1);
681 		stat = shipit(1, mcpup->cpu_list_ra);
682 		retries++;
683 	}
684 #ifdef SEND_MONDO_STATS
685 	{
686 		uint64_t n = gettick() - starttick;
687 		if (n < 8192)
688 			x_one_stimes[n >> 7]++;
689 		else if (n < 15*8192)
690 			x_one_ltimes[n >> 13]++;
691 		else
692 			x_one_ltimes[0xf]++;
693 	}
694 #endif
695 }
696 
697 void
698 send_mondo_set(cpuset_t set)
699 {
700 	uint64_t starttick, endtick, tick, lasttick;
701 	uint_t largestid, smallestid;
702 	int i, j;
703 	int ncpuids = 0;
704 	int shipped = 0;
705 	int retries = 0;
706 	struct machcpu	*mcpup = &(CPU->cpu_m);
707 
708 	ASSERT(!CPUSET_ISNULL(set));
709 	CPUSET_BOUNDS(set, smallestid, largestid);
710 	if (smallestid == CPUSET_NOTINSET) {
711 		return;
712 	}
713 
714 	starttick = lasttick = gettick();
715 	endtick = starttick + xc_tick_limit;
716 
717 	/*
718 	 * Assemble CPU list for HV argument. We already know
719 	 * smallestid and largestid are members of set.
720 	 */
721 	mcpup->cpu_list[ncpuids++] = (uint16_t)smallestid;
722 	if (largestid != smallestid) {
723 		for (i = smallestid+1; i <= largestid-1; i++) {
724 			if (CPU_IN_SET(set, i)) {
725 				mcpup->cpu_list[ncpuids++] = (uint16_t)i;
726 			}
727 		}
728 		mcpup->cpu_list[ncpuids++] = (uint16_t)largestid;
729 	}
730 
731 	do {
732 		int stat;
733 
734 		stat = shipit(ncpuids, mcpup->cpu_list_ra);
735 		if (stat == H_EOK) {
736 			shipped += ncpuids;
737 			break;
738 		}
739 
740 		/*
741 		 * Either not all CPU mondos were sent, or an
742 		 * error occurred. CPUs that were sent mondos
743 		 * have their CPU IDs overwritten in cpu_list.
744 		 * Reset cpu_list so that it only holds those
745 		 * CPU IDs that still need to be sent.
746 		 */
747 		for (i = 0, j = 0; i < ncpuids; i++) {
748 			if (mcpup->cpu_list[i] == HV_SEND_MONDO_ENTRYDONE) {
749 				shipped++;
750 			} else {
751 				mcpup->cpu_list[j++] = mcpup->cpu_list[i];
752 			}
753 		}
754 		ncpuids = j;
755 
756 		/*
757 		 * Now handle possible errors returned
758 		 * from hypervisor.
759 		 */
760 		if (stat == H_ECPUERROR) {
761 			int errorcpus;
762 
763 			if (!panic_quiesce)
764 				cmn_err(CE_CONT, "send_mondo_set: cpuid(s) ");
765 
766 			/*
767 			 * Remove any CPUs in the error state from
768 			 * cpu_list. At this point cpu_list only
769 			 * contains the CPU IDs for mondos not
770 			 * succesfully sent.
771 			 */
772 			for (i = 0, errorcpus = 0; i < ncpuids; i++) {
773 				uint64_t state = CPU_STATE_INVALID;
774 				uint16_t id = mcpup->cpu_list[i];
775 
776 				(void) hv_cpu_state(id, &state);
777 				if (state == CPU_STATE_ERROR) {
778 					if (!panic_quiesce)
779 						cmn_err(CE_CONT, "0x%x ", id);
780 					errorcpus++;
781 				} else if (errorcpus > 0) {
782 					mcpup->cpu_list[i - errorcpus] =
783 					    mcpup->cpu_list[i];
784 				}
785 			}
786 			ncpuids -= errorcpus;
787 
788 			if (!panic_quiesce) {
789 				if (errorcpus == 0) {
790 					cmn_err(CE_CONT, "<none> have been "
791 					    "marked in error\n");
792 					cmn_err(CE_PANIC, "send_mondo_set: "
793 					    "hypervisor returned "
794 					    "H_ECPUERROR but no CPU in "
795 					    "cpu_list in error state");
796 				} else {
797 					cmn_err(CE_CONT, "have been marked in "
798 					    "error\n");
799 					cmn_err(CE_PANIC, "send_mondo_set: "
800 					    "CPU(s) in error state");
801 				}
802 			}
803 		} else if (stat != H_EWOULDBLOCK) {
804 			if (panic_quiesce)
805 				return;
806 			/*
807 			 * For all other errors, panic.
808 			 */
809 			cmn_err(CE_CONT, "send_mondo_set: unexpected "
810 			    "hypervisor error 0x%x while sending a "
811 			    "mondo to cpuid(s):", stat);
812 			for (i = 0; i < ncpuids; i++) {
813 				cmn_err(CE_CONT, " 0x%x", mcpup->cpu_list[i]);
814 			}
815 			cmn_err(CE_CONT, "\n");
816 			cmn_err(CE_PANIC, "send_mondo_set: unexpected "
817 			    "hypervisor error");
818 		}
819 
820 		tick = gettick();
821 		/*
822 		 * If there is a big jump between the current tick
823 		 * count and lasttick, we have probably hit a break
824 		 * point.  Adjust endtick accordingly to avoid panic.
825 		 */
826 		if (tick > (lasttick + xc_tick_jump_limit))
827 			endtick += (tick - lasttick);
828 		lasttick = tick;
829 		if (tick > endtick) {
830 			if (panic_quiesce)
831 				return;
832 			cmn_err(CE_CONT, "send mondo timeout "
833 			    "[retries: 0x%x]  cpuids: ", retries);
834 			for (i = 0; i < ncpuids; i++)
835 				cmn_err(CE_CONT, " 0x%x", mcpup->cpu_list[i]);
836 			cmn_err(CE_CONT, "\n");
837 			cmn_err(CE_PANIC, "send_mondo_set: timeout");
838 		}
839 
840 		while (gettick() < (tick + sys_clock_mhz))
841 			;
842 		retries++;
843 	} while (ncpuids > 0);
844 
845 	CPU_STATS_ADDQ(CPU, sys, xcalls, shipped);
846 
847 #ifdef SEND_MONDO_STATS
848 	{
849 		uint64_t n = gettick() - starttick;
850 		if (n < 8192)
851 			x_set_stimes[n >> 7]++;
852 		else if (n < 15*8192)
853 			x_set_ltimes[n >> 13]++;
854 		else
855 			x_set_ltimes[0xf]++;
856 	}
857 	x_set_cpus[shipped]++;
858 #endif
859 }
860 
861 void
862 syncfpu(void)
863 {
864 }
865 
866 void
867 cpu_flush_ecache(void)
868 {
869 }
870 
871 void
872 sticksync_slave(void)
873 {}
874 
875 void
876 sticksync_master(void)
877 {}
878 
879 void
880 cpu_init_cache_scrub(void)
881 {}
882 
883 int
884 dtrace_blksuword32_err(uintptr_t addr, uint32_t *data)
885 {
886 	int ret, watched;
887 
888 	watched = watch_disable_addr((void *)addr, 4, S_WRITE);
889 	ret = dtrace_blksuword32(addr, data, 0);
890 	if (watched)
891 		watch_enable_addr((void *)addr, 4, S_WRITE);
892 
893 	return (ret);
894 }
895 
896 int
897 dtrace_blksuword32(uintptr_t addr, uint32_t *data, int tryagain)
898 {
899 	if (suword32((void *)addr, *data) == -1)
900 		return (tryagain ? dtrace_blksuword32_err(addr, data) : -1);
901 	dtrace_flush_sec(addr);
902 
903 	return (0);
904 }
905 
906 /*ARGSUSED*/
907 void
908 cpu_faulted_enter(struct cpu *cp)
909 {
910 }
911 
912 /*ARGSUSED*/
913 void
914 cpu_faulted_exit(struct cpu *cp)
915 {
916 }
917 
918 static int
919 kdi_cpu_ready_iter(int (*cb)(int, void *), void *arg)
920 {
921 	int rc, i;
922 
923 	for (rc = 0, i = 0; i < NCPU; i++) {
924 		if (CPU_IN_SET(cpu_ready_set, i))
925 			rc += cb(i, arg);
926 	}
927 
928 	return (rc);
929 }
930 
931 /*
932  * Sends a cross-call to a specified processor.  The caller assumes
933  * responsibility for repetition of cross-calls, as appropriate (MARSA for
934  * debugging).
935  */
936 static int
937 kdi_xc_one(int cpuid, void (*func)(uintptr_t, uintptr_t), uintptr_t arg1,
938     uintptr_t arg2)
939 {
940 	int stat;
941 	struct machcpu	*mcpup;
942 	uint64_t cpuaddr_reg = 0, cpuaddr_scr = 0;
943 
944 	mcpup = &(((cpu_t *)get_cpuaddr(cpuaddr_reg, cpuaddr_scr))->cpu_m);
945 
946 	/*
947 	 * if (idsr_busy())
948 	 *	return (KDI_XC_RES_ERR);
949 	 */
950 
951 	init_mondo_nocheck((xcfunc_t *)func, arg1, arg2);
952 
953 	mcpup->cpu_list[0] = (uint16_t)cpuid;
954 	stat = shipit(1, mcpup->cpu_list_ra);
955 
956 	if (stat == 0)
957 		return (KDI_XC_RES_OK);
958 	else
959 		return (KDI_XC_RES_NACK);
960 }
961 
962 static void
963 kdi_tickwait(clock_t nticks)
964 {
965 	clock_t endtick = gettick() + nticks;
966 
967 	while (gettick() < endtick);
968 }
969 
970 static void
971 kdi_cpu_init(int dcache_size, int dcache_linesize, int icache_size,
972     int icache_linesize)
973 {
974 	kdi_dcache_size = dcache_size;
975 	kdi_dcache_linesize = dcache_linesize;
976 	kdi_icache_size = icache_size;
977 	kdi_icache_linesize = icache_linesize;
978 }
979 
980 /* used directly by kdi_read/write_phys */
981 void
982 kdi_flush_caches(void)
983 {
984 	/* Not required on sun4v architecture. */
985 }
986 
987 /*ARGSUSED*/
988 int
989 kdi_get_stick(uint64_t *stickp)
990 {
991 	return (-1);
992 }
993 
994 void
995 cpu_kdi_init(kdi_t *kdi)
996 {
997 	kdi->kdi_flush_caches = kdi_flush_caches;
998 	kdi->mkdi_cpu_init = kdi_cpu_init;
999 	kdi->mkdi_cpu_ready_iter = kdi_cpu_ready_iter;
1000 	kdi->mkdi_xc_one = kdi_xc_one;
1001 	kdi->mkdi_tickwait = kdi_tickwait;
1002 	kdi->mkdi_get_stick = kdi_get_stick;
1003 }
1004 
1005 static void
1006 sun4v_system_claim(void)
1007 {
1008 	watchdog_suspend();
1009 }
1010 
1011 static void
1012 sun4v_system_release(void)
1013 {
1014 	watchdog_resume();
1015 }
1016 
1017 void
1018 plat_kdi_init(kdi_t *kdi)
1019 {
1020 	kdi->pkdi_system_claim = sun4v_system_claim;
1021 	kdi->pkdi_system_release = sun4v_system_release;
1022 }
1023 
1024 /*
1025  * Routine to return memory information associated
1026  * with a physical address and syndrome.
1027  */
1028 /* ARGSUSED */
1029 int
1030 cpu_get_mem_info(uint64_t synd, uint64_t afar,
1031     uint64_t *mem_sizep, uint64_t *seg_sizep, uint64_t *bank_sizep,
1032     int *segsp, int *banksp, int *mcidp)
1033 {
1034 	return (ENOTSUP);
1035 }
1036 
1037 /*
1038  * This routine returns the size of the kernel's FRU name buffer.
1039  */
1040 size_t
1041 cpu_get_name_bufsize()
1042 {
1043 	return (UNUM_NAMLEN);
1044 }
1045 
1046 /*
1047  * This routine is a more generic interface to cpu_get_mem_unum(),
1048  * that may be used by other modules (e.g. mm).
1049  */
1050 /* ARGSUSED */
1051 int
1052 cpu_get_mem_name(uint64_t synd, uint64_t *afsr, uint64_t afar,
1053     char *buf, int buflen, int *lenp)
1054 {
1055 	return (ENOTSUP);
1056 }
1057 
1058 /* ARGSUSED */
1059 int
1060 cpu_get_mem_sid(char *unum, char *buf, int buflen, int *lenp)
1061 {
1062 	return (ENOTSUP);
1063 }
1064 
1065 /* ARGSUSED */
1066 int
1067 cpu_get_mem_addr(char *unum, char *sid, uint64_t offset, uint64_t *addrp)
1068 {
1069 	return (ENOTSUP);
1070 }
1071 
1072 /*
1073  * xt_sync - wait for previous x-traps to finish
1074  */
1075 void
1076 xt_sync(cpuset_t cpuset)
1077 {
1078 	union {
1079 		uint8_t volatile byte[NCPU];
1080 		uint64_t volatile xword[NCPU / 8];
1081 	} cpu_sync;
1082 	uint64_t starttick, endtick, tick, lasttick;
1083 	uint_t largestid, smallestid;
1084 	int i;
1085 
1086 	kpreempt_disable();
1087 	CPUSET_DEL(cpuset, CPU->cpu_id);
1088 	CPUSET_AND(cpuset, cpu_ready_set);
1089 
1090 	CPUSET_BOUNDS(cpuset, smallestid, largestid);
1091 	if (smallestid == CPUSET_NOTINSET)
1092 		goto out;
1093 
1094 	/*
1095 	 * Sun4v uses a queue for receiving mondos. Successful
1096 	 * transmission of a mondo only indicates that the mondo
1097 	 * has been written into the queue.
1098 	 *
1099 	 * We use an array of bytes to let each cpu to signal back
1100 	 * to the cross trap sender that the cross trap has been
1101 	 * executed. Set the byte to 1 before sending the cross trap
1102 	 * and wait until other cpus reset it to 0.
1103 	 */
1104 	bzero((void *)&cpu_sync, NCPU);
1105 	cpu_sync.byte[smallestid] = 1;
1106 	if (largestid != smallestid) {
1107 		for (i = (smallestid + 1); i <= (largestid - 1); i++)
1108 			if (CPU_IN_SET(cpuset, i))
1109 				cpu_sync.byte[i] = 1;
1110 		cpu_sync.byte[largestid] = 1;
1111 	}
1112 
1113 	xt_some(cpuset, (xcfunc_t *)xt_sync_tl1,
1114 	    (uint64_t)cpu_sync.byte, 0);
1115 
1116 	starttick = lasttick = gettick();
1117 	endtick = starttick + xc_tick_limit;
1118 
1119 	for (i = (smallestid / 8); i <= (largestid / 8); i++) {
1120 		while (cpu_sync.xword[i] != 0) {
1121 			tick = gettick();
1122 			/*
1123 			 * If there is a big jump between the current tick
1124 			 * count and lasttick, we have probably hit a break
1125 			 * point. Adjust endtick accordingly to avoid panic.
1126 			 */
1127 			if (tick > (lasttick + xc_tick_jump_limit)) {
1128 				endtick += (tick - lasttick);
1129 			}
1130 			lasttick = tick;
1131 			if (tick > endtick) {
1132 				if (panic_quiesce)
1133 					goto out;
1134 				cmn_err(CE_CONT, "Cross trap sync timeout "
1135 				    "at cpu_sync.xword[%d]: 0x%lx\n",
1136 				    i, cpu_sync.xword[i]);
1137 				cmn_err(CE_PANIC, "xt_sync: timeout");
1138 			}
1139 		}
1140 	}
1141 
1142 out:
1143 	kpreempt_enable();
1144 }
1145 
1146 /*
1147  * Recalculate the values of the cross-call timeout variables based
1148  * on the value of the 'inter-cpu-latency' property of the platform node.
1149  * The property sets the number of nanosec to wait for a cross-call
1150  * to be acknowledged.  Other timeout variables are derived from it.
1151  *
1152  * N.B. This implementation is aware of the internals of xc_init()
1153  * and updates many of the same variables.
1154  */
1155 void
1156 recalc_xc_timeouts(void)
1157 {
1158 	typedef union {
1159 		uint64_t whole;
1160 		struct {
1161 			uint_t high;
1162 			uint_t low;
1163 		} half;
1164 	} u_number;
1165 
1166 	/* See x_call.c for descriptions of these extern variables. */
1167 	extern uint64_t xc_tick_limit_scale;
1168 	extern uint64_t xc_mondo_time_limit;
1169 	extern uint64_t xc_func_time_limit;
1170 	extern uint64_t xc_scale;
1171 	extern uint64_t xc_mondo_multiplier;
1172 	extern uint_t   nsec_shift;
1173 
1174 	/* Temp versions of the target variables */
1175 	uint64_t tick_limit;
1176 	uint64_t tick_jump_limit;
1177 	uint64_t mondo_time_limit;
1178 	uint64_t func_time_limit;
1179 	uint64_t scale;
1180 
1181 	uint64_t latency;	/* nanoseconds */
1182 	uint64_t maxfreq;
1183 	uint64_t tick_limit_save = xc_tick_limit;
1184 	uint_t   tick_scale;
1185 	uint64_t top;
1186 	uint64_t bottom;
1187 	u_number tk;
1188 
1189 	md_t *mdp;
1190 	int nrnode;
1191 	mde_cookie_t *platlist;
1192 
1193 	/*
1194 	 * Look up the 'inter-cpu-latency' (optional) property in the
1195 	 * platform node of the MD.  The units are nanoseconds.
1196 	 */
1197 	if ((mdp = md_get_handle()) == NULL) {
1198 		cmn_err(CE_WARN, "recalc_xc_timeouts: "
1199 		    "Unable to initialize machine description");
1200 		return;
1201 	}
1202 
1203 	nrnode = md_alloc_scan_dag(mdp,
1204 	    md_root_node(mdp), "platform", "fwd", &platlist);
1205 
1206 	ASSERT(nrnode == 1);
1207 	if (nrnode < 1) {
1208 		cmn_err(CE_WARN, "recalc_xc_timeouts: platform node missing");
1209 		goto done;
1210 	}
1211 
1212 	if (md_get_prop_val(mdp, platlist[0],
1213 	    "inter-cpu-latency", &latency) == -1)
1214 		goto done;
1215 
1216 	/*
1217 	 * clock.h defines an assembly-language macro
1218 	 * (NATIVE_TIME_TO_NSEC_SCALE) to convert from %stick
1219 	 * units to nanoseconds.  Since the inter-cpu-latency
1220 	 * units are nanoseconds and the xc_* variables require
1221 	 * %stick units, we need the inverse of that function.
1222 	 * The trick is to perform the calculation without
1223 	 * floating point, but also without integer truncation
1224 	 * or overflow.  To understand the calculation below,
1225 	 * please read the discussion of the macro in clock.h.
1226 	 * Since this new code will be invoked infrequently,
1227 	 * we can afford to implement it in C.
1228 	 *
1229 	 * tick_scale is the reciprocal of nsec_scale which is
1230 	 * calculated at startup in setcpudelay().  The calc
1231 	 * of tick_limit parallels that of NATIVE_TIME_TO_NSEC_SCALE
1232 	 * except we use tick_scale instead of nsec_scale and
1233 	 * C instead of assembler.
1234 	 */
1235 	tick_scale = (uint_t)(((u_longlong_t)sys_tick_freq
1236 	    << (32 - nsec_shift)) / NANOSEC);
1237 
1238 	tk.whole = latency;
1239 	top = ((uint64_t)tk.half.high << 4) * tick_scale;
1240 	bottom = (((uint64_t)tk.half.low << 4) * (uint64_t)tick_scale) >> 32;
1241 	tick_limit = top + bottom;
1242 
1243 
1244 	/*
1245 	 * xc_init() calculated 'maxfreq' by looking at all the cpus,
1246 	 * and used it to derive some of the timeout variables that we
1247 	 * recalculate below.  We can back into the original value by
1248 	 * using the inverse of one of those calculations.
1249 	 */
1250 	maxfreq = xc_mondo_time_limit / xc_scale;
1251 
1252 	/*
1253 	 * Don't allow the new timeout (xc_tick_limit) to fall below
1254 	 * the system tick frequency (stick).  Allowing the timeout
1255 	 * to be set more tightly than this empirically determined
1256 	 * value may cause panics.
1257 	 */
1258 	tick_limit = tick_limit < sys_tick_freq ? sys_tick_freq : tick_limit;
1259 
1260 	tick_jump_limit = tick_limit / 32;
1261 	tick_limit *= xc_tick_limit_scale;
1262 
1263 	/*
1264 	 * Recalculate xc_scale since it is used in a callback function
1265 	 * (xc_func_timeout_adj) to adjust two of the timeouts dynamically.
1266 	 * Make the change in xc_scale proportional to the change in
1267 	 * xc_tick_limit.
1268 	 */
1269 	scale = (xc_scale * tick_limit + sys_tick_freq / 2) / tick_limit_save;
1270 	if (scale == 0)
1271 		scale = 1;
1272 
1273 	mondo_time_limit = maxfreq * scale;
1274 	func_time_limit = mondo_time_limit * xc_mondo_multiplier;
1275 
1276 	/*
1277 	 * Don't modify the timeouts if nothing has changed.  Else,
1278 	 * stuff the variables with the freshly calculated (temp)
1279 	 * variables.  This minimizes the window where the set of
1280 	 * values could be inconsistent.
1281 	 */
1282 	if (tick_limit != xc_tick_limit) {
1283 		xc_tick_limit = tick_limit;
1284 		xc_tick_jump_limit = tick_jump_limit;
1285 		xc_scale = scale;
1286 		xc_mondo_time_limit = mondo_time_limit;
1287 		xc_func_time_limit = func_time_limit;
1288 		/*
1289 		 * Force the new values to be used for future cross
1290 		 * calls.  This is necessary only when we increase
1291 		 * the timeouts.
1292 		 */
1293 		if (tick_limit > tick_limit_save) {
1294 			cpuset_t cpuset = cpu_ready_set;
1295 
1296 			xt_sync(cpuset);
1297 		}
1298 	}
1299 
1300 done:
1301 	if (nrnode > 0)
1302 		md_free_scan_dag(mdp, &platlist);
1303 	(void) md_fini_handle(mdp);
1304 }
1305