1\ 2\ CDDL HEADER START 3\ 4\ The contents of this file are subject to the terms of the 5\ Common Development and Distribution License (the "License"). 6\ You may not use this file except in compliance with the License. 7\ 8\ You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9\ or http://www.opensolaris.org/os/licensing. 10\ See the License for the specific language governing permissions 11\ and limitations under the License. 12\ 13\ When distributing Covered Code, include this CDDL HEADER in each 14\ file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15\ If applicable, add the following below this CDDL HEADER, with the 16\ fields enclosed by brackets "[]" replaced with your own identifying 17\ information: Portions Copyright [yyyy] [name of copyright owner] 18\ 19\ CDDL HEADER END 20\ 21\ Copyright 2006 Sun Microsystems, Inc. All rights reserved. 22\ Use is subject to license terms. 23\ 24\ offsets.in: input file to produce assym.h using the stabs program 25\ 26\ 27\ Guidelines: 28\ 29\ A blank line is required between structure/union/intrinsic names. 30\ 31\ The general form is: 32\ 33\ name size_define [shift_define] 34\ [member_name [offset_define]] 35\ {blank line} 36\ 37\ If no individual member_name's are specified then all members are processed. 38\ If offset_define is not specified then the member_name is 39\ converted to all caps and used instead. If the size of an item is 40\ a power of two then an optional shift count may be output using 41\ shift_define as the name but only if shift_define was specified. 42\ 43\ Arrays cause stabs to automatically output the per-array-item increment 44\ in addition to the base address: 45\ 46\ foo FOO_SIZE 47\ array FOO_ARRAY 48\ 49\ results in: 50\ 51\ #define FOO_ARRAY 0x0 52\ #define FOO_ARRAY_INCR 0x4 53\ 54\ which allows \#define's to be used to specify array items: 55\ 56\ #define FOO_0 (FOO_ARRAY + (0 * FOO_ARRAY_INCR)) 57\ #define FOO_1 (FOO_ARRAY + (1 * FOO_ARRAY_INCR)) 58\ ... 59\ #define FOO_n (FOO_ARRAY + (n * FOO_ARRAY_INCR)) 60\ 61\ There are several examples below (search for _INCR). 62\ 63\ There is currently no manner in which to identify "anonymous" 64\ structures or unions so if they are to be used in assembly code 65\ they must be given names. 66\ 67\ When specifying the offsets of nested structures/unions each nested 68\ structure or union must be listed separately then use the 69\ "\#define" escapes to add the offsets from the base structure/union 70\ and all of the nested structures/unions together. See the many 71\ examples already in this file. 72 73#pragma ident "%Z%%M% %I% %E% SMI" 74 75#ifndef _GENASSYM 76#define _GENASSYM 77#endif 78 79#include <vm/hat_sfmmu.h> 80#include <sys/traptrace.h> 81#include <sys/lpad.h> 82 83machcpu 84 intrstat MCPU_INTRSTAT 85 pil_high_start MCPU_PIL_HIGH_START 86 mpcb_pa MCPU_MPCB_PA 87 kwbuf_full MCPU_KWBUF_FULL 88 kwbuf_sp MCPU_KWBUF_SP 89 kwbuf MCPU_KWBUF 90 cpu_q_base_pa MCPU_CPU_Q_BASE 91 cpu_q_size MCPU_CPU_Q_SIZE 92 dev_q_base_pa MCPU_DEV_Q_BASE 93 dev_q_size MCPU_DEV_Q_SIZE 94 mondo_data MCPU_MONDO_DATA 95 mondo_data_ra MCPU_MONDO_DATA_RA 96 cpu_rq_va MCPU_RQ_BASE_VA 97 cpu_rq_base_pa MCPU_RQ_BASE 98 cpu_rq_size MCPU_RQ_SIZE 99 cpu_nrq_va MCPU_NRQ_BASE_VA 100 cpu_nrq_base_pa MCPU_NRQ_BASE 101 cpu_nrq_size MCPU_NRQ_SIZE 102 cpu_tstat_flags MCPU_TSTAT_FLAGS 103 104\#define CPU_MPCB_PA (CPU_MCPU + MCPU_MPCB_PA) 105\#define CPU_KWBUF_FULL (CPU_MCPU + MCPU_KWBUF_FULL) 106\#define CPU_KWBUF_SP (CPU_MCPU + MCPU_KWBUF_SP) 107\#define CPU_KWBUF (CPU_MCPU + MCPU_KWBUF) 108\#define CPU_Q_BASE (CPU_MCPU + MCPU_CPU_Q_BASE) 109\#define CPU_Q_SIZE (CPU_MCPU + MCPU_CPU_Q_SIZE) 110\#define DEV_Q_BASE (CPU_MCPU + MCPU_DEV_Q_BASE) 111\#define DEV_Q_SIZE (CPU_MCPU + MCPU_DEV_Q_SIZE) 112\#define CPU_RQ_BASE_VA_OFF (CPU_MCPU + MCPU_RQ_BASE_VA) 113\#define CPU_RQ_BASE_OFF (CPU_MCPU + MCPU_RQ_BASE) 114\#define CPU_RQ_SIZE_OFF (CPU_MCPU + MCPU_RQ_SIZE) 115\#define CPU_NRQ_BASE_VA_OFF (CPU_MCPU + MCPU_NRQ_BASE_VA) 116\#define CPU_NRQ_BASE_OFF (CPU_MCPU + MCPU_NRQ_BASE) 117\#define CPU_NRQ_SIZE_OFF (CPU_MCPU + MCPU_NRQ_SIZE) 118\#define CPU_TSTAT_FLAGS (CPU_MCPU + MCPU_TSTAT_FLAGS) 119 120trap_trace_record TRAP_ENT_SIZE 121 tt_gl TRAP_ENT_GL 122 tt_tl TRAP_ENT_TL 123 tt_tt TRAP_ENT_TT 124 tt_tpc TRAP_ENT_TPC 125 tt_tstate TRAP_ENT_TSTATE 126 tt_tick TRAP_ENT_TICK 127 tt_sp TRAP_ENT_SP 128 tt_tr TRAP_ENT_TR 129 tt_f1 TRAP_ENT_F1 130 tt_f2 TRAP_ENT_F2 131 tt_f3 TRAP_ENT_F3 132 tt_f4 TRAP_ENT_F4 133 134htrap_trace_record HTRAP_ENT_SIZE 135 136hat HAT_SIZE 137 sfmmu_cpusran 138 sfmmu_tsb 139 sfmmu_ismblkpa 140 sfmmu_flags 141 sfmmu_hvblock 142 sfmmu_cext 143 sfmmu_ctx_lock 144 sfmmu_ctxs 145 146sfmmu_global_stat HATSTAT_SIZE 147 sf_pagefaults HATSTAT_PAGEFAULT 148 sf_uhash_searches HATSTAT_UHASH_SEARCH 149 sf_uhash_links HATSTAT_UHASH_LINKS 150 sf_khash_searches HATSTAT_KHASH_SEARCH 151 sf_khash_links HATSTAT_KHASH_LINKS 152 153sf_hment SFHME_SIZE SFHME_SHIFT 154 hme_tte SFHME_TTE 155 156tsbmiss TSBMISS_SIZE TSBMISS_SHIFT 157 tsbptr TSBMISS_TSBPTR 158 tsbptr4m TSBMISS_TSBPTR4M 159 ksfmmup TSBMISS_KHATID 160 usfmmup TSBMISS_UHATID 161 khashsz TSBMISS_KHASHSZ 162 khashstart TSBMISS_KHASHSTART 163 uhashsz TSBMISS_UHASHSZ 164 uhashstart TSBMISS_UHASHSTART 165 hat_flags TSBMISS_HATFLAGS 166 ismblkpa TSBMISS_ISMBLKPA 167 itlb_misses TSBMISS_ITLBMISS 168 dtlb_misses TSBMISS_DTLBMISS 169 utsb_misses TSBMISS_UTSBMISS 170 ktsb_misses TSBMISS_KTSBMISS 171 uprot_traps TSBMISS_UPROTS 172 kprot_traps TSBMISS_KPROTS 173 scratch TSBMISS_SCRATCH 174 175\#define TSB_TAGACC (0 * TSBMISS_SCRATCH_INCR) 176\#define TSBMISS_HMEBP (1 * TSBMISS_SCRATCH_INCR) 177\#define TSBMISS_HATID (2 * TSBMISS_SCRATCH_INCR) 178\#define TSBMISS_XMMURET (3 * TSBMISS_SCRATCH_INCR) 179\#define TSBMISS_XMMUPTR (4 * TSBMISS_SCRATCH_INCR) 180 181kpmtsbm KPMTSBM_SIZE KPMTSBM_SHIFT 182 vbase KPMTSBM_VBASE 183 vend KPMTSBM_VEND 184 flags KPMTSBM_FLAGS 185 sz_shift KPMTSBM_SZSHIFT 186 kpmp_shift KPMTSBM_KPMPSHIFT 187 kpmp2pshft KPMTSBM_KPMP2PSHFT 188 kpmp_table_sz KPMTSBM_KPMPTABLESZ 189 kpmp_tablepa KPMTSBM_KPMPTABLEPA 190 msegphashpa KPMTSBM_MSEGPHASHPA 191 tsbptr KPMTSBM_TSBPTR 192 kpm_dtlb_misses KPMTSBM_DTLBMISS 193 kpm_tsb_misses KPMTSBM_TSBMISS 194 195kpm_page KPMPAGE_SIZE KPMPAGE_SHIFT 196 kp_refcnt KPMPAGE_REFCNT 197 kp_refcnta KPMPAGE_REFCNTA 198 kp_refcntc KPMPAGE_REFCNTC 199 kp_refcnts KPMPAGE_REFCNTS 200 201kpm_hlk KPMHLK_SIZE KPMHLK_SHIFT 202 khl_mutex KPMHLK_MUTEX 203 khl_lock KPMHLK_LOCK 204 205kpm_spage KPMSPAGE_SIZE KPMSPAGE_SHIFT 206 kp_mapped KPMSPAGE_MAPPED 207 208kpm_shlk KPMSHLK_SIZE KPMSHLK_SHIFT 209 kshl_lock KPMSHLK_LOCK 210 211memseg MEMSEG_SIZE 212 pages MEMSEG_PAGES 213 epages MEMSEG_EPAGES 214 pages_base MEMSEG_PAGES_BASE 215 pages_end MEMSEG_PAGES_END 216 next MEMSEG_NEXT 217 lnext MEMSEG_LNEXT 218 nextpa MEMSEG_NEXTPA 219 pagespa MEMSEG_PAGESPA 220 epagespa MEMSEG_EPAGESPA 221 kpm_pbase MEMSEG_KPM_PBASE 222 kpm_nkpmpgs MEMSEG_KPM_NKPMPGS 223 mseg_un 224 kpm_pagespa MEMSEG_KPM_PAGESPA 225 226\#define MEMSEG_KPM_PAGES (MSEG_UN) 227\#define MEMSEG_KPM_SPAGES (MSEG_UN) 228 229page PAGE_SIZE 230 p_pagenum PAGE_PAGENUM 231 232tsb_info TSBINFO_SIZE 233 tsb_tte TSBINFO_TTE 234 tsb_va TSBINFO_VADDR 235 tsb_pa TSBINFO_PADDR 236 tsb_szc TSBINFO_SZCODE 237 tsb_next TSBINFO_NEXTPTR 238 239hv_tsb_block 240 hv_tsb_info_pa 241 hv_tsb_info_cnt 242 243cpu_node CPU_NODE_SIZE 244 nodeid 245 clock_freq 246 tick_nsec_scale 247 ecache_size ECACHE_SIZE 248 ecache_linesize ECACHE_LINESIZE 249 device_id DEVICE_ID 250 251ptl1_regs 252 ptl1_trap_regs 253 ptl1_gregs 254 ptl1_tick 255 ptl1_dmmu_type 256 ptl1_dmmu_addr 257 ptl1_dmmu_ctx 258 ptl1_immu_type 259 ptl1_immu_addr 260 ptl1_immu_ctx 261 ptl1_rwindow 262 ptl1_softint 263 ptl1_pstate 264 ptl1_pil 265 ptl1_cwp 266 ptl1_wstate 267 ptl1_otherwin 268 ptl1_cleanwin 269 ptl1_cansave 270 ptl1_canrestore 271 272ptl1_gregs 273 ptl1_gl 274 ptl1_g1 275 ptl1_g2 276 ptl1_g3 277 ptl1_g4 278 ptl1_g5 279 ptl1_g6 280 ptl1_g7 281 282lpad_data 283 magic LPAD_MAGIC 284 inuse LPAD_INUSE 285 mmfsa_ra LPAD_MMFSA_RA 286 pc LPAD_PC 287 arg LPAD_ARG 288 nmap LPAD_NMAP 289 map LPAD_MAP 290 291lpad_map LPAD_MAP_SIZE 292 flags LPAD_MAP_FLAGS 293 va LPAD_MAP_VA 294 tte LPAD_MAP_TTE 295