xref: /titanic_41/usr/src/uts/sun4v/io/fpc/fpc-impl-4v.c (revision e4d060fb4c00d44cd578713eb9a921f594b733b8)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #pragma ident	"%Z%%M%	%I%	%E% SMI"
28 
29 #include <sys/file.h>
30 #include <sys/hypervisor_api.h>
31 #include <sys/hsvc.h>
32 #include <sys/sunndi.h>
33 #include <fpc.h>
34 #include <fpc-impl.h>
35 #include <fpc-impl-4v.h>
36 
37 #define	PCIE_ROOTNEX_COMPATIBLE_NAME	"SUNW,sun4v-pci"
38 
39 #define	FPC_MODULE_NAME			"fpc"
40 #define	FPC_REQ_MAJOR_VER		1
41 #define	FPC_REQ_MINOR_VER		0
42 
43 static hsvc_info_t fpc_hsvc = {
44 	HSVC_REV_1,
45 	NULL,
46 	HSVC_GROUP_FIRE_PERF,
47 	FPC_REQ_MAJOR_VER,
48 	FPC_REQ_MINOR_VER,
49 	FPC_MODULE_NAME
50 };
51 
52 static int hyp_regd_users = 0;
53 static uint64_t	fpc_sup_minor;
54 
55 /*
56  * The following typedef is used to represent a
57  * 1275 "reg" property of a PCI nexus.
58  */
59 typedef struct nexus_regspec {
60 	uint64_t phys_addr;
61 	uint64_t size;
62 } nexus_regspec_t;
63 
64 static uint64_t counter_select_index[] = {
65 	HVIO_FIRE_PERFREG_JBC_SEL,
66 	HVIO_FIRE_PERFREG_PCIE_IMU_SEL,
67 	HVIO_FIRE_PERFREG_PCIE_MMU_SEL,
68 	HVIO_FIRE_PERFREG_PCIE_TLU_SEL,
69 	HVIO_FIRE_PERFREG_PCIE_LNK_SEL
70 };
71 
72 /*
73  * The following event and offset arrays is organized by grouping in major
74  * order the fire_perfcnt_t register types, and in minor order the register
75  * numbers within that type.
76  */
77 
78 /*
79  * This table maps the above order into the hypervisor interface register
80  * indices.
81  */
82 static uint64_t counter_reg_index[] = {
83 	HVIO_FIRE_PERFREG_JBC_CNT0,
84 	HVIO_FIRE_PERFREG_JBC_CNT1,
85 	HVIO_FIRE_PERFREG_PCIE_IMU_CNT0,
86 	HVIO_FIRE_PERFREG_PCIE_IMU_CNT1,
87 	HVIO_FIRE_PERFREG_PCIE_MMU_CNT0,
88 	HVIO_FIRE_PERFREG_PCIE_MMU_CNT1,
89 	HVIO_FIRE_PERFREG_PCIE_TLU_CNT0,
90 	HVIO_FIRE_PERFREG_PCIE_TLU_CNT1,
91 	HVIO_FIRE_PERFREG_PCIE_TLU_CNT2,
92 	HVIO_FIRE_PERFREG_PCIE_LNK_CNT1,
93 	HVIO_FIRE_PERFREG_PCIE_LNK_CNT2
94 };
95 
96 /* Called by _init to determine if it is OK to install driver. */
97 int
98 fpc_platform_check()
99 {
100 	int regstat;
101 
102 	if ((regstat = hsvc_register(&fpc_hsvc, &fpc_sup_minor)) == SUCCESS) {
103 		(void) hsvc_unregister(&fpc_hsvc);
104 	}
105 	fpc_sup_minor = 0;
106 	return (regstat);
107 }
108 
109 /* Called during attach to do module-wide initialization. */
110 /*ARGSUSED*/
111 int
112 fpc_platform_module_init(dev_info_t *dip)
113 {
114 	return (DDI_SUCCESS);
115 }
116 
117 int
118 fpc_platform_node_init(dev_info_t *dip, int *avail)
119 {
120 	nexus_regspec_t	*rp;
121 	uint_t reglen;
122 	devhandle_t dev_hdl;
123 	int regstat;
124 	int index;
125 	boolean_t is_root_pcie_nexus;
126 	uint64_t dummy_data;
127 	char *name = NULL;
128 	boolean_t jbus_regs_avail;
129 	boolean_t pcie_regs_avail;
130 
131 	if (ddi_prop_lookup_string(DDI_DEV_T_ANY, dip,
132 	    DDI_PROP_DONTPASS, "compatible", &name) != DDI_PROP_SUCCESS)
133 		return (DDI_SUCCESS);
134 
135 	is_root_pcie_nexus = (strcmp(name, PCIE_ROOTNEX_COMPATIBLE_NAME) == 0);
136 	ddi_prop_free(name);
137 	if (!is_root_pcie_nexus)
138 		return (DDI_SUCCESS);
139 
140 	if (ddi_prop_lookup_byte_array(DDI_DEV_T_ANY, dip,
141 	    DDI_PROP_DONTPASS, "reg", (uchar_t **)&rp, &reglen) !=
142 	    DDI_PROP_SUCCESS)
143 		return (DDI_FAILURE);
144 
145 	/*
146 	 * Initilize device handle. The device handle uniquely
147 	 * identifies a SUN4V device. It consists of the lower 28-bits
148 	 * of the hi-cell of the first entry of the SUN4V device's
149 	 * "reg" property as defined by the SUN4V Bus Binding to Open
150 	 * Firmware.
151 	 */
152 	dev_hdl = (devhandle_t)((rp->phys_addr >> 32) & DEVHDLE_MASK);
153 
154 	ddi_prop_free(rp);
155 
156 	/*
157 	 * If this is the first time through here, negotiate with hypervisor
158 	 * that it has the services needed to operate.  Don't do this in _init
159 	 * since we may want to modload the driver without attaching,
160 	 * for debugging purposes.
161 	 *
162 	 * Note that this is another way of weeding out unsupported platforms
163 	 */
164 	if (hyp_regd_users == 0) {
165 		regstat = hsvc_register(&fpc_hsvc, &fpc_sup_minor);
166 		if (regstat != SUCCESS) {
167 			/*
168 			 * Fail silently since we don't want to print an error
169 			 * on future platforms which don't support this driver.
170 			 */
171 			return (DDI_FAILURE);
172 		}
173 	}
174 	hyp_regd_users++;
175 
176 	/* See which register sets are usable from this node. */
177 	jbus_regs_avail = (fpc_event_io(
178 	    (fire_perfreg_handle_t)dev_hdl, jbc, &dummy_data, IS_READ) ==
179 	    SUCCESS);
180 	pcie_regs_avail = (fpc_event_io(
181 	    (fire_perfreg_handle_t)dev_hdl, imu, &dummy_data, IS_READ) ==
182 	    SUCCESS);
183 
184 	/* Nothing usable at this node. */
185 	if ((!jbus_regs_avail) && (!pcie_regs_avail))
186 		return (DDI_SUCCESS);
187 
188 	fpc_common_node_setup(dip, &index);
189 	if (pcie_regs_avail)
190 		*avail |=
191 		    ((index == 0) ? PCIE_A_REGS_AVAIL : PCIE_B_REGS_AVAIL);
192 	if (jbus_regs_avail) {
193 		*avail |= JBUS_REGS_AVAIL;
194 		if (index != 0)
195 			cmn_err(CE_WARN,
196 			    "fpc: JBUS regs available on device idx %d!\n",
197 			    index);
198 	}
199 
200 	(void) fpc_set_platform_data_by_number(index, (void *)dev_hdl);
201 
202 	return (DDI_SUCCESS);
203 }
204 
205 /*ARGSUSED*/
206 void
207 fpc_platform_node_fini(void *arg)
208 {
209 	if (--hyp_regd_users == 0)
210 		(void) hsvc_unregister(&fpc_hsvc);
211 }
212 
213 /*ARGSUSED*/
214 void
215 fpc_platform_module_fini(dev_info_t *dip)
216 {
217 }
218 
219 fire_perfreg_handle_t
220 fpc_get_perfreg_handle(int devnum)
221 {
222 	void *platform_specific_data;
223 
224 	if ((platform_specific_data =
225 	    fpc_get_platform_data_by_number(devnum)) == NULL)
226 		return ((fire_perfreg_handle_t)-1);
227 	else
228 		return ((fire_perfreg_handle_t)platform_specific_data);
229 }
230 
231 /*ARGSUSED*/
232 int
233 fpc_free_counter_handle(fire_perfreg_handle_t handle)
234 {
235 	return (SUCCESS);
236 }
237 
238 static int
239 fpc_hv_perfreg_io(fire_perfreg_handle_t handle, uint64_t hv_if_index,
240     uint64_t *reg_data, boolean_t is_write)
241 {
242 	int rval;
243 	devhandle_t dev_hdl = (devhandle_t)handle;
244 
245 	if (is_write)
246 		rval = fpc_set_fire_perfreg(dev_hdl, hv_if_index, *reg_data);
247 	else
248 		rval = fpc_get_fire_perfreg(dev_hdl, hv_if_index, reg_data);
249 
250 	return ((rval == H_EOK) ? SUCCESS : EIO);
251 }
252 
253 int
254 fpc_event_io(fire_perfreg_handle_t handle, fire_perfcnt_t group,
255     uint64_t *reg_data, boolean_t is_write)
256 {
257 	uint64_t hv_if_index = counter_select_index[group];
258 	return (fpc_hv_perfreg_io(handle, hv_if_index, reg_data, is_write));
259 }
260 
261 
262 /*ARGSUSED*/
263 int
264 fpc_counter_io(fire_perfreg_handle_t handle, fire_perfcnt_t group,
265     int counter_index, uint64_t *reg_data, boolean_t is_write)
266 {
267 	uint64_t hv_if_index = counter_reg_index[counter_index];
268 	return (fpc_hv_perfreg_io(handle, hv_if_index, reg_data, is_write));
269 }
270